JP2010041059A - Coating and developing apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To achieve high carrying efficiency and high throughput in a coating and developing apparatus that performs a developing process on an exposed substrate after forming a coating layer including a resist layer on the substrate. <P>SOLUTION: A carrier block S1, a processing block S2 and an interface are disposed in a single line. In the processing block S2, two unit blocks are aligned in the front-back direction. The unit block includes a wafer transfer path that extends horizontally and linearly from the carrier block S1 towards the interface block S3, a coating processing unit that applies a coating solution on a substrate before exposure, and a heat processing unit that performs heat processing on the substrate. Rows of the two unit blocks are stacked vertically. The front unit block and the back unit block in the row of unit blocks in each layer are successively processed. The transfer of substrates between both unit blocks is performed via an intermediate stage. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a coating and developing apparatus that performs a resist solution coating process, a developing process after exposure, and the like on a substrate such as a semiconductor wafer or an LCD substrate (glass substrate for liquid crystal display).

  In the manufacturing process of a semiconductor device or an LCD substrate, a resist pattern is formed on the substrate by a technique called photolithography. In this technology, for example, a resist solution is applied to a substrate such as a semiconductor wafer (hereinafter referred to as a wafer), a liquid film is formed on the surface of the wafer, the resist film is exposed using a photomask, and then developed. Is performed by a series of steps to obtain a desired pattern.

  Such processing is generally performed using a resist pattern forming apparatus in which an exposure apparatus is connected to a coating / developing apparatus for coating and developing a resist solution. For example, a configuration shown in Patent Document 1 is known as such an apparatus. In this apparatus, for example, as shown in FIG. 11, a carrier 10 containing a large number of wafers W is carried into a carrier stage 11 of a carrier block 1A. Then, the wafer in the carrier 10 is transferred to the processing unit 1B by the transfer arm 12. Then, the resist solution is applied to the coating unit 13A in the processing section 1B, and then transferred to the exposure apparatus 1D through the interface block 1C.

  The wafer after the exposure processing is returned to the processing unit 1B again, developed in the developing unit 13B, and returned to the original carrier 10. In the figure, 14 (14a to 14c) includes a heating unit, a cooling unit, a delivery stage, and the like for performing predetermined heating processing and cooling processing on the wafer before and after the processing of the coating unit 13A and the developing unit 13B. It is a shelf unit. Here, the wafer W is transported between the coating unit 13A, the developing unit 13B, each part of the shelf units 14A to 14C, and the like by the two transporting units 15A and 15B provided in the processing unit 1B. At this time, when the above processing is performed, the wafer W is transferred according to a transfer schedule in which all the wafers W to be processed are previously transferred to which module.

  By the way, in the configuration in which the coating unit, the heating unit, and the cooling unit are provided in the same processing unit, the number of units incorporated in one processing unit is large, the processing unit becomes large, and the occupation area increases. In recent years, the throughput of the exposure apparatus has become faster, and the coating and developing apparatus are also required to have a processing capability that matches the throughput of the exposure apparatus. It is difficult to increase the throughput because the wafer is transferred to the unit for forming the prevention film and the wafer is transferred to the unit for developing, which is a post-exposure process, using a common transfer system. There is also a problem.

  For this reason, the present inventors arrange the area for storing the unit before the exposure process and the area for storing the unit after the exposure process vertically, and by providing the transfer means in each area, the load on the transfer means To improve the transport efficiency, thereby increasing the throughput of the coating and developing apparatus, and to construct a system with a high degree of freedom in transport.

  On the other hand, Patent Document 2 discloses a configuration in which an area for performing a coating process and an area for performing a developing process are arranged above and below, and a conveying unit is provided in each area. However, depending on the type of resist, it is necessary to form an antireflection film on or under the resist film, or above and below the resist film. In this case, a unit block (one layered structure) for forming the resist film is required. Two layers), a unit block for forming an antireflection film before the resist, and a unit block for forming the antireflection film after forming the resist film are stacked on each other. There is a problem that the height becomes large, it becomes difficult to transport the coating and developing apparatus from the apparatus manufacturer to the user, and it is difficult to perform maintenance. On the other hand, when the unit block is configured by arranging units for applying a resist film or forming an antireflection film in the same layer, the length of the unit block is increased particularly when the wafer size is large, and a large installation area is obtained. There is a problem that it becomes necessary.

JP 2004-193597 A Japanese Patent No. 3337677

  The present invention has been made under such circumstances, and the purpose thereof is to obtain high transport efficiency, facilitate maintenance by moderately suppressing the height of the apparatus, and moderate the length of the apparatus. An object of the present invention is to provide a coating / developing apparatus that can prevent an increase in the installation area.

In the present invention, a substrate carried by a carrier into a carrier block is transferred to a processing unit, and after a coating film including a resist film is formed in the processing unit, the substrate is conveyed to an exposure apparatus via an interface block, and the interface block is In the coating and developing apparatus for developing the substrate after exposure returned through the processing unit and delivering it to the carrier block,
a) The processing unit is arranged on the carrier block side, each substrate transport path extending from the carrier block toward the interface block and a plurality of unit blocks stacked on each other, The second laminated block is disposed on the interface block side with respect to the first laminated block portion, and each of the substrate transport paths extends from the first laminated block portion toward the interface block and is composed of a plurality of unit blocks stacked on each other. An intermediate stage provided for each stage of the unit block between the laminated block part and the first laminated block part and the second laminated block part, and for transferring the substrate between the laminated block parts; Prepared,
b) The first laminated block portion includes a unit block for the bottom antireflection film for applying the chemical solution for the antireflection film to the substrate before applying the resist solution, and a resist for applying the resist solution to the substrate. A unit block for film, and a unit block for development for applying and developing a developer to the substrate after exposure,
c) The second laminated block portion is provided at a height position corresponding to the unit block for the bottom antireflection film of the first laminated block portion, and a unit block for the resist film for applying a resist solution to the substrate And an upper antireflection film for applying a chemical solution for the antireflection film to the substrate after the resist solution is applied, which is provided at a height position corresponding to the unit block for the resist film of the first laminated block portion And a unit block for development that is provided at a height position corresponding to the unit block for development of the first laminated block portion and that applies a developer to the substrate after exposure and performs development. With
d) Each unit block includes a liquid processing unit for applying a chemical solution to the substrate, a heating unit for heating the substrate, a cooling unit for cooling the substrate, and transport for the unit block for transporting the substrate between these units. Means, and
e) The substrate on which the antireflection film is formed in the unit block for the bottom antireflection film in the first laminated block portion is applied to the resist film in the second laminated block portion through the intermediate stage corresponding to the unit block. A processing mode including a step including a step of transporting the unit block and forming a resist film on the substrate;
A unit block for the upper antireflection film in the second laminated block unit is formed on the substrate on which the resist film is formed in the unit block for the resist film in the first laminated block unit via an intermediate stage corresponding to the unit block. And a processing mode including a step of forming an upper antireflection film on the substrate.

In this invention, it is provided with transport means that can be raised and lowered for transferring the substrate between the unit block for the resist film and the unit block for the upper antireflection film in the second laminated block portion,
A substrate on which the antireflection film is formed in the unit block for the bottom antireflection film in the first laminated block portion is transferred to the unit for the resist film in the second laminated block portion through an intermediate stage corresponding to the unit block. Transported to block, forming resist film on the substrate, and transporting the substrate to the unit block for the upper antireflection film in the second stacked block unit, forming the upper antireflection film on the substrate You may make it further provide the processing mode including the process to perform.

Alternatively, in the present invention, the apparatus includes a transport means that can move up and down for transferring the substrate between the unit block for the bottom antireflection film and the unit block for the resist film in the first laminated block portion,
The substrate on which the antireflection film is formed in the unit block for the bottom antireflection film in the first laminated block portion is transferred to the unit block for the resist film in the first laminated block portion, and resisted to the substrate The film is formed, and further transferred to the unit block for the upper antireflection film in the second laminated block part through the intermediate stage corresponding to the unit block for the resist film, and the upper antireflection film is attached to the substrate. You may make it further provide the processing mode containing the process to form. One of the developing unit block of the first laminated block portion and the developing unit block of the second laminated block portion is an inspection unit for inspecting the surface of the substrate, and the substrate between the inspection unit and the intermediate stage. The unit block for inspection provided with the conveyance means for the unit block to convey may be sufficient.

  The present invention provides a unit block having a unit for performing a coating process before exposure and a transport unit for transporting a substrate between units, a unit for performing a development process after exposure, and a transport unit for transporting a substrate between units. The unit block provided is separated into upper and lower units, and a unit for performing a pre-exposure coating process is dispersed back and forth between the first laminated block portion and the second laminated block portion, and an antireflection film is further formed on the resist film. Depending on whether it is applied on the upper side or the lower side, the layers of both laminated block portions are used properly. Accordingly, the height of the apparatus can be reduced as compared with the case where the unit blocks for performing the coating process are simply laminated, so that the maintenance is easy, and the unit block for performing the coating process is unit compared with the case where the unit block is configured by one layer. Since the length of the block can be suppressed, an increase in the installation area can be prevented. In the processing section, the substrate is transported before exposure and the substrate after exposure is transported by separate transport means, so the transport efficiency is high.

  Further, if the substrate is transferred between the unit blocks having the height corresponding to each other in both stacked block portions via the intermediate stage, the substrate can be transferred using the transfer means of each unit block. Further, it is not necessary to provide a conveying means dedicated for substrate transfer between the two laminated block portions, and the configuration of the conveying system is simplified.

  Hereinafter, a first embodiment of a coating and developing apparatus according to the present invention will be described. FIG. 1 shows a plan view of an embodiment in which the coating and developing apparatus of the present invention is applied to a resist pattern forming apparatus, FIG. 2 is a schematic perspective view thereof, and FIG. 3 is a schematic side view thereof. This coating / developing apparatus includes a carrier block S1 for carrying in / out a carrier 20 in which, for example, 13 wafers W serving as substrates are hermetically stored, and a processing block for performing coating processing and development processing on the wafer W. S2 and interface block S3 are provided and connected to exposure apparatus S4.

  In the carrier block S 1, a mounting table 21 on which a plurality of the carriers 20 can be mounted, an opening / closing part 22 provided on a front wall as viewed from the mounting table 21, and a wafer from the carrier 20 via the opening / closing part 22. A transfer arm C for taking out W is provided. The transfer arm C can move forward and backward, can move up and down, and can rotate about a vertical axis so as to transfer a wafer W to and from a transfer stage TRS1, 2, and 3 of a unit block B2, which will be described later. It is configured to be freely movable.

  A processing block S2 surrounded by a casing 24 is connected to the back side of the carrier block S1. In this example, the processing block S2 is arranged on the carrier block S1 side, and the first laminated block portion 41 in which the conveyance path of the wafer W extends linearly from the carrier block S1 toward the interface block S3. The first laminated block unit 41 is disposed on the interface block S3 side and extends toward the interface block S3 so that the conveyance path of each wafer W is aligned with the conveyance path in the first laminated block unit 41. 2nd laminated block part 42 is provided.

  The first laminated block unit 41 applies a developing solution to the exposed wafer W and applies a developing solution to the developing unit block (DEV layer) B1 for developing the wafer W and a resist solution to the wafer W. Unit block (COT layer) B2 for resist film, unit block (BCT layer) B3 for bottom antireflection film for applying a chemical solution for antireflection film to wafer W before applying the resist solution, Are stacked in this order from the bottom. In addition, the second laminated block unit 42 applies a developing unit block (DEV layer) B4 for applying a developing solution to the exposed wafer W to perform development, and the wafer W after applying a resist solution. A unit block (TCT layer) B5 for the upper antireflection film for applying the chemical solution for the antireflection film, and a unit block (COT layer) B6 for the resist film for applying the resist solution to the wafer W; Are stacked in this order from the bottom. In the following, in order to avoid redundant description, both the term “unit block” and the term “XX layer” are used as appropriate. The DEV layer B1, COT layer B2, and BCT layer B3 are disposed at the same height as the DEV layer B4, TCT layer B5, and COT layer B6, respectively.

  Between the first laminated block portion 41 and the second laminated block portion 42, the wafer W is positioned by a position corresponding to each stage of the unit blocks B1 to B3 (B4 to B6), that is, a main arm described later in the unit block. Intermediate stages TRS6, TRS7, and TRS8, which are delivery stages, are provided at positions where delivery can be performed.

  Next, the configuration of the unit blocks B1 to B6 will be described. Each of these unit blocks B1 to B6 includes a liquid processing unit for applying a chemical solution to the wafer W, and various heating / cooling systems for performing pre-processing and post-processing of processing performed in the liquid processing unit. And main arms A1 to A6 which are transfer means for unit blocks for transferring the wafer W between the liquid processing unit and the heating / cooling processing unit.

  In this example, these unit blocks B1 to B6 are formed in the same arrangement layout of the liquid processing unit, the heating / cooling processing unit, and the conveying means A between the unit blocks B1 to B6. Yes. Here, the same arrangement layout means that the center on which the wafer W is placed in each processing unit, that is, the center of the spin chuck described later in the liquid processing unit, and the center of the heating plate or cooling plate in the heating unit or cooling unit are the same. It means that.

  First, the COT layer B2 shown in FIG. 1 will be described below as an example. Near the center of the COT layer B2, a transfer region R1 for the wafer W for connecting the carrier block S1 and the interface block S3 is formed in the length direction of the COT layer B2 (Y-axis direction in the figure). Yes. On both sides of the transport region R1 viewed from the carrier block S1 side, a plurality of resist coating processes are performed as the liquid processing unit on the right side from the near side (carrier block S1 side) toward the back side. An application unit 31 having an application part is provided. Further, on the left side from the front side to the back side of the COT layer B2, four shelf units U1, U2, U3, U4 (two-stage units are referred to as shelf units) in which heating / cooling units are arranged in two stages in order. The various units for performing pre-processing and post-processing of the processing performed in the coating unit 31 are stacked in a plurality of stages, for example, two stages. Thus, the transport region R1 is partitioned, and, for example, clean air is ejected and exhausted to the partitioned transport region R1, thereby preventing particles from floating in the region.

  Among the various units for performing the above pre-processing and post-processing, for example, as shown in FIG. 4, a cooling unit (COL2) for adjusting the wafer W to a predetermined temperature before applying the resist solution, a resist For example, a heating unit (CHP2) called a pre-baking unit or the like for performing the heat treatment of the wafer W after the application of the liquid is included. Each processing unit such as the cooling unit (COL2) and the heating unit (CHP2) is housed in the processing container 51, and the shelf units U1 to U4 are configured by stacking the processing containers 51 in two stages. A wafer loading / unloading port 52 is formed on the surface of each processing container 51 facing the transfer region R1. As shown in FIG. 1, the heating unit (CHP2) has a configuration including a heating plate 53 and a cooling plate 54 that also serves as a transfer arm. Furthermore, in the shelf units U1 to U4, a hydrophobic unit (ADH2) that performs a hydrophobic treatment by supplying, for example, an organic gas to the surface of the wafer W in order to improve the adhesion between the surface of the wafer W and the resist film. It is included.

  The main arm A2 is provided in the transfer region R1. The main arm A2 includes all modules (places where the wafer W is placed) in the COT layer B2, such as the processing units of the shelf units U1 to U4, the coating unit 31, a shelf unit U5 described later, and the intermediate stage described above. It is configured to transfer the wafer to / from the TRS 7, and for this purpose, it is configured to be movable back and forth, freely movable up and down, rotatable about the vertical axis, and movable in the Y-axis direction.

  Further, as shown in FIGS. 1 and 3, the transfer arm C and the main arms A1 to A3 of the unit blocks B1 to B3 can be accessed between the carrier block S1 and the first laminated block portion 41. A shelf unit U5 is provided. More specifically, as shown in FIG. 3, the shelf unit U5 includes transfer stages TRS1 to TRS3 so that the wafer W can be transferred to and from the main arms A1 to A3. In this example, two transfer stages TRS1 to TRS3 are provided for each of the unit blocks B1 to B3.

  Further, a shelf unit U7 is provided between the second laminated block portion 42 and the interface block S3 as shown in FIG. 3, and the shelf unit U7 is connected to each main arm A4 to A4 of the second laminated block portion 42. The transfer stages TRS9 to TRS11 are provided so that the wafer W can be transferred to and from A6. In this example, transfer stages TRS9 to TRS11 are provided in two stages corresponding to the unit blocks B4 to B6. Is provided.

  Further, as shown in FIG. 1, the processing block S2 is provided with a delivery arm 61 that is a transfer means that can move up and down and move forward and backward so that the wafer W can be delivered to the delivery stages TRS10 and TRS11. . The transfer arm 61 is a wafer W discharged from the COT layer B6 to the transfer stage TRS11 when an antireflection film is further formed on the wafer W on which the resist film is formed in the COT layer B6 as will be described later. Has a function of delivering to the delivery stage TRS10 corresponding to the TCT layer B5.

  On the other hand, an exposure apparatus S4 is connected to the back side of the shelf unit U6 in the processing block S2 via an interface block S3. The interface block S3 includes an interface arm 62 for delivering the wafer W to the shelf unit U6 of the processing block S2 and the exposure apparatus S4. The interface arm 62 serves as a transfer means for the wafer W interposed between the processing block S2 and the exposure apparatus S4. In this example, the wafer W is transferred to the transfer stages TRS9 to TRS11 of the shelf unit U6. It is configured to be able to advance and retreat, move up and down, and rotate about the vertical axis. In this example, the burden on the interface arm 62 is not increased in the operation of transporting the wafer W from the transfer stage TRS11 to TRS10 in order to form an antireflection film on the wafer W coated with the resist film in the COT layer B6. However, the interface arm 62 may be provided without providing the delivery arm 61.

  Next, other unit blocks will be briefly described. The DEV layers B1, B4, BCT layer B3, and TCT layer B5 are configured in the same manner as the COT layers B2 and B6. The difference is that the coating unit 31 that is a liquid processing unit reflects as a chemical solution instead of a resist solution. For example, a chemical solution for the prevention film or a chemical solution (developing solution) for development is used, the method of applying the chemical solution is different, and the processing conditions in the heating system and cooling system units are different. However, the main arms A1, A3, A4, and A5 deliver the wafer W to each processing unit, and further deliver the wafer W between the delivery stage of the shelf unit U5 or U7 and the intermediate stage of the shelf unit U6. It is the same composition. Further, the TCT layer B5 and the COT layer B6 in the second stacked block unit 42 are selectively exposed to, for example, the shelf unit U4 by the peripheral exposure apparatus (WEE) in order to selectively expose only the edge portion of the wafer W before the subsequent exposure processing. It is configured to be incorporated.

  Next, the application unit 31 will be briefly described with reference to FIG. In this example, three application units 301, 302, and 303 are housed in a common processing container 300, and are arranged in the horizontal direction (Y-axis direction) so that each of them faces the transfer region R1, and a common base 304 is provided. Is provided.

  Since the coating units 301, 302, and 303 are configured in the same manner, the coating unit 301 will be described as an example. In the figure, reference numeral 305 denotes a spin chuck that forms a substrate holding unit, and holds the wafer W horizontally by vacuum suction. Is configured to do. The spin chuck 305 can be rotated about a vertical axis by a driving unit 306 and can be moved up and down. Further, a cup 307 is provided around the spin chuck 305 so as to surround a side portion extending from the wafer W to the spin chuck 305, and a drainage unit 308 including an exhaust pipe and a drain pipe is provided on the bottom surface of the cup 307. Yes. In the figure, reference numeral 309 denotes a side rinsing mechanism for supplying a rinsing liquid to the peripheral portion of the wafer W held by the spin chuck 302, and is configured to be movable up and down and rotatable about a vertical axis.

  In the drawing, reference numeral 310 denotes a common supply nozzle (chemical solution nozzle) for supplying the application liquid to the three application units 301, 302, and 303. The supply nozzle 310 is moved by the moving mechanism 312 to the processing container 300. From the outer side of the cup 307 of the application part 301 on one end side to the outer side of the cup 307 of the application part 303 on the other end along the guide rail 311 provided along the length direction (Y direction) It is configured to be movable and liftable. Accordingly, in this example, the supply nozzle 310 supplies the resist solution to the substantially central region of the wafer W held by the spin chuck 305 of each coating unit 301 to 303. In the figure, reference numeral 313 denotes a standby area of the supply nozzle 310 provided outside the application unit 301 on one end side.

  In the figure, reference numeral 314 denotes a filter unit attached to the ceiling of the processing container 300, and reference numeral 315 denotes an exhaust unit provided on the bottom surface of the processing container 300. The exhaust unit evacuates from the exhaust part with a predetermined exhaust amount, and from the filter unit 317 to a predetermined value. By supplying a clean gas whose flow rate is adjusted in temperature and humidity, a down flow of the clean gas is formed in the processing container 300, and the positive pressure is set to be higher than the transfer region R1 of the main arm A4. ing. In the drawing, reference numeral 316 denotes a wafer W loading / unloading port formed on the surface of the processing container 300 facing the transfer region R1.

  In the coating unit 31, the wafer W is loaded into the processing container 300 via the loading / unloading port 316 by the main arm A 4, and transferred to any one of the spin chucks 305 of the coating units 301, 302, and 303 determined in advance. Then, the resist solution is supplied from the supply nozzle 310 to the center of the wafer W, and the spin chuck 305 is rotated to spread the resist solution in the radial direction of the wafer W by centrifugal force, thereby forming a resist film on the surface of the wafer W. Let The wafer W on which the resist liquid film is thus formed is carried out of the coating unit 31 by the main arm A through the carry-in / out port 316.

  In such a coating unit 31, since the three coating parts 301-303 are provided in the common processing container 300, processing atmosphere is the same. For this reason, the supply nozzle 310 can be shared, and the resist solution can be supplied to the three coating units 301 to 303 by one supply nozzle 310. Compared with the case where the processing container 300 and the supply nozzle 310 are provided, the total number of members and the occupied area can be reduced.

  Returning to FIG. 1, the coating and developing apparatus includes a control unit 50, and the control unit 50 is configured to be able to designate a processing mode in the processing block S <b> 2 for the wafer W. The processing mode here means an arrangement of units in which the wafers W are transferred in order. As a method for specifying the processing mode, the units may be input in the order of transfer. Alternatively, it may be a method of specifying in which order the wafer W is transferred to which unit block, or the arrangement data of units corresponding to the transfer paths of various wafers W are associated with the processing types. Alternatively, the processing type may be selected from the generated data. In addition, when the unit blocks to be used are specified in order and the unit blocks are specified, for example, when the unit W is automatically determined for each unit block and the unit to be used is selected. There may be.

An example of processing mode is:
Processing mode M1 transported by the path of the BCT layer B3 of the first stacked block unit 41 to the COT layer B6 of the second stacked block unit 42,
A processing mode M2 transported by a route from the COT layer B2 of the first stacked block unit 41 to the TCT layer B5 of the second stacked block unit 42;
A processing mode M3 transported by a route of BCT layer B3 of the first laminated block unit 41 → COT layer B6 of the second laminated block unit 42 → TCT layer B5 of the second laminated block unit 42;
A processing mode M4 transported by a route of BCT layer B3 of the first stacked block unit 41 → COT layer B2 of the first stacked block unit 41 → TCT layer B5 of the second stacked block unit 42;
A processing mode M5 using only the COT layer B2 of the first stacked block unit 41,
A processing mode M6 using only the COT layer B6 of the second stacked block unit 42;
And so on. Note that the processing modes described here are only described for pre-exposure processing. In each processing mode, the wafer W is transferred to the exposure apparatus S4 and then transferred to the DEV layer B4 or B1 and developed. The same.
Next, the operation of this embodiment will be described. First, it is assumed that the processing mode M1 is selected by the control unit 50. First, the carrier 20 is carried into the carrier block 21 from the outside, and the wafer W is taken out from the carrier 20 by the transfer arm C. The wafer W is transferred from the transfer arm C to the transfer stage TRS3 of the shelf unit U5, and then transferred to the main arm A3 of the BCT layer B3 in the first stacked block unit 41. In the BCT layer B3, the main arm A3 causes a cooling unit (COL) → an antireflection film forming unit (not shown, but a unit corresponding to the coating unit 31 in FIG. 1) → a heating unit (CHP). The first antireflection film is formed on the wafer W. Although the arrangement of the processing units in the BCT layer B3 is not shown in the figure, since it has substantially the same configuration as FIG. 4 as described above, the image of the transport path should be grasped by referring to FIG. is there.

  Subsequently, the wafer W is transferred to the intermediate stage TRS8 of the shelf unit U6 by the main arm A3, and further transferred to the main arm A6 of the COT layer B6 in the second stacked block unit 42. In the COT layer B6, the main arm A6 is conveyed in the order of the hydrophobic treatment unit (ADH) → the cooling unit COL → the coating unit 31 → the heating unit CHP to form a resist film on the wafer W. Further, the peripheral exposure apparatus (WEE) and the peripheral edge is exposed. Thereafter, the wafer W is transferred to the transfer unit TRS11 of the shelf unit by the main arm A6, and is transferred to the exposure device S4 by the interface arm D, where a predetermined exposure process is performed. In FIG. 6, the flow of the wafer W corresponding to the processing mode M1 is indicated by solid arrows.

  The wafer W after the exposure process is transferred to the transfer stage TRS9 of the shelf unit U6 by the interface arm D, and further received by the main arm A4 of the DEV layer B4. Then, for example, in the DEV layer B4, first, the film is transported in the order of the heating unit (PEB) → the cooling unit (COL) → the developing unit → the heating unit (POST), and a predetermined developing process is performed. The wafer W thus developed is transferred to the main arm A1 of the DEV layer B1 via the intermediate stage TRS6 of the shelf unit U6, and further transferred to the transfer arm C via the transfer stage TRS1 of the shelf unit U5. Then, the original carrier 20 placed on the carrier block S1 is returned. The development processing for the wafer W may be performed in the DEV layer B1 through the DEV layer B4 instead of being performed in the DEV layer B4. Usually, the antireflection film forming process and the resist film forming process are performed. Since the development process takes a longer time compared to DEV, both DEV layers B1 and B4 are often used.

  Next, assume that the processing mode M2 is selected. In this case, the wafer W in the carrier 20 is transferred to the transfer stage TRS2 of the shelf unit U5 by the transfer arm C and received by the main arm A2 of the COT layer B2, where a resist film forming process is performed. Next, the wafer W is transferred to the main arm A5 of the TCT layer B5 via the intermediate stage TRS7 of the shelf unit U6, and an antireflection film is formed on the resist film in the same manner as described for the BCT layer B3. . In FIG. 6, the flow of the wafer W corresponding to the processing mode M2 is indicated by a chain line arrow. Thereafter, the wafer W is transferred to the transfer stage TRS10 of the shelf unit U7, and thereafter, the same transfer and processing as in the processing mode M1 are performed.

  When the processing mode M3 is selected, an antireflection film is formed on the wafer W in the BCT layer B3 of the first stacked block unit 41, and then the second state is passed through the intermediate stage TRS8 of the shelf unit U6. The process is the same as in the processing mode M1 until the resist film is formed by being transferred to the COT layer B6 of the laminated block part 42. However, after being transferred to the transfer stage TRS11 of the shelf unit U7, the dedicated transfer arm 61 is used. Is transferred to the delivery stage TRS10. Thereafter, the film is received by the main arm A5 of the TCT layer B5, and an antireflection film is formed on the resist film on the wafer W in the TCT layer B5. Then, this wafer W is transferred to the delivery stage TRS10 of the shelf unit U7, and thereafter the same processing is performed. In FIG. 6, the flow of the wafer W corresponding to the processing mode M3 is indicated by dotted arrows.

  When the processing mode M5 or M6 is selected, the COT layer B2 or B6 is used, and only the resist film is formed on the wafer W and transferred to the exposure apparatus S4.

  According to the above-described embodiment, the unit for performing liquid processing and the transport means for transporting between the units are blocked to form unit blocks, and the unit blocks (COT layers B2, B6 and BCT layer B3 and TCT layer B5) and unit blocks (DEV layers B1, B4) for performing development processing after exposure are separated vertically, and a unit for performing coating processing before exposure is a first laminated block section. 41 and the second laminated block portion 42 are dispersed in the front and rear, and further, the antireflection film is applied on the resist film, on the lower side, or on the upper side or the lower side. Changing the way. Accordingly, since the transport of the substrate before exposure and the transport of the substrate after exposure are performed by separate transport means in the processing block S2, which is a processing unit, transport efficiency is high, and unit blocks for further coating processing are simply stacked. Since the height of the device can be reduced compared to the case of maintenance, maintenance is easy, and the length of the unit block can be reduced compared to the case where the unit block for performing the coating process is composed of one layer. An increase in area can be prevented.

  Then, the substrate is transported between the unit blocks having the corresponding heights of the stacked block portions 41 and 42 (between B3 and B6 or between B2 and B5) via the intermediate stage TRS7 or TRS8 of the shelf unit U6. Therefore, since the substrate can be transferred by using the transfer means of each unit block, there is no need to provide a transfer means dedicated for transferring the substrate between the laminated block portions 41 and 42, and the structure of the transfer system is simple. become. A plurality of intermediate stages TRS7 or TRS8 may be provided in order to match the throughput between unit blocks (between B3 and B6 or between B2 and B5).

  FIG. 7 shows a main part according to another embodiment of the present invention. In this example, a unit for forming a water-repellent protective film on the surface of the wafer W before exposure using an apparatus that performs immersion exposure by forming a liquid layer on the surface of the wafer W as the exposure apparatus S4. This is an example in which a unit block (DCT layer) B <b> 7 having s is provided on one of the first laminated block portion 41 and the second laminated block portion 42. The unit for forming the water repellent protective film is a water repellent protective film coating unit for applying a protective film for preventing the resist from being impregnated with the liquid during immersion exposure. The unit block B7 may be provided with a cleaning unit for removing and cleaning the protective film after exposure, removing particles adhering to the wafer W before and after exposure, and components that interfere with exposure.

  In this case, the wafer W discharged from the transfer stage TRS10 or TRS11 of the shelf unit U7 is transferred to the transfer stage TRS12 by the transfer arm 62, and then transferred to the main arm B7 of the DCT layer B7 to the DCT layer B7. Thus, the protective film is formed and delivered to the interface arm D via the delivery stage TRS12.

  Furthermore, in the present invention, as shown in FIG. 8 and FIG. 9, a replacement of the transfer arm 62 used in the previous embodiment is provided between the first laminated block portion 41 and the second laminated block portion 42. You may provide the delivery arm 63 which plays a role. In this case, for example, a delivery arm 63 is provided as a conveying means that can move up and down between a height position corresponding to the uppermost unit block of the laminated blocks 41 and 42 and a height position corresponding to the lowermost unit block. Also good. In this example, the shelf unit U6 is used to realize the transfer between the unit blocks (for example, between the COT layer B6 and the TCT layer b5) of the second stacked block unit 42 by the transfer arm 63. Therefore, the intermediate stage TRS for each unit block, that is, the intermediate stages TRS6 to TRS8 are divided into two stages.

  In addition, if a modification of the example shown in FIG. 8 is shown in FIG. 10, in this example, the first laminated block portion 41 is composed of a laminated body of the DEV layer B1 and the BCT layer B3, and the second laminated layer is formed. The block part 42 is formed of a stacked body of a TCT layer B5 and a COT layer B6.

  In the above, the first unit block of the second stacked block unit 42 may be configured as a unit block for inspection instead of being configured as the DEV layer B4, or when performing immersion exposure. A cleaning unit may be provided for removing the protective film after the exposure, removing particles adhering to the wafer W before and after the exposure, and components that interfere with the exposure.

  When this unit block is configured as a unit block for inspection, the unit block includes a unit for inspection and a main arm that can deliver the wafer W to the unit. In the unit block, an inspection unit is arranged instead of the liquid processing unit and the thermal system unit. Examples of the inspection performed after the coating film formation and before the exposure process include an inspection of the film thickness of the coating film and a foreign matter inspection. Examples of the inspection performed after the exposure process and before the development processing include an exposure overlay inspection. Further, the present invention is not limited thereto, and a unit for detecting an alignment mark on the substrate and a unit for removing a part of the film by laser processing may be provided.

  As the unit provided in the auxiliary block, for example, a film thickness inspection unit for inspecting the state of the wafer surface, for example, inspecting the film thickness of the coating film formed on the wafer W, and detecting coating unevenness of the resist solution Coating unevenness detection device for cleaning, cleaning unit for cleaning a substrate before and / or after exposure, a defocus inspection device for detecting a positional deviation of a pattern generated in the exposure device, and a defect in development processing are detected Development defect detection device for detecting the number of particles adhering to the wafer W, and a comet for detecting comets generated by bubbles or foreign substances in the resist solution on the surface of the wafer W after resist coating Detection device detects splash back in which solvent of resist solution jumping out from wafer W surface reattaches to wafer W Splash back detection apparatus, common defect detection apparatus for detecting common defects appearing in the same shape at the same location on the surface of the wafer W, scum detection apparatus for detecting resist residue remaining on the wafer W after development processing, resist coating process And / or a NO RESIST, NO DEVELOP inspection apparatus (defect detection apparatus) for detecting defects that are not developed, a line width measuring apparatus for measuring the line width of the resist film formed on the wafer W, At least one overlay inspection apparatus for inspecting the overlay accuracy of the wafer W exposed by the exposure apparatus and the photomask by comparing with a standard value is provided.

  The present invention can be applied to a coating and developing apparatus for processing not only a semiconductor wafer but also a substrate such as a glass substrate (LCD substrate) for a liquid crystal display.

1 is a plan view showing an embodiment of a coating and developing apparatus according to the present invention. It is a schematic perspective view which shows the said coating and developing apparatus. It is side part sectional drawing which shows schematic structure of the said application | coating and image development apparatus. It is a perspective view which shows the unit block containing the application | coating unit, shelf unit, and conveyance means in the said application | coating and image development apparatus. It is the top view and longitudinal section showing the application unit in the application and development device. It is explanatory drawing which shows the flow of the wafer in a lamination | stacking block part. It is side part sectional drawing which shows schematic structure of the coating and developing apparatus which concerns on other embodiment of this invention. It is a top view which shows embodiment of the application | coating and developing apparatus which concerns on further another embodiment of this invention. It is side part sectional drawing which shows schematic structure of the application | coating and developing apparatus which concerns on other embodiment of this invention. It is side part sectional drawing which shows schematic structure of the application | coating and developing apparatus which concerns on other embodiment of this invention. It is a top view which shows the conventional application | coating and developing apparatus.

W Semiconductor wafer 20 Carrier C Transfer arm S1 Carrier block S2 Processing block S3 Interface block S4 Exposure apparatus A1 to A7 Main arm 31 Coating unit 41 First laminated block part 42 Second laminated block part TRS6 to TRS8 Intermediate stage 61 Delivery Arm 62 Interface arm 50 Control unit B1-B7 Unit block

Claims (4)

The substrate carried into the carrier block by the carrier is transferred to the processing unit, and after the coating film including the resist film is formed in the processing unit, the substrate is transported to the exposure apparatus through the interface block and returned through the interface block. In the coating and developing apparatus for developing the exposed substrate in the processing unit and delivering it to the carrier block,
A plurality of unit processing blocks arranged with a transport area in a direction extending horizontally and linearly in a direction connecting the carrier block and the interface;
A coating processing unit that is included in the unit processing block, applies a processing liquid to the substrate, a heat treatment unit that performs heat treatment on the substrate, and a main transport mechanism that transports the substrate to the coating processing unit and the heat treatment unit,
Between the unit processing block that processes the substrate first and the unit processing block that processes this substrate next, a plurality of intermediate stages are provided to match the throughput when the substrate is transferred to each unit processing block,
A substrate processing apparatus, wherein a plurality of the unit processing blocks are further stacked in the vertical direction.   The unit processing block for processing the substrate first between the processing unit blocks in which the intermediate stages are stacked in the vertical direction and the unit processing block for processing the substrate next are provided on both sides, respectively. Item 2. The substrate processing apparatus according to Item 1.   The said intermediate | middle stage provided in the both sides of the unit processing block processed next is equipped with the conveying apparatus which conveys a board | substrate to the said unit processing block of an up-down direction, The Claim 1 or Claim 2 characterized by the above-mentioned. Substrate processing equipment.   4. The substrate processing apparatus according to claim 1, wherein the coating processing unit forms a resist film on the substrate.

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