JP2009239188A - Method of manufacturing printed circuit board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a printed circuit board where a high-density structure with high heat dissipation properties is formed and a surface-layer circuit is formed with high precision by reducing variations in thickness of copper of a surface layer while forming a copper plating thick enough to secure the high heat dissipation properties in a through-hole and forming a filled via filled with a copper plating in a non-through-hole. <P>SOLUTION: The method of manufacturing the printed circuit board includes a process of forming a multilayer plate by laminating an insulating layer and a copper foil as a surface layer on an internal layer substrate where an internal layer circuit is formed, a process of forming the non-through-hole and the through-hole for interlayer connection in the multilayer plate, and a process of forming both the electroless copper plating and electric copper plating in the non-through-hole, in the through-hole, and on the copper foil as the surface layer. In the process of forming both the platings, the electroless copper plating is formed in the through-hole to be as thick as or thicker than the electric copper plating, and in the non-through-hole, a filled via is formed by both the platings. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a printed wiring board, and more particularly to a method for manufacturing a printed wiring board having high heat dissipation and a high-density structure using filled vias and having a highly accurate surface layer circuit.

  A printed wiring board on which a semiconductor element is mounted has a high density, and the semiconductor element to be mounted has a high performance and more heat generation. For this reason, the printed wiring board which has high heat dissipation is requested | required. As means for realizing high heat dissipation, there is known a method in which plating is formed in a through hole and the heat of a semiconductor element mounted on a substrate surface is radiated to a heat sink provided on the back surface through the through hole (Patent Document 1). 2).

  On the other hand, in order to mount a high-performance semiconductor element, a higher-density printed wiring board is required. As a printed wiring board that meets the demand for higher density, there is a printed wiring board that connects a surface layer circuit and an inner layer circuit between non-through holes and through holes. In such a printed wiring board, a printed wiring board provided with a so-called filled via, which can cope with higher density by allowing non-through holes of other layers to be stacked and formed above and below the non-through holes. Has been devised (Patent Document 3). The filled via refers to a non-through hole filled with copper plating, and plating for filling the non-through hole with copper plating is referred to as filled via plating.

  In the above printed wiring board, in order to achieve high heat dissipation through the through-holes and high density by filled vias, it is necessary to form copper plating thickly in the through-holes and non-through-holes, and the substrate surface is also plated at the same time. Therefore, the copper thickness on the substrate surface is also increased. Further, since the thickness is increased by electroplating, the variation in the plating thickness of the surface layer inevitably increases, and there is a problem that it is difficult to ensure the accuracy of the surface layer circuit formed by etching.

For this reason, as a method of forming a filled via, a protective film is pasted on the copper foil on the surface of the substrate, a non-through hole is formed by laser processing from above, and a filled via is formed by electro copper plating on the non-through hole. Thereafter, the surface protective film is peeled off to prevent the formation of electrolytic copper plating on the substrate surface layer, thereby suppressing the thickness of the surface layer plating and its variation (Patent Document 4). Moreover, after forming a non-through-hole, after forming a plating resist so that plating may not adhere other than a non-through-hole and its land, filled via plating is performed only by electrolytic copper plating (Patent Document 5). .
JP 2005-158792 A JP-A-11-145334 JP 2003-46246 A JP 2002-344144 A JP 2007-335817 A

  However, in Patent Document 4, since the non-through hole and the opening of the protective film have the same size, plating is hardly performed except for the non-through hole. For this reason, the connection between the plating of the non-through hole and the surface layer copper foil is only the end face of the surface layer copper foil, and it is difficult to ensure the connection reliability. In Patent Document 5, although the plating is formed up to the surface layer to be a land, a step is generated between the land and the other surface layer. Therefore, when forming a circuit by the photolithographic method, the photoresist follows and adheres. There is a problem that the finishing accuracy of the surface layer circuit is hindered.

  The present invention has been made in view of the above problems, while forming a copper plating with a thickness capable of ensuring high heat dissipation in the through hole, and forming a filled via filled with copper plating in the non-through hole, To provide a method of manufacturing a printed wiring board capable of forming a high-density structure with high heat dissipation and forming a surface layer circuit with high accuracy by reducing variations in surface copper thickness. With the goal.

The present invention relates to the following.
(1) A step of laminating an insulating layer and a copper foil as a surface layer on an inner layer substrate on which an inner layer circuit is formed, and forming a multilayer board; and a non-through hole and a through hole for interlayer connection in the multilayer board Forming a hole, and forming both the electroless copper plating and the electrolytic copper plating on the non-through hole, in the through hole, and on the surface copper foil, and forming both the platings In the step of forming, in the through hole, the thickness of the electroless copper plating is equal to or greater than the thickness of the electrolytic copper plating, and in the non-through hole, A method of manufacturing a printed wiring board on which filled vias are formed.
(2) In (1), the step of filling the through hole after electrolytic copper plating with a hole filling resin, and half etching from the surface of the electrolytic copper plating surface, the electroless copper plating of the surface layer A step of reducing the thickness to be thinner than the thickness of the electroless copper plating in the through hole, a step of polishing the filling resin protruding from the through hole, and a plating on the filling resin and the surface layer after polishing And a step of etching the surface layer on which the lid is formed to form a circuit.

  According to the present invention, a copper plating having a thickness capable of ensuring high heat dissipation is formed in the through hole, and a filled via filled with copper plating is formed in the non-through hole, and the copper thickness of the surface layer is formed thin. Accordingly, it is possible to provide a method of manufacturing a printed wiring board that can form a high-density structure with high heat dissipation and can form a surface layer circuit with high accuracy.

  1 to 4 show an example of a method for producing a printed wiring board according to the present invention. First, as shown in FIGS. 1A and 1B, a through-hole 15 is provided by NC drilling in a copper-clad laminate composed of a core layer 2 and a copper foil 4. Next, as shown in FIGS. 1C and 1D, an electrolytic copper plating layer 5 is provided in the through-hole 15 and the copper foil 4, and an inner layer circuit 16 is formed by etching or the like to produce an inner layer substrate. Next, as shown in FIG. 2A, the insulating layer 6 is provided on the inner layer circuit 16, and the copper foil 7 that becomes the surface layer 20 is provided on the insulating layer 6. Next, as shown in FIG. 2B, an opening is provided in the copper foil 7 of the surface layer 20 by etching to expose the insulating layer 6, and then the non-through hole 17 is formed by laser. Further, the through hole 18 is formed by NC drilling. Next, as shown in FIGS. 2C and 2D, the electroless copper plating layer 19 and the electrolytic copper plating layer 24 are provided on the copper foil 7 of the through hole 18 and the surface layer 20, and at the same time, the non-through hole 17. Filled vias 23 are formed. In the step of forming the electroless copper plating 19 and the electrolytic copper plating 24, the thickness of the electroless copper plating 19 is formed in the through hole 18 so as to be equal to or greater than the thickness of the electrolytic copper plating 24. In the non-through hole 17, a filled via 23 is formed by both plating.

  Thereby, by forming copper plating with a thickness capable of ensuring high heat dissipation in the through hole, and forming a filled via filled with copper plating in the non-through hole, by reducing the thickness variation of the copper of the surface layer, It is possible to provide a printed wiring board manufacturing method capable of forming a high-density structure with high heat dissipation and capable of forming a high-precision circuit on the surface layer.

  Next, as shown in FIGS. 3A and 3B, after filling the hole filling resin 25 in the through hole 18, the copper thickness of the surface layer 20 is reduced by half etching. At this time, the thickness of the electroless copper plating 19 on the surface layer 20 is made thinner than the thickness of the electroless copper plating 19 in the through hole 18. That is, the surface layer 20 has a structure in which the uppermost surface is the electrolytic copper plating 24, the electroless copper plating 19 on the lower side, and the copper foil 7 on the lower side. It is desirable that the process is performed so that 24 is completely removed and the electroless copper plating 19 below the 24 is reached. Next, as shown in FIGS. 3C and 3D, the protruding hole filling resin 25 is removed by a mechanical polishing machine, and the surface of the hole filling resin 25 and the surface layer 20 remaining after half-etching are electroplated. Then, the lid plating 26 is formed, and then the surface layer circuit 22 is formed by etching.

  As a result, copper plating having a thickness capable of ensuring high heat dissipation is formed in the through-hole, and filled vias filled with copper plating are formed in the non-through-hole, while reducing the thickness variation of the copper on the surface layer. By forming a circuit by etching after reducing the copper thickness, a method for manufacturing a printed wiring board having excellent line space dimensional accuracy when forming a surface layer circuit can be provided.

  Finally, as shown in FIGS. 4A and 4B, a solder resist layer 27 is formed on the surface layer circuit 22, and a nickel / gold plating layer 28 is provided on the exposed portion of the surface layer circuit 22.

  FIG. 5 shows an example of a printed wiring board manufactured using the manufacturing method of the present invention. This printed wiring board has a surface layer circuit 22, an inner layer circuit 16, and interlayer connection holes (through holes 18, non-through holes 17) between these layers, and electroless copper plating in the interlayer connection holes 18, 17. 19 is a printed wiring board 1 in which both the electroless copper plating 24 and the electroless copper plating 24 are formed, and the thickness of the electroless copper plating 19 in the interlayer connection holes 18 and 17 is greater than the thickness of the electrocopper plating 24.

  The printed wiring board manufactured by the manufacturing method of the present invention can be used for an application in which a semiconductor element is mounted to constitute a general semiconductor package. It is desirable to use in applications where heat dissipation is required and high accuracy is required for the surface layer circuit. Thereby, the heat dissipation through an interlayer connection hole is high, and the merit which can form a surface layer circuit with high precision can be exhibited more.

  The surface layer circuit in the present invention is a conductor circuit formed on the outermost surface in a multilayer printed wiring board. The surface layer circuit of the printed wiring board manufactured according to the present invention has, for example, a line / space accuracy of about ± 20 μm or less (the variation with respect to the design value is about ± 20% or less) with respect to a design value of 100 μm / 100 μm. It is formed. Here, the variation in the present invention refers to a value obtained by multiplying the standard deviation by 3, and is represented by a ratio (%) to the design value.

  The inner layer circuit in the present invention is a circuit formed in a conductor portion of an inner layer that is not the outermost surface in a multilayer printed wiring board.

  The interlayer connection hole in the present invention is a hole formed to electrically connect the layers of the printed wiring board, and includes a through hole and a non-through hole. The interlayer connection hole in the present invention has both of these. The through-hole is a hole that penetrates the printed wiring board in the thickness direction, and by electrically plating the through-hole, the front and back surface layers, the surface layer and the inner layer, and the inner layer and the other inner layer are electrically connected. be able to. The non-through-hole is a hole that can open the printed wiring board in the thickness direction but does not penetrate but stops on the way. By plating the non-through hole, the surface layer and the inner layer, and the inner layer and the other inner layer can be electrically connected.

  The through hole in the present invention can be formed, for example, by drilling with an NC processing machine, which is generally used to form a through hole of a printed wiring board. The diameter of the through hole is 0.15 to 0.25 mm, and the aspect ratio immediately after drilling is 1.5 to 2.5. When plating is performed by combining electroless copper plating and electrolytic copper plating, which will be described later, It is desirable to secure the throwing power.

  The non-through hole in the present invention can be formed by, for example, a conformal method generally used for forming a non-through hole of a printed wiring board. That is, an opening is formed in the surface copper foil by etching to expose the insulating layer, and a laser is irradiated to aim at the exposed portion of the insulating layer, and a hole is formed to a depth reaching the inner layer circuit. be able to. The diameter of the non-through hole is 80 to 150 μm, and the depth is 30 to 100 μm, in order to ensure the fillability of vias when performing a combination of electroless copper plating and electrolytic copper plating described later. desirable.

  The electroless copper plating in the present invention deposits copper ions in the plating solution by a reduction reaction using a chemical reducing agent without supplying an electric current from the outside. In the present invention, so-called thick electroless copper plating that can be plated to a thickness of 10 μm or more by controlling the plating solution is used. As such electroless copper plating, a general electroless copper plating solution for thickening, which contains copper sulfate, a complexing agent, formalin, and sodium hydroxide as main components, can be used.

  The electroplating in the present invention is performed by supplying an electric current from the outside in the same manner as general electrolytic copper plating. However, when these are plated together in a state where non-through holes and through holes are mixed, The filled via plating filled with copper plating is possible in the non-through holes, and the normal through hole plating not filled with the copper plating can be simultaneously formed in the through holes. Examples of such electroplating include so-called general filled via plating containing copper sulfate and an additive.

  In the present invention, both electroless copper plating and electrolytic copper plating are formed in the interlayer connection holes. That is, for both the through hole and the non-through hole, copper plating into the hole is performed by combining both electroless copper plating and electrolytic copper plating. As a result, through holes and non-through holes are mixed, while through holes and non-through holes are mixed, through-hole plating is formed in the through holes and filled vias are formed in the non-through holes. It becomes possible. Here, the through-hole plating is plating formed in the through hole and is plating in which the through hole is not filled with plating. The filled via refers to a non-through hole filled with copper plating, and plating for filling the non-through hole with copper plating is referred to as filled via plating.

  In the present invention, the non-through hole is filled by both electroless copper plating and electrolytic copper plating. As a result, filled vias can be formed in the non-through holes, and copper plating having a sufficient thickness that satisfies heat dissipation can be formed in the through holes. For this reason, the printed wiring board provided with the high-density structure and high heat dissipation can be provided. Thus, in order to fill the non-through hole by both electroless copper plating and electrolytic copper plating, for example, the following method may be mentioned.

  The inner wall of the interlayer connection hole before plating is in a state where the base material that is an insulator is exposed. For this reason, first, electroless copper plating capable of plating on this base material is performed. The method for forming the electroless copper plating is the same as the general method. After applying the catalyst, the electroless copper plating is immersed in the electroless copper plating solution, and the reduction reaction generated on the catalyst is continued. Precipitate. Since no current is supplied from the outside, variations in plating thickness due to current distribution are unlikely to occur, and plating with a uniform thickness can be formed. For this reason, the electroless copper plating can form a good copper plating around the inner wall of the interlayer connection hole, and can also form a copper plating with a small thickness variation on the surface layer.

  However, the electroless copper plating has a slower deposition rate than the electrolytic copper plating, is costly, and when it is formed thick, voids or the like may occur in the non-through holes. Further, since the plating thickness is uniform, the copper plating on the surface layer is also increased at the same time, so that even if the thickness variation is small, it is difficult to form a high-precision circuit by etching. For this reason, although depending on the hole diameter and depth of the non-through hole, when the hole diameter of the non-through hole is 80 to 120 μm and the depth is 30 to 100 μm, the thickness of the electroless copper plating is on the inner wall of the through hole. It is desirable to set it as 15-25 micrometers. In particular, 17 to 20 μm is desirable. As a result, voids are not generated in the non-through holes, and the formation of filled vias by subsequent electroplating is facilitated.

  Therefore, after forming the electroless copper plating to a predetermined thickness, the copper electroplating is performed on the electroless copper plating. Electro copper plating has a high copper deposition rate and is lower in cost than electroless copper plating. In addition, by adding additives to the plating solution or adjusting the plating conditions, While filling the copper plating, a normal through-hole plating can be formed in the through hole, while the surface layer can be made relatively hard to attach the copper plating. That is, it is possible to preferentially deposit copper plating in the non-through hole compared to the surface layer and the through hole. For this reason, the thickness of the through-hole plating in the through hole can be increased while forming the filled via in the non-through hole. Thereby, it becomes possible to cope with a high-density structure by forming filled vias in the non-through holes. In addition, in the through hole, heat dissipation can be ensured by increasing the thickness of the through hole plating.

  However, electrolytic copper plating tends to cause variations in plating thickness due to current distribution, and it is difficult to form uniform thickness plating. For this reason, in particular, in the surface layer, the variation in plating thickness increases, and the etching amount at the time of circuit formation differs depending on the part, so that it is difficult to form a high-precision circuit. For this reason, although depending on the hole diameter and depth of the non-through hole, the additive and conditions of electrolytic copper plating, etc., if the non-through hole has a diameter of 80 to 120 μm and a depth of 30 to 100 μm, The thickness is desirably 15 to 25 μm on the inner wall of the through hole.

  In the present invention, the thickness of the electroless copper plating is equal to or greater than the thickness of the electrolytic copper plating in the through hole. At this time, the thickness of the electroless copper plating formed on the surface copper foil plated simultaneously with the through hole is equal to or greater than the thickness of the electrolytic copper plating. In other words, in a high heat dissipation printed wiring board having a high-density structure, the necessary copper plating thickness is set in consideration of the formation of filled vias in the non-through holes and the heat dissipation of the through holes. At the same time, copper plating is also formed on the surface copper foil.

  Thus, even when copper plating of the thickness required for the interlayer connection hole is performed, the copper plating thickness formed by electroless plating is formed by electroplating out of the copper plating thickness formed on the surface layer. Since the thickness is equal to or greater than the copper plating thickness, the variation in the copper plating thickness of the surface layer can be suppressed as small as possible. For this reason, copper plating with a thickness that can ensure high heat dissipation is formed in the through holes, filled vias for high-density structures are formed in the non-through holes, and a high precision circuit by etching is formed on the surface layer. Therefore, it is possible to provide a printed wiring board that can be used.

  In the present invention, the case where the thickness of the electroless copper plating is equal to or more than the thickness of the electrolytic copper plating includes the case where the thickness of the electroless copper plating is about 70% or more of the thickness of the electrolytic copper plating. In terms of cost and production efficiency, in a general printed wiring board, for example, when a necessary plating thickness is 20 to 35 μm, the electroless copper plating is about 1 μm or less and the remaining thickness is formed by electrolytic copper plating. That is, the thickness of electroless copper plating is 5% or less of the thickness of electrolytic copper plating. In the present invention, the thickness of the electroless copper plating is formed to be about 70% or more of the thickness of the electrolytic copper plating, but this ratio is larger in each stage than the conventional printed wiring board. The thickness of copper plating and the thickness of electrolytic copper plating are treated as equivalent. Therefore, for example, when the required plating thickness is 20 μm, when the electroless copper plating is about 8 μm and the electrolytic copper plating is 12 μm, or when the required plating thickness is 35 μm, the electroless copper plating is about 14 μm. When the electrolytic copper plating is 21 μm, the thickness of the electroless copper plating is included equivalent to the thickness of the electrolytic copper plating.

  In the present invention, the through hole is formed such that the thickness of the electroless copper plating is equal to or greater than the thickness of the electro copper plating. It is desirable to make it smaller than the thickness of the plating. As described above, when the thickness of the electroless copper plating in the through hole is equal to or greater than the thickness of the electrolytic copper plating, the electroless copper is also deposited on the surface copper foil plated simultaneously with the through hole. The thickness of the plating is usually equal to or greater than the thickness of the electrolytic copper plating. However, for the formation of a high-precision circuit, it is advantageous that the surface copper is thin. Therefore, the surface layer copper is half-etched from the surface to reduce the copper thickness of the surface layer, but the present invention is such that the thickness of the electroless copper plating on the surface layer after this half-etching is It is desirable to make it smaller than the thickness of the copper plating. In other words, the surface circuit has a structure in which the uppermost surface is electrolytic copper plating, the lower side thereof is electroless copper plating, and the lower side is copper foil, but half-etching completely forms the uppermost electrolytic copper plating. It is desirable that the removal be carried out so as to reach the electroless copper plating below it. As a result, the structure of the surface layer circuit is changed from three layers to two layers, which can be simplified. Therefore, when the circuit is formed by the subtract method, variation in etching accuracy due to a difference in etching characteristics for each layer can be suppressed. In this way, the through hole can reduce the variation in the copper thickness of the surface layer by forming the thickness of the electroless copper plating to be equal to or greater than the thickness of the electrolytic copper plating, It is possible to reduce the copper thickness of the surface layer with little variation by half-etching until the thickness of the electroless copper plating of the surface layer circuit becomes smaller than the thickness of the electroless copper plating of the through hole, In addition, the structure of the surface layer circuit can be simplified. For this reason, the accuracy of the circuit formed on the surface layer is improved.

  In the present invention, it is desirable that the through hole is filled with a hole filling resin, and the lid plating is formed on the exposed portion of the surface of the hole filling resin. As a result, the semiconductor element can be arranged immediately above the through hole, so that it is possible to cope with high density, and since the heat generating element is mounted in the vicinity of the high heat radiating through hole, the heat radiation efficiency is good. For this reason, the printed wiring board which can respond to the request | requirement of high density and high heat dissipation can be provided. In addition, the lid plating in this invention can be formed by the electroless copper plating for thin attachment generally used with a printed wiring board, and electrolytic copper plating.

  As an example, the printed wiring board manufactured by the manufacturing method of the present invention can be used as a power amplifier module for a mobile phone as shown in FIG. That is, the semiconductor element 29 is disposed immediately above the through hole 18, and the heat sink 30 is disposed on the back side thereof. Thereby, since the space immediately above the through hole 18 can be used, it is possible to cope with high density, and since the semiconductor element 29 that generates heat is mounted immediately above the through hole 18 with high heat dissipation, the heat dissipation efficiency is good. For this reason, the printed wiring board which can respond to the request | requirement of high density and high heat dissipation can be provided.

  Hereinafter, the present invention will be described based on examples, but the present invention is not limited to the examples.

Example 1
After preparing a copper clad laminate of MCL-E-679FG (trade name, manufactured by Hitachi Chemical Co., Ltd.) having a thickness of 12 μm and having a copper foil of 12 mm, the copper foil is half-etched from 12 μm to 5 μm, and then the diameter A through hole is provided by drilling NC using a 0.15 mm drill.

  A copper-clad laminate having through holes is subjected to copper plating of about 15 μm by electrolytic copper plating, and an inner layer circuit is formed by a subtractive method to produce an inner layer substrate.

  A prepreg of GEA-679FG (trade name, manufactured by Hitachi Chemical Co., Ltd.) having a thickness of 0.06 mm is stacked on both sides of the inner layer substrate on which the inner layer circuit is formed, and MT18S5DH (Mitsui Metal Mining Co., Ltd.) having a thickness of 5 μm is further formed on both sides. Product name) copper foil is stacked and laminated press is performed at 185 ° C. for 90 minutes to obtain a 4-layer substrate.

  A circular opening having a diameter of about 100 μm is formed in the copper foil on the surface layer of the four-layer substrate by a subtractive method, and a non-through hole having a diameter of about 100 μm is formed by irradiating a laser there. Furthermore, a through hole is formed using two types of drills having a diameter of 0.15 mm and a diameter of 0.25 mm.

A four-layer substrate having through-holes and non-through-holes was subjected to about 15 μm copper plating by electroless copper plating and further to about 20 μm copper plating by electrolytic copper plating. These plating thicknesses are values measured in the through holes. As a result, copper plating having a thickness of about 35 μm was formed on the inner wall in the through hole, and filled vias were formed in the non-through hole. Sectional area of the copper plating in the through hole of the case is about 0.0126Mm ² in diameter 0.15 mm, was about 0.0236Mm ² in diameter 0.25 mm. The cross-sectional area of the copper plating was calculated by observing the horizontal cross section of the through hole and measuring the plating thickness of the inner wall of the through hole, the outer diameter of the plating, and the inner diameter of the plating (the same applies hereinafter).

  Using a hole filling ink of PHP900IR10F (trade name, manufactured by Sanei Chemical Co., Ltd.), filling the through hole with the hole filling ink, curing the hole filling ink at 160 ° C. for 40 minutes, and then copper thickness of the surface layer (about 40 μm) Are removed until the thickness of the surface layer copper is reduced, and the ink which is projected after the hole filling is removed with a buffing machine.

  About 10 μm of copper plating is applied to the surface layer remaining after the reduction of the surface copper thickness and the hole-filling ink exposed on the surface by electroless copper plating for thinning and electrolytic copper plating to form a lid plating. A surface layer circuit is formed by the active method. At this time, the copper thickness of the surface circuit has a variation of about ± 17% with respect to the design value of 35 μm, and the dimensional accuracy of the line / space of the surface layer circuit has a variation of about ± 20% with respect to the design value of 100 μm. . The measurement of plating thickness and line / space was carried out at 9 locations on the front and back sides of 6 substrates of 500 × 400 mm size extracted one by one for each lot (the same applies hereinafter).

  The development type solder resist ink of PSR-4000AUS308 (trade name, manufactured by Taiyo Ink Manufacturing Co., Ltd.) is applied to both surfaces on which the surface layer circuit is formed by a roll coating method. Curing and resist formation.

  About 5 μm of electroless nickel plating is applied on the copper surface exposed on the surface layer, and then about 0.3 μm of electroless gold plating is applied to obtain the printed wiring board of the present invention.

(Example 2)
In the same manner as in Example 1, a four-layer substrate was prepared, a non-through hole and a through hole were provided, and electroless copper plating and electroplating were performed.

  Using a hole filling ink of PHP900IR10F (trade name, manufactured by Sanei Chemical Co., Ltd.), filling the through hole with the hole filling ink, curing the hole filling ink at 160 ° C. for 40 minutes, and then copper thickness of the surface layer (about 40 μm) Is removed until the thickness of the surface layer copper is reduced, and the protruding ink which is projected after the surface copper thickness is reduced is removed by a buffing machine. At this time, the thickness of the electroless copper plating on the surface layer after the half etching is performed is smaller than the thickness of the electroless copper plating in the through hole. That is, the half etching is performed so as to completely remove the uppermost electrolytic copper plating and further reach the lower electroless copper plating.

  About 10 μm copper plating is applied to the surface layer remaining after reducing the surface copper thickness and the hole-filling ink exposed on the surface by electrolytic copper plating to form a lid plating, and then a surface circuit is formed by a subtractive method. . At this time, the copper thickness of the surface circuit had a variation of about ± 24% with respect to the design value of 22 μm, and the line / space dimensional accuracy of the surface layer circuit had a variation of about ± 15% with respect to the design value of 100 μm.

(Comparative Example 1)
About 4 micrometers copper plating was performed by electroless copper plating to the 4 layer board | substrate in which the through-hole and the non-through-hole were formed, and also about 30 micrometers copper plating was performed by the electrolytic copper plating. These plating thicknesses are values measured in the through holes. As a result, copper plating having a thickness of about 35 μm was formed on the inner wall in the through hole, and filled vias were formed in the non-through hole. The other steps were the same as in Example 1. Sectional area of the copper plating in the through hole of the case is about 0.0126Mm ² in diameter 0.15 mm, was about 0.0236Mm ² in diameter 0.25 mm.

  About 10 μm of copper plating is applied to the surface layer remaining after the reduction of the surface copper thickness and the hole-filling ink exposed on the surface by electrolytic copper plating to form a lid plating, and then a surface circuit is formed by a subtractive method. . At this time, the copper thickness of the surface circuit has a variation of about ± 29% with respect to the design value of 35 μ, and the dimensional accuracy of the line / space of the surface layer circuit has a variation of about ± 24% with respect to the design value of 100 μm. .

(Comparative Example 2)
About 4 micrometers copper plating was performed by electroless copper plating to the 4 layer board | substrate in which the through-hole and the non-through-hole were formed, and also about 30 micrometers copper plating was performed by the electrolytic copper plating. These plating thicknesses are values measured in the through holes. As a result, copper plating having a thickness of about 35 μm was formed on the inner wall in the through hole, and filled vias were formed in the non-through hole. The other steps were the same as in Example 2. Sectional area of the copper plating in the through hole of the case is about 0.0126Mm ² in diameter 0.15 mm, was about 0.0236Mm ² in diameter 0.25 mm.

  About 10 μm copper plating is applied to the surface layer remaining after reducing the surface copper thickness and the hole-filling ink exposed on the surface by electrolytic copper plating to form a lid plating, and then a surface circuit is formed by a subtractive method. . At this time, the copper thickness of the surface circuit has a variation of about ± 28% with respect to the design value of 22 μm, and the dimensional accuracy of the line / space of the surface layer circuit has a variation of about ± 19% with respect to the design value of 100 μm. .

(Comparative Example 3)
A four-layer substrate having through-holes and non-through-holes was subjected to about 10 μm copper plating by electroless copper plating and further to about 25 μm copper plating by electrolytic copper plating. These plating thicknesses are values measured in the through holes. As a result, copper plating having a thickness of about 35 μm was formed on the inner wall in the through hole, and filled vias were formed in the non-through hole. The other steps were the same as in Example 1. Sectional area of the copper plating in the through hole of the case is about 0.0126Mm ² in diameter 0.15 mm, was about 0.0236Mm ² in diameter 0.25 mm.

  About 10 μm copper plating is applied to the surface layer remaining after reducing the surface copper thickness and the hole-filling ink exposed on the surface by electrolytic copper plating to form a lid plating, and then a surface circuit is formed by a subtractive method. . At this time, the copper thickness of the surface circuit has a variation of about ± 23% with respect to the design value of 35 μm, and the line / space dimensional accuracy of the surface layer circuit has a variation of about ± 22% with respect to the design value of 100 μm. .

(Comparative Example 4)
A four-layer substrate having through-holes and non-through-holes was subjected to about 10 μm copper plating by electroless copper plating and further to about 25 μm copper plating by electrolytic copper plating. These plating thicknesses are values measured in the through holes. As a result, copper plating having a thickness of about 35 μm was formed on the inner wall in the through hole, and filled vias were formed in the non-through hole. The other steps were the same as in Example 2. Sectional area of the copper plating in the through hole of the case is about 0.0126Mm ² in diameter 0.15 mm, was about 0.0236Mm ² in diameter 0.25 mm.

  About 10 μm copper plating is applied to the surface layer remaining after reducing the surface copper thickness and the hole-filling ink exposed on the surface by electrolytic copper plating to form a lid plating, and then a surface circuit is formed by a subtractive method. . At this time, the copper thickness of the surface circuit has a variation of about ± 26% with respect to the design value of 35 μm, and the dimensional accuracy of the line / space of the surface layer circuit has a variation of about ± 17% with respect to the design value of 100 μm. .

(Comparative Example 5)
About 4 micrometers copper plating was performed to the 4 layer board | substrate in which the through-hole and the non-through-hole were formed by electroless copper plating, and also about 15 micrometers copper plating was performed by the electro copper plating. These plating thicknesses are values measured in the through holes. Thereby, copper plating with a thickness of about 20 μm was formed on the inner wall in the through hole, and filled vias were formed in the non-through hole. The other steps were the same as in Example 1. Sectional area of the copper plating in the through hole of the case is about 0.0082Mm ² in diameter 0.15 mm, was about 0.0145Mm ² in diameter 0.25 mm.

  Table 1 shows the results of the above Examples 1 and 2 and Comparative Examples 1 to 3.

  As for Example 1 and Comparative Examples 1 and 3 in which the copper thickness of the surface layer is 35 μm, in Example 1 (electroless copper plating / electrolytic copper plating = about 75%), the accuracy of the line / space is ± 20%. Met. On the other hand, it was ± 24% in Comparative Example 1 (electroless copper plating / electrolytic copper plating = about 17%), and ± 22% in Comparative Example 2 (electroless copper plating / electrolytic copper plating = about 40%). Thus, the line / space accuracy was improved by making the thicknesses of electroless copper plating and electrolytic copper plating equal.

  Looking at Example 2 and Comparative Examples 3 and 4 in which the copper thickness of the surface layer is 22 μm, in Example 2 (electroless copper plating / electrolytic copper plating = about 75%), the accuracy of the line / space is ± 15%. Met. On the other hand, it was ± 19% in Comparative Example 2 (electroless copper plating / electrolytic copper plating = about 17%) and ± 17% in Comparative Example 4 (electroless copper plating / electrolytic copper plating = about 40%). Thus, the line / space accuracy was improved by making the thicknesses of electroless copper plating and electrolytic copper plating equal.

  Looking at Example 1 in which the copper thickness in the through hole is 35 μm and Comparative Example 5 in which the copper thickness is 22 μm, in Example 1, the cross-sectional area of the copper plating in the through hole is 0.0126 mm 2 at φ0.15 mm, In contrast to φ0.25 mm 0.0236 mm 2, in Comparative Example 5, φ 0.15 mm was 0.0082 mm 2 and φ 0.25 mm 0.0145 mm 2. Thus, it was found that the cross-sectional area of the copper plating in the through hole is large and the heat dissipation through the through hole is improved.

It is sectional drawing of an example of the printed wiring board of this invention. It is explanatory drawing of the manufacturing method of the printed wiring board shown in FIG. It is explanatory drawing of the manufacturing method of the printed wiring board shown in FIG. It is explanatory drawing of the manufacturing method of the printed wiring board shown in FIG. It is explanatory drawing of the manufacturing method of the printed wiring board shown in FIG. It is explanatory drawing of the use condition of the printed wiring board shown in FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Printed wiring board, 2 ... Core layer, 4 ... Copper foil, 5 ... Electrolytic copper plating (layer) (inner layer), 6 ... Insulating layer, 7 ... Copper foil, 15 ... Through hole (inner layer), 16 ... Inner layer circuit, 17 ... non-through hole, 18 ... through hole (of printed wiring board), 19 ... electroless copper plating (layer), 20 ... surface layer, 22 ... surface layer circuit, 23 ... filled via, 24 ... electrolytic copper plating (layer) ), 25 ... hole filling resin, 26 ... lid plating (layer), 27 ... solder resist layer, 28 ... nickel / gold plating (layer), 29 ... semiconductor element, 30 ... heat sink

Claims (2)

A step of laminating an insulating layer and a copper foil as a surface layer on the inner layer substrate on which the inner layer circuit is formed, and forming a multilayer board;
Forming a non-through hole and a through hole for interlayer connection in the multilayer board;
Forming both electroless copper plating and electrolytic copper plating in the non-through hole, in the through hole, and on the surface copper foil,
In the step of forming both the platings, in the through hole, the thickness of the electroless copper plating is formed to be equal to or greater than the thickness of the electrolytic copper plating,
A method for manufacturing a printed wiring board, wherein filled vias are formed in the non-through holes by the plating. In claim 1,
Filling the through hole after electrolytic copper plating with a hole filling resin;
A step of reducing the thickness of the electroless copper plating of the surface layer to be thinner than the thickness of the electroless copper plating in the through hole by half-etching from the surface of the electro copper plating surface of the surface layer;
Polishing the hole filling resin protruding from the through hole;
A step of forming a lid plating on the hole filling resin and the surface layer after polishing;
Etching the surface layer on which the lid plating is formed to form a circuit;
The manufacturing method of the printed wiring board which has this.

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