JP2009238856A - Manufacturing method of integrated circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem, in manufacturing of an integrated circuit, wherein the upper surface of a tungsten (W) plug recedes from the surface of a silicon oxide film, resulting in the lowering of coverage of a wiring formed thereon, when the plug is formed in a contact hole provided to the silicon oxide film. <P>SOLUTION: After a contact hole 46 is formed on a silicon oxide film 44, a tungsten (W) film 48 is deposited. The W film 48 is etched back so that the upper surface of the silicon oxide film 44 is exposed, and a W plug 50 is formed in the contact hole 46. Here, the upper surface of the W plug 50 recedes from the surface of the silicon oxide film 44 due to over-etching on the W film 48, producing a step 30 between inside and outside of the contact hole 46. Before forming a wiring thereon, the silicon oxide film 44 is etched back to reduce the step 30 for flattening. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an integrated circuit manufacturing method, and more particularly to a manufacturing method for forming a buried metal portion such as a tungsten plug in an opening of an insulating film.

  In an integrated circuit formed using a silicon substrate or the like, it is necessary to miniaturize the dimensions of wirings and contacts as the degree of integration increases. As a structure effective for miniaturization, a tungsten plug in which tungsten (W) is buried in a contact hole as a contact material is known.

  FIG. 3 is a cross-sectional view of main steps of a conventional manufacturing method of an integrated circuit having a wiring structure using a tungsten plug. 3A and 3B show a process of forming a tungsten plug. After a contact hole 6 is formed in the silicon oxide film 4 laminated on the silicon substrate 2, a tungsten film 8 is deposited on the upper surface of the silicon oxide film 4 and the contact hole 6 (FIG. 3A). Thereafter, the tungsten film 8 deposited on the upper surface of the silicon oxide film 4 is removed by an etch back process, and the tungsten film 8 is selectively left in the contact hole 6. Thereby, the tungsten plug 10 embedded in the contact hole 6 is formed (FIG. 3B).

  3C and 3D show a process for forming the first layer wiring. An aluminum (Al) film 12 is deposited on the upper surface of the silicon oxide film 4 and the tungsten plug 10 (FIG. 3C), and the Al film 12 is patterned to form a first layer wiring 14 (FIG. d)). The first layer wiring 14 is electrically connected to the tungsten plug 10.

Further, when a second layer wiring is formed, an interlayer insulating film is laminated on the first layer wiring 14, and a contact hole reaching the first layer wiring 14 is formed in the interlayer insulating film. Thereafter, an Al film is deposited and patterned in the interlayer insulating film and the contact hole, and a second layer wiring electrically connected to the first layer wiring 14 is formed.
JP 2002-134507 A

  The etching back condition of the tungsten film 8 when forming the tungsten plug 10 is set to overetching so that the tungsten film 8 on the silicon oxide film 4 is suitably removed. Therefore, the tungsten film 8 filling the contact hole 6 is etched back to a position lowered from the upper surface of the silicon oxide film 4, and a recess (concave portion) is generated. That is, a step 30 is formed between the silicon oxide film 4 outside the contact hole 6 and the top surface of the tungsten plug 10 inside (FIG. 3B).

  The conductive film such as the Al film 12 formed in the subsequent process is likely to have a shape affected by the recess or the step 30, and there is a problem that its coverage (coverability) deteriorates. This reduction in coverage easily causes disconnection of wiring and contact failure. FIG. 3 shows a state where the upper surface of the first-layer wiring 14 is deeply depressed at the center of the contact hole 6 as an example of the influence of the recess on the upper layer. As the Al film 12 is bent in this manner, the wiring 14 is likely to be disconnected, or contact failure from the upper layer to the bent portion is likely to occur.

  The present invention has been made to solve the above problems, and in an integrated circuit in which a buried metal part such as a tungsten plug is formed in an opening part such as a contact hole formed in an insulating film such as a silicon oxide film. It aims at providing the manufacturing method with which the recess in an opening part is reduced.

  An integrated circuit manufacturing method according to the present invention includes a step of forming an insulating film on a substrate, a step of forming an opening in the insulating film, and depositing a metal film on the upper surface of the insulating film and in the opening. Etching back the metal film to expose the upper surface of the insulating film, leaving a buried metal portion made of the metal film in the opening, and forming the buried metal portion. Etching back the insulating film, and reducing and flattening the step of the opening with respect to the upper surface of the buried metal portion.

  According to the present invention, the step of the opening with respect to the upper surface of the buried metal portion is reduced by etching back the insulating film in which the buried metal portion is formed, and the upper surface of the insulating film is planarized. Thereby, the flatness of the wiring layer laminated thereon is improved, and the occurrence of wiring breakage and contact failure due to the step is reduced.

  Hereinafter, embodiments of the present invention (hereinafter referred to as embodiments) will be described with reference to the drawings. This embodiment relates to an integrated circuit formed on a semiconductor substrate, and in particular, a wiring structure connected to an impurity diffusion layer on the surface of the semiconductor substrate will be described.

1 and 2 are schematic cross-sectional views at main steps of a method of manufacturing an integrated circuit according to the embodiment. After the impurity diffusion layer 42 is formed on the surface of the semiconductor substrate 40, a silicon oxide film 44 is laminated. Here, the silicon oxide film 44 is a SiO ₂ film formed by thermal oxidation or CVD (Chemical Vapor Deposition). The silicon oxide film 44 is an example of an insulating film. In the present invention, silicon oxide such as TEOS (Tetra-ethoxy-silane), PTEOS (Plasma TEOS), and BPSG (Borophosphosilicate Glass) is used instead of the silicon oxide film 44. Other types of films made of physical materials can also be used. Photoresist (not shown) is applied to the surface of the silicon oxide film 44 and patterned to form an etching mask having an opening at a position where the contact hole 46 is to be formed. Using this etching mask, for example, an etching process by RIE (Reactive Ion Etching) is performed to form a contact hole 46 in the silicon oxide film 44 (FIG. 1A). The contact hole 46 penetrates the silicon oxide film 44, and the impurity diffusion layer 42 is exposed on the bottom surface.

  After a titanium nitride (TiN) film or the like (not shown) is formed as a barrier layer in the contact hole 46 and on the upper surface of the silicon oxide film 44, a tungsten film 48 is deposited by CVD. The tungsten film 48 is deposited on the upper surface of the silicon oxide film 44 and also in the contact hole 46, and the contact hole 46 is filled with the tungsten film 48 (FIG. 1B).

  Thereafter, the tungsten film 48 and the like deposited on the upper surface of the silicon oxide film 44 are removed by an etch back process. As a result, a tungsten plug 50 embedded in the contact hole 46 is formed (FIG. 1C).

  Here, the etch back process of the tungsten film 48 and the barrier layer is performed by a method having a selection ratio with respect to the silicon oxide film 44. In this etchback process, for example, overetching is performed in an amount corresponding to the variation in the in-wafer etching rate so that the tungsten film 48 and the like existing on the upper surface of the silicon oxide film 44 are suitably removed. As a result, the etching of the tungsten film 48 in the contact hole 46 proceeds to a position lower than the upper surface of the silicon oxide film 44, and between the silicon oxide film 44 outside the contact hole 46 and the upper surface of the inner tungsten plug 50. A step 30 is generated.

  In the manufacturing method of the present invention, the surface of the silicon oxide film 44 having the step 30 is etched back by an etching process. In this etching process, the etchant is selected and the etching conditions are set so that the silicon oxide film has a higher etching rate than tungsten. Thereby, the step 30 is reduced and the flatness inside and outside the contact hole 46 is improved (FIG. 1D).

  A first Al film 52 is deposited on the surface where the step between the silicon oxide film 44 and the tungsten plug 50 is reduced. The Al film 52 can realize suitable coverage and flatness even in the upper part of the contact hole 46 by improving the flatness of the underlying layer (FIG. 2A).

  The Al film 52 is patterned by a photolithography technique to form a first Al wiring 54 connected to the tungsten plug 50 (FIG. 2B).

  An interlayer insulating film 56 is laminated on the first Al wiring 54 (FIG. 2C). Incidentally, the interlayer insulating film 56 is formed using the above-described silicon oxide-based material, and can be formed, for example, by depositing PTEOS by CVD. A photoresist (not shown) is applied to the surface of the interlayer insulating film 56 and patterned to form an etching mask having an opening immediately above the tungsten plug 50. Etching is performed using this etching mask to form contact holes 58 in the interlayer insulating film 56 (FIG. 2D). The contact hole 58 penetrates the interlayer insulating film 56, and the first Al wiring 54 is exposed on the bottom surface. Here, the first Al wiring 54 that appears on the bottom surface of the contact hole 58 is located immediately above the tungsten plug 50, but according to the present invention, the first Al wiring 54 is depressed on the surface of the first Al wiring 54 compared to the conventional wiring 14 described above. Unevenness such as is difficult to form. Therefore, it becomes easy to remove the interlayer insulating film 56 from the surface of the first Al wiring 54 at the bottom of the contact hole 58 by etching for forming the contact hole 58.

  A second Al film is deposited on the surface of the interlayer insulating film 56 in which the contact hole 58 is formed. The Al film is patterned by a photolithography technique to form the second Al wiring 60 (FIG. 2E). The Al film forming the second Al wiring 60 is also deposited in the contact hole 58 and fills the contact hole 58. As described above, the interlayer insulating film 56 is suitably removed from the bottom surface of the contact hole 58, and the unevenness of the top surface of the first Al wiring 54 that becomes the bottom surface is alleviated, so that the second Al wiring 60 is formed in the contact hole 58. Thus, the first Al wiring 54 is electrically connected well.

  In the present embodiment, the configuration in which the opening formed in the silicon oxide film 44 is the contact hole 46 and the tungsten plug 50 is formed therein as the embedded metal portion. However, the present invention is not limited to this configuration, and for example, a tungsten material in which the opening is a groove and the embedded metal part is embedded in the groove may be used. The buried metal portion can also be formed of another metal having corrosion resistance against the etch back process for reducing the step 30 of the silicon oxide film 44.

  The insulating film in which the tungsten plug 50 is embedded is not limited to being directly laminated on the surface of the semiconductor substrate 40 like the silicon oxide film 44, but is laminated on the semiconductor substrate 40 through another layer. There may be. For example, in the case where a tungsten plug is embedded in the contact hole 58, a recess of the interlayer insulating film 56 is formed in the contact hole 58. In this case, according to the present invention, after filling the contact hole 58 with a tungsten plug, the surface of the interlayer insulating film 56 is etched back to remove or reduce the recess. Thereafter, a second Al film is formed on the interlayer insulating film 56.

It is typical sectional drawing in the main process of the manufacturing method of the integrated circuit which concerns on embodiment of this invention. It is typical sectional drawing in the main process of the manufacturing method of the integrated circuit which concerns on embodiment of this invention. It is sectional drawing in the main processes of the conventional manufacturing method of the integrated circuit which has a wiring structure using a tungsten plug.

Explanation of symbols

  40 Semiconductor substrate, 42 Impurity diffusion layer, 44 Silicon oxide film, 46, 58 contact hole, 48 Tungsten film, 50 Tungsten plug, 52 Al film, 54 First Al wiring, 56 Interlayer insulating film, 58 Contact hole, 60 Second Al wiring .

Claims (3)

Forming an insulating film on the substrate;
Forming an opening in the insulating film;
Depositing a metal film on the upper surface of the insulating film and in the opening;
Etching back the metal film, exposing the upper surface of the insulating film, and forming a remaining embedded metal portion made of the metal film in the opening;
Etching back the insulating film in which the embedded metal portion is formed, and reducing and flattening the step of the opening with respect to the upper surface of the embedded metal portion;
An integrated circuit manufacturing method comprising: In the manufacturing method of the integrated circuit of Claim 1,
Depositing a conductive film on the planarized upper surface of the insulating film and the buried metal portion;
Patterning the conductive film to form a wiring electrically connected to the buried metal part;
An integrated circuit manufacturing method comprising: In the manufacturing method of the integrated circuit of Claim 1 or Claim 2,
The method for manufacturing an integrated circuit, wherein the metal film is made of tungsten.

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