JP2009224666A - Group iii nitride semiconductor light emitting element, method of manufacturing group iii nitride semiconductor light emitting element, and lamp - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a group III nitride semiconductor light emitting element with high luminance which is manufactured without employing conventional precise machining technique for substrate which is troublesome and complicated, and efficiently extracts light emitted by a light emitting layer to outside the element. <P>SOLUTION: The group III nitride semiconductor light emitting element includes a substrate, a first barrier layer 14c provided on the substrate, the light emitting layer provided on the first barrier layer 14c, and a second barrier layer provided on the light emitting layer, wherein the first barrier layer 14c comprises an assembly of columnar crystals 114, and the height direction of the columnar crystals 114 is inclined to the vertical direction of a light extraction interface. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a group III nitride semiconductor light emitting device having a double heterojunction (English abbreviation: DH) structure in which a light emitting layer is disposed between two barrier layers made of a group III nitride semiconductor material. The present invention relates to a high-intensity group III nitride semiconductor light-emitting device in which light emitted from a light-emitting layer is efficiently extracted outside the device, a method for manufacturing a group III nitride semiconductor light-emitting device, and a lamp.

Conventionally, a light-emitting diode (abbreviation: LED) or a laser diode (abbreviation: LD) that emits short-wavelength light such as blue or green is aluminum nitride / gallium (compositional formula Al _X Ga _1-X N: 0 ≦ X ≦ 1) and a group III nitride semiconductor layer made of a group III nitride semiconductor material such as gallium nitride / indium (compositional formula Ga _X In _1-X N: 0 ≦ X ≦ 1). (For example, refer to Patent Document 1).

In order to construct a high-brightness LED, an n-type or p-type clad layer is arranged on both upper and lower sides of a light emitting layer made of Ga _X In _1-X N (0 ≦ X ≦ 1) as a light emitting element. A double hetero (DH) junction structure is generally used.

Conventionally, such a group III nitride semiconductor layer for a light emitting device is formed by being deposited exclusively on a substrate made of sapphire (α-Al ₂ O ₃ single crystal) or the like. Recently, as a technology for constructing an LED, it is said that it produces higher intensity light emission deposited on a sapphire substrate whose surface is a conventional c-plane (r-plane different from (0001) plane). LED using a non-polar group III nitride semiconductor layer is known (see, for example, Non-Patent Document 1).

  In addition, in an LED using a group III nitride semiconductor layer using GaInN as a light emitting layer, the group III of the sapphire substrate is used for the purpose of improving the extraction efficiency of light emitted to the outside of the device and increasing the brightness of the LED. A technique is known in which a light extraction film having irregularities is formed on the surface opposite to the surface on which the nitride semiconductor layer is deposited, and light emitted from the light emitting layer is reflected to the outside of the element (see, for example, Patent Document 2). ).

In addition, there are two techniques: a technique using the nonpolar group III nitride semiconductor layer and a technique in which the sapphire substrate on which the group III nitride semiconductor layer is deposited is processed to reflect light emitted from the light emitting layer to the outside of the device. It is estimated that there is a possibility of obtaining a group III nitride semiconductor light-emitting device having a high light emission intensity by gathering three conventional techniques together.
Japanese Patent Publication No.55-3834 JP 2006-222288 A Proceedings of the 66th Japan Society of Applied Physics (2005), 281 pages, lecture number 10p-X-8

  However, when the above-mentioned two conventional technologies are gathered together, the surface of the sapphire substrate having high hardness and high chemical resistance is subjected to fine shape processing for improving the efficiency of extracting light emitted to the outside. It is not easy, and because of its cumbersome shape processing, the manufacturing process of the light-emitting element is complicated and redundant, so that a high-intensity group III nitride semiconductor LED excellent in the efficiency of extracting light emitted to the outside can be easily obtained. Couldn't get.

The present invention has been made in view of the above problems, and can be manufactured without using cumbersome and complicated conventional precision processing techniques for substrates, and the light emitted from the light emitting layer can be efficiently extracted outside the device. An object of the present invention is to provide a group III nitride semiconductor light-emitting device having brightness.
Further, a method for producing a group III nitride semiconductor light emitting device capable of easily obtaining the group III nitride semiconductor light emitting device of the present invention, and a high-intensity lamp using the group III nitride semiconductor light emitting device of the present invention The purpose is to provide.

In order to solve the above problems, the present inventors have developed a DH structure group III nitride semiconductor light emitting device in which a light emitting layer is disposed between two barrier layers made of a group III nitride semiconductor material. The present invention was completed by examining the relationship between the height direction of the columnar crystals constituting the barrier layer disposed on the substrate side and the light extraction efficiency from the light emitting layer.
That is, the present invention relates to the following.

  [1] A substrate, a first conductivity type first barrier layer made of a group III nitride semiconductor material provided on the substrate, and a group III nitride semiconductor material provided on the first barrier layer. In a group III nitride semiconductor light emitting device comprising a light emitting layer and a second barrier layer of a second conductivity type made of a group III nitride semiconductor material provided on the light emitting layer, the first barrier layer comprises: A group III nitride semiconductor light-emitting device comprising an assembly of columnar crystals, wherein a height direction of the columnar crystals is inclined with respect to a direction perpendicular to a light extraction interface.

  [2] The group III nitride semiconductor light-emitting device according to [1], wherein the first barrier layer has a full width at half maximum in an X-ray rocking curve measurement of (10-10) plane of 200 arcsec to 2000 arcsec .

[3] The group III nitride semiconductor light-emitting device according to [1] or [2], wherein the first barrier layer has a gap formed between adjacent columnar crystals.
[4] The [3], wherein the gap includes a vertical gap extending in a substantially vertical direction from the surface of the substrate and a horizontal gap extending in a substantially horizontal direction from the surface of the substrate. Group III nitride semiconductor light-emitting device.
[5] The group III nitride semiconductor light-emitting device according to [3] or [4], wherein the gap has a density of 1 × 10 ⁹ / cm ⁻² or more and 1 × 10 ¹⁰ / cm ⁻² or less. .
[6] The group III nitride semiconductor light-emitting device according to any one of [3] to [5], wherein the gaps are periodically arranged.

  [7] The first barrier layer has an inclination in a height direction of the columnar crystal with respect to a vertical direction of the light extraction interface in a range of 0.05 ° to 10 °. The group III nitride semiconductor light-emitting device according to any one of [6].

[8] The group III nitride semiconductor light-emitting device manufacturing method according to any one of [1] to [7], wherein the first barrier layer is formed by a sputtering method. A method for manufacturing a semiconductor light emitting device.
[9] The method for producing a Group III nitride semiconductor light-emitting device according to [8], wherein the light-emitting layer is formed by MOCVD.
[10] A lamp comprising the group III nitride semiconductor light-emitting device according to any one of [1] to [7].

In the group III nitride semiconductor light emitting device of the present invention (hereinafter sometimes abbreviated as “light emitting device”), the first barrier layer is composed of an aggregate of columnar crystals, and the height direction of the columnar crystals is Since it is inclined with respect to the vertical direction of the surface of the substrate, as shown below, a high-intensity group III nitride semiconductor light-emitting device in which light emitted from the light-emitting layer is efficiently extracted outside the device is obtained.
When light enters from one material side into the interface where materials having different refractive indexes are in contact, the light entering from one material side is reflected to one material side or the other depending on the angle of light with respect to the interface. It is determined whether it is taken out to the material side. When the light generated in the light emitting layer of the group III nitride semiconductor light emitting element is incident on the interface between the light emitting element, such as a mold resin, and the light emitting element, the angle between the light and the interface is small (in other words, the light Light is more likely to be reflected to the light-emitting element side, and the angle between the light and the interface is larger (in other words, the light incident direction is closer to the interface), the light is more external. Easy to be taken out to the side.

  In the group III nitride semiconductor light-emitting device of the present invention, the first barrier layer is composed of an aggregate of columnar crystals, and the height direction of the columnar crystals is inclined with respect to the vertical direction of the light extraction interface. The light in the random direction generated in the layer is reflected by the columnar crystal of the first barrier layer, whereby the ratio of the light in the direction near the light extraction interface is increased and is incident on the light extraction interface. It will be a thing. The light in a direction near the light extraction interface is light that is easily extracted from the light extraction interface that is an interface between the light emitting element and the outside of the light emitting element. Therefore, in the group III nitride semiconductor light emitting device of the present invention, The light generated in the light emitting layer is efficiently extracted from the light extraction interface to the outside.

  Furthermore, in the group III nitride semiconductor light-emitting device of the present invention, the first barrier layer is composed of an aggregate of columnar crystals, and the height direction of the columnar crystals is inclined with respect to the vertical direction of the light extraction interface. Compared with the case where the height direction of the columnar crystal is the direction perpendicular to the light extraction interface, the light generated in the light emitting layer has a larger surface area on the reflecting surface where the light reflected in the light emitting element is reflected. However, it is efficiently extracted from the light emitting element.

  In the group III nitride semiconductor light-emitting device of the present invention, the first barrier layer has a half-value width of 200 arcsec or more and 2000 arcsec or less in the X-ray rocking curve measurement of the (10-10) plane. The generated light in the random direction is reflected by the columnar crystals of the first barrier layer, thereby effectively increasing the proportion of light in the direction near the light extraction interface and entering the light extraction interface. To be. Therefore, the light generated in the light emitting layer is extracted more efficiently from the light emitting element.

  Further, in the group III nitride semiconductor light emitting device of the present invention, the first barrier layer is formed such that a gap (cavity) is formed between adjacent columnar crystals. A photonic crystal-like structure in which materials having different refractive indexes are arranged can be used. As a result, the light in the random direction generated in the light emitting layer is efficiently reflected by the gap formed in the first barrier layer, so that the ratio of the light in the direction near the light extraction interface is approximately It is effectively increased and becomes incident on the light extraction interface. Therefore, the light generated in the light emitting layer is extracted more efficiently from the light emitting element.

  In the group III nitride semiconductor light emitting device of the present invention, the gap formed in the first barrier layer includes a vertical gap extending in a substantially vertical direction from the surface of the substrate, and a substantially horizontal direction from the surface of the substrate. In other words, the ratio of the light in the direction near the vertical to the light extraction interface is more effectively increased and incident on the light extraction interface.

  In the group III nitride semiconductor light-emitting device of the present invention, the first barrier layer has an inclination in the height direction of the columnar crystal with respect to a direction perpendicular to the light extraction interface in the range of 0.05 ° to 10 °. In some cases, light in a random direction generated in the light emitting layer is reflected by the columnar crystals of the first barrier layer, so that the ratio of light in a direction near the light extraction interface is effectively increased. In this case, the light enters the light extraction interface. Therefore, a high-intensity group III nitride semiconductor light-emitting device is obtained.

In addition, according to the method for producing a group III nitride semiconductor light emitting device of the present invention, the first barrier layer is formed by sputtering, so that the group III nitride semiconductor light emitting device of the present invention can be easily obtained.
In addition, the lamp of the present invention uses the group III nitride semiconductor light emitting device of the present invention, and therefore has a high luminance.

Hereinafter, a group III nitride semiconductor light emitting device, a method for manufacturing a group III nitride semiconductor light emitting device, and a lamp according to an embodiment of the present invention will be described with reference to the drawings.
[Group III nitride semiconductor light emitting device]
FIG. 1 is a schematic cross-sectional view schematically showing an example of a group III nitride semiconductor light emitting device according to the present invention. FIG. 2 is a schematic view showing a planar structure of the group III nitride semiconductor light-emitting device shown in FIG.

The light emitting element 1 of the present embodiment extracts light upward in FIG. 1, and the entire upper surface of the light emitting element 1 is a main light extraction interface between the light emitting element 1 and the outside of the light emitting element 1. The light extraction interface is horizontal with respect to the surface of the substrate 11.
The light-emitting element 1 shown in FIG. 1 is a single-sided electrode type, and includes a buffer layer 12 made of a group III nitride semiconductor and a group III nitride semiconductor containing Ga as a group III element on a substrate 11. The semiconductor layer 20 to be formed is formed. As shown in FIG. 1, the semiconductor layer 20 is formed by laminating an n-type semiconductor layer 14, a light emitting layer 15, and a p-type semiconductor layer 16 in this order.

[Laminated structure of light-emitting elements]
<Board>
In the light emitting device 1 of the present embodiment, the material that can be used for the substrate 11 is not particularly limited as long as it is a substrate material on which a group III nitride semiconductor crystal is epitaxially grown, and various materials are selected and used. be able to. For example, oxide crystals such as sapphire and zinc oxide (ZnO), elemental semiconductor crystals or compound semiconductor crystals such as silicon (Si) and gallium phosphide (GaP), 4H or 6H stacked silicon carbide (SiC) and hexagonal crystals And carbide crystals such as hexagonal gallium nitride (GaN) and aluminum nitride (AlN).
Further, the substrate 11 transmits the light emitted from the light emitting layer 15 so that the light leaked to the substrate 11 side without being reflected by the buffer layer 12 can be transmitted to the outside of the light emitting element through the substrate 11. A material having a large forbidden band width is preferable.

  When the substrate 11 is made of, for example, sapphire, a surface of the substrate 11 can be deposited with a group III nitride semiconductor layer having a nonpolar surface. (0001) plane (c plane), (11− 20) It is preferably any one of a plane (a plane), a (1-102) plane (r plane), and a (10-10) plane (m plane). In addition, in this specification, (-) attached | subjected on the number of a Miller index is attached | subjected and described before a number.

<Buffer layer>
In the light emitting device 1 of this embodiment, a buffer layer 12 having a hexagonal crystal structure is formed on a substrate 11.
The group III nitride semiconductor crystal forming the buffer layer 12 preferably has a single crystal structure. By controlling the growth conditions, the group III nitride semiconductor crystal grows not only in the upward direction but also in the in-plane direction to form a single crystal structure. Therefore, by controlling the film forming conditions of the buffer layer 12, the buffer layer 12 made of a crystal of a group III nitride semiconductor having a single crystal structure can be obtained.
When the buffer layer 12 having such a single crystal structure is formed on the substrate 11, the buffer function of the buffer layer 12 works effectively, so that the group III nitride semiconductor formed thereon has a good orientation. It becomes a crystal film having the property and crystallinity.

  Further, the group III nitride semiconductor crystal forming the buffer layer 12 can be formed into a columnar crystal (polycrystal) having a texture based on hexagonal columns by controlling the film forming conditions. In addition, the columnar crystal consisting of the texture here is a crystal that is separated by forming a crystal grain boundary between adjacent crystal grains, and is itself a columnar shape as a longitudinal sectional shape. Say.

  In addition, as a material constituting the buffer layer 12, any material can be used as long as it is a group III nitride semiconductor represented by a general formula AlGaInN. Furthermore, as V group, it is good also as a structure containing As and P. Further, when the buffer layer 12 has a composition containing Al, it is preferable to use GaAlN. At this time, the composition of Al is preferably 50% or more. Further, when the buffer layer 12 has a composition containing Al, it is more preferable that the buffer layer 12 be made of AlN.

Further, the thickness of the buffer layer 12 is preferably in the range of 10 to 500 nm, and more preferably in the range of 20 to 100 nm.
When the thickness of the buffer layer 12 is less than 10 nm, the buffer function as described above is not sufficient. In addition, when the buffer layer 12 is formed with a film thickness exceeding 500 nm, there is a possibility that the film forming process time becomes long and the productivity is lowered although the function as the coat layer is not changed. The film thickness of the buffer layer 12 can be easily measured by a cross-sectional TEM photograph.

<Semiconductor layer>
As shown in FIG. 1, the semiconductor layer 20 includes an n-type semiconductor layer 14, a light emitting layer 15, and a p-type semiconductor layer 16.
"N-type semiconductor layer"
The n-type semiconductor layer 14 is stacked on the buffer layer 12 and includes an underlayer 14a, an n-type contact layer 14b, and an n-type cladding layer 14c. Note that the n-type contact layer can also serve as a base layer and / or an n-type cladding layer.

(Underlayer)
The underlayer 14a of the n-type semiconductor layer 14 of the present embodiment is made of a group III nitride semiconductor. The material of the underlayer 14a may be the same as or different from that of the buffer layer 12, but a group III nitride semiconductor containing Ga, that is, a GaN-based compound semiconductor is preferable, and an Al _X Ga _1-X N layer ( It is more preferable that 0 ≦ x ≦ 1, preferably 0 ≦ x ≦ 0.5, and more preferably 0 ≦ x ≦ 0.1.
For example, when the buffer layer 12 is an aggregate of columnar crystals made of AlN, it is desirable to loop dislocations by migration so that the underlying layer 14a does not inherit the crystallinity of the buffer layer 12 as it is. A GaN-based compound semiconductor tends to cause dislocation looping, and AlGaN or GaN is particularly preferable.

Moreover, the film thickness of the underlayer 14a is preferably 0.1 μm or more, more preferably 0.5 μm or more, and most preferably 1 μm or more. An Al _X Ga _1-X N layer with good crystallinity is more easily obtained when the thickness is increased.

If necessary, the underlayer 14a may be doped with n-type impurities within the range of 1 × 10 ¹⁷ to 1 × 10 ¹⁹ / cm ³ , but undoped (<1 × 10 ¹⁷ / cm ^3). ) And undoped is preferable in terms of maintaining good crystallinity.
For example, when the substrate 11 has conductivity, electrodes can be formed above and below the light emitting element 1 by doping the base layer 14a with a dopant to make it conductive. On the other hand, when an insulating material is used as the substrate 11, a chip structure in which the positive electrode and the negative electrode are provided on the same surface of the light emitting element 1 is employed. It is more preferable that the crystallinity is improved.
Although it does not specifically limit as an n-type impurity, For example, Si, Ge, Sn, etc. are mentioned, Preferably Si and Ge are mentioned.

(N-type contact layer)
The n-type contact layer 14b is made of a group III nitride semiconductor. The n-type contact layer 14b is made of an Al _X Ga _1-X N layer (0 ≦ x ≦ 1, preferably 0 ≦ x ≦ 0.5, more preferably 0 ≦ x ≦ 0.1), similarly to the base layer 14a. Preferably, it is configured.
The n-type contact layer 14b is preferably doped with an n-type impurity, and the n-type impurity is preferably 1 × 10 ¹⁷ to 1 × 10 ¹⁹ / cm ³ , preferably 1 × 10 ¹⁸ to 1 × 10 ^19. When it is contained at a concentration of / cm ³ , it is preferable in terms of maintaining good ohmic contact with the negative electrode, suppressing the occurrence of cracks, and maintaining good crystallinity. Although it does not specifically limit as an n-type impurity, For example, Si, Ge, Sn, etc. are mentioned, Preferably it is Si and Ge.

  The gallium nitride compound semiconductor constituting the base layer 14a and the n-type contact layer 14b preferably has the same composition, and the total film thickness thereof is 0.1 to 20 μm, preferably 0.5 to 15 μm, It is preferable to set in the range of 1 to 12 μm. When the film thickness is within this range, the crystallinity of the semiconductor is maintained satisfactorily.

(N-type cladding layer (first barrier layer))
An n-type cladding layer 14 c is provided between the n-type contact layer 14 b and the light emitting layer 15. FIG. 3 is a schematic view schematically showing a crystal structure constituting the n-type cladding layer 14c of the present embodiment, FIG. 3 (a) is a cross-sectional view, and FIG. 3 (b) is a plan view. . As shown in FIGS. 3A and 3B, the n-type cladding layer 14c is an aggregate of columnar crystals 114 in which the columnar crystals 114 are stacked. The columnar crystal 114 has a substantially hexagonal columnar shape with the {11-20} plane (a-plane) as the side surface. As shown in FIG. 3A, the height direction h of the columnar crystal 114 is the light extraction interface. The vertical direction d (in the present embodiment, the vertical direction d of the surface of the substrate 11) is inclined with a predetermined range of randomness. Therefore, the adjacent columnar crystals 114 are incompletely joined together, and a gap 114 a is formed between the adjacent columnar crystals 114.
In the present embodiment, the height direction h of the columnar crystal 114 is the C-axis direction.

  In the present embodiment, the gap 114a is formed in the n-type cladding layer 14c, so that the n-type cladding layer 14c has a photonic crystal structure in which materials having different refractive indexes are arranged. The gap 114a can be observed by, for example, planar TEM analysis using a transmission electron microscope (abbreviation: TEM).

The density of the gap 114a is preferably 1 × 10 ⁹ / cm ⁻² or more and 1 × 10 ¹⁰ / cm ⁻² or less. The larger the number of the gaps 114a, the more efficiently the light generated in the light emitting layer 15 can be reflected. If the density of the gap 114a is less than the above range, the light generated in the light emitting layer 15 may not be sufficiently reflected by the gap 114a. However, if the number of the gaps 114a is large, the region through which the element operating current for operating the light emitting element 1 can be reduced. For example, in the LED using the light emitting element 1, the forward voltage is increased. May occur. Therefore, the density of the gap 114a is preferably 1 × 10 ¹⁰ / cm ⁻² or less.

Further, as shown in FIGS. 3A and 3B, the gap 114a extends in a substantially horizontal direction from the surface of the substrate 11 and in a substantially horizontal direction from the surface of the substrate 11. And a horizontal gap 114c. The vertical gap 114b is formed by dividing the growth of the columnar crystal 114 during the formation of the n-type cladding layer 14c, and is a columnar shape that is mainly a plane parallel to the growth direction of the columnar crystal 114. The crystal 114 is partitioned by the side surface a (a surface). Further, the horizontal gap 114c is partitioned mainly by the end face c (c-plane) of the columnar crystal 114. As the gap 114a, the smaller the vertical gap 114b and the larger the horizontal gap 114c, the more efficiently the light generated in the light emitting layer 15 can be reflected.
The gaps 114a are preferably arranged periodically in the n-type cladding layer 14c. Here, the gaps 114 a are periodically arranged because the widths of the columnar crystals 114 and the horizontal widths W of the vertical gaps 114 b are substantially uniform, so that the gaps 114 a are arranged periodically in the horizontal direction on the surface of the substrate 11. It means that it is in an arranged state.
As described above, since the gaps 114a are periodically arranged in the n-type cladding layer 14c, regions having different refractive indexes are periodically arranged, and the optical characteristics as a photonic crystal are effectively obtained. It can be expressed in an experimental manner.

  In addition, the inclination θ of the columnar crystal 114 in the height direction h with respect to the vertical direction d (vertical direction of the light extraction interface) of the surface of the substrate 11 is preferably in the range of 0.05 ° to 10 °. When the inclination θ is less than 0.05 °, the number of the gaps 114a included in the n-type cladding layer 14c decreases, and the light generated in the light emitting layer 15 may not be sufficiently reflected by the gaps 114a. Further, when the inclination θ exceeds 10 °, the number of the gaps 114a included in the n-type cladding layer 14c increases so that the region through which the element operating current for operating the light emitting element 1 can be reduced is preferable. Absent.

  In general, in the case of a group III nitride compound semiconductor, the full width at half maximum in the (10-10) plane X-ray rocking curve (XRC) measurement is an index of dislocation density (twist), and the (0002) plane X-ray rocking The half width in the curve (XRC) measurement is an index of crystal flatness (mosaicity).

The n-type cladding layer 14c of the present embodiment preferably has a half width of 200 arcsec or more and 2000 arcsec or less in the measurement of the X-ray rocking curve of the (10-10) plane. When the half width in the X-ray rocking curve measurement of the (10-10) plane is less than the above range, the inclination θ in the height direction h of the columnar crystal 111 with respect to the vertical direction d of the surface of the substrate 11 becomes too small, and light emission occurs. In some cases, the light generated in the layer 15 cannot be sufficiently reflected by the gap 114a. If the half width in the X-ray rocking curve measurement of the (10-10) plane exceeds the above range, the inclination θ of the columnar crystal 111 in the height direction h with respect to the vertical direction d of the surface of the substrate 11 becomes too large. This is not preferable because a region in which an element operating current for operating the light emitting element 1 can flow decreases.
Further, the half width in the X-ray rocking curve measurement of the (10-10) plane has a correlation with the density of the gap 114a of the n-type cladding layer 14c. The larger the half width, the larger the density and the half width. The smaller the density, the smaller the density.

  Further, the n-type cladding layer 14c of the present embodiment preferably has a full width at half maximum in the X-ray rocking curve measurement on the (0002) plane of 200 arcsec to 2000 arcsec. When the half width in the X-ray rocking curve measurement of the (0002) plane is less than the above range, the n-type cladding layer 14c is not an aggregate of columnar crystals, and the n-type cladding layer 14c is a layer close to a single crystal layer. May be formed. Further, when the half width in the X-ray rocking curve measurement of the (0002) plane exceeds the above range, the n-type cladding layer 14c is an aggregate of columnar crystals having a very small width, and the n-type cladding layer 14c In some cases, the crystallinity may be insufficient. Insufficient crystallinity of the n-type cladding layer 14c is not preferable because the light emission intensity of the light-emitting layer 15 laminated on the n-type cladding layer 14c becomes weak.

In the present embodiment, the lateral width W of the gap 114a means an average value of the vertical gap 114b. The lateral width W of the gap 114a can be determined as appropriate according to the wavelength emitted from the light emitting layer 15, and is not particularly limited. As the emission wavelength emitted from the light emitting layer 15 becomes longer, the preferred width W of the gap 114a becomes larger. If the width W of the gap 114a is too narrow, the density of the surface that reflects the light generated in the light emitting layer 15 may not be sufficiently obtained, and the light generated in the light emitting layer 15 may not be efficiently reflected. is there. In addition, if the lateral width W of the gap 114a is too wide, it is not preferable because a region through which an element operating current for operating the light emitting element 1 can be reduced.
For example, when the light emitting layer 15 is made of Ga _X In _1-X N (0 ≦ X ≦ 1), the wavelength of light emitted from the light emitting layer 15 is 360 nm to 450 nm. In this case, the lateral width W (horizontal width) of the gap 114a is preferably about 90 nm to 110 nm. In addition, for example, the light-emitting layer 15 includes Ga _X In _1-X N _1-Y M _Y (0 ≦≦ V) containing another arsenic (element symbol: As) or phosphorus (element symbol: P) as a group V element. When X ≦ 1, 0 <Y <1), the wavelength of light emitted from the light emitting layer 15 is 500 nm to 600 nm. In this case, the lateral width W (horizontal width) of the gap 114a is preferably about 125 nm to 150 nm.

  Moreover, it is preferable that the top surface 114d of the columnar crystal 114 has a (3 × 1) or (6 × 2) rearrangement structure. The rearrangement structure of the top surface 114d of the columnar crystal 114 of the n-type cladding layer 14c can be confirmed using an analysis method such as a high-speed reflection electron diffraction (RHEED) method. Since the RHEED method is generally analyzed using a vacuum environment, when a columnar crystal is grown by a method of forming a crystal under a vacuum environment such as a sputtering method or a molecular beam epitaxial (MBE) method, it is obtained. The rearranged structure of the top surface of the columnar crystals thus obtained can be easily confirmed.

  The n-type cladding layer 14c can be formed of AlGaN, GaN, GaInN, or the like. In addition, when the n-type cladding layer 14c is made of GaInN, it is desirable to make it larger than the GaInN band gap of the light emitting layer 15.

  The thickness of the n-type cladding layer 14c is not particularly limited, but is preferably in the range of 5 to 500 nm, more preferably in the range of 10 to 50 nm. The number of gaps 114a included in the n-type cladding layer 14c increases as the thickness of the n-type cladding layer 14c increases. Therefore, if the thickness of the n-type cladding layer 14c is less than the above range, the number of the gaps 114a included in the n-type cladding layer 14c may not be sufficiently obtained. Further, when the thickness of the n-type cladding layer 14c exceeds the above range, the number of gaps 114a included in the n-type cladding layer 14c increases so that an element operating current for operating the light emitting element 1 can be passed. This is not preferable because the area decreases.

Further, the n-type doping concentration of the n-type cladding layer 14c is preferably in the range of 1 × 10 ¹⁷ to 1 × 10 ²⁰ / cm ³ , more preferably in the range of 1 × 10 ¹⁸ to 1 × 10 ¹⁹ / cm ³ . A doping concentration within this range is preferable in terms of maintaining good crystallinity and reducing the operating voltage of the light-emitting element 1.

<Light emitting layer>
In the present embodiment, the light emitting layer 15 is made of a continuous group III nitride semiconductor crystal developed in the surface direction of the substrate 11. The light emitting layer 15 is formed so as to cover the gap 114a exposed on the surface of the n-type cladding layer 14c like a canopy, and thus has a larger plane area than the n-type cladding layer 14c.
The light emitting layer 15 can be composed of, for example, gallium nitride indium (Ga _X In _1-X N: 0 <X <1) that includes a plurality of phases having different indium (In) compositions. The light-emitting layer 15 includes gallium phosphide nitride indium (Ga _X In _1-X N _Y P) containing phosphorus (element symbol: P) or arsenic (element symbol: As), which is a group V element different from nitrogen. _1-Y : 0 <X <1, 0 <Y <1), etc.

  Further, the light emitting layer 15 may be composed of a single layer of the first or second conductivity type that is quantitatively single. Further, the light emitting layer 15 may be formed of a single quantum well structure (abbreviation: SQW) or a multiple quantum well structure (abbreviation: MQW) including a well layer. When the light emitting layer 15 has a multiple quantum well structure, the number of well layers is preferably 5 or more and 20 or less from the viewpoint of stably obtaining high intensity light emission.

  In the present embodiment, as shown in FIG. 1, the light emitting layer 15 includes a barrier layer 15a made of a gallium nitride compound semiconductor and a well layer 15b made of a gallium nitride compound semiconductor containing indium alternately. The barrier layer 15a is disposed repeatedly on the n-type cladding layer 14c side and the p-type semiconductor layer 16 side. In the example shown in FIG. 1, the light emitting layer 15 includes six barrier layers 15 a and five well layers 15 b that are alternately and repeatedly stacked, and the barrier layer 15 a is disposed on the uppermost layer and the lowermost layer of the light emitting layer 15. The well layer 15b is arranged between the barrier layers 15a.

The barrier layer 15a is preferably made of a group III nitride semiconductor material having a larger forbidden width (bandgap energy) than the well layer 15b. Specifically, for example, a gallium nitride compound semiconductor such as Al _c Ga _1-c N (0 ≦ c <0.3) having a larger band gap energy than the well layer 15b is preferably used as the barrier layer 15a. be able to.
Furthermore, the well layer 15b can be formed using indium as the semiconductor gallium nitride-based compound containing, for _example, can be used _{Ga 1-s In s N (} 0 <s <0.4) GaN such as indium.

  The film thickness of the entire light emitting layer 15 is not particularly limited, but is preferably a film thickness that can obtain a quantum effect, that is, a critical film thickness. For example, the thickness of the light emitting layer 15 is preferably in the range of 1 to 500 nm, and more preferably about 100 nm. When the film thickness is in the above range, it contributes to the improvement of the light emission output.

  The thickness of the barrier layer 15a having a multiple quantum well structure joined to the n-type cladding layer 14c is preferably 5 to 50 nm thicker than the other barrier layers 15a having the multiple quantum well structure. As shown in FIG. 1, when the barrier layer 15a having a multiple quantum well structure is bonded to the n-type cladding layer 14c, the thickness of the barrier layer 15a having a multiple quantum well structure bonded to the n-type cladding layer 14c is It consists of a continuous group III nitride semiconductor crystal developed in the surface direction of the substrate 11 by making it 5 nm or more, more preferably 10 nm or more thicker than the thickness of the other barrier layer 15a having a multiple quantum well structure. The light emitting layer 15 that covers the gap exposed on the surface of the n-type cladding layer 14c like a canopy can be easily formed. That is, by making the layer thickness of the barrier layer 15a of the multiple quantum well structure joined to the n-type cladding layer 14c larger than the layer thickness of the other barrier layer 15a forming the multiple quantum well structure, the columnar shape having the gap 114a is formed. Since the strain of the light emitting layer 15 formed on the n-cladding layer 14c made of the crystal 114 can be controlled, it is possible to avoid a decrease in the internal quantum efficiency of the light emitting layer 15.

<P-type semiconductor layer (second barrier layer)>
The p-type semiconductor layer 16 includes a p-type cladding layer 16a and a p-type contact layer 16b. The p-type contact layer may also serve as the p-type cladding layer.

(P-type cladding layer)
The p-type cladding layer 16a is not particularly limited as long as it has a composition larger than the band gap energy of the light emitting layer 15 and can confine carriers in the light emitting layer 15. Preferably, the Al _d Ga _{1-d is used.} N (0 <d ≦ 0.4, preferably 0.1 ≦ d ≦ 0.3). When the p-type cladding layer 16a is made of such AlGaN, it is preferable in terms of confining carriers in the light emitting layer 15.
The thickness of the p-type cladding layer 16a is not particularly limited, but is preferably 1 to 400 nm, and more preferably 5 to 100 nm.

The p-type doping concentration of the p-type cladding layer 16a is preferably 1 × 10 ¹⁸ to 1 × 10 ²¹ / cm ³ , more preferably 1 × 10 ¹⁹ to 1 × 10 ²⁰ / cm ³ . When the p-type dope concentration is in the above range, a good p-type crystal can be obtained without reducing the crystallinity. Although it does not specifically limit as a p-type impurity, For example, Preferably Mg is mentioned.

(P-type contact layer)
The p-type contact layer 16b is a nitride containing at least Al _e Ga _1-e N (0 ≦ e <0.5, preferably 0 ≦ e ≦ 0.2, more preferably 0 ≦ e ≦ 0.1). This is a gallium compound semiconductor layer. When the Al composition is in the above range, it is preferable in terms of maintaining good crystallinity and good ohmic contact with a p-ohmic electrode (see translucent electrode 17 described later).
Although the film thickness of the p-type contact layer 16b is not specifically limited, 10-500 nm is preferable, More preferably, it is 50-200 nm. When the film thickness is within this range, it is preferable in that the light emission output can be kept high.

Further, when the p-type contact layer 16b contains a p-type dopant at a concentration in the range of 1 × 10 ¹⁸ to 1 × 10 ²¹ / cm ³ , good ohmic contact can be maintained, cracking can be prevented, and good It is preferable at the point of crystalline maintenance, More preferably, it is the range of 5 * 10 < ¹⁹ > -5 * 10 < ²⁰ > / cm < ³ >. Although it does not specifically limit as a p-type impurity, For example, Preferably Mg is mentioned.

In addition, the semiconductor layer 20 which comprises the light emitting element 1 of this invention is not limited to the thing of embodiment mentioned above.
For example, as the material of the semiconductor layer constituting the present invention, addition to the foregoing, for example, the general formula _{Al X Ga Y In Z N 1} -A M A (0 ≦ X ≦ 1,0 ≦ Y ≦ 1,0 ≦ Z ≦ 1 and X + Y + Z = 1, the symbol M represents a group V element different from nitrogen (N), and 0 ≦ A <1)) is known. Also in the present invention, these known gallium nitride compound semiconductors can be used without any limitation.
In addition, a group III nitride semiconductor containing Ga as a group III element can contain other group III elements in addition to Al, Ga, and In. If necessary, Ge, Si, Mg, Ca, Zn, Elements such as Be, P and As can also be contained. Furthermore, it is not limited to the element added intentionally, but may include impurities that are inevitably included depending on the film forming conditions and the like, as well as trace impurities that are included in the raw materials and reaction tube materials.

<Translucent positive electrode>
The translucent positive electrode 17 is an electrode having translucency formed on the p-type semiconductor layer 16.
The material of the translucent positive electrode 17 is not particularly limited, but ITO (In ₂ O ₃ —SnO ₂ ), AZnO (ZnO—Al ₂ O ₃ ), IZO (In ₂ O ₃ —ZnO), GZO (ZnO— A material such as Ga ₂ O ₃ ) can be used. Further, as the translucent positive electrode 17, any structure including a conventionally known structure can be used without any limitation.
The translucent positive electrode 17 may be formed so as to cover the entire surface on the p-type semiconductor layer 16, or may be formed in a lattice shape or a tree shape with a gap.

<Positive electrode bonding pad>
The positive electrode bonding pad 18 is a substantially circular electrode formed on the translucent positive electrode 17 as shown in FIG.
As the material of the positive electrode bonding pad 18, various structures using Au, Al, Ni, Cu and the like are well known, and those known materials and structures can be used without any limitation.

  The thickness of the positive electrode bonding pad 18 is preferably in the range of 100 to 1000 nm. Further, in view of the characteristics of the bonding pad, the larger the thickness, the higher the bondability. Therefore, the thickness of the positive electrode bonding pad 18 is more preferably 300 nm or more. Furthermore, it is preferable to set it as 500 nm or less from a viewpoint of manufacturing cost.

<Negative electrode>
The negative electrode 19 is in contact with the n-type contact layer 14 b of the n-type semiconductor layer 14 constituting the semiconductor layer 20. Therefore, as shown in FIGS. 1 and 2, the negative electrode 19 is exposed by removing a part of the p-type semiconductor layer 16, the light emitting layer 15, and the n-type semiconductor layer 14 to expose the n-type contact layer 14 b. It is formed in a substantially circular shape on the region 14d.
As materials for the negative electrode 19, negative electrodes having various compositions and structures are well known, and these known negative electrodes can be used without any limitation.

[Method for Manufacturing Light-Emitting Element]
In order to manufacture the light emitting element 1 shown in FIG. 1, first, the laminated semiconductor 10 shown in FIG. 4 in which the semiconductor layer 20 is formed is formed on the substrate 11.

In the present embodiment, it is preferable to pre-process the substrate 11 before forming the buffer layer 12 on the substrate 11. By performing pretreatment on the substrate 11, the film forming process is stabilized. The pretreatment of the substrate 11 can be performed, for example, by a method in which the substrate 11 is placed in a chamber of a sputtering apparatus and sputtering is performed before the buffer layer 12 is formed. Specifically, the surface of the substrate 11 can be cleaned by exposing the substrate 11 to plasma of Ar gas or N ₂ gas in the chamber. By causing plasma such as Ar gas or N ₂ gas to act on the surface of the substrate 11, organic substances and oxides attached to the surface of the substrate 11 can be removed. In this case, if a voltage is applied between the substrate 11 and the chamber without applying power to the target, the plasma particles efficiently act on the cleaning of the substrate 11.

  The pretreatment of the substrate 11 is not limited to the method described above, and a wet method can also be used.

After pre-processing the substrate 11, the buffer layer 12, the base layer 14 a, and the n-type contact layer 14 b are formed on the substrate 11.
Each layer of the buffer layer 12, the base layer 14a, and the n-type contact layer 14b of this embodiment is formed by physical deposition means such as sputtering, laser ablation, or ion beam evaporation, halide vapor deposition, or hydride ( It can be formed by chemical vapor deposition (hydride) or metal organic chemical vapor deposition (abbreviation: MOCVD), molecular beam epitaxy (abbreviation: MBE), or the like.

Thereafter, an n-type cladding layer 14c of the n-type semiconductor layer 14 is formed on the substrate 11 formed up to the n-type contact layer 14b. The n-type cladding layer 14c, like the buffer layer 12, the underlayer 14a, and the n-type contact layer 14b, is a physical deposition means such as a sputtering method, a laser ablation method, or an ion beam evaporation method, a halide vapor deposition method, or a hydride gas. It can be formed by chemical deposition means such as phase deposition or metalorganic chemical vapor deposition, molecular beam epitaxy, or the like.
Among these methods of forming the n-type cladding layer 14 c, sputtering is a columnar crystal in which the height direction h is inclined with respect to the direction d perpendicular to the surface of the substrate 11 on the surface where the n-type cladding layer 14 c is formed. It is preferable because 114 aggregates can be easily formed.

  As the sputtering method, for example, a high frequency magnetron sputtering method, an electron cyclotron (ECR) resonance type sputtering method, a reactive ion sputtering method, or the like can be used. Further, as the sputtering apparatus, it is preferable to use a sputtering apparatus equipped with an RHEED analyzer. By forming the n-type cladding layer 14c using a sputtering apparatus equipped with an RHEED analyzer, the n-type cladding layer 14c can be easily formed while confirming the rearrangement structure of the columnar crystals 114 constituting the n-type cladding layer 14c. Can be formed.

In the present embodiment, in order to form the n-type cladding layer 14c of the n-type semiconductor layer 14 made of a group III nitride semiconductor layer on the substrate 11 formed up to the n-type contact layer 14b, a high-frequency reactive ion sputtering method is used. To do.
When the n-type cladding layer 14c is formed by the sputtering method, a nitrogen material such as nitrogen gas (N ₂ ) or ammonia (NH ₃ ) that has been made into plasma is used. In this embodiment, the supply amount of the nitrogen raw material is increased as compared with the supply amount of the group III element raw material. For example, when the columnar crystal 114 of the n-type cladding layer 14c made of GaN is formed, the amount of nitrogen ions, atomic nitrogen, or nitrogen radicals supplied from the nitrogen source is set to the supply amount of Ga atoms released from the metal Ga target. Do as much as possible. The ratio of the amount of nitrogen source and Ga atoms can be controlled by the component ratio of the sputtering gas generating plasma. For example, when the Ga target is sputtered with Ar gas and N ₂ gas is used as the nitrogen source, the flow ratio of Ar and N ₂ is an important parameter. By controlling the flow rate ratio between the supply amount of N ₂ gas and the supply amount of Ar gas, an assembly of columnar crystals 114 whose height direction h is inclined with respect to the vertical direction d of the surface of the substrate 11 can be easily obtained. Can be formed.

In the present embodiment, when the columnar crystal 114 of the n-type cladding layer 14c is formed, it is desirable that the volume ratio of N _{2 to} the whole gas in the plasma is 50% or less.

If the supply amount of the nitrogen raw material is less than the supply amount of the group III element raw material, the columnar crystal 114 is difficult to be stably formed, and the layered structure having a small gap 114a generated due to incomplete coalescence of the columnar crystals 114 is formed. A film may be formed.
On the other hand, when the supply amount of the Group III element material is small and the ratio of the supply amount of the nitrogen material and the supply amount of the Group III element is outside the above range, a columnar shape generated on the surface of the n-type contact layer 14b. The amount of the crystal 114 is reduced, and the interval between the adjacent columnar crystals 114 is widened. As a result, the lateral width W of the gap 114a may be too wide.

The ratio between the supply amount of the nitrogen raw material and the supply amount of the group III element raw material is that the power applied to turn the nitrogen source gas such as nitrogen gas (N ₂ ) or ammonia (NH ₃ ) into plasma and the group III element Can be adjusted by controlling the electric power applied to the target including.
Further, the supply amount of the group III element raw material to be the n-type cladding layer 14c on the surface of the n-type contact layer 14b is reflected as the deposition rate of the group III nitride semiconductor layer.
For example, in order to efficiently form a group III nitride semiconductor layer having a lateral width W of the gap 114a of 90 nm to 110 nm, the raw material of the group III element is set so that the film formation rate is 0.2 nm / second or more and 2 nm / second or less. It is desirable to control the supply amount.
Further, for example, in order to efficiently form a group III nitride semiconductor layer having a lateral width W of the gap 114a of 125 nm to 150 nm, the film forming rate of the group III element is set to 0.1 nm / second or more and 1 nm / second or less. It is desirable to control the amount of raw material supplied.

  The inclination θ of the columnar crystal 111 in the height direction h with respect to the vertical direction d of the surface of the substrate 11 and the density of the gap 114a change the temperature of the substrate 11 when the n-type cladding layer 14c is formed by sputtering. Can be controlled by. In order to make the inclination θ of the columnar crystals 111 and the density of the gaps 114a within a preferable range, the temperature of the substrate 11 is preferably 400 to 900 ° C. When the temperature of the substrate 11 is higher than the above range, the inclination θ of the columnar crystal 111 is reduced and the density of the gap 114a is also reduced, so that the light generated in the light emitting layer 15 can be sufficiently reflected by the gap 114a. An n-type cladding layer 14c that cannot be formed may be formed. Further, when the temperature of the substrate 11 is lower than the above range, the inclination θ of the columnar crystal 111 is increased, and the density of the gap 114a is excessively increased, which hinders an element operating current for operating the light emitting element 1. The coming n-type cladding layer 14c may be formed.

Further, for example, when the n-type cladding layer 14c made of Si-doped InGaN is formed on the n-type contact layer 14b, it is preferable to perform sputtering under the following conditions.
(1) Substrate temperature = 400 ° C. to 900 ° C. (1) Pressure = 0.05 to 10 Pa, (2) Applied power for plasma (power applied to metal Ga target) = 0.1 to 10 ( kw), (3) applied power for plasma (power applied to the metal In target) = 0.1 to 10 (kw), (4) gas atmosphere = argon (Ar) and nitrogen (N ₂ ) A mixed gas atmosphere in which the volume fraction of nitrogen in the total flow rate of the gas is 50% or less. Note that the gas atmosphere may contain ammonia that can provide a relatively high film formation rate.

Next, a light emitting layer 15 including a barrier layer 15a and a well layer 15b is formed on the n-type cladding layer 14c of the n-type semiconductor layer 14.
The light emitting layer 15 is formed using a chemical vapor deposition method instead of a physical growth method such as sputtering. Examples of chemical vapor deposition include MOCVD. By forming the light emitting layer 15 by the MOCVD method, a gap 114a made of a continuous group III nitride semiconductor crystal developed in the surface direction of the substrate 11 and exposed on the surface of the n-type cladding layer 14c is formed as a canopy. Thus, it is possible to easily form the light emitting layer 15 which is formed so as to cover and has a larger plane area than the n-type cladding layer 14c.

  Next, on the n-type cladding layer 14c of the n-type semiconductor layer 14, the light-emitting layer 15 composed of the barrier layer 15a and the well layer 15b, the p-type cladding layer 16a and the p-type contact layer 16b of the p-type semiconductor layer 16, The film is formed by the MOCVD method which is preferable from the viewpoint of film thickness controllability.

In the MOCVD method, hydrogen (H ₂ ) or nitrogen (N ₂ ) as a carrier gas, trimethyl gallium (TMG) or triethyl gallium (TEG) as a Ga source which is a group III source, trimethyl aluminum (TMA) or triethyl aluminum as an Al source (TEA), trimethylindium (TMI) or triethylindium (TEI) as an In source, ammonia (NH ₃ ), hydrazine (N ₂ H ₄ ), or the like as an N source as a group V source.

In addition, as the n-type impurity of the dopant element, monosilane (SiH ₄ ) or disilane (Si ₂ H ₆ ) is used as a Si raw material, germane gas (GeH ₄ ) is used as a Ge raw material, and tetramethyl germanium ((CH ₃ ) ₄ Ge ) And tetraethylgermanium ((C ₂ H ₅ ) ₄ Ge) can be used.
For the n-type impurity of the dopant element, for example, biscyclopentadienylmagnesium (Cp ₂ Mg) or bisethylcyclopentadienylmagnesium (EtCp ₂ Mg) can be used as the Mg raw material.

The translucent positive electrode 17 and the positive electrode bonding pad 18 are sequentially formed on the p-type contact layer 16b of the laminated semiconductor 10 shown in FIG. 4 thus obtained by using a photolithography method.
Next, the exposed region 14d on the n-type contact layer 14b is exposed by dry etching the laminated semiconductor 10 on which the translucent positive electrode 17 and the positive electrode bonding pad 18 are formed.
Thereafter, the negative electrode 19 is formed on the exposed region 14d using a photolithography method, whereby the light emitting device 1 shown in FIGS. 1 and 2 is obtained.

  In the light emitting device 1 of this embodiment, as shown in FIGS. 3A and 3B, the n-type cladding layer 14 c of the n-type semiconductor layer 14 is composed of an aggregate of columnar crystals 114, and the columnar crystals 114 are formed. Is inclined with respect to the vertical direction d (perpendicular direction of the light extraction interface) of the surface of the substrate 11, so that light in a random direction generated in the light emitting layer 15 is generated in the n-type cladding layer 14 c. By being reflected by the columnar crystal 114, the proportion of light in a direction near the perpendicular to the surface of the substrate 11 is increased and enters the light extraction interface. Since the light in the direction near the surface perpendicular to the surface of the substrate 11 is easily extracted from the light extraction interface, in the light-emitting element 1 of the present embodiment, the light generated in the light-emitting layer 15 is outside the light-emitting element 1. Can be efficiently removed.

  In the light emitting device 1 of the present embodiment, since the top surface 114d of the columnar crystal 114 constituting the n-type cladding layer 14c has a (3 × 1) or (6 × 2) rearrangement structure, the columnar crystal The top surface 114d of 114 becomes an n-type cladding layer 14c made of a good crystal having a nitrogen-rich surface. Accordingly, the light emitting layer 15 that emits light with high luminance can be formed on the n-type cladding layer 14c having good crystallinity.

  Further, in the light emitting device 1 of the present embodiment, the light emitting layer 15 is made of a continuous group III nitride semiconductor crystal developed in the surface direction of the substrate 11 and is exposed on the surface of the n-type cladding layer 14c. Since the gap 114a is formed so as to cover the canopy and has a larger plane area than the n-type cladding layer 14c, the area of light emission when current is injected can be increased. The light emission output of the light emitting diode obtained using the light emitting element 1 can be improved. In addition, by forming the p-type semiconductor layer 16 on the light-emitting layer 15 that covers the gap 114a of the n-type cladding layer 14c like a canopy, the p-type semiconductor layer 16 can be formed as a film continuous with the light-emitting layer 15. It is possible to efficiently spread the current in the planar direction.

  In addition, according to the method for manufacturing the light emitting device 1 of the present embodiment, the n-type cladding layer 14c is formed by the sputtering method, so that the columnar crystal 114 is composed of aggregates, and the height direction h of the columnar crystal 114 is the substrate 11. The light emitting device 1 of this embodiment having the n-type cladding layer 14c inclined with respect to the vertical direction d of the surface can be easily obtained.

  In the manufacturing method of the present embodiment, the method of forming only the n-type cladding layer 14c of the semiconductor layer 20 of the light emitting element 1 by the sputtering method has been described as an example, but the manufacturing method of the present invention has been described above. It is not limited to an example, and at least the n-type cladding layer 14c only needs to be formed by sputtering. Specifically, for example, the buffer layer 12, the n-type semiconductor layer 14, and the p-type semiconductor layer 16 may be formed by sputtering.

  The group III nitride semiconductor light-emitting device of the present invention can be used for photoelectric conversion devices such as laser devices and light-receiving devices, electronic devices such as HBT and HEMT, in addition to the light-emitting devices described above. Many of these semiconductor elements have various structures, and the structure of the group III nitride semiconductor light-emitting element according to the present invention is not limited at all including these well-known element structures.

[lamp]
The lamp of the present invention uses the light emitting device of the present invention.
As a lamp | ramp of this invention, the thing formed by combining the light emitting element of this invention and fluorescent substance can be mentioned, for example. A lamp in which a light emitting element and a phosphor are combined can have a configuration well known to those skilled in the art by means well known to those skilled in the art. Conventionally, a technique for changing the emission color by combining a light emitting element and a phosphor is known, and such a technique can be adopted in the lamp of the present invention without any limitation.

  For example, by appropriately selecting the phosphor used for the lamp, it becomes possible to obtain light emission having a longer wavelength than the light emitting element, and by mixing the emission wavelength of the light emitting element itself with the wavelength converted by the phosphor. A lamp that emits white light can also be used.

  FIG. 5 is a schematic view schematically showing an example of a lamp configured using the group III nitride semiconductor light emitting device according to the present invention. The lamp 3 shown in FIG. 5 is a cannonball type, and the light emitting element 1 shown in FIG. 1 is used. As shown in FIG. 5, the positive electrode bonding pad (see reference numeral 18 shown in FIG. 2) of the light emitting element 1 is bonded to one of the two frames 31 and 32 (the frame 31 in FIG. 4) with a wire 33 to emit light. The light emitting element 1 is mounted by joining the negative electrode of the element 1 (see reference numeral 19 shown in FIG. 2) to the other frame 32 with a wire 34. The periphery of the light emitting element 1 is sealed with a mold 35 made of a transparent resin.

Since the lamp of the present invention uses the light emitting element of the present invention, the lamp has high luminance with excellent light emission characteristics.
Further, the lamp of the present invention can be used for any purpose such as a bullet type for general use, a side view type for portable backlight use, and a top view type used for a display.

Hereinafter, the present invention will be described in more detail with reference to examples. However, the present invention is not limited only to these examples.
Example 1
The light emitting device 1 shown in FIGS. 1 and 2 was manufactured as follows.
First, the buffer layer 12 made of an AlN layer was formed on the c-plane of the substrate 11 made of sapphire by sputtering.

More specifically, a substrate 11 made of sapphire that is mirror-polished to such an extent that only one side can be used for epitaxial growth was prepared and introduced into a sputtering chamber used for forming the buffer layer 12 without performing wet pretreatment. As a sputtering apparatus used for forming the buffer layer 12, an apparatus having a high-frequency power source and a mechanism capable of moving the position where the magnetic field is applied by rotating a magnet in the target was used.
Then, after heating the substrate 11 to 500 ° C. in the sputtering chamber and introducing nitrogen gas at a flow rate of 15 sccm, the pressure in the chamber is maintained at 1 Pa, and a high frequency bias of 50 W is applied to the substrate 11 side, The substrate surface was cleaned by exposure to plasma.

  Subsequently, argon and nitrogen gas were introduced, a high frequency bias of 2000 W was applied to the metal Al target side with the temperature of the substrate 11 being 500 ° C., the pressure in the furnace was maintained at 0.5 Pa, and Ar gas was 5 sccm. Then, a buffer layer 12 made of an AlN layer was formed on the substrate 11 under the condition that nitrogen gas was circulated at 15 sccm (the ratio of nitrogen to the whole gas was 75%). The growth rate was 0.12 nm / s. The magnet in the target was rotated both when the substrate 11 was cleaned and when the buffer layer 12 was formed. Then, after the 50 nm AlN layer was formed, the generation of plasma was stopped.

  Subsequently, an underlayer 14a made of an undoped GaN layer and an n-contact layer 14b made of a Si-doped GaN layer were formed on the substrate 11 on which the buffer layer 12 was formed, using MOCVD. First, the substrate 11 on which the buffer layer 12 was formed was transported to the MOCVD apparatus. Thereafter, in a state where the inside of the chamber was replaced with nitrogen, the temperature of the substrate 11 was raised to 1000 ° C., and the dirt adhering to the outermost surface of the buffer layer 12 made of AlN was sublimated and removed. From the substrate temperature of 830 ° C. or higher, ammonia was circulated in the furnace, and the pressure in the furnace was adjusted to 400 mbar.

Subsequently, while maintaining the temperature of the substrate 11 at 1100 ° C., ammonia was circulated as it was, and TMG vapor generated by bubbling was circulated into the chamber, and an underlayer composed of a 6 μm undoped GaN layer was taken as it was over 3 hours. 14a was formed. Thereafter, SiH ₄ gas diluted with nitrogen was passed through the furnace to form an n-contact layer 14b made of a Si-doped GaN layer having a thickness of 2 μm. Thereafter, the TMG and Si ₂ H ₆ valves were switched to stop the supply of these raw materials.
Thereafter, heating of the substrate 11 was stopped, the temperature of the substrate 11 together with the susceptor was lowered to room temperature, and the substrate 11 on which each layer up to the n-contact layer 14b was formed was taken out from the chamber.

  Next, an n-type cladding layer 14c made of a Si-doped InGaN layer was formed by sputtering. First, the substrate 11 taken out from the chamber of the MOCVD apparatus was transferred to a sputtering chamber for forming the n-type cladding layer 14c. As a sputtering apparatus used for forming the n-type cladding layer 14c, a high-frequency power source is provided, and a circular Ga target, In target, and Si target are included in one sputter. A device having a mechanism capable of moving the position where the magnetic field is applied by rotating the slab is used. In addition, a pipe for circulating the refrigerant in the Ga target was installed, and the refrigerant cooled to 20 ° C. was circulated in the pipe to prevent melting of Ga due to heat.

Thereafter, argon and nitrogen gas were introduced into the sputtering chamber in which the substrate 11 on which the n-contact layer 14b was formed was installed, and the temperature of the substrate 11 was raised to 700 ° C. Then, a high frequency bias was applied to the metal Ga target and the metal In target, the pressure in the furnace was maintained at 0.5 Pa, Ar gas was flowed at 15 sccm, and nitrogen gas was flowed at 5 sccm (the ratio of nitrogen to the total gas was 25%. ) To form an n-type cladding layer 14c made of a 0.2 μm Si-doped InGaN layer. The growth rate was approximately 0.1 nm / s, and the In composition was controlled to 1% and the Si doping amount to 1 × 10 ¹⁸ cm ⁻³ by controlling the high frequency power applied to each target.

  Through the above steps, the substrate 11 on which the buffer layer 12, the base layer 14a, the n contact layer 14b, and the n-type clad layer 14c were formed in order from the bottom was obtained. The substrate 11 on which the layers up to the n-type cladding layer 14c obtained here were formed had a colorless and transparent mirror shape.

Moreover, the X-ray rocking curve (XRC) measurement of the undoped GaN layer which comprises the base layer 14a produced with said growth method was performed. This measurement was performed on a (0002) plane which is a symmetric plane and a (10-10) plane which is an asymmetric plane, using a Cuβ ray X-ray generation source as a light source.
As a result of X-ray rocking curve (XRC) measurement, the half-value width was 250 arcsec on the (10-10) plane of the underlayer 14a produced by the method of Example 1. The half width of the (10-10) plane of the n-clad layer 14c was 1500 arcsec. The half-value widths of the (0002) planes of the underlayer 14a and the n-cladding layer 14c could not be measured because the GaN layer constituting the underlayer 14a and the n-cladding layer 14c overlapped with each other.

Further, the n-type cladding layer 14c made of the Si-doped InGaN layer produced by the above growth method was observed with a general cross-sectional transmission electron microscope (abbreviation: TEM).
As a result of TEM observation from the cross section, the n-type cladding layer 14c is not a uniform crystal film, and as shown in FIGS. 3 (a) and 3 (b), a hexagonal columnar columnar crystal 114 is formed. The height direction h of the columnar crystals 114 is inclined with respect to the vertical direction d of the surface of the substrate 11, and the columnar crystals 114 intersect with each other at an angle of 0.1 ° to 5 °. It was confirmed that In addition, fine gaps 114 a are formed between the columnar crystals 114. The density of the columnar crystals was about 5 × 10 ⁹ / cm ⁻² , the lateral width W of the gap 114a was about 1 nm, and the width of the columnar crystals 114 was about 100 nm. Further, the width of the columnar crystal 114 and the lateral width W of the gap 114a were substantially uniform, and the gaps 114a were periodically arranged.

  Thereafter, the light emitting layer 15, the p-type cladding layer 16a, and the p-type contact layer 16b were formed on the substrate 11 on which the layers up to the n-type cladding layer 14c were formed by the MOCVD method.

  More specifically, first, the substrate 11 on which the layers up to the n-type cladding layer 14c were formed was transferred into the MOCVD chamber. Thereafter, the temperature of the substrate 11 was raised to 1000 ° C. while the chamber was replaced with nitrogen, and the dirt adhering to the outermost surface of the n-type cladding layer 14c was sublimated and removed. In addition, after the temperature of the board | substrate 11 became 830 degreeC or more, ammonia was distribute | circulated in the furnace.

  Next, a light emitting layer 15 having a multiple quantum well structure composed of a barrier layer 15a made of a GaN layer and a well layer 15b made of an InGaN layer was produced. In producing the multiple quantum well structure, a barrier layer 15a made of GaN is first formed on an n-type cladding layer 14c made of a Si-doped InGaN layer, and a well layer 15b made of an InGaN layer is formed on the barrier layer 15a. Formed. After repeating this structure five times, a sixth barrier layer 15a is formed on the fifth well layer 15b, and both sides of the multiple quantum well structure 20 are made of barrier layers 15a.

That is, after removing the dirt adhering to the outermost surface of the n-type cladding layer 14c, the temperature of the substrate 11, the pressure in the furnace, the flow rate and type of the carrier gas are maintained, and the TEG valve is switched to enter the TEG chamber. The barrier layer 15a made of a GaN layer was grown. Thereby, the barrier layer 15a having a film thickness of 16 nm was formed.
Thereafter, the temperature of the substrate 11, the pressure in the furnace, the flow rate and type of the carrier gas are kept as they are, and the TEG and TMI valves are switched to supply TEG and TMI into the furnace. In _0.2 Ga _0.8 A well layer 15b made of an N layer was grown. As a result, a well layer 15b composed of an In _0.2 Ga _0.8 N layer having a thickness of 3 nm was formed.

  Then, after the growth of the well layer 15b, the barrier layer 15a was grown again. Such a procedure was repeated five times to produce five barrier layers 15a and five well layers 15b. Further, a barrier layer 15a was formed on the last well layer 15b to form the light emitting layer 15.

A p-type cladding layer 16a composed of an Al _0.07 Ga _0.93 N layer doped with Mg was formed on the light emitting layer 15 thus obtained by using the MOCVD method.
First, the pressure in the furnace was 200 mbar, the temperature of the substrate 11 was 1020 ° C., and the carrier gas was changed from nitrogen to hydrogen. Then, waiting for the pressure and temperature in the furnace to stabilize, the valves of TEG, TMA, and Cp ₂ Mg are switched, supply of these raw materials into the furnace is started, and Mg-doped Al _0.07 Ga _{0 .93 A} p-type cladding layer 16a made of an N layer was grown. As a result, a p-type cladding layer 16a composed of an Al _0.07 Ga _0.93 N layer doped with 5 nm of Mg was formed.

On the p-type cladding layer 16a thus obtained, a p-type contact layer 16b made of an Mg-doped Al _0.02 Ga _0.98 N layer was produced.
That is, the supply of TMA, TMG, and Cp ₂ Mg into the furnace is started while the temperature, pressure, and carrier gas are kept the same as when the p-type cladding layer 16a is grown, and the p-type contact layer 16b is grown. It was. The amount of Cp ₂ Mg to be circulated has been examined in advance, so that the hole concentration of the p-type contact layer 16b made of the Mg-doped Al _0.02 Ga _0.98 N layer is 8 × 10 ¹⁷ cm ^−3. It was adjusted. As a result, a p-type contact layer 16b made of an Mg-doped Al _0.02 Ga _0.98 N layer having a thickness of 0.2 μm was formed.

After completing the growth of the p-type contact layer 16b, the heater was stopped and the temperature of the substrate 11 was lowered to room temperature over 20 minutes. Immediately after the growth of the p-type contact layer 16b was completed, the NH ₃ flow rate was reduced to 1/50 to switch the carrier from hydrogen to nitrogen. Thereafter, NH ₃ was completely stopped at 950 ° C. Then, it was confirmed that the temperature of the substrate 11 was lowered to about 300 ° C., and the wafer was taken out together with the wafer tray into the atmosphere through a load lock.

Through the above steps, the laminated semiconductor 10 shown in FIG. 4 was obtained. The obtained laminated semiconductor 10 is formed on a substrate 11 made of sapphire having a c-plane, in order from the substrate 11 side, a buffer layer 12 made of an AlN layer of 50 nm, an underlayer 14a made of an undoped GaN layer of 6 μm, 1 × 10 ^An n-contact layer 14b made of a 2 μm Si-doped GaN layer having an electron concentration of ¹⁹ cm ⁻³ and an n-cladding made of a 20 nm In _0.01 Ga _0.99 N layer having an electron concentration of 1 × 10 ¹⁸ cm ⁻³ Layer 14c, 6 layers of barrier layer 15a made of GaN with a layer thickness of 16 nm, starting with the GaN barrier layer and ending with the GaN barrier layer, and 5 layers of non-doped In _0.2 Ga _0.8 with a layer thickness of 3 nm p-type click made of _Al 0.07 _{Ga 0.93} N layer with Mg luminescent layer 15,5nm doped multiple quantum well structure comprising a well layer 15b composed of N Head layer 16a, had a Mg-doped _Al 0.02 _{Ga 0.98} N was stacked p-type contact layer 16b made of layer structure having a thickness of 0.2 [mu] m.

  The p-type cladding layer 16a and the p-type contact layer 16b constituting the obtained laminated semiconductor 10 showed p-type even without performing annealing treatment for activating p-type carriers.

Next, the light emitting element 1 shown in FIGS. 1 and 2 was manufactured using the laminated semiconductor 10.
First, on the surface of the p-type contact layer 16b of the laminated semiconductor 10, a light-transmitting positive electrode 17 made of ITO is formed on the surface of the p-type contact layer 16b, and Ti, Al, Au are sequentially formed on the surface of the light-transmitting positive electrode 17 thereon. And a positive electrode bonding pad 18 having a laminated structure was formed as a p-side electrode.
Then, the exposed region 14d on the n-type contact layer 14b was exposed by dry-etching the laminated semiconductor 10 on which the translucent positive electrode 17 and the positive electrode bonding pad 18 were formed. Thereafter, a negative electrode 19 composed of four layers of Ni, Al, Ti, and Au is formed on the exposed region 14d by using a photolithography method to form an n-side electrode, whereby the light emitting device shown in FIGS. 1 was obtained.

The back side of the substrate 11 of the light-emitting element 1 obtained in this way was ground and polished to form a mirror-like surface, which was cut into 350 μm square chips. Thereafter, the obtained chip was placed on a lead frame so that each electrode was on top, and connected to the lead frame with a gold wire to obtain a light emitting diode.
When a forward current was passed between the positive electrode bonding pad 18 and the negative electrode 19 of this light emitting diode, the forward voltage at a current of 20 mA was 3.0V. Moreover, when the light emission state was observed through the p side translucent positive electrode 17, the light emission wavelength was 470 nm and the light emission output showed 15 mW. The light emission characteristics of such a light emitting diode were obtained without variation for light emitting diodes fabricated from almost the entire surface of the fabricated wafer.

(Example 2)
A laminated semiconductor 10 was produced in the same manner as in Example 1 except that the temperature of the substrate 11 when the n-type cladding layer 14c was formed by sputtering was 900 ° C.

Then, in the same manner as in Example 1, the X-ray rocking curve (XRC) measurement of the undoped GaN layer constituting the base layer 14a was performed. This measurement was performed on a (0002) plane which is a symmetric plane and a (10-10) plane which is an asymmetric plane, using a Cuβ ray X-ray generation source as a light source.
As a result of X-ray rocking curve (XRC) measurement, the half-value width was 250 arcsec on the (10-10) plane of the underlayer 14a produced by the method of Example 2. The half width of the (10-10) plane of the n-clad layer 14c was 850 arcsec. The half-value widths of the (0002) planes of the underlayer 14a and the n-cladding layer 14c could not be measured because the GaN layer constituting the underlayer 14a and the n-cladding layer 14c overlapped with each other.
Therefore, the n-clad layer 14c produced by the method of Example 2 showed a smaller value than Example 1 in the (10-10) plane.

Further, the n-type cladding layer 14c made of the Si-doped InGaN layer produced by the method of Example 2 was observed with a general cross-sectional transmission electron microscope (abbreviation: TEM).
As a result of TEM observation from the cross section, the n-type cladding layer 14c is not a uniform crystal film as in Example 1, and as shown in FIGS. 3 (a) and 3 (b). The columnar crystal 114 is composed of an aggregate of hexagonal columnar crystals 114, and the height direction h of the columnar crystals 114 is inclined with respect to the vertical direction d of the surface of the substrate 11. Further, it was confirmed that the columnar crystals 114 intersect with each other at an angle of 0.1 ° to 2 °. In addition, fine gaps 114 a are formed between the columnar crystals 114. The density of the columnar crystals was about 1 × 10 ⁹ / cm ⁻² , the lateral width W of the gap 114a was about 1 nm, and the width of the columnar crystals 114 was about 300 nm. Further, the width of the columnar crystal 114 and the lateral width W of the gap 114a were substantially uniform, and the gaps 114a were periodically arranged.

Further, a light emitting diode was manufactured in the same manner as in Example 1 using the laminated semiconductor 10 of Example 2.
When a forward current was passed between the positive electrode bonding pad 18 and the negative electrode 19 of this light emitting diode, the forward voltage at a current of 20 mA was 3.0V. Moreover, when the light emission state was observed through the p side translucent positive electrode 17, the light emission wavelength was 470 nm and the light emission output showed 12 mW. The light emission characteristics of such a light emitting diode were obtained without variation for light emitting diodes fabricated from almost the entire surface of the fabricated wafer. In addition, although the light emission output of Example 2 was smaller than Example 1, the value which can fully be used was shown.

(Example 3)
A laminated semiconductor 10 was produced in the same manner as in Example 1 except that the base layer 14a and the n contact layer 14b were formed by sputtering.

  That is, the substrate 11 on which the buffer layer 12 was formed was transferred into a second sputtering chamber different from the sputtering chamber used for forming the buffer layer 12. The sputtering apparatus used for forming the underlayer 14a and the n-contact layer 14b has a mechanism that has a high-frequency power source and can move the position where the magnetic field is applied by sweeping the magnet inside the square Ga target. A thing was used. In addition, a pipe for circulating the refrigerant in the Ga target was installed, and the refrigerant cooled to 20 ° C. was circulated in the pipe to prevent melting of Ga due to heat.

  Thereafter, argon and nitrogen gas were introduced into the second sputtering chamber in which the substrate 11 having the buffer layer 12 formed thereon was installed, and the temperature of the substrate 11 was raised to 1000 ° C. Then, a high frequency bias of 2000 W was applied to the metal Ga target side, the pressure in the furnace was maintained at 0.5 Pa, Ar gas was flowed at 5 sccm, and nitrogen gas was flowed at 15 sccm (the ratio of nitrogen to the whole gas was 75%) Thus, the base layer 14 a made of an undoped GaN layer was formed on the buffer layer 12. The growth rate was approximately 1 nm / s. Then, after the 6 μm undoped GaN layer was formed, the plasma generation was stopped.

Subsequently, in the same second sputtering chamber, the conditions of the temperature of the substrate 11, the power applied to the metal Ga target, the pressure in the furnace, and the gas atmosphere were kept the same as when the base layer 14 a was formed. Power was introduced into the Si target installed in the second sputtering chamber, and the Si target was sputtered simultaneously with the metal Ga target to extract Si into the gas phase, and the GaN crystal was doped with Si. Thus, an n-contact layer 14b made of a 2 μm Si-doped GaN layer having an electron concentration of 1 × 10 ¹⁹ cm ⁻³ was formed. The growth rate was 1 nm / s.

Thereafter, the substrate 11 on which the n-contact layer 14b was formed was transferred into a sputtering chamber for forming the n-type cladding layer 14c, and the n-type cladding layer 14c was formed in the same manner as in the example.
Through the above steps, the substrate 11 on which the buffer layer 12, the base layer 14a, the n contact layer 14b, and the n-type cladding layer 14c were formed was obtained in order from the bottom. The substrate 11 on which the layers up to the n-type cladding layer 14c obtained here were formed had a colorless and transparent mirror shape.

Further, in the same manner as in Example 1, the X-ray rocking curve (XRC) measurement of the undoped GaN layer constituting the base layer 14a was performed. This measurement was performed on a (0002) plane which is a symmetric plane and a (10-10) plane which is an asymmetric plane, using a Cuβ ray X-ray generation source as a light source.
As a result of X-ray rocking curve (XRC) measurement, the half-value width was 250 arcsec on the (10-10) plane of the underlayer 14a produced by the method of Example 3. The half width of the (10-10) plane of the n-clad layer 14c was 1500 arcsec. The half-value widths of the (0002) planes of the underlayer 14a and the n-cladding layer 14c could not be measured because the GaN layer constituting the underlayer 14a and the n-cladding layer 14c overlapped with each other.

Further, the n-type clad layer 14c made of the Si-doped InGaN layer produced by the method of Example 3 was observed with a general cross-sectional transmission electron microscope (abbreviation: TEM).
As a result of TEM observation from the cross section, the n-type cladding layer 14c is not a uniform crystal film as in Example 1, and as shown in FIGS. 3 (a) and 3 (b). The columnar crystal 114 is composed of an aggregate of hexagonal columnar crystals 114, and the height direction h of the columnar crystals 114 is inclined with respect to the vertical direction d of the surface of the substrate 11. Further, it was confirmed that the columnar crystals 114 intersect with each other at an angle of 1 ° to 3 °. In addition, fine gaps 114 a are formed between the columnar crystals 114. The density of the columnar crystals was about 3 × 10 ⁹ / cm ⁻² , the lateral width W of the gap 114a was about 90 nm, and the width of the columnar crystals 114 was about 90 nm. Further, the width of the columnar crystal 114 and the lateral width W of the gap 114a were substantially uniform, and the gaps 114a were periodically arranged.

  Further, the substrate 11 on which the layers up to the n-type cladding layer 14c are formed by the above growth method is introduced into a vacuum, and the n-type cladding layer is formed by a method called reflective high energy electron diffraction (English abbreviation: RHEED). The arrangement of crystals constituting 14c was investigated. As a result, it was confirmed that the top surface of the columnar crystal had a (3 × 1) or (6 × 2) rearrangement structure.

Further, using the laminated semiconductor 10 of Example 3, a light emitting diode was produced in the same manner as in Example 1.
When a forward current was passed between the positive electrode bonding pad 18 and the negative electrode 19 of this light emitting diode, the forward voltage at a current of 20 mA was 3.0V. Moreover, when the light emission state was observed through the p side translucent positive electrode 17, the light emission wavelength was 470 nm and the light emission output showed 16 mW. The light emission characteristics of such a light emitting diode were obtained without variation for light emitting diodes fabricated from almost the entire surface of the fabricated wafer.

FIG. 1 is a schematic cross-sectional view schematically showing an example of a group III nitride semiconductor light emitting device according to the present invention. FIG. 2 is a schematic diagram showing a planar structure of the group III nitride semiconductor light emitting device shown in FIG. FIG. 3 is a schematic view schematically showing a crystal structure constituting the n-type cladding layer 14c of the present embodiment, FIG. 3 (a) is a cross-sectional view, and FIG. 3 (b) is a plan view. . FIG. 4 is a view for explaining the method of manufacturing the group III nitride semiconductor light-emitting device shown in FIG. 1, and is a schematic cross-sectional view schematically showing a laminated semiconductor. FIG. 5 is a schematic view schematically showing an example of a lamp configured using the group III nitride semiconductor light emitting device according to the present invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Group III nitride semiconductor light emitting element (light emitting element), 3 ... Lamp, 10 ... Multilayer semiconductor, 11 ... Substrate, 12 ... Buffer layer, 14 ... N-type semiconductor layer, 14a ... Underlayer, 14b ... N-type contact layer , 14c ... n-type cladding layer (first barrier layer), 15 ... light emitting layer, 16 ... p-type semiconductor layer (second barrier layer), 16a ... p-type cladding layer, 16b ... p-type contact layer, 17 ... translucent Positive electrode, 18 ... positive electrode bonding pad, 19 ... negative electrode, 114 ... columnar crystal, 114a ... gap, 114b ... vertical gap, 114c ... horizontal gap, W ... lateral width.

Claims (10)

A substrate,
A first barrier layer of a first conductivity type made of a group III nitride semiconductor material provided on the substrate;
A light emitting layer made of a group III nitride semiconductor material provided on the first barrier layer;
In a group III nitride semiconductor light emitting device comprising a second barrier layer of a second conductivity type made of a group III nitride semiconductor material provided on the light emitting layer,
The first barrier layer is composed of an aggregate of columnar crystals;
A group III nitride semiconductor light-emitting device, wherein a height direction of the columnar crystal is inclined with respect to a vertical direction of a light extraction interface.   2. The group III nitride semiconductor light-emitting device according to claim 1, wherein the first barrier layer has a half width of 200 arcsec or more and 2000 arcsec or less in measurement of an X-ray rocking curve of a (10-10) plane.   3. The group III nitride semiconductor light-emitting device according to claim 1, wherein the first barrier layer has a gap formed between adjacent columnar crystals. 4.   The group III according to claim 3, wherein the gap includes a vertical gap extending in a substantially vertical direction from the surface of the substrate and a horizontal gap extending in a substantially horizontal direction from the surface of the substrate. Nitride semiconductor light emitting device. 5. The group III nitride semiconductor light-emitting device according to claim 3, wherein a density of the gap is 1 × 10 ⁹ / cm ⁻² or more and 1 × 10 ¹⁰ / cm ⁻² or less.   6. The group III nitride semiconductor light-emitting device according to claim 3, wherein the gaps are periodically arranged.   7. The first barrier layer has an inclination in a height direction of the columnar crystal with respect to a vertical direction of the light extraction interface in a range of 0.05 ° to 10 °. A group III nitride semiconductor light-emitting device according to any one of the above. A method for producing a group III nitride semiconductor light-emitting device according to any one of claims 1 to 7,
A method of manufacturing a group III nitride semiconductor light emitting device, wherein the first barrier layer is formed by sputtering.   9. The method for manufacturing a group III nitride semiconductor light emitting device according to claim 8, wherein the light emitting layer is formed by MOCVD.   A lamp comprising the group III nitride semiconductor light-emitting device according to any one of claims 1 to 7.

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