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JP2009111428A - Electronic device - Google Patents

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Publication number
JP2009111428A
JP2009111428A JP2009032310A JP2009032310A JP2009111428A JP 2009111428 A JP2009111428 A JP 2009111428A JP 2009032310 A JP2009032310 A JP 2009032310A JP 2009032310 A JP2009032310 A JP 2009032310A JP 2009111428 A JP2009111428 A JP 2009111428A
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Prior art keywords
resin material
electronic component
electronic device
wiring board
component element
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JP2009032310A
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Japanese (ja)
Inventor
Hiromi Nobe
ひろみ 野辺
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Kyocera Corp
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Kyocera Corp
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Priority to JP2009032310A priority Critical patent/JP2009111428A/en
Publication of JP2009111428A publication Critical patent/JP2009111428A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16152Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic device that protects an electronic component element by successfully shielding an electromagnetic wave without using a shield case and can achieve reduction in thickness. <P>SOLUTION: The electronic device includes a wiring board 1, electronic components 4 mounted on the wiring board 1, a resin member 2, and a shield layer 3. The resin member 2 covers the electronic component element 4 and is also provided on the wiring board 1. The shield layer 3 is arranged from an upper face to side faces of the resin member 2, and has ends located on outer peripheral portions on an upper face of the wiring board. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、携帯電話機やパーソナルコンピュータ等の通信機器、電子機器に組み込まれる電子装置に関するものである。   The present invention relates to a communication device such as a mobile phone and a personal computer, and an electronic device incorporated in the electronic device.

従来より、携帯電話機等の通信機器に高周波回路を備えた電子装置が用いられている。   Conventionally, an electronic device provided with a high-frequency circuit is used in communication equipment such as a mobile phone.

かかる従来の電子装置としては、例えば図4に示す如く、複数枚の絶縁層を積層してなる配線基板21の内部に高周波回路やグランド配線等を埋設するとともに、前記配線基板21の上面にIC素子、チップインダクタやチップコンデンサ,ダイオード,チップ抵抗器等の電子部品素子23を搭載し、更に電子部品素子23を被覆するようにして金属製のシールドケース22を取着した構造のものが知られている(例えば、特許文献1参照。)。   As such a conventional electronic device, for example, as shown in FIG. 4, a high frequency circuit, a ground wiring or the like is embedded in a wiring substrate 21 formed by laminating a plurality of insulating layers, and an IC is formed on the upper surface of the wiring substrate 21. An electronic component element 23 such as an element, a chip inductor, a chip capacitor, a diode, or a chip resistor is mounted, and a metal shield case 22 is attached so as to cover the electronic component element 23. (For example, refer to Patent Document 1).

前記シールドケース22は、電子装置の使用時、これをグランド電位に保持しておくことにより、電子部品素子23を電磁的にシールドするためのものである。これによって、外部からの電磁波を遮蔽して電子装置の回路特性を安定化させるとともに、電子部品素子23を正常に動作させることができる。このようなシールドケース22は、例えば、一面を開口させた筐体状の形状をなし、シールドケース21と電子部品素子23とが接触しないように、シールドケース21−電子部品素子23間に一定の間隔を設けた状態で配線基板21に取り付けられる。   The shield case 22 is for electromagnetically shielding the electronic component element 23 by holding it at a ground potential when the electronic device is used. As a result, the electromagnetic characteristics from the outside can be shielded to stabilize the circuit characteristics of the electronic device, and the electronic component element 23 can be operated normally. Such a shield case 22 has, for example, a housing shape with an opening on one surface, and a constant gap between the shield case 21 and the electronic component element 23 so that the shield case 21 and the electronic component element 23 do not come into contact with each other. It is attached to the wiring board 21 with a space provided.

特開2001−196781号公報Japanese Patent Laid-Open No. 2001-196781

ところで、上述した従来の電子装置においては、シールドケース21を取りつける際に、シールドケースが傾いたり、取り付け位置にばらつきを生じることがあり、これらのことを考慮すると、シールドケース21−電子部品素子23間には、ある程度の間隔が設けられるように設計する必要がある。しかしながら、シールドケース21−電子部品素子23間にある程度の間隔を設けると、その分、余分な空間が発生することから、電子装置が高背化してしまうという問題があった。   By the way, in the conventional electronic device described above, when the shield case 21 is attached, the shield case may be tilted or the mounting position may vary. In consideration of these, the shield case 21 -the electronic component element 23. It is necessary to design so that a certain amount of space is provided between them. However, if a certain amount of space is provided between the shield case 21 and the electronic component element 23, an extra space is generated correspondingly, resulting in a problem that the electronic device becomes taller.

本発明は上述の問題点に鑑み案出されたもので、その目的は、シールドケースを使用することなく電磁波を良好に遮蔽して電子部品素子を保護することができ、且つ薄型化への対応が可能な電子装置を提供することにある。   The present invention has been devised in view of the above-mentioned problems, and the object thereof is to protect an electronic component element by properly shielding electromagnetic waves without using a shield case, and to cope with a reduction in thickness. An object of the present invention is to provide an electronic device capable of performing the above.

本発明の一つの態様によれば、電子装置は、配線基板と、配線基板に実装された電子部品と、樹脂材と、シールド層とを備えている。樹脂材は、電子部品素子を覆っているとともに、配線基板の上に設けられている。シールド層は、樹脂材の上面から側面にかけて設けられている。   According to one aspect of the present invention, an electronic device includes a wiring board, an electronic component mounted on the wiring board, a resin material, and a shield layer. The resin material covers the electronic component element and is provided on the wiring board. The shield layer is provided from the upper surface to the side surface of the resin material.

本発明の一つの態様によれば、電子装置は、樹脂材の上面から側面にかけて設けられたシールド層を備えていることにより、シールドケースを設けることなく電磁波を遮蔽して電子装置の回路特性を安定化させるとともに電子部品素子を正常に動作させることができるようになる。   According to one aspect of the present invention, the electronic device includes the shield layer provided from the upper surface to the side surface of the resin material, thereby shielding electromagnetic waves without providing a shield case, thereby improving the circuit characteristics of the electronic device. It is possible to stabilize the electronic component element and to operate it normally.

本発明の電子装置の断面図である。It is sectional drawing of the electronic device of this invention. 図1の電子装置の第1樹脂材2及び第2樹脂材3を省略した要部断面図である。FIG. 3 is a cross-sectional view of a main part in which the first resin material 2 and the second resin material 3 of the electronic device of FIG. 1 are omitted. 本発明の他の実施形態に係る電子装置の断面図である。It is sectional drawing of the electronic device which concerns on other embodiment of this invention. 従来の電子装置の断面図である。It is sectional drawing of the conventional electronic device.

以下、本発明を添付図面に基づいて詳細に説明する。   Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

図1は本発明の一実施形態に係る電子装置の断面図であり、同図に示す電子装置は、大略的に、配線基板1と、第1樹脂材2、第2樹脂材3とで構成されている。   FIG. 1 is a cross-sectional view of an electronic device according to an embodiment of the present invention. The electronic device shown in FIG. 1 is roughly composed of a wiring board 1, a first resin material 2, and a second resin material 3. Has been.

前記配線基板1は、複数個の絶縁層を厚み方向に積層してなる略矩形状の積層体により構成されており、これら絶縁層間には多数の回路配線6が介在され、これらの回路配線6を絶縁層中に埋設されているビアホール導体7等を介して相互に電気的に接続させている。   The wiring board 1 is constituted by a substantially rectangular laminate formed by laminating a plurality of insulating layers in the thickness direction, and a large number of circuit wirings 6 are interposed between these insulating layers. Are electrically connected to each other via via hole conductors 7 embedded in the insulating layer.

このような配線基板1を構成する絶縁層の材質としては、例えばガラスセラミックス等のセラミック材料が用いられ、個々の絶縁層の厚みは例えば50μm〜300μmに設定される。   As a material of the insulating layer constituting such a wiring board 1, for example, a ceramic material such as glass ceramics is used, and the thickness of each insulating layer is set to 50 μm to 300 μm, for example.

尚、前記配線基板1は、絶縁層がセラミック材料から成る場合、セラミック原料の粉末に適当な有機溶剤、有機溶媒等を添加・混合して得たセラミックグリーンシートを複数枚積層した上、これをプレス成形し、しかる後、この積層体を高温で焼成し、外形加工することによって製作される。   When the insulating layer is made of a ceramic material, the wiring board 1 is formed by laminating a plurality of ceramic green sheets obtained by adding and mixing an appropriate organic solvent, organic solvent, etc. to the ceramic raw material powder. The laminate is manufactured by press molding and then firing the laminate at a high temperature and processing the outer shape.

また、前記配線基板1の内部に設けられる回路配線6やビアホール導体7の材質としては、例えば、銀を主成分とする導電材料が好適に用いられ、個々の回路配線の厚みは、例えば5μm〜20μmに設定される。   Moreover, as a material of the circuit wiring 6 and the via-hole conductor 7 provided in the wiring board 1, for example, a conductive material mainly composed of silver is preferably used, and the thickness of each circuit wiring is, for example, 5 μm to It is set to 20 μm.

一方、配線基板1の主面にはグランド電極パターン5や前記回路配線6と接続される接続パッド8、表面配線(図示せず)が設けられている。   On the other hand, the main surface of the wiring board 1 is provided with a ground electrode pattern 5, connection pads 8 connected to the circuit wiring 6, and surface wiring (not shown).

前記グランド電極パターン5は、配線基板1上面の外周に沿って環状に配置され、配線基板1内部のビアホール導体7などを介して配線基板1の側面に形成される外部接続導体(図示せず)に接続される。前記外部接続導体は、電子装置が実装されるマザーボードに設けられたグランド配線に電気的に接続されており、これによりグランド配線パターン5は、電子装置の使用時、グランド電位に保持されるようになっている。   The ground electrode pattern 5 is arranged in an annular shape along the outer periphery of the upper surface of the wiring board 1, and is an external connection conductor (not shown) formed on the side surface of the wiring board 1 via the via-hole conductor 7 and the like inside the wiring board 1. Connected to. The external connection conductor is electrically connected to a ground wiring provided on a motherboard on which the electronic device is mounted, so that the ground wiring pattern 5 is held at the ground potential when the electronic device is used. It has become.

尚、グランド電極パターン5、接続パッド8は、例えば、Ag、Ag−Pd、Ag−Pt等のAg系粉末、ホウ珪酸系低融点ガラスフリット、エチルセルロース等の有機バインダー、有機溶剤等を含有してなる導体ペーストを従来周知のスクリーン印刷等によって、配線基板1の最上層に対応するセラミックグリーンシート上に塗布し、焼成することによって形成される。   The ground electrode pattern 5 and the connection pad 8 contain, for example, an Ag-based powder such as Ag, Ag-Pd, or Ag-Pt, a borosilicate-based low-melting glass frit, an organic binder such as ethyl cellulose, an organic solvent, or the like. The conductive paste is formed on a ceramic green sheet corresponding to the uppermost layer of the wiring substrate 1 by screen printing or the like, and is fired.

また、前記グランド電極パターン5は、その厚みは例えば5μm〜80μmに設定され、特に50μm以上に設定しておけば、後述する第1樹脂材2の形成に際して液状樹脂を塗布した際、硬化する前の液状樹脂が配線基板1上面から流れ出るのを塞き止めるダムとしての役割も果たすようになる。従って、第1樹脂材の形成に際して、粘性が低く流れやすい液状樹脂を使用する場合には、グランド電極パターン5の厚みを50μm以上にしておくことが好ましい。   Further, the thickness of the ground electrode pattern 5 is set to, for example, 5 μm to 80 μm. Particularly, if the thickness is set to 50 μm or more, before the liquid resin is applied when the first resin material 2 described later is formed, the ground electrode pattern 5 is not cured. The liquid resin also serves as a dam that blocks the liquid resin from flowing out from the upper surface of the wiring board 1. Therefore, when the first resin material is formed, when the liquid resin having low viscosity and easy to flow is used, the thickness of the ground electrode pattern 5 is preferably set to 50 μm or more.

このような配線基板1の上面には、集積回路部品素子やチップインダクタ、チップコンデンサ、チップ抵抗器、ダイオード等の電子部品素子4が実装される。   On the upper surface of the wiring substrate 1, an electronic component element 4 such as an integrated circuit component element, a chip inductor, a chip capacitor, a chip resistor, or a diode is mounted.

この電子部品素子4は、配線基板1上面に被着されている接続パッド8に半田等の導電性接着剤を介して電気的に接続され、これらの電子部品素子4と配線基板1内部の回路配線6とで所定の電気回路を構成している。尚、本実施例では1個の電子部品素子4を配線基板1に搭載している。   The electronic component element 4 is electrically connected to a connection pad 8 attached to the upper surface of the wiring board 1 via a conductive adhesive such as solder, and the electronic component element 4 and a circuit inside the wiring board 1 are connected. The wiring 6 constitutes a predetermined electric circuit. In the present embodiment, one electronic component element 4 is mounted on the wiring board 1.

そして電子部品素子4は、電気絶縁性を有する第1樹脂材2及び導電性を有する第2樹脂材3によって順次被覆されている。   The electronic component element 4 is sequentially covered with a first resin material 2 having electrical insulation and a second resin material 3 having conductivity.

第1樹脂材2は、電子部品素子4を外部からの衝撃より保護する保護膜と、第2樹脂材と電子部品素子4とが短絡するのを防止する絶縁膜と、電子部品素子4を気密封止するための封止層としての機能を有している。   The first resin material 2 includes a protective film that protects the electronic component element 4 from external impact, an insulating film that prevents the second resin material and the electronic component element 4 from being short-circuited, and the electronic component element 4. It has a function as a sealing layer for hermetically sealing.

また、このような第1樹脂材2は、エポキシ樹脂等の熱硬化性樹脂に硬化剤、硬化促進剤、その他必要に応じて無機質充填剤などを添加・混合したものを、従来周知のスクリーン印刷法等により電子部品素子4を覆うように塗布し、しかる後、加熱硬化することにより形成され、電子部品素子4の上面から第1樹脂材2の上面までの距離は、例えば、0.10mm〜0.30mmの範囲になるように設定される。   In addition, such a first resin material 2 is obtained by adding and mixing a thermosetting resin such as an epoxy resin with a curing agent, a curing accelerator, and other inorganic fillers if necessary. The electronic component element 4 is applied so as to cover the electronic component element 4 by a method or the like, and then heated and cured. The distance from the upper surface of the electronic component element 4 to the upper surface of the first resin material 2 is, for example, 0.10 mm to It is set to be in the range of 0.30 mm.

一方、第2樹脂材3は、配線基板1のグランド電極パターン5と電気的に接続されており、電子装置の使用時、第2樹脂材3をグランド電位に保持することにより、外部からの電磁波を良好に遮蔽して電子装置の回路特性を安定化させるとともに電子部品素子を正常に動作させることができるようになる。しかもこの場合、従来の電子装置のようにシールドケースと電子部品素子との間に余分なスペースを確保する必要はないことから、電子装置を薄型化することが可能となる。   On the other hand, the second resin material 3 is electrically connected to the ground electrode pattern 5 of the wiring board 1, and when the electronic device is used, the second resin material 3 is held at the ground potential, thereby causing an electromagnetic wave from the outside. It is possible to stabilize the circuit characteristics of the electronic device and to make the electronic component element operate normally. In addition, in this case, since it is not necessary to secure an extra space between the shield case and the electronic component element as in the conventional electronic device, the electronic device can be thinned.

このような第2樹脂材3は、例えば、先に述べた第1樹脂材と同様のエポキシ樹脂、あるいはシリコン樹脂、ポリイミド樹脂等の樹脂にAu、Ag、Cu等の導電性粒子及び硬化剤、硬化促進剤、その他必要に応じて無機質充填剤を添加・混合したものを、従来周知のスクリーン印刷法等により、前記第1樹脂材を覆うようにして塗布し、しかる後、熱硬化させることにより形成され、その厚みは、例えば、0.05mm〜0.20mmに設定される。   Such a second resin material 3 is made of, for example, the same epoxy resin as the first resin material described above, or conductive particles such as Au, Ag, Cu, and a curing agent on a resin such as a silicon resin or a polyimide resin, By applying a curing accelerator and other inorganic fillers added and mixed as necessary, by covering the first resin material by a conventionally known screen printing method, etc., and then thermally curing. It is formed and its thickness is set to 0.05 mm to 0.20 mm, for example.

尚、前記導電性粒子の含有量は、第2樹脂材全体の重量に対して、例えば75〜88wt%の範囲に設定される。   In addition, content of the said electroconductive particle is set to the range of 75-88 wt% with respect to the weight of the whole 2nd resin material, for example.

また、前記第2樹脂材3は、その外周部が電子部品素子4の搭載領域を囲繞する環状のグランド電極パターン5に接続されていることから、電子装置の使用時、第2樹脂材全体を確実にグランド電位に保持することができるようになり、電磁波の遮蔽効果を高めて、電子装置をよりいっそう安定して動作させることができるとともに、電子部品素子に対する外部からの電磁波の影響を有効に抑えることが可能となる。従って、第2樹脂材3は、その外周部をグランド電極パターン5に接続するようにして配置させることが好ましい。   In addition, since the outer peripheral portion of the second resin material 3 is connected to the annular ground electrode pattern 5 that surrounds the mounting area of the electronic component element 4, the entire second resin material is used when the electronic device is used. It is possible to reliably hold the ground potential, enhance the shielding effect of electromagnetic waves, make the electronic device operate more stably, and effectively influence the influence of external electromagnetic waves on the electronic component elements It becomes possible to suppress. Therefore, it is preferable to arrange the second resin material 3 so that the outer peripheral portion thereof is connected to the ground electrode pattern 5.

更にグランド電極パターン5は、図2に示すように、その上面と内周面との間の角部に切り欠き9を有しており、第2樹脂材3の外周部を、切り欠き9を構成するグランド電極パターン5の内面と上面との間に形成される角部10と合致するようにして配置させているため、第2樹脂材3とグランド電極パターン5との接触面積を増加させ、第2樹脂材3とグランド電極パターン5との密着強度を向上させて電子部品素子4の気密性を高めることができる。   Further, as shown in FIG. 2, the ground electrode pattern 5 has a notch 9 at a corner portion between the upper surface and the inner peripheral surface, and the outer peripheral portion of the second resin material 3 is provided with the notch 9. Since it is arranged so as to coincide with the corner portion 10 formed between the inner surface and the upper surface of the ground electrode pattern 5 to be configured, the contact area between the second resin material 3 and the ground electrode pattern 5 is increased, The adhesion strength between the second resin material 3 and the ground electrode pattern 5 can be improved to improve the airtightness of the electronic component element 4.

またグランド電極パターン5に上述のような切り欠き9を設けておくことにより、第2樹脂材3の形成に際して液状樹脂を塗布した際、硬化する前の液状樹脂が配線基板1上面から流れ出るのを塞き止めることもできる。   Further, by providing the notch 9 as described above in the ground electrode pattern 5, when the liquid resin is applied when forming the second resin material 3, the liquid resin before curing flows out from the upper surface of the wiring substrate 1. It can also be blocked.

かくして上述した電子装置は、配線基板1に搭載されている電子部品素子4を電気絶縁性の第1樹脂材2によって被覆し、該第1樹脂材2を導電性を有する第2樹脂材3によって被覆することにより、シールドケースを使用することなく外部からの電磁波を導電性を有する第2樹脂材3によって遮蔽し、電子装置を安定して動作させることができるようになる。   Thus, in the electronic device described above, the electronic component element 4 mounted on the wiring board 1 is covered with the first resin material 2 having electrical insulation, and the first resin material 2 is covered with the second resin material 3 having conductivity. By covering, an electromagnetic wave from the outside can be shielded by the second resin material 3 having conductivity without using a shield case, and the electronic device can be operated stably.

尚、本発明は上述の実施形態に限定されるものではなく、本発明の要旨を逸脱しない範囲内で種々の変更、改良が可能である。   In addition, this invention is not limited to the above-mentioned embodiment, A various change and improvement are possible within the range which does not deviate from the summary of this invention.

上述の実施形態においては、グランド電極パターン5を、その外周縁が配線基板1上面の外周縁に合致するようにして配置したが、これに代えてグランド電極パターン5の外周縁を、配線基板1の外周縁よりも内側に所定距離だけ離間して配置するようにしてもよい。このようにすれば、配線基板1を大型基板の分割による“多数個取り”の手法により製造する場合であっても、大型基板の分割・切断時、グランド電極パターン5と切断用のカッターとが接触することはないことから、グランド電極パターン5のエッジが大型基板の切断に伴い下地より剥離するといった不都合を生じることがない。   In the above-described embodiment, the ground electrode pattern 5 is arranged so that the outer peripheral edge thereof matches the outer peripheral edge of the upper surface of the wiring board 1. Instead, the outer peripheral edge of the ground electrode pattern 5 is replaced with the wiring board 1. You may make it arrange | position apart from the outer periphery of this by a predetermined distance. In this way, even when the wiring board 1 is manufactured by the “multi-piece” method by dividing the large substrate, the ground electrode pattern 5 and the cutting cutter are separated at the time of dividing / cutting the large substrate. Since there is no contact, there is no inconvenience that the edge of the ground electrode pattern 5 is peeled off from the base when the large substrate is cut.

また、上述の実施形態においては、電子部品素子4は、配線基板1上面に設けられている接続パッド8に半田等の導電性接着剤介して電気的に接続させるようにしていたが、これに代えて、図3に示す如く金属細線等のボンディング材11を介して接続パッド8に電気的に接続するようにしてもよい。この場合、電子部品素子4とともにボンディング材11も覆うようにして第1樹脂材2で被覆することが重要である。   In the above-described embodiment, the electronic component element 4 is electrically connected to the connection pad 8 provided on the upper surface of the wiring board 1 via a conductive adhesive such as solder. Instead, as shown in FIG. 3, it may be electrically connected to the connection pad 8 via a bonding material 11 such as a fine metal wire. In this case, it is important to cover the bonding material 11 together with the electronic component element 4 with the first resin material 2.

更に、上述の実施形態においては、1個の電子部品素子4を配線基板1に搭載させたが、複数個の電子部品素子4を搭載するようにしてもよいことは言うまでもない。その場合、複数個の電子部品素子4のうち最も背高な電子部品素子の上面を第1樹脂材上面から、例えば0.10mm〜0.30mm程度離間させておくことが好ましい。   Furthermore, in the above-described embodiment, one electronic component element 4 is mounted on the wiring board 1, but it goes without saying that a plurality of electronic component elements 4 may be mounted. In that case, it is preferable that the upper surface of the tallest electronic component element among the plurality of electronic component elements 4 is separated from the upper surface of the first resin material by, for example, about 0.10 mm to 0.30 mm.

また更に、上述の実施形態においては、配線基板1をガラスセラミックスにより形成するようにしたが、これに代えて、アルミナセラミックス等の他のセラミック材料やガラス布基材エポキシ樹脂等の有機材料を用いて配線基板1を形成するようにしても構わない。   Furthermore, in the above-described embodiment, the wiring substrate 1 is formed of glass ceramics. Instead, other ceramic materials such as alumina ceramics or organic materials such as glass cloth base epoxy resins are used. Thus, the wiring substrate 1 may be formed.

電子装置は、電気絶縁性の第1樹脂材で被覆された電子部品素子を、導電性を有する第2樹脂材で被覆し、該第2樹脂材をグランド電極パターンに電気的に接続していることから、電子装置の使用時、第2樹脂材をグランド電位に保持することにより、シールドケースを設けることなく電磁波を遮蔽して電子装置の回路特性を安定化させるとともに電子部品素子を正常に動作させることができるようになる。しかもこの場合、従来の電子装置のようにシールドケースと電子部品素子との間に余分なスペースを確保する必要がないことから、電子装置を薄型化することが可能となる。   In the electronic device, an electronic component element covered with an electrically insulating first resin material is covered with a conductive second resin material, and the second resin material is electrically connected to the ground electrode pattern. Therefore, when the electronic device is used, by holding the second resin material at the ground potential, the electromagnetic characteristics can be shielded without providing a shielding case to stabilize the circuit characteristics of the electronic device and the electronic component element operates normally. To be able to. In addition, in this case, since it is not necessary to secure an extra space between the shield case and the electronic component element as in the conventional electronic device, the electronic device can be thinned.

また、電子装置は、第2樹脂材の外周部を、電子部品素子の搭載領域を囲繞する環状のグランド電極パターンに接続させたことから、電子装置の使用時、第2樹脂材全体を確実にグランド電位に保持することができるようになり、電磁波の遮蔽効果を高めて、電子装置をよりいっそう安定して動作させることができるとともに、電子部品素子に対する外部からの電磁波の影響を有効に抑えることが可能となる。   In addition, since the outer peripheral portion of the second resin material is connected to the annular ground electrode pattern surrounding the mounting area of the electronic component element, the entire second resin material can be surely used when the electronic device is used. It can be held at the ground potential, enhances the shielding effect of electromagnetic waves, makes electronic devices operate more stably, and effectively suppresses the influence of external electromagnetic waves on electronic component elements Is possible.

更に、電子装置は、グランド電極パターンの上面と内周面との間の角部に切り欠きを形成し、第2樹脂材の外周部を、前記切り欠きを構成するグランド電極パターンの内面と上面との間に形成される角部の位置と合致させることにより、第2樹脂材とグランド電極パターンとの接触面積を増加させ、第2樹脂材とグランド電極パターンとの密着強度を向上させて電子部品素子の気密性を高めることができる。   Further, the electronic device forms a notch at a corner between the upper surface and the inner peripheral surface of the ground electrode pattern, and the outer peripheral portion of the second resin material is formed on the inner surface and the upper surface of the ground electrode pattern constituting the notch. The contact area between the second resin material and the ground electrode pattern is increased, and the adhesion strength between the second resin material and the ground electrode pattern is improved to match the position of the corner formed between The airtightness of the component element can be improved.

1・・・配線基板
2・・・第1樹脂材
3・・・第2樹脂材
4・・・電子部品素子
5・・・グランド電極パターン
DESCRIPTION OF SYMBOLS 1 ... Wiring board 2 ... 1st resin material 3 ... 2nd resin material 4 ... Electronic component element 5 ... Ground electrode pattern

Claims (1)

配線基板と、
前記配線基板に実装された電子部品素子と、
前記電子部品素子を覆っているとともに、前記配線基板の上に設けられた樹脂材と、
前記樹脂材の上面から側面にかけて設けられており、前記配線基板の上面の外周縁部分に位置する端部を有しているシールド層と、
を備えた電子装置。
A wiring board;
An electronic component element mounted on the wiring board;
While covering the electronic component element, and a resin material provided on the wiring board,
A shield layer that is provided from the upper surface to the side surface of the resin material and has an end located at an outer peripheral edge portion of the upper surface of the wiring board;
An electronic device with
JP2009032310A 2009-02-16 2009-02-16 Electronic device Pending JP2009111428A (en)

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Cited By (1)

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Publication number Priority date Publication date Assignee Title
JP2012049502A (en) * 2010-08-27 2012-03-08 Powertech Technology Inc Chip package method

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JPH0567698A (en) * 1991-09-06 1993-03-19 Hitachi Ltd Tape carrier package
JPH0629427A (en) * 1991-12-24 1994-02-04 Sumitomo Bakelite Co Ltd Semiconductor mounting substrate
JPH10214923A (en) * 1997-01-28 1998-08-11 Fujitsu Denso Ltd Chip-on-board shielding structure and its manufacture
JP2001339016A (en) * 2000-05-30 2001-12-07 Alps Electric Co Ltd Surface mounting electronic circuit unit
JP2003078103A (en) * 2001-08-31 2003-03-14 Kyocera Corp Circuit board
JP2005019900A (en) * 2003-06-27 2005-01-20 Kyocera Corp Electronic device

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Publication number Priority date Publication date Assignee Title
JPH0567698A (en) * 1991-09-06 1993-03-19 Hitachi Ltd Tape carrier package
JPH0629427A (en) * 1991-12-24 1994-02-04 Sumitomo Bakelite Co Ltd Semiconductor mounting substrate
JPH10214923A (en) * 1997-01-28 1998-08-11 Fujitsu Denso Ltd Chip-on-board shielding structure and its manufacture
JP2001339016A (en) * 2000-05-30 2001-12-07 Alps Electric Co Ltd Surface mounting electronic circuit unit
JP2003078103A (en) * 2001-08-31 2003-03-14 Kyocera Corp Circuit board
JP2005019900A (en) * 2003-06-27 2005-01-20 Kyocera Corp Electronic device

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Publication number Priority date Publication date Assignee Title
JP2012049502A (en) * 2010-08-27 2012-03-08 Powertech Technology Inc Chip package method

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