JP2009170753A - 多層プリント配線板とこれを用いた実装体 - Google Patents
多層プリント配線板とこれを用いた実装体 Download PDFInfo
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- JP2009170753A JP2009170753A JP2008008859A JP2008008859A JP2009170753A JP 2009170753 A JP2009170753 A JP 2009170753A JP 2008008859 A JP2008008859 A JP 2008008859A JP 2008008859 A JP2008008859 A JP 2008008859A JP 2009170753 A JP2009170753 A JP 2009170753A
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
- H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
- H05K3/462—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar double-sided circuit boards
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0104—Properties and characteristics in general
- H05K2201/0129—Thermoplastic polymer, e.g. auto-adhesive layer; Shaping of thermoplastic polymer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0104—Properties and characteristics in general
- H05K2201/0133—Elastomeric or compliant polymer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
- H05K2201/0203—Fillers and particles
- H05K2201/0206—Materials
- H05K2201/0209—Inorganic, non-metallic particles
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10121—Optical component, e.g. opto-electronic component
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10227—Other objects, e.g. metallic pieces
- H05K2201/10378—Interposers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/06—Lamination
- H05K2203/061—Lamination of previously made multilayered subassemblies
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
【解決手段】ハンダリフロー等による加熱冷却による応力発生を、内層に設けた緩和接続層によって吸収することによって、反り量の少ない多層プリント配線板11を実現すると共に、この多層プリント配線板11を用いることで、カメラモジュールや光学モジュール等の実装体16を提供する。
【選択図】図1
Description
以下本発明の実施の形態1について、図面を参照しながら説明する。
以下本発明の実施の形態2として、多層プリント配線板11の製造方法の一例について、図3を用いて説明する。
実施の形態3では、実施の形態1で説明した多層プリント配線板11において、反り発生を抑えるメカニズムについて、図4、図5を用いて説明する。
次に実施の形態4として、実施の形態1で説明した多層プリント配線板11のPOP(パッケージ オン パッケージ)への応用例について説明する。
次に実施の形態5として、実施の形態1で説明した多層プリント配線板11の光学モジュールへの応用例について、図9(A)(B)を用いて説明する。
次に実施の形態6として、多層プリント配線板11の製造に用いる各種部材について説明する。
12 配線
13 ビア
14 絶縁層
15 緩和接続層
16 実装体
17 ホルダ
18 撮像素子
19 レンズ
20 点線
21 プリント配線板
22 ワイヤー
23 矢印
24 反り
25 半導体素子
26 ハンダボール
27 断線
Claims (14)
- 表層に配線が形成された複数のプリント配線板と、
複数の前記プリント配線板の間を接続する、無機フィラーおよび熱硬化性樹脂とからなる厚みが30〜300μmの緩和接続層と、からなり、
前記プリント配線板表層の配線を、緩和接続層側に埋設し、
前記緩和接続層は、加熱冷却時に発生する内部応力の緩和接続層であることを特徴とする多層プリント配線板。 - 緩和接続層に含まれる緩和材は、熱可塑性樹脂である請求項1記載の多層プリント配線板。
- 緩和接続層に含まれる緩和材は、エラストマーまたはゴムである請求項1記載の多層プリント配線板。
- 緩和接続層に含まれる緩和材は、ポリブタジエンまたはブタジエン系ランダム共重合ゴムまたはハードセグメントとソフトセグメントを有する共重合体である請求項1記載の多層プリント配線板。
- 緩和接続層における無機フィラーは、シリカ、アルミナ、チタン酸バリウムの少なくとも一つ以上からなる、請求項1に記載の多層プリント配線板。
- 緩和接続層における無機フィラーの含有量は70〜90重量%である、請求項1に記載の多層プリント配線板。
- 緩和接続層におけるエラストマーは、アクリル系エラストマー、熱可塑性エラストマーのいずれかからなり、含有量は0.2〜5.0重量%である、請求項1に記載の多層プリント配線板。
- 緩和接続層における無機フィラーの粒径が0.1〜15μmである、請求項1に記載の多層プリント配線板。
- 緩和接続層のガラス転移点以下の温度における熱膨張係数は、4〜65ppm/℃もしくはプリント配線板の熱膨張係数よりも低いことを特徴とする、請求項1に記載の多層プリント配線板。
- 緩和接続層のガラス転移点(DMA法)は、185℃以上もしくはプリント配線板のガラス転移点よりも10℃以上高いことを特徴とする、請求項1に記載の多層プリント配線板。
- 緩和接続層は芯材を含まない請求項1に記載の多層プリント配線板。
- 緩和接続層の最低溶融粘度は、1000〜100000Pa・sである請求項1に記載の多層プリント配線板。
- 緩和接続層は、着色剤が含有されている請求項1に記載の多層プリント配線板。
- 表層に配線が形成された複数のプリント配線板と、
複数の前記プリント配線板の間を接続する、無機フィラーおよび熱硬化性樹脂とからなる厚みが30〜300μmの緩和接続層と、からなり、
前記表層の配線を、緩和接続層側に埋設し、
前記緩和接続層は、加熱冷却時に発生する内部応力の緩和接続層であることを特徴とする多層プリント配線板を用いた実装体。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008008859A JP2009170753A (ja) | 2008-01-18 | 2008-01-18 | 多層プリント配線板とこれを用いた実装体 |
TW098101345A TW200938013A (en) | 2008-01-18 | 2009-01-15 | Multilayer printed wiring board and mounting body using the same |
CN2009801022537A CN101911852B (zh) | 2008-01-18 | 2009-01-16 | 多层印刷布线板及利用该布线板的安装体 |
US12/811,800 US8395056B2 (en) | 2008-01-18 | 2009-01-16 | Multilayer printed wiring board and mounting body using the same |
PCT/JP2009/000137 WO2009090878A1 (ja) | 2008-01-18 | 2009-01-16 | 多層プリント配線板およびそれを用いた実装体 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008008859A JP2009170753A (ja) | 2008-01-18 | 2008-01-18 | 多層プリント配線板とこれを用いた実装体 |
Publications (1)
Publication Number | Publication Date |
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JP2009170753A true JP2009170753A (ja) | 2009-07-30 |
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ID=40885270
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JP2008008859A Withdrawn JP2009170753A (ja) | 2008-01-18 | 2008-01-18 | 多層プリント配線板とこれを用いた実装体 |
Country Status (5)
Country | Link |
---|---|
US (1) | US8395056B2 (ja) |
JP (1) | JP2009170753A (ja) |
CN (1) | CN101911852B (ja) |
TW (1) | TW200938013A (ja) |
WO (1) | WO2009090878A1 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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WO2014156353A1 (ja) * | 2013-03-27 | 2014-10-02 | 株式会社村田製作所 | カメラモジュール |
WO2014207786A1 (ja) * | 2013-06-28 | 2014-12-31 | 株式会社 東芝 | 半導体パッケージの実装構造、内視鏡装置のカメラヘッド |
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JP2011096900A (ja) * | 2009-10-30 | 2011-05-12 | Fujitsu Ltd | 導電体およびプリント配線板並びにそれらの製造方法 |
US20110147069A1 (en) * | 2009-12-18 | 2011-06-23 | International Business Machines Corporation | Multi-tiered Circuit Board and Method of Manufacture |
CN102469701B (zh) * | 2010-11-09 | 2013-06-12 | 无锡江南计算技术研究所 | 互连结构的制作方法 |
JP6081693B2 (ja) * | 2011-09-12 | 2017-02-15 | 新光電気工業株式会社 | 配線基板及び配線基板の製造方法 |
US9312219B2 (en) * | 2012-12-28 | 2016-04-12 | Dyi-chung Hu | Interposer and packaging substrate having the interposer |
WO2014174931A1 (ja) * | 2013-04-26 | 2014-10-30 | 株式会社村田製作所 | 電子部品、電子部品の製造方法、および、回路基板 |
KR101593752B1 (ko) * | 2013-10-01 | 2016-02-12 | 제일모직주식회사 | 전도성 열가소성 수지 조성물 |
US10024152B2 (en) | 2013-12-27 | 2018-07-17 | Halliburton Energy Services, Inc. | Improving reliability in a high-temperature environment |
GB2526150B (en) * | 2014-05-16 | 2016-07-13 | Xyratex Tech Ltd | An optical printed circuit board and a method of mounting a component onto an optical printed circuit board |
US9826646B2 (en) * | 2014-05-27 | 2017-11-21 | Fujikura Ltd. | Component built-in board and method of manufacturing the same, and mounting body |
CN105722303B (zh) * | 2014-12-04 | 2019-01-25 | 中山台光电子材料有限公司 | 多层印刷电路板 |
US10548219B2 (en) * | 2015-10-16 | 2020-01-28 | Japan Science And Technology Agency | Stress relaxation substrate and textile type device |
TWI766250B (zh) * | 2020-03-17 | 2022-06-01 | 緯穎科技服務股份有限公司 | 電路板 |
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- 2009-01-16 CN CN2009801022537A patent/CN101911852B/zh not_active Expired - Fee Related
- 2009-01-16 WO PCT/JP2009/000137 patent/WO2009090878A1/ja active Application Filing
- 2009-01-16 US US12/811,800 patent/US8395056B2/en not_active Expired - Fee Related
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WO2014156353A1 (ja) * | 2013-03-27 | 2014-10-02 | 株式会社村田製作所 | カメラモジュール |
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JPWO2014207786A1 (ja) * | 2013-06-28 | 2017-02-23 | 株式会社東芝 | 半導体パッケージの実装構造、内視鏡装置のカメラヘッド |
Also Published As
Publication number | Publication date |
---|---|
CN101911852A (zh) | 2010-12-08 |
US20100276187A1 (en) | 2010-11-04 |
WO2009090878A1 (ja) | 2009-07-23 |
TW200938013A (en) | 2009-09-01 |
CN101911852B (zh) | 2013-01-23 |
US8395056B2 (en) | 2013-03-12 |
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