JP2009069485A - Display device, and display driving method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce power consumption without deteriorating image quality in response to line-sequential scanning. <P>SOLUTION: Concerning a display data signal supplied to a display panel part, the maximum gray scale value in a range of a predetermined line count (e.g. a range of line count equivalent to one frame) ascended from the current horizontal line is detected at intervals of one line period. At intervals of one line period, power supply voltage information for light emission drive of an organic EL element is generated using the detected maximum gray scale value, and the power supply voltage value supplied to each pixel circuit of the display panel part is changed at intervals of one line period based on the generated power supply voltage value information. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a display device using an organic electroluminescence element (organic EL element) as a light emitting element and a display driving method thereof.

JP 2006-65148 A JP 2005-326830 A JP 2004-138976 A

  Flat panel displays are widely used in products such as computer displays, portable terminals, and television receivers. At present, liquid crystal display panels are mainly used, but the narrow viewing angle and slow response speed continue to be pointed out. On the other hand, an organic electroluminescence (EL) display formed of self-luminous elements can overcome the above-mentioned viewing angle and response problems, and also has a thin form, high brightness, and high contrast that do not require a backlight. Therefore, it is expected as a next-generation display device that replaces liquid crystal displays.

  In the organic EL display, similarly to the liquid crystal display, there are a passive matrix method and an active matrix method as driving methods. Although the former has a simple structure, there is a problem that it is difficult to realize a large-sized and high-definition display. Therefore, the active matrix method is actively developed at present. In this active matrix system, a current flowing through a light emitting element in each pixel circuit is controlled by an active element (generally a thin film transistor: TFT) provided in the pixel circuit.

By the way, organic EL displays are still in practical use, but high power consumption is still a problem. This is also true for all display devices, but reducing power consumption and reducing the impact of sudden fluctuations in load can lower the overall power consumption of the device and reduce the scale of the power supply system. From a viewpoint, it is regarded as a major issue to be tackled.
However, the organic EL display is a self-luminous display, and the higher the average display luminance in the screen, the more power consumption is required. Therefore, it has been difficult until now to achieve both high image quality and low power consumption, which realize a bright and beautiful display.

Each of the above-mentioned patent documents discloses various techniques for reducing power consumption, but there remains a problem that deterioration in image quality, such as luminance reduction, cannot be avoided for reducing power consumption.
Therefore, an object of the present invention is to propose a technique that can reduce power consumption without causing deterioration in image quality.

  The display device of the present invention uses an organic electroluminescence element as a light emitting element in each pixel circuit, and each pixel circuit performs a light emission operation based on a display data signal supplied to each pixel circuit, and supplies the display panel unit to the display panel unit. A maximum gradation value detecting unit that detects a maximum gradation value in a range of a predetermined number of lines that goes back from the current horizontal line for each line period, and the maximum gradation for each line period. A voltage control unit that generates power supply voltage value information for light emission driving of the organic electroluminescence element using at least the maximum gradation value detected by the value detection unit, and a power supply voltage value information generated by the voltage control unit. Based on the power supply voltage value for light emission driving of the organic electroluminescence element to be supplied to each pixel circuit of the display panel unit based on one line period Changing and a driving voltage varying unit.

The maximum gradation value detecting unit detects a maximum gradation value for each horizontal line in the display data signal supplied to the display panel unit, and the detected maximum gradation value is at least within a range of the predetermined number of lines. Is stored for a period of time corresponding to the maximum number of gradations stored in the range of the predetermined number of lines. It is detected as the maximum gradation value in the range.
The range of the predetermined number of lines is a range of the number of lines corresponding to one frame.
Alternatively, the range of the predetermined number of lines is a range of the number of lines corresponding to the total number of lines that are emitting light in a horizontal period in which pixel emission of a certain horizontal line is started.
The voltage controller calculates an anode-cathode voltage of the organic electroluminescence element according to the maximum gradation value supplied from the maximum gradation value detector, and based on the calculated anode-cathode voltage. Thus, power supply voltage value information for driving the light emission of the organic electroluminescence element is generated.

The maximum gradation value detection unit detects a maximum gradation value in a range of a predetermined number of lines going back from the current horizontal line for each display color in the display data signal supplied to the display panel unit. The voltage control unit calculates an anode-cathode voltage of the organic electroluminescence element corresponding to each maximum gradation value for each display color supplied from the maximum gradation value detection unit, and calculates the calculated display color Based on the maximum anode-cathode voltage among the anode-cathode voltages, power supply voltage value information for light emission driving of the organic electroluminescence element is generated.
Further, the display data signal is delayed by the time required for the power supply voltage varying operation for light emission driving by the maximum gradation value detecting unit, the voltage control unit, and the driving voltage varying unit, and then displayed on the display panel unit. The display data delay part to supply is further provided.

  In the display driving method of the present invention, an organic electroluminescence element is used as a light emitting element in each pixel circuit, and each pixel circuit includes a display panel unit that performs a light emission operation based on a display data signal supplied. A method of detecting a maximum gradation value in a range of a predetermined number of lines going back from the current horizontal line for each line period, and a display data signal supplied to the display panel unit for each line period, And generating the power supply voltage value information for driving the light emission of the organic electroluminescence element using at least the detected maximum gradation value, and the display panel unit based on the generated power supply voltage value information The power supply voltage value for light emission driving of the organic electroluminescence element supplied to each pixel circuit is changed for each line period. And a step of.

  The power consumption of the organic EL element is calculated by multiplying the current flowing through the organic EL element by the voltage between the anode and the cathode of the organic EL element. However, in reality, a driving transistor using TFT is used as a means for supplying a constant current corresponding to the display gradation. The driving transistor has a characteristic to realize constant current driving in any environment where the display is used. In contrast, a drain-source voltage having a margin is provided. Therefore, a certain value determined by (the drain-source voltage of the driving transistor having a design margin) + (the voltage between the anode and the cathode of the organic EL element) is supplied to the organic EL panel as the light emission driving power supply voltage. Is common. That is, the power consumption is expressed by multiplying the current flowing through the organic EL element by the power supply voltage for light emission driving.

  Here, since the current that flows through the organic EL element is determined with respect to the luminance to be emitted, power consumption cannot be reduced unless a highly efficient material or device structure is developed. It is possible to appropriately control according to the characteristics of the transistor and the organic EL element. Therefore, the IV (current difference between flowing current and anode-cathode potential) characteristic of the organic EL element is used.

In the organic EL element, when a certain current for light emission flows, a potential difference is generated between both ends (between the anode and the cathode) of the organic EL element.
In general, when the current is small (the luminance is low), the potential difference between both ends of the organic EL element is small, and the potential difference increases as the current increases (the luminance increases). This means that an unnecessary overvoltage is applied when the luminance is low, and unnecessary power consumption is generated.
In the organic EL element, the anode-cathode voltage varies according to the current value in this way.
As described above, the anode-cathode voltage of the organic EL element is one of the criteria for setting the power supply voltage value for driving light emission. Conversely, when the anode-cathode voltage decreases, Therefore, the power supply voltage value may be lowered accordingly.

In this case, the amount of decrease in the power supply voltage value is the anode of the organic EL element in the pixel circuit that emits light at the maximum gradation (the highest brightness gradation at that time) among the pixel circuits that are driven to emit light in the display panel. -Determine based on the voltage between cathodes. That is, the anode-cathode voltage of the organic EL element of the pixel circuit that emits light at the maximum gradation value becomes larger than the anode-cathode voltage of the organic EL elements of all other pixel circuits, and the maximum gradation value This is because if the power supply voltage value to be applied is lowered with reference to the anode-cathode voltage, a power supply voltage drop that does not cause a reduction in luminance can be executed in all pixel circuits.
For example, if the power supply voltage value is determined on the basis of the maximum gradation value in one frame period, the determined power supply voltage may be applied when displaying the one frame.

However, in order to appropriately perform such power supply voltage variable control, the maximum gradation value is surely set to all pixels that emit light during a period in which a certain power supply voltage value varied based on the maximum gradation value is applied. It must be the maximum gradation value among the gradation values for the circuit.
Here, it is considered that the pixel circuits arranged in a matrix are driven to emit light by a line sequential driving method. In the line sequential driving method, light is emitted by scanning line by line from the uppermost line to the lowermost line. After the last line is scanned in a certain frame, scanning is performed from the uppermost line of the next frame through a blanking period.
The light emission period of the pixel circuit in each line is determined by the duty of the scan pulse, but can be as long as 1 frame period at the longest.
In most cases, the display image on one screen has a light emission state based on display data of two frames before and after the scan timing for each line.
That is, even if the maximum gradation value is detected in units of one frame, the light emission is actually performed only by the display data signal of one frame that is the detection target of the maximum gradation value. The light emission operation is performed by the display data signal of the next frame sequentially from the uppermost line immediately after that, and the light emission operation state by the display data signal of the two previous and subsequent frames is displayed on the screen. Coexist.
Eventually, even if the maximum gradation value of the display data signal of one frame is detected and the power supply voltage value is variably controlled, the light emission driving power supply voltage cannot be appropriately reflected.

Therefore, in the present invention, the maximum gradation value detection unit detects the maximum gradation value in a range of a predetermined number of lines going back from the current horizontal line for each line period in the display data signal supplied to the display panel unit. Like that.
The voltage control unit generates power voltage value information for light emission driving of the organic electroluminescence element using at least the maximum gradation value detected by the maximum gradation value detection unit for each line period, and drives The voltage variable unit supplies the power supply voltage value for light emission driving of the organic electroluminescence element to be supplied to each pixel circuit of the display panel unit based on the power supply voltage value information generated by the voltage control unit for each line period. To change.
In this way, when a certain power supply voltage value is always given to the display panel unit, the maximum gradation value that is the basis for determining the power supply voltage value is the maximum gradation level that is actually driven to emit light. It can be a key value.

According to the present invention, the maximum gradation value in a range of a predetermined number of lines (for example, a range of the number of lines corresponding to one frame) is detected retroactively from the current scan line, and obtained from the maximum gradation value. By using the voltage between both ends of the organic EL element, an optimum power supply voltage value that can be reduced to the maximum can be calculated for each horizontal period, and the power supply voltage value can be variably controlled. As a result, it is possible to always maintain the light emission luminance in all the pixels, and to realize the maximum reduction of wasteful power consumption without causing deterioration in image quality.
Further, since the IV characteristic of the organic EL element is slightly different for each display color, the maximum gradation value is detected for each display color, and the voltage across the organic EL element is the largest for each display color. By selecting one and determining the power supply voltage value based on the selected one, more accurate power supply variable control is possible.

Embodiments of a display device and a display driving method according to the present invention will be described below.
FIG. 1 shows a configuration of a display device according to an embodiment. The display device of this example includes an organic EL display panel module 1 that uses an organic EL element as a light emitting element, a display data delay unit 2, a maximum both-end voltage calculation unit 3, a drive voltage determination unit 4, and a drive voltage variable unit 5. In-line maximum gradation detection unit 6 and 1V period maximum gradation detection unit 7 are provided.

First, the organic EL display panel module 1 will be described with reference to FIG. 2, FIG. 3, and FIG.
FIG. 2 shows an example of the configuration of the organic EL display panel module 1. The organic EL display panel module 1 includes a pixel circuit 10 that uses an organic EL element as a light emitting element and performs light emission driving by an active matrix method.
As shown in FIG. 2, the organic EL display panel module 1 includes a pixel array unit 20 in which pixel circuits 10 are arranged in a matrix in the column direction and the row direction, a data driver 11, and gate drivers 12, 13, and 14. Prepare.
Further, signal lines DTL1, DTL2,..., Which are selected by the data driver 11 and supply a signal value Vsig corresponding to the supplied display data signal as an input signal to the pixel circuit 10, are arranged in the column direction with respect to the pixel array unit 20. It is arranged. The signal lines DTL1, DTL2,... Are arranged by the number of columns of the pixel circuits 10 arranged in a matrix in the pixel array unit 20.

Further, scanning lines WSL1, WSL2,..., Scanning lines DSL1, DSL2,..., Scanning lines RSL1, RSL2,. These scanning lines WSL, DSL, and RSL are respectively arranged by the number of rows of the pixel circuits 10 arranged in a matrix in the pixel array unit 20.
The scanning lines WSL (WSL1, WSL2,...) Are scanning lines for writing the signal value Vsig to the pixel circuit 10 (write scanning), and are driven by the gate driver 12. The gate driver 12 sequentially supplies the scanning pulse WS to each of the scanning lines WSL1, WSL2,... Arranged in rows at a predetermined timing, thereby scanning the pixel circuit 10 line-sequentially in units of rows. .
The scanning lines DSL (DSL1, DSL2,...) Are driven by the gate driver 13. The gate driver 13 supplies a scanning pulse DS for light emission driving of the organic EL element to the power supply lines DSL1, DSL2,.
The scanning lines RSL (RSL1, RSL2,...) Are driven by the gate driver 14. The gate driver 14 supplies the scanning pulse RS for the reset operation of the pixel circuit 10 to each of the scanning lines RSL1, RSL2,.
The data driver 11 supplies a signal value (Vsig) as an input signal to the pixel circuit 10 to the signal lines DTL1, DTL2,... Arranged in the column direction in accordance with the line sequential scanning by the gate driver 12. .

FIG. 3 shows the configuration of the pixel circuit 10. The pixel circuits 10 are arranged in a matrix like the pixel circuits 10 in the configuration of FIG. In FIG. 3, only one pixel circuit 10 arranged at a portion where the signal line DTL and the scanning lines WSL, DSL, and RSL intersect is shown for simplification.
Various configurations of the pixel circuit 10 that can be employed as the embodiment are conceivable. In this example, the pixel circuit 10 includes the organic EL element 30 that is a light emitting element, one holding capacitor Cs, a sampling transistor Tr1, and a drive. The transistor Tr2, the switching transistor Tr3, and four thin film transistors (TFTs) as the resetting transistor Tr4 are configured. Each transistor Tr1, Tr2, Tr3, Tr4 is an n-channel TFT.

The holding capacitor Cs has one terminal connected to the source of the drive transistor Tr2, and the other terminal connected to the gate of the drive transistor Tr2.
The light emitting element of the pixel circuit 10 is, for example, an organic EL element 30 having a diode structure, and includes an anode and a cathode. The anode of the organic EL element 1 is connected to the source of the drive transistor Tr2, and the cathode is connected to a predetermined ground wiring (cathode potential Vcath).
The sampling transistor Tr1 has one end of its drain and source connected to the signal line DTL, and the other end connected to the gate of the driving transistor Tr2. The gate of the sampling transistor is connected to the scanning line WSL.
The switching transistor Tr3 has one end of its drain and source connected to the power supply voltage Vcc, and the other end connected to the drain of the driving transistor Tr2. The gate of the switching transistor Tr3 is connected to the scanning line DSL.
The reset transistor Tr4 has one end of its drain and source connected to the source of the drive transistor Tr2, and the other end connected to a predetermined reset potential Vrs. The gate of the reset transistor Tr4 is connected to the scanning line RSL.

  The operation of the pixel circuit 10 will be briefly described with reference to FIG. 4A shows the signal value Vsig applied to the signal line DTL, FIG. 4B shows the horizontal synchronization signal HS, FIG. 4C shows the scanning pulse WS applied from the scanning line WSL to the gate of the sampling transistor Tr1, and FIG. 4 (d) is a scanning pulse RS applied from the scanning line RSL to the gate of the reset transistor Tr4, FIG. 4 (e) is a gate voltage Vg of the driving transistor Tr2, and FIG. 4 (f) is a source voltage Vs of the driving transistor Tr2. FIG. 4G shows the scanning pulse DS applied from the scanning line DSL to the gate of the switching transistor Tr3.

The start point of horizontal scanning is determined by the horizontal synchronization signal HS. As a writing period in the figure, the signal value Vsig is applied to the signal line DTL. In this writing period, the sampling transistor Tr1 is turned on by the scanning pulse WS, so that the signal value Vsig from the signal line DTL is written to the holding capacitor Cs.
In this writing period, the reset transistor Tr4 is turned on by the scanning pulse RS, and the other end side of the storage capacitor Cs is set to the reset potential Vrs. This is because if the potential on the other end side of the storage capacitor Cs is indefinite, the voltage written to the storage capacitor Cs does not become the same as the signal value Vsig.
As a result, in this writing period, the gate voltage of the drive transistor Tr2 rises according to the writing of the signal value Vsig to the storage capacitor Cs. On the other hand, the source voltage Vs of the drive transistor Tr2 is maintained at the reset potential Vrs.

Following the writing period, an operation as a light emission period is performed. In the light emission period, the scanning pulses WS and RS are set to the L level, the sampling transistor Tr1 and the reset transistor Tr4 are turned off, and the switching transistor Tr3 is turned on by the scanning pulse DS. As a result, by supplying a current from the drive power supply voltage Vcc, a current corresponding to the signal potential (that is, the voltage between the gate and source of the drive transistor Tr2) held in the holding capacitor Cs by the drive transistor Tr2 is caused to flow through the organic EL element 30. The EL element 30 is caused to emit light. The drive transistor Tr2 operates in a saturation region, and functions as a constant current source that supplies the organic EL element 30 with a drive current corresponding to the signal value Vsig.
The light emission driving of the pixel circuit 10 is performed by the operation as described above.
In addition, since the both-ends voltage of the organic EL element 30 raises when an electric current flows into the organic EL element 30, the gate voltage Vg and the source voltage Vs of the drive transistor Tr2 rise in connection with this at the beginning of the light emission period.

In the organic EL display panel module 1, such a light emitting operation is executed by a line sequential drive method.
That is, for the image display of one frame, for each pixel circuit 10 arranged in a matrix as shown in FIG. 2, each line is sequentially scanned from the pixel circuit 10 in the uppermost line every horizontal period. The light emission operation of each line is sequentially performed.
Note that the light emission period of one pixel is determined by the duty of the scan pulse DS as can be seen from FIG. In each pixel circuit, the writing period and the light emitting period only need to be ensured during one frame period. Therefore, the light emitting period can be extended to a period close to one frame in consideration of the writing period. .

Returning to FIG. 1, the configuration of this example will be described.
The display data signal is supplied to the display data delay unit 2 and the in-line maximum gradation detection unit 6.
The display data delay unit 2 gives a delay of a predetermined time to the display data signal and supplies it to the organic EL display panel module 1. The delay by the display data delay unit 2 is to reflect the power supply voltage control by the operation from the in-line maximum gradation detecting unit 6 to the drive voltage variable unit 5 appropriately according to the display contents. This is for delaying the time considering the processing delay from the tone detection unit 6 to the drive voltage variable unit 5. The delay time will be described later.
In the organic EL display panel module 1, light emission driving of each pixel is performed based on the supplied display data signal with the above configuration.

The in-line maximum gradation detector 6 detects the maximum gradation value for each line of the display data signal for each constituent color of one pixel.
The maximum gradation value detected here is a value having the highest luminance among luminance values given to each pixel of a certain line, that is, light is emitted with the highest luminance in one line. A display data signal value for a pixel.
Such a maximum gradation value is detected for each display color of R (red), G (green), and B (blue).
That is, the display data signal for each R pixel circuit in one line is sequentially compared to detect the highest luminance value as the R maximum gradation value Smax_hr. Similarly, among the display data signals for each G pixel circuit in one line, the highest luminance value is detected as the G maximum gradation value Smax_hg, and among the display data signals for each B pixel circuit in one line. Thus, the highest luminance value is detected as the B maximum gradation value Smax_hb.
Then, the maximum gradation values Smax_hr, Smax_hg, and Smax_hb for each color in one line are output to the maximum gradation detecting unit 7 within the 1V period.
Note that a memory for one line is prepared in the in-line maximum gradation detection unit 6 and the display data signal value for one line period is temporarily stored, and the maximum gradation for each color of R, G, and B is stored therein. The value may be detected.

The maximum gradation detection unit 7 in the 1V period, for each maximum gradation value Smax_hr, Smax_hg, Smax_hb input for each horizontal period, goes back from the currently input maximum gradation value line for one vertical period ( A maximum gradation value is detected in one frame period).
For example, the maximum gradation detecting unit 7 in the 1V period can be configured by a comparison operation unit 71 and first-in first-out (FIFO) memories 72R, 72G, and 72B as shown in FIG. The input maximum gradation values Smax_hr, Smax_hg, Smax_hb for each color are taken into the FIFO memories 72R, 72G, 72B, respectively.
Each FIFO memory 72R, 72G, 72B has a storage area for the number of lines corresponding to one frame period, for example, and stores the latest input data (maximum gradation value) and the oldest data (maximum scale). (Memory value) is output (in this case, discarded).
Accordingly, the FIFO memory 72R always stores the maximum gradation value Smax_hr in the number of lines corresponding to one frame retroactively from the current line. Similarly, the FIFO memory 72G always stores the maximum gradation value Smax_hg in the number of lines corresponding to one frame, going back from the current line, and the FIFO memory 72B always goes back 1 from the current line. The maximum gradation value Smax_hb in the number of lines corresponding to the frame is stored.
The comparison calculation unit 71 extracts the largest gradation value from the maximum gradation values Smax_hr of each line stored in the FIFO memory 72R, and outputs it as the maximum gradation value Smax_vr. Further, the comparison calculation unit 71 extracts the largest gradation value from the maximum gradation values Smax_hg of each line stored in the FIFO memory 72G, and outputs it as the maximum gradation value Smax_vg. Further, the comparison operation unit 71 extracts the largest gradation value from the maximum gradation value Smax_hb of each line stored in the FIFO memory 72B, and outputs it as the maximum gradation value Smax_vb.
The maximum gradation detection unit 7 within the 1V period executes such an operation every line period, that is, every time the maximum gradation values Smax_hr, Smax_hg, and Smax_hb are input from the maximum gradation detection unit 6 within the line.
Therefore, the maximum gradation values Smax_vr, Smax_vg, and Smax_vb output from the maximum gradation detecting unit 7 in the 1V period are the maximum gradations for each color in the period from the current line to the number of lines corresponding to one frame. Value.

The maximum gradation detection unit 7 within the 1V period outputs the maximum gradation values Smax_vr, Smax_vg, and Smax_vb to the maximum both-end voltage calculation unit 3.
The maximum both-end voltage calculation unit 3 includes a display data-EL both-end voltage conversion table created using the IV characteristics existing for each color, and is input for each horizontal period using this conversion table. A voltage across the organic EL element 30 (anode-cathode voltage) is obtained from the maximum gradation values Smax_vr, Smax_vg, and Smax_vb of each color.
Then, the maximum value of the obtained voltages at both ends for each color is output to the drive voltage determining unit 4 as the maximum voltage VEL (SMAX). This maximum both-end voltage VEL (SMAX) is the maximum anode-cathode voltage in the period of the number of lines going back from the current line by one frame period, that is, the current line of the organic EL display panel module 1. This is the voltage value across the organic EL element 30 having the highest voltage across the organic EL elements 30 of all the pixel circuits performing light emitting display in one horizontal period as the scan timing.

The drive voltage determination unit 4 calculates an optimum Vcc value from the input maximum voltage VEL (SMAX) inputted every horizontal period, and outputs the information to the drive voltage variable unit 5.
For example, the optimum Vcc value is calculated as follows. First, a voltage difference ΔVEL between the voltage VEL (MAX) at both ends of the organic EL element 30 under the maximum luminance condition in the specification and the maximum voltage VEL (SMAX) at the input current display content is calculated. Then, an optimum Vcc value is calculated by subtracting a voltage difference ΔVEL from an initial power supply voltage value (Vcc_default) described later.

The drive voltage variable unit 5 converts the voltage value of the drive power supply voltage (Vcc) set as a predetermined initial voltage value and supplies it to the organic EL display panel module 1. The drive power supply voltage Vcc output from the drive voltage variable unit 5 is commonly supplied to all the pixel circuits 10 of the organic EL display panel module 1.
The drive voltage variable unit 5 converts the input EL drive power supply voltage (initial voltage value) into the optimum Vcc value determined by the drive voltage determination unit 4 (optimum EL drive power supply voltage), and the organic EL display panel module 1 is supplied. An example of the voltage conversion method will be described later.

The operation of the display device of this example will be described.
First, a general method for determining the power supply voltage Vcc for light emission driving will be described with reference to FIG. In this example, the general power supply voltage Vcc determined here is an initial power supply voltage value at a stage (before voltage value conversion) input to the drive voltage variable section 5 of FIG.

Although FIG. 6 shows the pixel circuit 10 described above, in order for the driving transistor Tr2 to continuously pass a constant current corresponding to the gate-source voltage Vgs (guaranteing saturation region operation), the drain-source connection is performed. The voltage Vds must be kept above a certain potential. Assuming that the potential for this is Vds (sat), the voltage between the power supply voltage Vcc and the cathode potential Vcath should not interrupt the drain-source voltage Vds (sat) in any driving environment / condition. It is common to be decided on.
Between the power supply voltage Vcc and the cathode potential Vcath, the maximum voltage across the organic EL element 30 (between the anode and cathode) at the minimum operating environment temperature / specification maximum luminance (specification maximum current) due to the configuration of the pixel circuit: VEL (MAX) In addition, there are elements obtained by adding the design margin: Vmargin to the above-mentioned drain-source voltage Vds (sat) and the worst maximum voltage VDS (on) generated when the switching transistor Tr3 is turned on. Therefore, the power supply voltage Vcc is determined by these additions.

If the determined power supply voltage Vcc value is the initial power supply voltage Vcc_default,
Vcc_default = Vcath + VEL (MAX) + Vds (sat) + VDS (on) + Vmargin
Is calculated as
The luminance determined by the specification, that is, the current value Ids is determined by the organic EL device and does not depend on the drive voltage. Yes.

Conventionally, the maximum constant voltage (Vcc_default) having a margin as described above has been continuously applied as the light emission driving power supply voltage Vcc. There are many unexpected situations.
In this example, attention is paid to the fact that the voltage VEL (anode-cathode voltage) across the organic EL element 30 varies depending on the current value Ids, that is, the gradation of the light emission luminance. By varying the power supply voltage Vcc in accordance with the both-end voltage VEL, wasteful power consumption is reduced.

In particular, the maximum voltage VEL (MAX) across the organic EL element 30 is assumed to be the minimum operating environment temperature / specification maximum luminance (specification maximum current), but always emits light with the maximum luminance. In spite of not being in a state, the power supply voltage Vcc must be determined in consideration of the maximum voltage VEL (MAX) at the both ends, resulting in useless power consumption.
Therefore, in this example, the power supply voltage Vcc is varied according to the variation of the both-end voltage VEL of the organic EL element 30 that varies according to the gradation. That is, based on the idea that the power supply voltage Vcc is lowered by the amount that VEL (MAX) in the Vcc_default calculation formula is lowered, the wasteful power consumption is basically reduced.

FIG. 7 shows the IV characteristics of the organic EL element 30. This is a characteristic of the current Ids flowing through the organic EL element and the voltage VEL across the organic EL element 30.
As can be seen from the figure, the IV characteristic of the organic EL element 30 has a large variation in the voltage at both ends depending on the value of the flowing current. For example, when the value of the current Ids flowing through the organic EL element 30 is “a”, the both-ends voltage VEL = VEL (a), and when the value of the current Ids flowing through the organic EL element 30 is “b”, the both-ends voltage VEL = VEL (b).
Further, the variation ratio of the both-end voltage VEL is different for each color of R, G, and B.

As described above, VEL (MAX) in the Vcc_default calculation formula is a voltage at both ends of the maximum current on the specification at the maximum gradation, but from the characteristics of FIG. It can be seen that the initial power supply voltage value Vcc_default calculated using VEL (MAX) in the equation need not be given. Temporarily, when the value of the current Ids is “a” and the both-ends voltage VEL = VEL (a), the above equation is calculated as “Vcath + VEL (a) + Vds (sat) + VDS (on) + Vmargin”. There is no problem if the power supply voltage is set to be equal to or higher than the power supply voltage.
Therefore, by determining the voltage VEL across the organic EL element 30 in the pixel circuit 10 having the maximum gradation in the image content displayed on one screen, it is possible to reduce (decrease) from the initial power supply voltage Vcc_default. It is possible to obtain a voltage value reduction amount that does not cause image quality deterioration even if the image quality is reduced.
Such processing is performed by the maximum both-end voltage calculation unit 3 and the drive voltage determination unit 4. That is, the above-described maximum both-end voltage calculation unit 3 obtains the maximum both-end voltage VEL (SMAX) on the screen, and the drive voltage determination unit 4 determines the both-ends voltage VEL (MAX) of the organic EL element 30 under the maximum luminance condition in the specification. ) And the maximum voltage VEL (SMAX) between the input current display contents and the voltage difference ΔVEL is calculated. This voltage difference ΔVEL is the amount by which the power supply voltage can be reduced. Therefore, the optimum Vcc value can be calculated by subtracting the voltage difference ΔVEL from the initial power supply voltage value Vcc_default.

  The maximum terminal voltage calculation unit 3 calculates the maximum terminal voltage VEL (SMAX) on the screen. For this purpose, the terminal voltage according to the current value based on the IV characteristic as shown in FIG. A conversion table generated by measuring the value of VEL in advance may be provided. Since the IV characteristic varies depending on the color, by providing this conversion table for each color, as described above, the maximum gradation values Smax_vr, Smax_vg, and Smax_vb of the input colors of the respective organic EL elements 30 are provided. Both-end voltage VEL can be obtained. Then, the maximum value of the voltages at both ends for each color may be the maximum voltage VEL (SMAX).

  Basically, it is only necessary to obtain an optimum power supply voltage value based on the maximum voltage VEL (SMAX) across the screen as described above. However, the situation due to the line sequential scanning method must be considered here. .

FIG. 8 illustrates an example of a light emission period of one frame data in the line sequential scanning method.
One frame of display data is input in the form of frame # m → frame # m + 1 with a blanking period interposed therebetween, and is displayed in a light emission manner. In line-sequential driving, light emission display is started (scanned) by 1H (one horizontal period) from the top line, and the display data is applied over about 1 V period (one vertical period) excluding the blanking period. However, each line continues to emit light for about 1 V at the maximum after the light emission is started. (The light emission period for each line is the same for display data light emission within one frame.)
For example, FIG. 8 shows an example of the light emission period for the uppermost line L1 to the lowermost line Ln. For example, it is assumed that the light emission period is set long to a level close to the 1V period.
Scanning is sequentially performed from the line L1 of the frame #m to the lines L2, L3,..., But the pixel circuit of each line performs a light emitting operation for a period indicated by an arrow. After the lowermost line Ln of frame #m is scanned, scanning is sequentially performed from the line L1 of frame # m + 1 through a blanking period.
Even after the scan is started in order from the line L1 of the frame # m + 1, the lower line in the previous frame #m continues to emit light.

Here, for example, when paying attention to the scan timing of the line Lx in the frame # m + 1, in the moment as the 1H period in which the light emission of the line Lx is started, the image from the lines L1 to Lx in the frame # m + 1 and the previous That is, the light emission from the lines Lx + 1 to Ln of the frame #m is performed, and the image content is as shown on the right side in the figure.
In other words, if you cut out the flash content at a certain moment, the display of the content of the frame that is currently being scanned and the content of the previous frame before the display is updated is mostly mixed. The content of the previous frame that emits light is the oldest one that was emitted 1 V before.

Therefore, even if the power supply voltage value determined based on the maximum gradation value (maximum voltage at both ends) in all the pixels in frame # m + 1 is given at the time when scanning of frame # m + 1 is started, Since the display of frame #m is still left, the power supply voltage value is not appropriately controlled in accordance with the display contents.
That is, in order to accurately control the power supply voltage value to be variably controlled according to the display content, it is necessary to consider the displayed image content at the scan timing of each line.
Then, in order to appropriately grasp the pixel state in the light emission content at a certain moment, it is only necessary to have information from the current scan line to 1V before. It is sufficient that the maximum gradation value can be extracted for each constituent color during this period.
Therefore, in this example, in the maximum in-line gradation detecting unit 6 and the maximum gradation detecting unit 7 in 1V period, the display data signal is in a range of a predetermined number of lines (1 from the current horizontal line) for each line period. The maximum gradation value in the range of the number of lines corresponding to the frame) is detected.

A processing procedure for reducing power consumption in this example in consideration of such line-sequential scanning will be described with reference to FIG.
As described above, the power supply voltage Vcc for driving light emission is varied by the drive voltage variable section 5 shown in FIG. 1 and supplied to the organic EL display panel module 1. FIG. 9 shows the operation for varying the power supply voltage. Then, the following processes as <S1> to <S5> are performed, and information on the optimum Vcc value is supplied to the drive voltage variable unit 5.

First, as processing <S1>, the in-line maximum gradation detecting unit 6 detects maximum gradation values Smax_hr, Smax_hg, and Smax_hb for each color in one line from the display data signal. The maximum gradation values Smax_hr, Smax_hg, and Smax_hb are sent to the maximum gradation detector 7 within the 1V period.
Next, as the process <S2>, the maximum gradation detection unit 7 within the 1V period, the maximum gradation values Smax_vr and Smax_vg for each color in the 1V period (for example, the period corresponding to one frame) retroactively from the current line. , Smax_vb are detected and output to the maximum voltage calculation unit 3.

Next, as the process <S3>, the maximum both-end voltage calculation unit 3 uses the display data-EL both-end voltage conversion table created using the IV characteristics existing for each color, and inputs the maximum of each color. The both-ends voltage VEL of the organic EL element 30 is determined for each of the gradation values Smax_vr, Smax_vg, and Smax_vb. Then, the maximum value of the obtained voltages at both ends for each color is output to the drive voltage determining unit 4 as the maximum voltage VEL (SMAX).
In the process <S4>, the drive voltage determination unit 4 calculates a voltage difference ΔVEL between the both-ends voltage VEL (MAX) of the organic EL element 30 in the maximum luminance condition and the maximum both-ends voltage VEL (SMAX) in the input current display content. calculate.
And as process <S5>, the drive voltage determination part 4 calculates the optimal Vcc value as follows.
Optimum Vcc value = (initial power supply voltage value Vcc_default) − (voltage difference ΔVEL)
This optimum Vcc value is an optimum Vcc value that matches the image content that goes back by 1 V period from the line at the scan timing.
The information on the optimum Vcc value is sent to the drive voltage variable unit 5, and reduction conversion of the light emission drive power supply voltage Vcc is performed.

FIG. 10 shows an example of the configuration of the drive voltage variable unit 5. For example, as shown in the figure, the power supply variable control unit 51, the digital potentiometer 52, and the resistor R1 are provided.
The power supply variable control unit 51 obtains an output voltage Vout that is variable in voltage with respect to the input voltage Vin.
General power supply variable control circuits are roughly classified into a switching regulator and a series regulator, but the method of variably controlling the output voltage Vout is basically the same. When it is desired to take a relatively large amount of variable voltage, a switching regulator is often selected for efficiency.
The power supply variable control unit 51 is provided with an FB terminal for feeding back the output voltage at a certain potential, and the output voltage is stabilized by an operation for keeping this potential at a certain constant value. Since the FB potential is generally about 1 to 3 V, voltage variability control is possible by a configuration in which the output voltage is divided by resistance and connected to the FB terminal.
That is, since the FB potential is determined by a certain value (for example, 2 V), the resistance voltage dividing ratio may be changed in order to vary the output voltage.
For this purpose, a digital potentiometer 52 capable of digital control with one having a fixed resistance R1 and the other having a variable resistance value is used. The drive voltage determining unit 4 supplies the digital value for obtaining the optimum Vcc value to the digital potentiometer 52 and variably controls the resistance value, whereby the output voltage Vout, that is, the light emission drive power supply voltage Vcc can be controlled.

The processes <S1> to <S5> shown in FIG. 9 are performed every 1H period, whereby the drive voltage variable unit 5 variably controls the power supply voltage Vcc every 1H period.
By variably controlling the power supply voltage Vcc in this way, the IV characteristics of the organic EL element 30 are used, and the power supply voltage is reliably matched to the light emitting state from the light emission state of all the existing pixels. The Vcc value can be reduced and controlled as much as possible while preventing the Vcc value from being lowered excessively.

It should be noted that the supply control of the power supply voltage Vcc that is variably controlled and the scan timing of the current line that is a reference for the variably controlled must be appropriately matched. Accordingly, the display data delay unit 2 is provided to correct a response delay caused by processing time from the processing in the in-line maximum gradation detection unit 6 to the variable control of the power supply voltage Vcc in the drive voltage variable unit 5. ing.
The display data delay unit 2 corrects the delay from the input of display data to the calculation of the optimum Vcc value and the response delay for the conversion of the power supply voltage Vcc value, and appropriately reflects the optimum Vcc value in the light emission state. An example of calculating the required line memory amount is as follows.
The factors that cause the delay are “(1) calculation of the maximum gradation value of 1H to delay until calculation of the optimum Vcc value” and “(2) after the drive power supply variable section 5 receives the information of the optimum Vcc value. The delay until the voltage value is reached ”.
With regard to (1) above, since the maximum gradation value of 1H is calculated, a delay of “1H” occurs at the minimum. Regarding (2) above, this response delay is assumed to be “αH” although it depends on the performance of the power conversion circuit. (It is generally considered that several H is possible.)
Therefore, the display data delay unit 2 can reliably reflect the optimum Vcc value only by preparing (1 + α) × H line memories and performing data delay. For this reason, the display data delay unit 2 does not require a large-capacity frame memory or the like, and a memory amount (data delay) in units of lines that only corrects a slight delay is sufficient.

As described above, in the present embodiment, low power consumption is realized by reducing the power supply voltage Vcc in accordance with the fluctuation of the both-end voltage VEL due to the IV characteristic of the organic EL element 30, and further, this operation is line-sequentially performed. By appropriately corresponding to the light emission operation in the scan method, it is possible to obtain a power saving effect without causing a deterioration in image quality due to a decrease in luminance.
And since it is possible to achieve low power consumption so as not to visually recognize the degradation of the image quality of the self-luminous flat panel display, if the display device is a battery-operated device, it contributes to longer operating time, In addition, a device that obtains power from an AC outlet can contribute to saving power and saving electricity costs.

The reason why the power supply voltage Vcc can be varied within a range that does not affect the light emission luminance is that the maximum gradation value in a period corresponding to, for example, one frame is detected from the current line from the video signal (display data signal). by. That is, the power supply voltage Vcc is determined based on the voltage VEL between the pixels of the maximum gradation value in the display content displayed at the scan timing of a certain line.
The light emission period of the pixel circuit 10 is a period close to one frame at the maximum, but may be shortened depending on, for example, the duty setting of the scan pulse DS shown in FIG.
In this example, since it is only necessary to detect the maximum gradation value in the content displayed at the scan timing of a certain line, the maximum gradation value is set to the number of lines corresponding to one frame retroactive from the current line. The maximum gradation value in the range of the number of lines corresponding to the total number of lines in which light emission is performed may be used in a horizontal period in which pixel light emission of a certain horizontal line is started. In other words, if the maximum gradation value is detected in the range of the number of lines as all the pixels emitting light at a certain line scan timing, the maximum gradation value as the screen content is appropriately reflected. Because.

The light emission drive power supply voltage Vcc is obtained by the drive voltage variable unit 5. If the drive voltage variable unit 5 is constituted by a series regulator or a step-down switching regulator, the organic EL display is provided when the power supply voltage value is lowered. By transferring the power consumed by the panel module 1 to the regulator side, the power consumed by the organic EL display panel module 1 itself is lowered, and the temperature of the organic EL device is kept low.
Alternatively, if the drive voltage variable unit 5 is configured by a step-up type switching regulator in which the conversion efficiency does not change / changes little in a certain output voltage range, the organic EL display panel module 1 is reduced when the power supply voltage value is lowered. In addition to reducing the power consumed by itself and keeping the temperature of the organic EL device low, the power consumption of the entire device can also be reduced.

Various modifications can be considered as the embodiment.
For example, in the above example, the configuration in which the common power supply voltage Vcc is applied to all the pixel circuits is shown. However, as the pixel circuit 10, an R (red) pixel circuit, a G (green) pixel circuit, and a B (blue) pixel circuit are used. Pixel circuits are arranged. A power supply voltage Vcc line may be provided independently for each pixel circuit for each color, and the variable processing of the power supply voltage Vcc may be performed for each color.
In that case, based on the voltage between both ends of the organic EL element 30 obtained from the maximum gradation value for each color, the power supply voltage for that color may be variably controlled.
In the above example, the display signal detection unit 3 detects the maximum gradation value for each color. However, the maximum gradation value is detected without distinguishing the colors, and from the maximum gradation value, the IV characteristics of each color are detected. A method is also conceivable in which the voltage across the organic EL element 30 is obtained from the obtained average IV characteristics and the optimum Vcc value is obtained based on the obtained voltage.

In the above example, the both-end voltage VEL of the organic EL element 30 is used in accordance with the gradation, but the both-end voltage VEL also varies depending on the environmental temperature.
For this reason, for example, a temperature detection unit is provided so that temperature information is provided to the maximum both-ends voltage calculation unit 3, and the maximum both-ends voltage calculation unit 3 calculates the maximum both-ends voltage using the maximum gradation value and the temperature information. It can also be considered.

  Moreover, although the pixel circuit configuration in the organic EL display panel module 1 is shown in FIG. 3, the present invention can also be applied to a case where a pixel circuit configuration other than that in FIG. 3 is adopted. It is particularly suitable for a display device that performs pixel driving by an active matrix method.

It is a block diagram of the structure of the display apparatus of embodiment of this invention. It is explanatory drawing of the organic electroluminescent display panel module of embodiment. FIG. 10 is an explanatory diagram of a pixel circuit in an embodiment. FIG. 11 is an explanatory diagram of the operation of the pixel circuit of the embodiment. It is explanatory drawing of the structural example of the maximum gradation detection part in 1V period of embodiment. It is explanatory drawing of the general power supply voltage determination in the pixel circuit employ | adopted by embodiment. It is explanatory drawing of the IV characteristic of an organic EL element. It is explanatory drawing of the display state by line sequential scanning. It is explanatory drawing of the optimal Vcc value calculation process of embodiment. It is explanatory drawing of the drive voltage variable part of embodiment.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 Organic EL display panel module, 2 Display data delay part, 3 Maximum voltage calculation part, 4 Drive voltage determination part, 5 Drive voltage variable part, 6 Maximum gradation detection part in a line, 7 Maximum gradation detection part in 1V period DESCRIPTION OF SYMBOLS 10 Pixel circuit, 11 Data driver, 12, 13, 14 Gate driver, 20 Pixel array part, 30 Organic EL element, Cs retention capacity, Tr1 sampling transistor, Tr2 drive transistor, Tr3 switching transistor

Claims (8)

In each pixel circuit, an organic electroluminescence element is used as a light emitting element, and each pixel circuit performs a light emission operation based on a display data signal supplied thereto,
A maximum gradation value detection unit that detects a maximum gradation value in a range of a predetermined number of lines that goes back from the current horizontal line for each line period for the display data signal supplied to the display panel unit;
A voltage control unit that generates power supply voltage value information for light emission driving of the organic electroluminescence element by using at least the maximum gradation value detected by the maximum gradation value detection unit for each line period;
A drive voltage for changing the power supply voltage value for light emission driving of the organic electroluminescence element to be supplied to each pixel circuit of the display panel unit for each line period based on the power supply voltage value information generated by the voltage control unit A variable part;
A display device comprising:   The maximum gradation value detection unit detects a maximum gradation value for each horizontal line in the display data signal supplied to the display panel unit, and the detected maximum gradation value is at least within the range of the predetermined number of lines. The range of the predetermined number of lines traced back from the current horizontal line with the maximum gradation value among the maximum gradation values stored in the range of the predetermined number of lines stored for a corresponding period The display device according to claim 1, wherein the display device is detected as a maximum gradation value.   2. The display device according to claim 1, wherein the range of the predetermined number of lines is a range of the number of lines corresponding to one frame.   The range of the predetermined number of lines is a range of the number of lines corresponding to the total number of lines emitting light in a horizontal period in which pixel light emission of a certain horizontal line is started. The display device described in 1. The voltage controller is
The anode-cathode voltage of the organic electroluminescence element is calculated according to the maximum gradation value supplied from the maximum gradation value detection unit, and the organic electroluminescence element is calculated based on the calculated anode-cathode voltage. The display device according to claim 1, wherein power supply voltage value information for driving light emission is generated. The maximum gradation value detection unit detects a maximum gradation value in a range of a predetermined number of lines going back from the current horizontal line for each display color for a display data signal supplied to the display panel unit,
The voltage control unit calculates an anode-cathode voltage of the organic electroluminescence element corresponding to each maximum gradation value for each display color supplied from the maximum gradation value detection unit, and calculates the calculated display color 2. The display according to claim 1, wherein power supply voltage value information for light emission driving of the organic electroluminescence element is generated based on a maximum anode-cathode voltage among anode-cathode voltages for each. apparatus.   The display data signal is delayed and supplied to the display panel unit by the time required for the power supply voltage varying operation for light emission driving by the maximum gradation value detecting unit, the voltage control unit, and the driving voltage varying unit. The display device according to claim 1, further comprising a display data delay unit. As a display driving method for a display device using an organic electroluminescence element as a light emitting element in each pixel circuit, and a display panel unit that performs a light emission operation of luminance based on a display data signal supplied in each pixel circuit,
For the display data signal supplied to the display panel unit, detecting a maximum gradation value in a range of a predetermined number of lines going back from the current horizontal line for each line period;
Generating power supply voltage value information for light emission driving of the organic electroluminescence element using at least the detected maximum gradation value for each line period;
Based on the generated power supply voltage value information, changing a power supply voltage value for light emission driving of the organic electroluminescence element supplied to each pixel circuit of the display panel unit for each line period;
A display driving method comprising:

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