JP2008234298A - Semiconductor power conversion device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor power conversion device in which, even when delay of detection and the delay of control operation occur, a control error does not occur. <P>SOLUTION: Load current of load 2, connected to an alternating current system, is detected, this load current is given to a dq conversion control means 10, and the conversion output is made an output current command value of a power converter 1 connected to the alternating system. A dq conversion control means 10 includes a phase detection means 11 to detect voltage phase of the alternating current system, a dq conversion means 12 to convert the load current to d axis current and q axis current by perform rotating coordinate conversion responding to a reference phase outputted by a phase detection means 11, a d axis filter 13 and q axis filter 14 for extracting a required frequency component from each of the d axis current and q axis current, a phase correction means 16, 17 to correct the reference phase outputted by the phase detection means 11 and output the correction reference phase, and an inverse dq conversion means 15 to perform inverse rotating coordinate conversion for the output of the d axis filter 13 and the q axis filter 14 responding to the correction reference phase and obtain three-phase output current command. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a semiconductor power conversion device that controls electric power using rotational coordinate conversion and reverse rotational coordinate conversion.

  Conventionally, a semiconductor power conversion device has been used to control reactive power, harmonic power, or reverse phase power included in an AC system to a desired value.

In such a semiconductor power conversion device, a control method using rotational coordinate conversion such as so-called dq conversion is often used. The control method using this dq conversion is, for example, a method in which a three-phase output current to a semiconductor power converter is detected by a current detector, and an active current is indicated by using the voltage phase of the AC system detected by the voltage detector as a reference phase. The power is converted into two axes on the rotational coordinate transformation of the axis and the d axis orthogonal to the q axis and indicating the reactive current, the control processing is performed, the inverse transformation is performed again, and the three-phase manipulated variable is obtained to convert the semiconductor power Control the device. If control using dq conversion is performed in this way, it becomes possible to control, for example, the current effective and ineffective components independently. However, when the voltage phase changes in the main circuit unit, for example, when a filter circuit is inserted on the output side of the semiconductor power conversion device, it becomes difficult to accurately compensate reactive power. For this reason, the proposal which correct | amends a q-axis current reference | standard and a d-axis current reference | standard according to the voltage phase which changes is made (for example, refer patent document 1).
JP-A-10-105261 (page 3-5, FIG. 1)

  According to the method disclosed in Patent Document 1, it becomes possible to perform reactive power compensation in accordance with a change in the voltage phase of the main circuit unit. However, in reality, there is a detection delay of the current detector and a calculation time delay of the dq conversion calculation, and a control error occurs due to these delays.

  The present invention has been made to solve the above problems, and an object of the present invention is to provide a semiconductor power converter that does not cause a control error even if there is a detection delay or a control calculation delay.

  In order to achieve the above object, a semiconductor power conversion device according to a first aspect of the present invention detects a load current of a load connected to an AC system, and supplies the load current to a dq conversion control means. In the semiconductor power conversion device in which the output of the conversion control means is set to the output current command value of the power converter connected to the AC system, the dq conversion control means detects the voltage phase of the AC system. Means, a dq conversion means for converting the load current into a d-axis current and a q-axis current according to a reference phase output from the phase detection means, and a d-q current and a q-axis current, respectively. The d-axis and q-axis filters for extracting frequency components, the phase correction means for correcting the reference phase output from the phase detection means and outputting the corrected reference phase, and the outputs of the d-axis and q-axis filters are output in advance. Is characterized by comprising a reverse dq conversion means for obtaining the output current command counter-rotating coordinate transformation to the three-phase in accordance with the correction reference phase.

The semiconductor power conversion device according to the second aspect of the present invention detects a system voltage of an AC system, applies this system voltage to the dq conversion control means, and connects the output of the dq conversion control means to the AC system. In the semiconductor power conversion device so as to be the output voltage command value of the power converter,
The dq conversion control means converts a system voltage into a d-axis voltage and a q-axis voltage by performing a rotational coordinate conversion on the system voltage in accordance with a phase detection means for detecting the voltage phase of the AC system and a reference phase output from the phase detection means. First dq conversion means, second dq conversion means for converting the output current of the power converter into a d-axis current and a q-axis current by converting rotational coordinates in accordance with a reference phase output from the phase detection means, A d-axis and q-axis current controller that causes the d-axis current and the q-axis current to follow respective command values, and outputs of the d-axis and q-axis current controllers are subtracted from the d-axis voltage and the q-axis voltage, respectively. A d-axis and q-axis subtracting means, a phase correcting means for correcting the reference phase output from the phase detecting means and outputting a corrected reference phase, and the outputs of the d-axis and q-axis subtracting means are reversed according to the corrected reference phase. Rotate coordinate transformation It is characterized in that comprises a reverse dq conversion means for obtaining the output voltage command of the phases.

  ADVANTAGE OF THE INVENTION According to this invention, it becomes possible to provide the semiconductor power converter device which a control error does not produce even if there is a detection delay and a control calculation delay.

  Embodiments of the present invention will be described below with reference to the drawings.

  A semiconductor power conversion device according to Embodiment 1 of the present invention will be described below with reference to FIGS.

1 is a circuit configuration diagram of a semiconductor power conversion device according to a first embodiment of the present invention.

  The power converter 1 connected to the AC system via a transformer is installed, for example, to compensate for reactive power, harmonics, and the like of the power system. The power converter 1 is an AC / DC converter that is normally configured by bridge-connecting switching elements. A DC power source, a capacitor, and the like are connected to the DC part, but the illustration thereof is omitted. A load 2 is connected to the AC system.

  The input current of the load 2 is detected by the current detector 3 and given to the dq conversion control unit 10. Similarly, the voltage of the AC system is detected by the voltage detector 4 and given to the dq conversion control unit 10. The output current to the AC system side of the power converter 1 is detected by the current detector 5.

  Hereinafter, the internal configuration of the dq conversion control unit 10 will be described.

  The instantaneous AC voltage detected by the voltage detector 4 is given to the phase detector 11. The phase detector 11 generates the reference phase (ωt + φ) of the output current command value based on the detected phase of the instantaneous AC voltage. The instantaneous alternating current detected by the current detector 3 is converted into a d-axis current and a q-axis current orthogonal to the d-axis current by a dq converter 12 that converts from three phases to two phases. This conversion is performed based on the reference phase (ωt + φ).

  In the dq conversion described above, if the coordinate system of the dq conversion is set as a rotation coordinate, the d-axis current and the q-axis current become DC components. Then, the d-axis current and the q-axis current are input to the inverse dq converter 15 that converts from two phases to three phases through the filter 13 and the filter 14, respectively. As the reference phase when the three-phase conversion is performed by the inverse dq converter 15, (ωt + φ + δ) obtained by adding the phase δ set by the correction phase setting unit 16 to the reference phase (ωt + φ) by the adder 17 is used. In addition, desired control is implement | achieved by selecting suitably the filter 13 and the filter 14 in the above. For example, if the filter 13 is selected so as to cut all components, and the filter 14 cuts high frequency fluctuations, the power factor of the current flowing through the load 2 is set to 1, and higher-order harmonics are canceled. Control becomes possible.

  The output of the inverse dq converter 15 becomes the output current command value of the power converter 1 and is given to the current controller 20. The current controller 20 adjusts the voltage command value that is the output so that the deviation between the output current command value and the output current detected by the current detector 5 becomes zero. Then, with this voltage command value as an input, the PWM controller 21 performs pulse width modulation and gives a gate pattern to the switching elements constituting the power converter 1.

The basic operation in the above will be described below with reference to FIG. 2 and FIG. 3. Now, assuming that the three-phase output currents of the power converter 1 are i _a, i _b , and i _c , these are as shown in equation (1): expressed.

Here, I is an effective value of the output current, ωt is a phase, and φ is a minute phase difference.

FIG. 2 is a vector diagram showing the relationship between α and β axes that are orthogonal coordinates in a stationary coordinate system and d and q axes that are orthogonal coordinates when expressed in a rotating coordinate system. As shown in FIG. 2, coordinates obtained by rotating the α and β axes by a phase of phase ωt + a minute phase difference φ are d and q axes. The relationship between the stationary coordinate system (α, β axes) and the rotating coordinate system (d, q axes) shown in FIG. 3 is expressed by equation (2). Here, the counterclockwise rotation is positive.

From the equation (2), the relational expression between the d and q axis currents and the α and β axis currents is as shown in the following equation (3).

Accordingly, the relationship between the α and β axes and the d and q axes in FIG. 2 is as shown in equations (2) and (3).

Here, since the current of each of the three output phases (a phase, b phase, and c phase) of the power converter 1 is i _a, i _b , and _ic , the equation expressed in the stationary coordinate system is the equation (4) become that way.

The a-phase, b-phase, and c-phase can be expressed on the d and q axes by the dq converter 12 that converts from three phases to two phases. Substituting equation (4) into equation (3)

It becomes. Therefore, it can be seen that the internal conversion formula of the dq converter 12 is the formula (6).

When the equation (1) is substituted into the equation (5), the d-axis and q-axis current components dq-transformed by the dq converter 12 can be obtained.

When this equation (7) is expanded and calculated,

It becomes.

In contrast to the above, the three-phase current command values generated by the inverse dq converter 15 when the phase δ set in advance by the correction phase setter 16 is used in consideration of the delay of the phase δ are _represented by i _aδ , i _Assuming that _bδ and _icδ , this can be obtained from the internal conversion equation of the inverse dq converter 15 that converts from two phases to three phases as shown in equation (9).

When this equation (9) is expanded, the following equations (10) and (11) are obtained.

As shown in the equation (11), the current command values i _aδ , i _bδ , i _cδ to the power converter 1 corrected for the phase δ are phased from the current reference phase (ωt + φ) in the equation (1). This means that it has been advanced by a time corresponding to δ minutes. As a result, the currents i _a, i _b , and _ic output from the semiconductor power device 1 are appropriately phase-corrected to become currents that should be output, and appropriate power compensation by the semiconductor power device 1 becomes possible. Note that the corrected conversion in the above is substantially equivalent to performing normal inverse conversion after correcting the d-axis and q-axis currents by the phase δ as shown in FIG.

  FIG. 3 is a waveform for one phase of the output current command value immediately after the inverse dq conversion 15 of FIG. 1 is performed. When the control without considering the phase delay is performed on the output current command value W1 which is the original control target, the control is performed with the output current command value W2 while the delay time corresponding to the phase δ is generated. On the other hand, in consideration of the delay time of the phase δ, the correction phase setter 16 advances the command by the phase δ in advance to control the output current command value W3 as close as possible to the output current command value W1. It can be performed.

  As described above, if the phase δ obtained by converting the sum of the detection time delay by the current detector 3 and the time delay time in the dq conversion control unit 10 into a phase is preset by the correction phase setting unit 16, An output current command value in consideration of the delay time is given to the power converter 1. Therefore, according to the first embodiment, it is possible to cancel a control error due to a time delay, and it is possible to perform highly accurate power control.

  FIG. 2 is a circuit configuration diagram of the semiconductor power conversion device according to the second embodiment of the present invention.

  In the second embodiment, the same parts as those in the circuit configuration diagram of the semiconductor power conversion device according to the first embodiment of the present invention shown in FIG. The second embodiment is different from the first embodiment in that the input of the dq converter 12A of the dq conversion control unit 10A is the output of the voltage detector 4, and subtractors 18 and 19 are provided instead of the filters 13 and 14. In this way, the outputs of the subtractors 18 and 19 are applied to the inverse dq converter 15A, and the output of the current detector 5 is applied to the dq converter 12B provided in the dq conversion control unit 10A. The configuration is such that each output of the q-axis is supplied to the current controllers 20A and 20B, respectively, and the current controllers 20A and 20B adjust the respective outputs so that the supplied d-axis current reference and q-axis current reference are obtained. These outputs are the subtraction signals of the subtractors 18 and 19, and the output of the inverse dq converter 15A is supplied to the PWM controller 21 as a voltage command for the power converter 1.

  In the above description, the reference phase of conversion in the dq converter 12B is the same as that of the dq converter 12A (ωt + φ), and the reference phase of conversion of the inverse dq converter 15A is corrected (ωt + φ + δ). Further, the d-axis current reference and the q-axis current reference in the above are set on the output side of the power converter 1 so as to take into account the voltage drop due to the impedance of the transformer or the like.

  According to the control in the second embodiment described above, for example, when a negative phase component is included in the system voltage, the outputs of the subtractors 18 and 19 are generated according to the phase of the negative phase component. The voltage command value controls the output voltage of the power converter 1 so as to be zero.

  Similarly to the first embodiment, a phase δ obtained by converting the sum of the detection time delay by the voltage detector 4 and the time delay time in the dq conversion control unit 10A into a phase can be set in advance by the correction phase setter 16. For example, an output voltage command value in consideration of the delay time is given to the power converter 1. Furthermore, although a voltage drop occurs due to the impedance of the transformer on the output side of the power converter 1, this correction can also be made. Therefore, according to the second embodiment, it is possible to cancel the control error due to the delay time and the voltage drop with respect to the power converter 1, and it becomes possible to carry out highly accurate power control.

1 is a circuit configuration diagram of a semiconductor power conversion device according to a first embodiment of the present invention. The vector diagram which shows a stationary coordinate (alpha) axis | shaft, (beta) axis | shaft, rotation coordinate d-axis, and q-axis. Explanatory drawing of the output current command value of this invention. The circuit block diagram of the semiconductor power converter device which concerns on Example 2 of this invention.

Explanation of symbols

1 Power Converter 2 Load 3 Current Detector 4 Voltage Detector 5 Current Detector

10, 10 A dq conversion control unit 11 Phase detector 12, 12 A, 12 B dq converter 13, 14 Filter 15, 15 A Inverse dq converter 16 Correction phase setter 17 Adder 18, 19 Subtractor 20, 20 A, 20 B Current control 21 PWM controller

Claims (4)

The load current of the load connected to the AC system is detected, this load current is supplied to the dq conversion control means, and the output of the dq conversion control means is used as the output current command value of the power converter connected to the AC system. A semiconductor power conversion device as described above,
The dq conversion control means includes:
Phase detection means for detecting the voltage phase of the AC system;
Dq conversion means for converting the load current into a d-axis current and a q-axis current by converting the load current according to a reference phase output from the phase detection means;
A d-axis and q-axis filter for extracting a necessary frequency component from each of the d-axis current and the q-axis current;
A phase correcting means for correcting a reference phase output by the phase detecting means and outputting a corrected reference phase;
A semiconductor power conversion apparatus comprising: an inverse dq conversion means for obtaining a three-phase output current command by performing reverse rotation coordinate conversion on the outputs of the d-axis and q-axis filters according to the correction reference phase. Semiconductor power in which the system voltage of the AC system is detected, this system voltage is supplied to the dq conversion control means, and the output of the dq conversion control means is used as the output voltage command value of the power converter connected to the AC system A conversion device,
The dq conversion control means includes:
Phase detection means for detecting the voltage phase of the AC system;
First dq conversion means for converting the system voltage to rotational coordinate conversion into a d-axis voltage and a q-axis voltage according to a reference phase output by the phase detection means;
Second dq converting means for converting the output current of the power converter into a d-axis current and a q-axis current by converting rotational coordinates in accordance with a reference phase output from the phase detecting means;
A d-axis and q-axis current controller for causing the d-axis current and the q-axis current to follow respective command values;
D-axis and q-axis subtracting means for subtracting the outputs of the d-axis and q-axis current controllers from the d-axis voltage and the q-axis voltage, respectively.
A phase correcting means for correcting a reference phase output by the phase detecting means and outputting a corrected reference phase;
A semiconductor power conversion apparatus comprising: an inverse dq conversion means for obtaining a three-phase output voltage command by performing reverse rotation coordinate conversion on the output of the d-axis and q-axis subtraction means in accordance with the correction reference phase. The phase correction means includes
2. The semiconductor power converter according to claim 1, wherein phase correction is performed by converting the sum of the load current detection delay time and the calculation delay time of the dq conversion control means into a phase angle. The phase correction means includes
3. The semiconductor power converter according to claim 2, wherein phase correction is performed by converting the sum of the detection delay time of the system voltage and the calculation delay time of the dq conversion control means into a phase angle.

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