JP2008227239A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve dynamic characteristics of a semiconductor device. <P>SOLUTION: The semiconductor device 10 comprises: a center region where a MOSFET is incorporated; and a terminal region formed around the center region. The center region comprises: a body region 27 formed on the surface of the center region; a contact region 26 formed in the body region 27; a source electrode 36 electrically connected to the contact region 26; and an insulator region 28 formed between the contact region 26 arranged at the furthest terminal side and the terminal region. The insulator region 28 is in contact with the side of the contact region 26. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor device.

  The semiconductor device includes a central region in which circuit elements are formed and a termination region provided around the central region. In the central region, circuit elements such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), IGBTs (Insulated Gate Bipolar Transistors), and diodes are formed. The termination region is provided around the center region and includes a termination structure for extending a depletion layer from the center region toward the periphery of the termination region when the circuit element is in a non-conductive state. The termination structure bears the voltage applied to the circuit element in the lateral direction, and is required to improve the breakdown voltage of the semiconductor device.

Hereinafter, a semiconductor device in which the RESURF layer is provided in the termination structure and the circuit element is a MOSFET will be described as an example. The technique disclosed in this specification may be a termination structure of a type other than the RESURF layer. For example, the termination structure may be a guard ring. Further, the technology disclosed in the present specification may be a type of circuit element other than a MOSFET. For example, the circuit element may be an IGBT or a diode. The following description is not intended to apply the technique disclosed herein only to the RESURF layer and the MOSFET.
FIG. 3 schematically shows a longitudinal sectional view of a main part of a conventional semiconductor device 100. The semiconductor device 100 includes a central region in which circuit elements are formed and a termination region provided around the central region. FIG. 3 shows the vicinity of the boundary between the central region and the terminal region.

The semiconductor device 100 includes a drain electrode 121 covering the back surface of the semiconductor substrate 120, an n ⁺ -type drain region 122 provided on the back surface of the semiconductor substrate 120, and an n provided on the drain region 122. ^A -type drift region 123 is provided. The semiconductor device 100 further includes a p-type body region 127 provided on the surface of the central region, a p ⁺ -type contact region 126 provided in the body region 127, and the contact region 126 electrically. A source electrode 136 is connected. The source electrode 136 is provided on the surface of the semiconductor substrate 120 and is electrically connected to the body region 127 through the contact region 126.
The semiconductor device 100 further includes a p ⁻ type resurf layer 125 and an n ⁺ type channel stopper region 124 provided on the surface of the termination region. One end of the RESURF layer 125 is in contact with the side surface of the body region 127. The channel stopper region 124 is electrically connected to a channel stopper electrode 132 provided on the surface of the semiconductor substrate 120. The channel stopper electrode 132 is fixed to the same potential as the drain electrode 121 and stabilizes the potential of the termination region. The surface of the semiconductor substrate 120 in the termination region is covered with an insulating film 134.
This type of semiconductor device is disclosed in Patent Document 1 and Patent Document 2.

JP-A-8-316480 JP-A-3-94469

In this type of semiconductor device 100, characteristics of a transient period until the semiconductor device 100 is switched from on to off (hereinafter referred to as a transient period during which the semiconductor device 100 is turned off) or a transient period until the semiconductor device 100 switches from off to on ( A technique for improving the characteristics of the transient period during which the turn-on is performed is desired. These transient characteristics (called dynamic characteristics) are governed by carrier behavior.
When the semiconductor device 100 is off, the depletion layer extends beyond the periphery of the RESURF layer 125 over a wide range of the drift region 123. In the semiconductor device 100, the corner portion 125a at the periphery of the RESURF layer 125 is exposed to the drift region 123, and the electric field tends to concentrate at the corner portion 125a. For this reason, when a high surge voltage is applied to the semiconductor device 100 during the transition period in which the semiconductor device 100 is turned off, the electric field at the corner portion 125a of the RESURF layer 125 becomes strong. For this reason, an avalanche phenomenon occurs in the corner portion 125a, the charge balance of the termination region is greatly collapsed, and the depletion layer contracts toward the central region side. When the depletion layer contracts, the electric field concentrates at the corner portion 127a of the body region 127. When an avalanche phenomenon occurs at the corner portion 127a of the body region 127, the electric field is concentrated at the corner portion 126a of the contact region 126 next. In this way, in the transition period in which the turn-off is performed, the location where the electric field concentrates changes one after another, and finally the electric field concentrates at the corner portion 126a of the contact region 126. Therefore, if the occurrence of the avalanche phenomenon can be suppressed at the corner portion 126a of the contact region 126, the dynamic characteristics of the semiconductor device 100 can be improved.

  An object of the present invention is to provide a semiconductor device with improved dynamic characteristics by taking measures against electric field concentration in a corner portion of a contact region.

  The technique disclosed in this specification is characterized in that an insulator region is provided in the vicinity thereof in order to take measures against electric field concentration in the corner portion of the contact region. When the insulator region is provided, a strong electric field is applied to the insulator region, so that the electric field concentration at the corner portion of the contact region existing around the insulator region is alleviated. For this reason, the occurrence of the avalanche phenomenon is suppressed in the corner portion of the contact region. As a result, the dynamic characteristics of the semiconductor device are improved.

The semiconductor device disclosed in this specification includes a central region in which circuit elements are formed, and a termination region provided around the central region. The central region includes a semiconductor region provided on the surface of the central region, a contact region provided in the semiconductor region region, a surface electrode electrically connected to the contact region, and an insulator region. I have. The contact region contains an impurity having the same conductivity type as that of the semiconductor region at a higher concentration than the semiconductor region. The insulator region is provided between the contact region and the termination region arranged closest to the termination region, and is in contact with the side surface of the contact region.
Here, the “semiconductor region” includes not only the “body region” of the MOSFET and IGBT but also the “cathode region” of the diode or a semiconductor region equivalent to them.
In the semiconductor device described above, since the insulator region is provided in contact with the side surface of the contact region, the electric field concentration at the corner portion of the contact region existing around the insulator region is alleviated. For this reason, the occurrence of the avalanche phenomenon is suppressed in the corner portion of the contact region. As a result, the dynamic characteristics of the semiconductor device are improved.

The insulator region is preferably provided from a position on the side of the contact region to a position deeper than the contact region.
In this embodiment, the corner portion of the contact region can be in contact with the insulator region. Therefore, it is possible to effectively take measures against electric field concentration at the corner portion of the contact region, and the dynamic characteristics of the semiconductor device are remarkably improved.

A RESURF layer may be provided in the termination region. The RESURF layer is provided on the surface of the termination region, one end is in contact with the side surface of the semiconductor region, and contains impurities having the same conductivity type as the semiconductor region at a lower concentration than the semiconductor region.
In the case where the RESURF layer is provided in the termination region, the insulator region is preferably less than half the diffusion depth of the RESURF layer. In this case, the inventors have confirmed that the dynamic characteristics of the semiconductor device are improved.

  According to the semiconductor device disclosed in this specification, when an avalanche phenomenon occurs in the termination region, the dynamic characteristics can be significantly improved by taking measures against electric field concentration in the corner portion of the contact region.

Preferred features of the technology disclosed in this specification are listed.
(First feature)
Circuit elements formed in the central region include MOSFET, diode, IGBT, UMOS, DMOS, trench IGBT, and the like.
(Second feature)
The insulator region is provided in a part of a range where the impurity of the body region and the impurity of the RESURF layer are introduced in an overlapping manner.
(Third feature)
The termination structure includes a RESURF layer, a guard ring, and the like.

Embodiments will be described below with reference to the drawings. In the following embodiments, an example in which silicon is used as a semiconductor material will be described. However, a semiconductor material such as silicon carbide, gallium arsenide, or gallium nitride may be used instead.
FIG. 1 schematically shows a longitudinal sectional view of a main part of the semiconductor device 10. The semiconductor device 10 includes a central region in which a vertical MOSFT is formed and a termination region provided around the central region. FIG. 1 shows the vicinity of the boundary between the central region and the terminal region. The vertical MOSFT built in the center region has a structure for switching a current conduction state and a non-conduction state with time. The central region is partitioned on the center side of the semiconductor substrate 20. The termination region is partitioned around the semiconductor substrate 20 around the central region. The termination region bears a voltage applied to the MOSFT in the central region in the lateral direction.

The semiconductor device 10 includes a drain electrode 21 that covers the back surface of the semiconductor substrate 20. Aluminum is used for the drain electrode 21. The semiconductor device 10 further includes an n ⁺ -type drain region 22 provided on the back surface of the semiconductor substrate 20 and an n ⁻ -type drift region 23 provided on the drain region 22. Phosphorus is used as an impurity in the drain region 22 and the drift region 23. The drain electrode 21, the drain region 22, and the drift region 23 are formed over the entire semiconductor substrate 20, and are formed continuously from the center region and the termination region.

The semiconductor device 10 further includes a p-type body region 27 (an example of a semiconductor region) provided on the surface of the semiconductor substrate 20 in the central region, and a p ⁺ -type contact region 26 provided in the body region 27. A source electrode 36 (an example of a surface electrode) electrically connected to the contact region 26, and an insulator region 28. Boron is used as an impurity in the body region 27 and the contact region 26. The source electrode 36 is provided on the surface of the semiconductor substrate 20 and is electrically connected to the body region 27 through the contact region 26. The source electrode 36 is made of a conductive material such as aluminum, copper, or a laminated electrode obtained by laminating them. The insulator region 28 is made of an insulating material in which a thermal oxide film and CVD silicon oxide are combined as materials, or an insulating material such as silica beads. The insulator region 28 is formed by performing a step of processing a trench from the surface of the semiconductor substrate 20, a step of thermally oxidizing the inner wall of the trench, and a step of embedding CVD silicon oxide in the trench after thermal oxidation. Can be formed. Instead of the step of burying CVD silicon oxide, silica beads may be filled in the trench.
A plurality of contact regions 26 are provided in a central region (not shown). For example, when a trench gate electrode is provided in the central region, it is provided between the trench gate electrodes. FIG. 1 shows the contact region 26 arranged on the most end region side.
The insulator region 28 is provided between the contact region 26 and the termination region, and is in contact with the side surface of the contact region 26. The insulator region 28 makes a round around the center region between the contact region 26 and the termination region when seen in a plan view. The insulator region 28 extends from the surface of the semiconductor substrate 20 toward the deep portion. The insulator region 28 is provided from a position on the side of the contact region 26 to a position deeper than the contact region 26. The depth D28 of the insulator region 28 is larger than the depth of the contact region 26.

The semiconductor device 10 further includes a p ⁻ type resurf layer 25 and an n ⁺ type channel stopper region 24 provided on a part of the surface of the semiconductor substrate 20 in the termination region. Boron is used as the impurity of the RESURF layer 25. Phosphorus is used as an impurity in the channel stopper region 24.

  One end of the RESURF layer 25 is in contact with the side surface of the body region 27, and the other end is separated from the channel stopper region 24. The RESURF layer 25 and the channel stopper region 24 are separated by the drift region 23. The RESURF layer 25 is formed around the center region when viewed in plan. The impurity concentration of the RESURF layer 25 is lower than the impurity concentration of the body region 27.

  The channel stopper region 24 is formed around the central region along the periphery of the termination region when viewed in plan. The channel stopper region 24 is electrically connected to the channel stopper electrode 32. The channel stopper electrode 32 is fixed to the same potential as the drain electrode 21 and stabilizes the potential of the termination region. The surface of the semiconductor substrate 20 in the termination region is covered with an insulating film 34.

Next, features of the semiconductor device 10 will be described.
When the semiconductor device 10 is turned off, the depletion layer extends beyond the periphery of the RESURF layer 25 and extends over a wide range of the drift region 23. In the semiconductor device 10, the corner portion 25 a at the periphery of the RESURF layer 25 is exposed to the drift region 23, and the electric field tends to concentrate at the corner portion 25 a. For this reason, when a high surge voltage is applied to the semiconductor device 10 during the transition period in which the semiconductor device 10 is turned off, the electric field at the corner portion 25a of the RESURF layer 25 becomes strong. For this reason, an avalanche phenomenon occurs in the corner portion 25a, the charge balance of the termination region is greatly collapsed, and the depletion layer contracts toward the central region side. When the depletion layer contracts, the electric field concentrates at the corner portion 27a of the body region 27. When an avalanche phenomenon occurs at the corner portion 27 a of the body region 27, the electric field is then concentrated at the corner portion 26 a of the contact region 26. As described above, in the transition period during which the turn-off is performed, the location where the electric field concentrates changes one after another, and finally the electric field concentrates at the corner portion 26 a of the contact region 26. In particular, the corner portion 26a of the contact region 26 is a region where the impurity of the body region 27 and the impurity of the RESURF layer 25 are introduced in an overlapping manner, and the impurity concentration is high. For this reason, excessive electric field concentration tends to occur in the corner portion 26a of the contact region 26.

  In the semiconductor device 10, an insulator region 28 is provided in contact with the side surface of the contact region 26. In other words, the insulator region 28 is provided in a part of a range where the impurity of the body region 27 and the impurity of the RESURF layer 25 are introduced in an overlapping manner. When the insulator region 28 is provided, a strong electric field is applied to the insulator region 28, so that the electric field concentration at the corner portion 26a of the contact region 26 existing around the insulator region 28 is alleviated. Therefore, the occurrence of the avalanche phenomenon is suppressed at the corner portion 26a of the contact region 26. As a result, the dynamic characteristics of the semiconductor device 10 are improved.

FIG. 2 shows the relationship between the breakdown voltage of the semiconductor device 10 and the avalanche current flowing between the contact region 26 and the channel stopper region 24. FIG. 2 shows the results when the depth D28 of the insulator region 28 is 1, 2, 3, 4 μm. The width W28 of the insulator region 28 is constant at 10 μm. Here, the depth D 28 of the insulator region 28 refers to the depth from the surface of the semiconductor substrate 20. The width W28 of the insulator region 28 refers to the length from the position in contact with the side surface of the contact region 26 to the end portion on the termination region side. The body region 27 is formed with an impurity concentration of 5 × 10 ¹⁶ cm ⁻³ and has a diffusion depth of 4.5 μm. The RESURF layer 25 is formed with an impurity dose of 1 to 2.5 × 10 ¹² cm ⁻² and a diffusion depth of 3.8 to 4.6 μm. The contact region 26 is formed by further adding a dose of 5 × 10 ¹⁵ cm ^{−2 in} addition to the dose introduced when the RESURF layer 25 is formed, and the diffusion depth is 1 μm. 2 is a case where the insulator region 28 is not provided.

As shown in FIG. 2, when the depth of the insulator region 28 is 2 μm, the breakdown voltage is improved as compared with the comparative example. In addition, when the depth of the insulator region 28 is 1 μm, the breakdown voltage is equivalent to that of the comparative example.
From the above results, it can be seen that the depth of the insulator region 28 is preferably less than or equal to half the diffusion depth of the RESURF layer 25. Within this range, the effect of improving the withstand voltage can be obtained by providing the insulator region 28 as compared to the case where the insulator region 28 is not provided (comparative example).

Specific examples of the present invention have been described above in detail, but these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and changes of the specific examples illustrated above.
Further, the technical elements described in the present specification or drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the technology exemplified in this specification or the drawings can achieve a plurality of purposes at the same time, and has technical utility by achieving one of the purposes.

The principal part longitudinal cross-sectional view of the semiconductor device of an Example is shown typically. The relationship between the breakdown voltage of the semiconductor device and the avalanche current flowing between the contact region and the channel stopper region is shown. The principal part longitudinal cross-sectional view of the conventional semiconductor device is shown typically.

Explanation of symbols

20: Semiconductor substrate 21: Drain electrode 22: Drain region 23: Drift region 24: Channel stopper region 25: RESURF layer 26: Contact region 27: Body region 28: Insulator region 32: Channel stopper electrode 36: Source electrode

Claims (4)

A semiconductor device,
A central region in which the circuit elements are built, and
It has a termination area around its central area,
The central area is
A semiconductor region provided on the surface of the central region;
A contact region that is provided in the semiconductor region and contains impurities of the same conductivity type as the semiconductor region at a higher concentration than the semiconductor region;
A surface electrode electrically connected to the contact region;
A semiconductor device having a contact region disposed closest to the termination region and an insulator region provided between the termination region and in contact with a side surface of the contact region.   2. The semiconductor device according to claim 1, wherein the insulator region is provided from a position lateral to the contact region to a position deeper than the contact region. The termination region is
The RESURF layer is provided on the surface of the termination region, has one end in contact with the side surface of the semiconductor region, and contains an impurity of the same conductivity type as the semiconductor region at a lower concentration than the semiconductor region. 3. The semiconductor device according to claim 1 or 2.   4. The semiconductor device according to claim 3, wherein the insulator region is not more than half of the diffusion depth of the RESURF layer.

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