JP2008270435A - Semiconductor optical element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor optical element having a structure capable of enhancing the reverse direction ESD withstand voltage. <P>SOLUTION: In this semiconductor optical element 11, a semiconductor mesa 13 includes a first portion 13a and a second portion 13b. A first p-type embedded layer 15 is provided on the side face 13c of the first portion 13a, a first n-type embedded layer 17 is provided on the first p-type embedded layer 15, a second p-type embedded layer 19 is provided on the side face 13d of the second portion 13b, and a second n-type embedded layer 21 is provided on the second p-type embedded layer 19. The first portion 13a has the end face 11c of the semiconductor optical element 11, and the second portion 13b is adjacent to the first portion 13a. An active layer 23 e. g. has a quantum well structure. Each of the first and the second portions 13a and 13b has the active layer 23, an n-type clad region 25 and a p-type clad region 27. The p-type dopant concentration N<SB>P1</SB>of the first p-type embedded layer 15 is lower than the p-type dopant concentration N<SB>P2</SB>of the second p-type embedded layer 19. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a semiconductor optical device.

Patent Document 1 describes that the ESD breakdown voltage is improved by reducing the photon density by widening the active layer stripe width. In Patent Document 2, an active layer is separately formed in a window near the end face, and the thickness of the low concentration region is increased in the active layer.
JP-A-9-307181 Japanese Patent Laid-Open No. 20065-294640

  In Patent Document 1, the photon density by increasing the stripe width is reduced. However, no photons are generated when a reverse voltage is applied, and the photon density reduction technique by expanding the stripe width is not effective in improving the reverse ESD withstand voltage. In Patent Document 2, an active layer important for reliability is regrown. A technique that is effective for improving the reverse breakdown voltage but does not cause regrowth of the active layer is desired.

  The present invention has been made in view of the above circumstances, and an object thereof is to provide a semiconductor optical device having a structure capable of improving the ESD withstand voltage in the reverse direction.

  According to one aspect of the present invention, a semiconductor optical device includes: (a) a semiconductor mesa including first and second portions arranged in a predetermined axis direction; and (b) the first of the semiconductor mesa. A first p-type buried layer provided on a side surface of the portion; (c) a first n-type buried layer provided on the first p-type buried layer; and (d) the semiconductor. A second p-type buried layer provided on a side surface of the second portion of the mesa; and (e) a second n-type buried layer provided on the second p-type buried layer. Is provided. The first portion of the semiconductor mesa has an end face of the semiconductor optical device, and each of the first and second portions of the semiconductor mesa is between an n-type semiconductor region and a p-type semiconductor region. The first p-type buried layer has a p-type dopant concentration lower than the p-type dopant concentration of the second p-type buried layer.

  When a high voltage is applied to the semiconductor optical device in the reverse direction, a depletion layer is formed in each of the first and second p-type buried layers in the buried region according to the applied voltage. According to the semiconductor optical device, since the p-type dopant concentration of the first p-type buried layer is lower than the p-type dopant concentration of the second p-type buried layer, the depletion layer in the first portion of the semiconductor mesa Is larger than the depletion layer in the second portion of the semiconductor mesa. For this reason, the maximum electric field strength of the first portion is reduced by the action of the first p-type buried layer. Therefore, the destruction frequency of the end surface included in the first portion is reduced.

  In the semiconductor optical device according to the present invention, it is preferable that a p-type dopant concentration of the first p-type buried layer is lower than an n-type dopant concentration of the n-type semiconductor region of the semiconductor mesa.

  This reverse voltage to the semiconductor optical device is applied in the reverse direction between the first p-type buried layer in the buried region and the n-type semiconductor region in the semiconductor mesa. Since the p-type dopant concentration of the first p-type buried layer is lower than the dopant concentration of the n-type semiconductor region, the depletion layer mainly extends to the p-type semiconductor region. Due to the extension of the depletion layer, the maximum electric field strength in the vicinity of the boundary between the active layer and the n-type semiconductor region is reduced. Therefore, the fracture frequency of the end surface included in the first portion can be lowered.

  In the semiconductor optical device according to the present invention, the p-type dopant concentration of the second p-type buried layer is preferably equal to or higher than the n-type dopant concentration of the n-type semiconductor region of the semiconductor mesa. According to this semiconductor optical device, the frequency of destruction at the end face can be reduced and the device characteristics in the second portion can be maintained.

In the semiconductor optical device according to the present invention, the ratio of the first p-type buried layer p-type dopant concentration N _P1 and the second p-type concentration of p-type dopant of the buried layer N _P2 (N _P1 / N _P2 ) is preferably 0.1 or less. If it is this range, the destruction frequency of the end surface contained in a 1st part can be reduced.

In the semiconductor optical device according to the present invention, the first p-type buried layer preferably has a p-type dopant concentration of 5 × 10 ¹⁷ cm ⁻³ or less.

  In the semiconductor optical device according to the present invention, the second portion of the semiconductor mesa may include a light emitting layer for a semiconductor laser. The second portion of the semiconductor mesa may include a light absorption layer for an electroabsorption modulator. Furthermore, the second portion of the semiconductor mesa can include a light emitting layer for a semiconductor optical amplifier.

  In the semiconductor optical device according to the present invention, the length of the first portion is shorter than the length of the second portion. The lengths of the first and second portions are taken in the direction of the predetermined axis.

  In the semiconductor optical device according to the present invention, the semiconductor mesa includes a third portion having another end face of the semiconductor optical device, and the second portion includes the first portion and the third portion. It is provided in between.

  The above and other objects, features, and advantages of the present invention will become more readily apparent from the following detailed description of preferred embodiments of the present invention, which proceeds with reference to the accompanying drawings.

  As described above, according to the present invention, a semiconductor optical device having a structure capable of improving the reverse ESD withstand voltage is provided.

  The knowledge of the present invention can be easily understood by considering the following detailed description with reference to the accompanying drawings shown as examples. Subsequently, embodiments of the semiconductor optical device of the present invention will be described with reference to the accompanying drawings. Where possible, the same parts are denoted by the same reference numerals.

  FIG. 1 is a drawing schematically showing a configuration of a semiconductor optical device according to the present embodiment. The semiconductor optical device 11 has a buried heterostructure as will be understood from the following description. The semiconductor optical device 11 is an edge-emitting semiconductor device in which a semiconductor mesa for an optical waveguide structure is embedded in a pn buried region.

  The semiconductor optical device 11 has a first portion 11a, a second portion 11b, a first semiconductor end surface 11c, and a second semiconductor end surface 11d. The semiconductor optical device 11 includes a semiconductor mesa 13, a first p-type buried layer 15, a first n-type buried layer 17, a second p-type buried layer 19, and a second n-type buried layer. And embedded layer 21. The semiconductor mesa 13 includes a first portion 13a and a second portion 13b, and the first and second portions 13a and 13b are arranged in the direction of a predetermined axis Ax. The first p-type buried layer 15 is provided on the side surface 13 c of the first portion 13 a of the semiconductor mesa 13. The first n-type buried layer 17 is provided on the first p-type buried layer 15. The second p-type buried layer 19 is provided on the side surface 13 d of the second portion 13 b of the semiconductor mesa 13. The second n-type buried layer 21 is provided on the second p-type buried layer 19.

A p-type dopant is added to the first p-type buried layer 15, and a p-type dopant is added to the second p-type buried layer 19. As the p-type dopant, for example, zinc or carbon can be used. An n-type dopant is added to the first n-type buried layer 17, and an n-type dopant is added to the second n-type buried layer 21. For example, silicon can be used as the n-type dopant. The first portion 13a has an end face 11c of the semiconductor optical device 11, and the second portion 13b is adjacent to the first portion 13a. Each of the first and second portions 13 a and 13 b has an active layer 23. The active layer 23 has a quantum well structure, for example. The active layer 23 is provided between the n-type semiconductor region 25 and the p-type semiconductor region 27. Each of the first and second portions 13a and 13b includes an n-type semiconductor region 25 and a p-type semiconductor region 27, which are, for example, cladding layers. The p-type dopant concentration N _P1 of the first p-type buried layer 15 is lower than the p-type dopant concentration N _P2 of the second p-type buried layer 19.

When a high voltage V _R is applied in the opposite direction to the semiconductor optical device 11, pn junction 31a and between the n-type semiconductor region 25 of the first p-type buried layer 15 and the semiconductor mesa 13 of buried region The pn junction 31b between the second p-type buried layer 21 and the n-type semiconductor region 25 of the semiconductor mesa 13 is applied in the reverse direction. A depletion layer is formed at the pn junctions 31a and 31b between the first and second p-type buried layers 15 and 19 in the buried region and the n-type semiconductor region 25 according to the applied voltage value. According to the semiconductor optical device 11, the p-type dopant concentration N _{P1 of} the first p-type buried layer 15 is lower than the p-type dopant concentration N _{P2 of} the second p-type buried layer 19. The extension amount of the depletion layer in the n-type semiconductor region 25 of the first portion 13 a is larger than the extension amount of the depletion layer in the n-type semiconductor region 25 of the second portion 13 b of the semiconductor mesa 13. For this reason, the maximum electric field strength in the first portion 13a having the end face 11c is reduced by the action of the first p-type buried layer 15. Therefore, the destruction frequency of the end surface 11c included in the first portion 13a is reduced.

  The semiconductor optical device 11 includes a conductive semiconductor substrate 35, and the conductivity type of the conductive semiconductor substrate 35 is matched to the conductivity type of the lower clad of the semiconductor mesa 13 (in this embodiment, the n-type semiconductor region 25). The As the conductive semiconductor substrate 35, a III-V compound semiconductor substrate such as InP or GaAs can be used. The semiconductor optical device 11 can include an upper clad (for example, a p-type clad layer) 37 provided on the semiconductor mesa 13 and the buried regions 29a and 29b. A contact layer (for example, a p-type contact layer) 39 is provided on the upper clad 37. On the contact layer 39, an insulating film 41 having an opening provided on the second portion 13b of the semiconductor mesa 13 is provided. On the insulating film 41, a first electrode 43, for example, an anode is formed. The first electrode 43 is bonded to the contact layer 39 through the opening of the insulating film 41. A second electrode 45, for example, a cathode is formed on the back surface 35 b of the conductive semiconductor substrate 35.

In the semiconductor optical device 11, the p-type dopant concentration N _P1 of the first p-type buried layer 15 is preferably lower than the n-type dopant concentration N _N0 of the n-type semiconductor region 25 of the semiconductor mesa 13.

Reverse voltage V _R to the semiconductor optical device is mainly applied to the pn junction 31a, 31b between the n-type semiconductor region 25 of the first p-type buried layer 15 and the semiconductor mesa 13 of buried region A depletion layer is formed in the pn junctions 31a and 31b. Since the p-type dopant concentration N _{P1 of} the first p-type buried layer 15 is lower than the dopant concentration N _N1 of the n-type semiconductor region 25, the depletion layer mainly extends to the p-type semiconductor region 15. Due to the extension of the depletion layer, the maximum electric field strength in the vicinity of the boundary between the active layer 23 and the n-type semiconductor region 25 is reduced. Therefore, the fracture frequency of the end surface included in the first portion can be lowered.

Next, details of this embodiment will be described. In the semiconductor optical device 11, the p-type dopant concentration N _P2 of the second p-type buried layer is preferably equal to or higher than the n-type dopant concentration N _N0 of the n-type semiconductor region 25 of the semiconductor mesa 13. According to this semiconductor optical device 11, the frequency of destruction at the end face 11c can be reduced and the device characteristics at the second portion 11b can be maintained.

In the semiconductor optical device 11, the ratio between the concentration _{N P2} of p-type dopant of the p-type dopant concentration _{N P1} and the second p-type buried layer 19 of the first p-type buried layer 15 _(N P1 _/ N _P2) Is preferably 0.1 or less. If it is this range, the destruction frequency of the end surface contained in a 1st part can be reduced.

In the semiconductor optical device 11, the p-type dopant concentration N _P1 of the first p-type buried layer 15 is preferably 5 × 10 ¹⁷ cm ⁻³ or less. The p-type dopant concentration N _P1 of the first p-type buried layer 15 is preferably 1 × 10 ¹⁶ cm ⁻³ or more. The n-type dopant concentration N _N1 of the first n-type buried layer 17 is preferably 5 × 10 ¹⁸ cm ⁻³ or less, and preferably 1 × 10 ¹⁶ cm ⁻³ or more.

P-type dopant concentration _{N P2} of the second p-type buried layer 19 is preferably not more than 5 × ¹⁰ 18 ^{cm -3} and preferably, also 5 × ¹⁰ 17 ^{cm -3} or more. The n-type dopant concentration N _N2 of the second n-type buried layer 21 is preferably 5 × 10 ¹⁸ cm ⁻³ or less, and preferably 5 × 10 ¹⁷ cm ⁻³ or more.

In the semiconductor optical device 11, the length L _D1 of the first portion 11a is shorter than the length L _D2 of the second portion 11b in the direction of the predetermined axis. The length L _D1 of the first portion 11a is preferably, for example, 5 micrometers or more.

  The semiconductor optical device 11 can further include a third portion 11e including the other end surface 11d, and the second portion 11b is provided between the first portion 11a and the second portion 11b. The semiconductor mesa 13 can include a third portion having the other end surface 11 d of the semiconductor optical element 11.

  In the semiconductor optical device 11, the second portion 13b of the semiconductor mesa 13 can include a light emitting layer for a semiconductor laser. The second portion 13b can include a light absorption layer for the electroabsorption modulator. Further, the second portion 13b can include a light emitting layer for a semiconductor optical amplifier. That is, examples of the semiconductor optical device 11 include a Fabry-Perot semiconductor laser, a DFB semiconductor laser, an electroabsorption modulation device, and a semiconductor optical amplification device. Alternatively, the semiconductor optical device 11 can be a composite device or an integrated device thereof.

  When changing this concentration, since the n-type semiconductor region 25 is a region in the semiconductor mesa 13, it is necessary to review the thickness, dopant concentration, etc. in the epitaxial layer structure for the semiconductor optical device in order to match the device characteristics. It is. On the other hand, since the dopant concentration of the p-type buried layer in the buried region is not directly and closely related to the device characteristics, it is changed compared to the change of the epitaxial layer structure for the semiconductor optical device. There is room for consideration.

  Until now, the p-type dopant concentration of the p-type buried layer formed on the semiconductor mesa in the buried region has been set large. This is because the operation of the thyristor composed of the p-clad, the n-type clad, and the pn buried region sandwiched between them is suppressed. That is, even in the semiconductor layer in the buried region, the influence on the characteristics of the semiconductor optical device is not zero. For these reasons, in semiconductor optical devices such as semiconductor lasers, semiconductor modulation devices, and semiconductor optical amplification devices, the dopant concentration of the semiconductor layer in the buried region is not greatly changed.

  As understood from the above description and the subsequent description in the present embodiment, the dopant concentration of the semiconductor layer in the buried region is effective in improving the electrostatic withstand voltage of the semiconductor optical device. Therefore, it is required to satisfy both the original device characteristics of the semiconductor optical device and the electrostatic withstand voltage of the semiconductor optical device that has been desired to be improved. The semiconductor optical device according to the present embodiment gives an answer to this coexistence.

FIG. 2 is a drawing showing the electric field strength calculation results of the semiconductor mesa and the buried region in the vicinity of the end face of the semiconductor optical device. FIG. 2A shows a simulation model. Using this model, a position 0.7 μm away from the edge of the semiconductor mesa (position indicated by the arrow “CENT”) and 0.1 μm from the edge of the semiconductor mesa. Electric field calculation was performed at a distant position (position indicated by an arrow “EDGE”). FIG. 2B shows the structure of the active layer in the simulation model. In the simulation model, the n-type dopant concentration in the n-type buried region (n-InP) is 1 × 10 ¹⁸ cm ⁻³ , and the p-type dopant concentration in the p-type buried region (p-InP) is 1 × 10 6. ¹⁹ cm ⁻³ , 1 × 10 ¹⁸ cm ⁻³ , 1 × 10 ¹⁷ cm ⁻³ , 1 × 10 ¹⁶ cm ⁻³ . The n dopant concentration in the n-type region (cladding) is 1 × 10 ¹⁸ cm ⁻³ , and the p dopant concentration in the p-type region (cladding) is 1 × 10 ¹⁸ cm ⁻³ . The active layer has a thickness _DACT of 200 nm, a quantum well structure comprising nine 5 nm GaInAsP well layers and eight 10 nm GaInAsP barrier layers, and 37.5 nm GaInAsP provided on both sides of the quantum well structure. -SCH layer. W _MESA = 0.7 μm, W _P1 = 0.1 μm, D _P1 = 1.04 μm, and D _N1 = 1.19 μm.

  In FIG. 2 (a), three pn junctions PN1, PN2, and PN3 are shown. When a reverse ESD test voltage is applied to the semiconductor optical device, the pn junctions PN1 and PN3 receive the reverse voltage, Depletion layers are formed at the pn junctions PN1 and PN3. In relation to the semiconductor mesa, the depletion layer extending to the pn junction PN3 is related to the ESD breakdown voltage. A depletion layer is also formed in the active layer.

FIG. 2C is a diagram illustrating an example of a simulation result at the “CENT” position. The horizontal axis is the electric field strength, and the vertical axis is the coordinate. The applied voltage is -2 volts. The electric field strengths E _C1 , E _C2 , E _C3 , and E _{C4 at the} “CENT” position are substantially independent of the p-type dopant concentration in the p-type buried region (p-InP). FIG. 2D shows an example of a simulation result at the “EDGE” position. The horizontal axis is the electric field strength, and the vertical axis is the coordinate. The electric field strengths E _E1 , E _E2 , E _E3 , and E _{E4 at the} “EDGE” position depend on the p-type dopant concentration in the p-type buried region (p-InP). As the p-type dopant concentration increases, the electric field strength near the boundary between the n-type cladding layer and the active layer increases, and the electric field strength near the boundary between the n-type cladding and the active layer increases. The difference with the electric field strength in the vicinity of the boundary becomes larger.

  FIG. 3 is a diagram showing the behavior of the maximum electric field strength in the direction from the center to the edge of the semiconductor mesa. That is, the maximum electric field strength decreases as the p-type dopant concentration decreases. As the dopant concentration decreases, the depletion layer spreads larger, resulting in a reduction in maximum field strength. This spreading of the depletion layer helps to loosen the bending of the electric lines of force in the vicinity of the boundary between the low carrier concentration active layer, the n-type cladding and the p buried layer. For this reason, a structure is provided in which a local strong electric field is not generated when electrostatic discharge occurs. Therefore, the ESD withstand voltage in the reverse direction of the semiconductor optical device is improved.

  FIG. 4 is a drawing showing the results of an example of an electrostatic breakdown test performed using a human body model (HBM). The HBM simulates electric discharge from the human body. For this test, the following semiconductor laser samples were used. The structure of the sample is that a single p-type buried layer and a single n-type buried layer are provided over the side surface of the semiconductor mesa of the semiconductor laser. Different from the device structure. Considering that electrostatic breakdown in the reverse direction occurs in the vicinity of the end face, it is considered that an appropriate test result of electrostatic breakdown in the reverse direction can be obtained from an electrostatic breakdown test using a semiconductor laser having this structure. That is, all of the semiconductor lasers have the same structure as the buried region in the first portion 11a of the semiconductor optical device.

In FIG. 4A and FIG. 4B, the horizontal axis is the reverse direction applied voltage, and this voltage is the charging voltage in the discharging capacitor. The vertical axis represents the number of samples destroyed in the electrostatic test at the applied voltage. As an example, the test results of N _P1 = 1 × 10 ¹⁸ cm ⁻³ and 0.9 × 10 ¹⁸ cm ⁻³ were shown. Referring to FIG. 4A, most of the samples are destroyed at a charging voltage of 1 kV or higher. In view of the frequency of occurrence, the breakdown at a charge voltage of 0.3 kV is presumed to be accidental due to other factors, not inherently due to the structure of the semiconductor optical device. Referring to FIG. 4B, all samples are destroyed at a charging voltage of 0.8 kV or less. Comparing both results, it is effective to reduce the p-type dopant concentration of the p-type buried layer in the buried region in order to improve the reverse breakdown voltage.

Next, a method for manufacturing a semiconductor optical device according to the present embodiment will be described with reference to FIGS. 5, 6, and 7. Referring to FIG. 5A, an n-type InP cladding layer 53, an active layer 55, and a p-type InP cladding layer 57 are grown on an n-type InP substrate 51 by metal organic vapor phase epitaxy to form a semiconductor stack 59. . The active layer 55 has a multiple quantum well structure as described in the simulation model. As the structure of the active layer 55, a structure suitable for a semiconductor optical device can be used. As shown in FIG. 5B, a first insulator mask 61 is formed on the semiconductor stack 59. With the insulator mask 61, as shown in FIG. 5C, a semiconductor mesa 63a for the end face portion of the semiconductor optical device is formed by etching. As shown in FIG. 6A, using this insulating film mask 61, a buried region 65 for the end face portion of the semiconductor optical device is grown. Buried region 65 includes a p-type InP buried layer 65a grown on semiconductor mesa 63a and an n-type InP buried layer 65b grown on p-type InP buried layer 65a. The dopant concentration of the p-type InP buried layer 65a is changed. Next, after the insulating film mask 61 is removed, a second insulator mask 67 is formed on the semiconductor stacked layer 59 and the buried region 65 as shown in FIG. 6B. Then, the semiconductor mesa 63b for the device portion of the semiconductor optical element is formed by etching with the insulator mask 67. As shown in FIG. 6C, using this insulating film mask 67, a buried region 69 for the device portion of the semiconductor optical device is grown. Buried region 69 includes a p-type InP buried layer 69a grown on semiconductor mesa 63b and an n-type InP buried layer 69b grown on p-type InP buried layer 69a. The manufacturing conditions of the buried region 69 are not changed when not necessary. Next, after removing the insulating film mask 67, as shown in FIGS. 7A and 7B, a p-type InP clad layer 71 is grown, and a p-type contact is formed on the p-type InP clad layer 71. Grow layers. As shown in FIGS. 7C and 7D, an SiO ₂ film 73 having an opening is formed on the semiconductor mesa 63b. An anode electrode 77 a is formed on the SiO ₂ film 75 and a cathode electrode 77 b is formed on the back surface of the substrate 51.

  According to the semiconductor optical device according to the present embodiment, the reverse ESD breakdown voltage can be improved without changing the quantum well structure. For this reason, the conventional device characteristics and device reliability are not substantially changed, and problems relating to these are not caused. Also, the structure of the semiconductor optical device according to the present embodiment can be used when a semiconductor optical device is newly designed. Although there is a possibility that the high temperature characteristics of the optical element may be lowered by lowering the dopant concentration of the p-type buried layer in the buried region, in order to improve the electrostatic withstand voltage, the window portion near the end face must be changed. Therefore, it is unlikely that the characteristics of the optical element will be significantly changed.

  For these reasons, the semiconductor optical device according to the present embodiment also has substantially the same electrical characteristics and reliability, and the reverse ESD resistance is improved. The structure according to the present embodiment is not limited to a GaInAsP / InP-based buried heterostructure semiconductor optical device, but also an AlGaInAs / InP-based buried heterostructure semiconductor optical device, an AlGaAs / GaAs-based buried heterostructure semiconductor optical device, and a GaInNAs / The present invention is also applied to a GaAs-based buried heterostructure semiconductor optical device or the like. These are merely examples, and it is understood from the description in the present embodiment that the same technical effect can be obtained in the buried structure semiconductor optical device.

  While the principles of the invention have been illustrated and described in the preferred embodiments, it will be appreciated by those skilled in the art that the invention can be modified in arrangement and detail without departing from such principles. In this embodiment, for example, a Fabry-Perot semiconductor laser has been described as an example, but the present invention is not limited to the specific configuration disclosed in this embodiment. In this embodiment, a semiconductor optical device using an n-type III-V compound semiconductor substrate such as an n-type InP substrate is described as an example, but a p-type III-V compound semiconductor substrate can also be used. We therefore claim all modifications and changes that come within the scope and spirit of the following claims.

  In the conventional structure, the impurity concentration of the n-type cladding layer in the semiconductor mesa is lower than the impurity concentration of the p-type buried layer. Therefore, the depletion layer due to the reverse ESD voltage spreads to the n-type cladding layer of the semiconductor mesa, and as a result, the electric field in the n-type cladding layer of the MQW active layer in the semiconductor mesa tends to increase. As understood from the description of the embodiment, the impurity concentration of the first p-type buried layer is adjusted, and the electric field distribution in the vicinity of the mesa of the MQW active layer is lower than the impurity concentration of the n-type cladding layer. Let With this structure, the change in the electric field distribution in the active layer in the vicinity of the semiconductor mesa can be reduced, and as a result, the reverse ESD withstand voltage can be improved.

FIG. 1 is a drawing schematically showing a configuration of a semiconductor optical device according to the present embodiment. FIG. 2 is a drawing showing the electric field strength calculation results of the semiconductor mesa and the buried region in the vicinity of the end face of the semiconductor optical device. FIG. 3 is a diagram showing the behavior of the maximum electric field strength in the direction from the center to the edge of the semiconductor mesa. FIG. 4 is a drawing showing the results of an example of an electrostatic breakdown test performed using a human body model (HBM). FIG. 5 is a drawing showing main steps for manufacturing a semiconductor optical device according to the present embodiment. FIG. 6 is a drawing showing main steps for manufacturing a semiconductor optical device according to the present embodiment. FIG. 7 is a drawing showing main steps for manufacturing a semiconductor optical device according to the present embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 ... Semiconductor optical element, 11a ... 1st part of semiconductor optical element, 11b ... 2nd part of semiconductor optical element, 11c, 11d ... Semiconductor element end surface, 13 ... Semiconductor mesa, 13a ... 1st part of semiconductor mesa , 13b ... second part of semiconductor mesa, 15 ... first p-type buried layer, 17 ... first n-type buried layer, 19 ... second p-type buried layer, 21 ... second n Type buried layer, 23... Active layer, 25... N type semiconductor region, 27... P type semiconductor region, 29 a, 29 b... Buried region, 31 a, 31 b. Layer, 39 ... contact layer, 41 ... insulating film, 43 ... first electrode, 45 ... second electrode, N _P1 ... p-type dopant concentration in the first p-type buried layer, N _P2 ... second p the concentration of p-type dopant type buried layer, n-type dopant concentration of n _{N0 ...} n-type semiconductor region, _{N1 ...} n-type dopant concentration of the first n-type buried layer, N _{N2 ...} n-type dopant concentration of the second n-type buried layer, L _{D1 ...} length of the first portion, L _{D2 ...} second Length of part, 51 ... n-type InP substrate, 53 ... n-type InP clad layer, 55 ... active layer, 57 ... p-type InP clad layer, 59 ... semiconductor laminate, 61 ... first insulator mask, 63a ... semiconductor Mesa, 63b ... semiconductor mesa, 65 ... buried region, 65a ... p-type InP buried layer, 65b ... n-type InP buried layer, 67 ... second insulator mask, 69 ... buried region, 69a ... p-type InP buried layer, 69b ... n-type InP buried layer, 71 ... p-type InP cladding layer, 73 ... contact layer, 75 ... SiO ₂ film, 77a ... anode electrode, 77b ... cathode electrode

Claims (4)

A semiconductor mesa including first and second portions arranged in a direction of a predetermined axis;
A first p-type buried layer provided on a side surface of the first portion of the semiconductor mesa;
A first n-type buried layer provided on the first p-type buried layer;
A second p-type buried layer provided on a side surface of the second portion of the semiconductor mesa;
A second n-type buried layer provided on the second p-type buried layer,
The first portion of the semiconductor mesa has an end face of the semiconductor optical device;
Each of the first and second portions of the semiconductor mesa has an active layer provided between an n-type semiconductor region and a p-type semiconductor region,
The p-type dopant concentration of the first p-type buried layer is lower than the p-type dopant concentration of the second p-type buried layer.   2. The semiconductor optical device according to claim 1, wherein a p-type dopant concentration of the first p-type buried layer is lower than an n-type dopant concentration of the n-type semiconductor region of the semiconductor mesa.   3. The semiconductor optical device according to claim 2, wherein a p-type dopant concentration of the second p-type buried layer is equal to or higher than an n-type dopant concentration of the n-type semiconductor region of the semiconductor mesa. 4. The semiconductor light according to claim 1, wherein a p-type dopant concentration of the first p-type buried layer is 5 × 10 ¹⁷ cm ⁻³ or less. 5. element.

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