JP2008108905A - Semiconductor light-emitting element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a light emitting element which comprises a current diffusing wiring capable of enhancing light emission intensity. <P>SOLUTION: A semiconductor light emitting element 10 comprises a semiconductor laminate 13 in which a first conductive type semiconductor layer 14 and a second conductive type semiconductor layer 18 are stacked, a first electrode 30 which is electrically connected to the first conductive type semiconductor layer 14, and a second electrode 32 formed on the upper surface side of the second conductive type semiconductor layer 18. A current diffusing wiring 26 is formed on the upper surface side of the second conductive type semiconductor layer 18. The current diffusing wiring has at least three layers stacked: a reflecting layer 34 made from a metal material whose reflectivity is higher than copper, a low resistance layer 36 of copper, and a protective layer 38 made from a metal material which is better than copper in anti-oxidation nature. The current diffusing wiring 26 is electrically connected to the second electrode 32, and the side surface of the low resistance layer 36 is covered with the protective layer 38. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor light emitting device, and more particularly to an electrode structure formed on the surface of a semiconductor light emitting device.

  In the nitride semiconductor light emitting device, since the sheet resistance of the p-type semiconductor layer is large, there is a strong tendency for current to flow unevenly in a range where the distance between the p-side electrode and the n-side electrode is relatively short. For this reason, only a region in which a current flows emits light, and a non-uniform light emission pattern in which other regions do not emit light. In order to suppress such non-uniform light emission, a translucent current diffusion layer is formed on the surface of the p-type semiconductor layer, and current is also applied to a region where the separation distance between the p-side electrode and the n-side electrode is long. Semiconductor light-emitting elements that are easy to flow are known (see, for example, Patent Documents 1 to 5). As the current diffusion layer, a conductive oxide film or an extremely thin metal film has been used.

When the semiconductor light emitting device has a large area, sufficient current diffusion cannot be performed only with the current diffusion layer. Therefore, in order to further reinforce the current diffusion, it is known to form a current diffusion wiring that is not translucent or has low translucency on the translucent current diffusion layer (for example, Patent Documents). 6-8).
JP 2005-340797 A JP 2006-013474 A JP 2006-013475 A JP 2006-074019 A JP 2004-179347 A JP 2005-317931 A Japanese Patent Laid-Open No. 2006-024913 JP 2004-056109 A

Even if a current is widely diffused by the above-described current diffusion wiring and light is emitted in a wide range, the wiring blocks light emission. In order to increase the light extraction efficiency from the light emitting element, it is effective to reduce the width of the wiring and reduce the light shielding area, but on the other hand, the resistance of the wiring becomes high and the function of current diffusion decreases, The current flowing through the active layer is reduced, resulting in a problem that the light emission amount is reduced.
In order to increase the light emission intensity from the light emitting element, it is necessary to improve the light extraction efficiency while maintaining the light emission amount in the active layer.

  In view of the above, an object of the present invention is to provide a light-emitting element having a current diffusion wiring capable of increasing light emission intensity.

  The present invention provides a semiconductor stacked body in which a first conductive semiconductor layer and a second conductive semiconductor layer are sequentially stacked on a substrate, a part of the semiconductor layer is cut off, and the first layer is formed on the upper surface side of the semiconductor layer. An exposed portion exposing the conductive semiconductor layer; a first electrode electrically connected to the first conductive semiconductor layer of the exposed portion; a second electrode electrically connected to the second conductive semiconductor layer; A reflective layer made of a metal material having a higher reflectance than copper on either the upper surface side of the cut portion or the upper surface side of the second conductive type semiconductor, A first current diffusion wiring is formed by laminating at least three layers of a low resistance layer and a protective layer made of a metal material having better oxidation resistance than copper, and the first current diffusion wiring is formed. Is electrically connected to either the first electrode or the second electrode. Cage, side of the low resistance layer is characterized by being covered by the protective layer.

  According to the present invention, since the current spreading wiring includes the low resistance layer made of copper, the sheet resistance of the current spreading wiring can be effectively reduced. Therefore, the width of the current diffusion wiring can be made narrower than before while suppressing an increase in electrical resistance. In the present invention, the side surface of the low-resistance layer is covered with a protective layer, so that the copper of the low-resistance layer does not oxidize or migrate. Made it possible to use without causing migration problems.

  Since the light emitting element having the current spreading wiring of the present invention can improve the light extraction efficiency while maintaining the light emission amount in the active layer, the light emission intensity from the light emitting element can be increased.

<Embodiment 1>
In the semiconductor light emitting device 10 shown in FIGS. 1 and 2, an n-type semiconductor layer 14, an active layer 16, and a p-type are provided on a substrate 12, optionally through one or more layers (not shown) such as a buffer layer. A semiconductor stacked body 13 in which the semiconductor layers 18 are stacked in this order is formed. The semiconductor stacked body 13 is partially removed, and the n-type semiconductor layer 14 is exposed therefrom. Such an exposed portion 28 can be formed in any number and in any number, but in the example of FIG. 1, two exposed portions 28 are formed at an inner position away from the edge of the light emitting element 10. Has been.

In the light emitting element 10 of the present embodiment, the translucent electrode 24 is formed over almost the entire main surface of the p-type semiconductor layer 18. A p-side electrode 32 and a p-side current diffusion wiring 26 (hereinafter referred to as p-side wiring 26) are formed on the translucent electrode 24. In the present embodiment, a total of four p-side wirings 26 are formed, including three p-side wirings 26 along three edges of the light-emitting element 10 and one passing through the center line of the light-emitting element 10. All the p-side wirings 26 are electrically connected, and when a current is applied to one place, a current flows through the whole. As described above, the configuration including the p-side wiring 26 extending not only at the edge of the light emitting element 10 but also inside the light emitting element is suitable for the light emitting element 10 having a large size (for example, one side of 600 to 1000 μm). It is a configuration.
In the present embodiment, by providing a translucent electrode 24 that assists current diffusion between the p-type semiconductor layer 18 and the p-side wiring 26, current diffusion compared to a light-emitting element having only the p-side wiring. Can increase the sex. In addition, when the adhesiveness between the translucent electrode 24 and the p-side wiring 26 is low, the adhesiveness can be increased by interposing an adhesive layer.

  As shown in FIGS. 3A to 3C, the p-side wiring 26 is composed of a laminated body of three metal films. On the upper side of the translucent electrode 24, a reflective layer 34 made of a highly reflective metal material, a low resistance layer 36 made of copper having a low electrical resistance, and a protective layer 38 made of a metal material having excellent oxidation resistance. They are stacked in order.

  The reflection layer 34 is formed to improve the light extraction efficiency of the light emitting element 10 by reflecting light to the semiconductor layer without absorbing the light emitted from the active layer 16 by the p-side wiring 26. Is done. The reflectance of the material forming this reflective layer is required to be at least higher than that of copper. Moreover, since the reflective layer 34 is directly formed on the upper surface of the translucent electrode 24, it is preferable to form the reflective layer 34 from a material having good adhesion to the translucent electrode 24. Furthermore, since the low resistance layer 36 laminated on the upper side of the reflective layer 34 is a copper thin film, it is more preferable to select a material in consideration of adhesion with copper. Examples of the material having good adhesion to the translucent electrode include Ti and Rh, and examples of the material having good adhesion to copper include Ta, TiN, and Ti.

The low resistance layer 36 is formed from a copper thin film. By providing the low resistance layer 36, the sheet resistance of the p-side wiring 26 is lowered, so that the width of the p-side wiring 26 can be made narrower than before while suppressing the resistance of the p-side wiring 26. In particular, since copper is a material having a high electrical conductivity among metal materials, there is an advantage that sheet resistance can be suppressed even when a thin film is used. Therefore, the thickness of the entire wiring can be suppressed while reducing the resistance of the p-side wiring 26, which is advantageous in patterning the wiring. In addition, copper is cheaper than other high-conductivity materials (such as gold and silver), and the cost of the light-emitting element can be reduced.
As described above, copper is a material suitable for the low-resistance layer 36, but has the disadvantages that electrical characteristics deteriorate due to oxidation by oxygen in the air, and migration is likely to occur due to the influence of an electric field. . Therefore, even if there was a thought that copper could be used for an electrode of a light emitting element, there was no example actually used. In the present invention, even if a copper thin film is used for the low resistance layer 36, the lower surface side of the low resistance layer 36 is protected by the reflective layer 34 and the upper surface side is protected by the protective film 38 so that oxidation and migration do not occur. Further, the side surfaces are completely covered with the protective film 38. This makes it possible to use the copper without causing oxidation and migration problems while taking advantage of the electrical characteristics of copper having high conductivity.

  The protective layer 38 completely shields the low-resistance layer 36 made of a copper thin film from the external environment and prevents oxidation and migration. Therefore, it is necessary to form the protective layer 38 from a material having at least oxidation resistance higher than that of copper. is there. Moreover, since it is necessary to adhere to the low resistance layer 36, it is preferable to select a material having excellent adhesion to copper.

3A to 3C show modified examples of the laminated structure of the p-side wiring 26. In either case, it can be seen that the side of the low-resistance layer 36 is covered and completely protected from the outside.
The p-side wiring 26 in FIG. 3A has a laminated structure of a low resistance layer 36 and a protective layer 38 on the reflective layer 34, and the side surface of the reflective layer 34 is exposed. This form is suitable when the metal material used for the reflective layer 36 is excellent in oxidation resistance and hardly undergoes migration, and the light extraction efficiency is good even if the metal material used for the protective film 38 has a low reflectance. There is an advantage that does not affect.
The p-side wiring 26 in FIG. 3B has a structure in which a reflective layer 34 and a low-resistance layer 36 are stacked and the side surfaces of both layers are covered with a protective layer 38. This form is suitable when the metal material used for the reflective layer 36 is easily oxidized or migrated.
The p-side wiring 26 in FIG. 3C has a structure in which the upper surface and side surfaces of the reflective layer 34 are covered with a low resistance layer 36 and the upper surface and side surfaces of the low resistance layer 26 are covered with a protective layer 38. This configuration is most suitable for reducing the resistance of the p-side wiring 26 because the occupation ratio of the cross-sectional area of the low-resistance layer 36 can be increased when forming the wiring 26 having a very narrow width.

  In order to form the p-side wiring 26 having the configuration as shown in FIGS. 3A to 3C, a conventionally known thin film forming method can be used. For example, a sputtering method is suitable. In the case of forming by sputtering, a metal film having a desired shape can be formed using a mask. Therefore, the p-side wiring 26 having a desired structure can be formed using a mask suitable for the shapes of the reflective layer 34, the low resistance layer 36, and the protective layer 38.

In the light emitting element 10 of the present embodiment shown in FIG. 1, two p-side electrodes 32 are formed at the corners and are electrically connected to a part of the p-side wiring 26. The p-side electrode 32 and the p-side wiring 26 may be formed separately and connected later. However, forming the p-side electrode 32 and the p-side wiring 26 at the same time is preferable because the manufacturing process can be reduced as compared with the case where they are formed integrally. .
The p-side electrode 32 is a surface layer (on the protective layer 38 in the present embodiment) that takes into account the thickness setting sufficient to withstand the impact during wire bonding and the adhesion to the conductive wire used for wire bonding. (Corresponding) material determination is necessary. Therefore, when the p-side electrode 32 and the p-side wiring 26 are formed simultaneously, it is preferable to appropriately select the thickness of the p-side wiring 26 and the material of the protective layer 38.

  In the present embodiment, an n-side current diffusion wiring 22 (hereinafter referred to as an n-side wiring 22) is also formed on the upper surface of the n-side semiconductor layer 14 exposed from the exposed portion 28. The n-side wiring 22 is suitable for the light-emitting element 10 having a large size, and assists current diffusion by the p-side wiring 26 to enable light emission in a wide range. On the other hand, when the n-side wiring 22 is applied to the light-emitting element 10 having a small area, the area of the active layer is reduced due to the increase in the area of the exposed portion 28 and the n-side wiring 22 is compared with the increase in the light-emitting area due to current diffusion. There is a case where the amount of decrease in extracted light due to the influence of light shielding by becomes large. Therefore, the n-side wiring 22 is preferably applied when the amount of light emission increases in relation to the area of the light emitting element 10.

  The p-side wiring 26 and the n-side wiring 22 are formed to promote current diffusion. Therefore, the shape and arrangement should be determined so that local current concentration does not occur. For example, as shown in FIG. 1, if the p-side wiring 26 and the n-side wiring 22 are formed in parallel, the separation distance can be prevented from being locally shortened. Further, when the p-side electrode 32 and the n-side electrode 30 are adjacent to the p-side wiring 26 and the n-side wiring 22, the p-side wiring 26 and the n-side wiring 22 are considered in consideration of the distance between the electrode and the wiring. Is preferably determined.

In the case where the n-side electrode 30 and the n-side wiring 22 are formed, the exposed portion 28 exposing the n-type semiconductor layer 14 includes a circular portion for forming the n-side electrode 30 and n as shown in FIG. It is formed into a planar shape that combines a linear portion for forming the side wiring 22.
The n-side semiconductor layer 14 and the n-side wiring 22 can also be formed in direct contact with each other. In order to make direct contact, the reflective layer 34 of the n-side wiring 22 needs to be formed of a metal material that can make ohmic contact with the n-side semiconductor layer 14 and has a high reflectance required for the reflective layer 34. However, it is preferable to select the material used for the reflective layer 34 by giving priority to high reflectivity over whether or not ohmic contact is possible. If the reflective layer 34 cannot make ohmic contact with the n-type semiconductor layer 14, it is sufficient to form an ohmic contact layer 20 between the n-type semiconductor layer 14 and the reflective layer 34. The ohmic contact layer 20 not only can make ohmic contact with the n-type semiconductor layer 14, but also preferably has good adhesion with the reflective layer 34, and an effect of preventing the n-side wiring 22 from being peeled off can be expected.
In addition, when the adhesiveness between the ohmic contact layer 20 and the n-side wiring 22 is low, the adhesiveness can be increased by interposing an adhesive layer.

The n-side electrode 30 and the n-side wiring 22 are preferably formed integrally at the same time, which is preferable because the manufacturing process can be reduced.
The n-side electrode 30 is a surface layer (on the protective layer 38 in the present embodiment) that takes into account the thickness setting sufficient to withstand the shock during wire bonding and the adhesion to the conductive wire used for wire bonding. (Corresponding) material determination is necessary. Therefore, when the n-side electrode 30 and the n-side wiring 22 are formed simultaneously, it is preferable to appropriately select the thickness of the n-side wiring 22 and the material of the protective layer 38.

  In the light emitting element 10 of the present invention, the p-side wiring 26 and the n-side wiring 22 are common in that the low resistance layer 36 is a copper thin film, but different materials are used for the reflective layer 34 and the protective layer 38. can do. However, if the reflecting layer 34 made of the same material and the protective layer 38 made of the same material are made of wirings having the same structure, the wirings 22 and 26 can be formed simultaneously, and the electric resistance of the two wirings 22 and 26 can be formed simultaneously. Is preferable because the balance can be made equal.

In the present embodiment, the p-side wiring 26 is formed on the upper surface of the p-type semiconductor layer 18, and the n-side wiring 22 is formed on the upper surface of the exposed portion 28 (that is, the n-side semiconductor layer 14). The present invention also includes a form in which only one of the wirings is formed.
Further, the semiconductor stacked body 13 of the present embodiment is stacked in the order of the n-type semiconductor layer 14, the active layer 16, and the p-type semiconductor layer 18 from the substrate 12 side, but the present invention is not limited to this, and the substrate A form in which the p-type semiconductor layer 18, the active layer 16, and the n-type semiconductor layer 14 are stacked in this order from the 12th side can also be preferably used. In that case, the formation positions of the p-side electrode 32 and the p-side wiring 26 and the n-side electrode 30 and the n-side wiring 22 are exchanged.

Below, each structural member is explained in full detail.
(P-side wiring 26, n-side wiring 22)
The p-side wiring 26 and the n-side wiring 22 are formed to diffuse current more efficiently and promote uniformization of the light emission profile of the semiconductor light emitting device 10 and increase in light emission intensity. The shape of 26 should be variously changed according to the size and shape of the semiconductor light emitting device 10. In FIG. 1, although it is made into the linear shape, it can also be made into a curve. In addition to the form formed from a single line wiring such as the n-side wiring 22 in FIG. 1 and the form formed from branched line wirings such as the p-side wiring 26, various linear wirings may be used. They can be formed in combination.
The p-side wiring 26 and the n-side wiring 22 of the present invention are preferably formed in a narrow line shape so as not to block light emission. Since the light-emitting element of the present invention is provided with wiring having a low sheet resistance, current easily flows even when the width is narrow, and the light emission intensity is easily maintained.

(Reflection layer 34, low resistance layer 36, and protective layer 38)
The reflective layer 34, the low resistance layer 36, and the protective layer 38 that are suitable for forming the p-side wiring 26 and the n-side wiring 22 will be described.
The reflection layer 34 preferably uses at least one selected from the group consisting of rhodium (Rh), aluminum (Al), and silver (Ag), which has a high light reflectance. When the second metal is any of these metals, light absorption at the electrode can be prevented, and light can be extracted efficiently. In particular, Rh is preferable in consideration of prevention of migration or the like.
When the reflective layer 34 is formed directly on the p-type semiconductor layer 18, it is preferable to select Ag or Rh that can make ohmic contact with the p-type semiconductor layer 18 as the material of the reflective layer 34. When the reflective layer 34 is formed directly on the n-type semiconductor layer 14, it is preferable to select Al or Rh that can make ohmic contact with the n-type semiconductor layer 14 as the material of the reflective layer 34.
The low resistance layer 36 is formed from copper. Copper has advantages of high conductivity, low price, and chemical stability for a short period of time, making it easy to handle. In addition, since adhesion with Rh used for the reflective layer and Au used for the protective layer 38 is also good, it is possible to prevent delamination even when the p-side wiring 26 and the n-side wiring 26 are formed with a narrow width. There is.
The protective layer 38 is preferably made of gold (Au), Ta, or TiN excellent in oxidation resistance. In particular, in the case of a common structure with the electrode, the adhesion with the conductive wire or the eutectic layer. Good Au is preferable.

(P-side electrode 32, n-side electrode 30)
The shapes of the p-side electrode 32 and the n-side electrode 30 can be arbitrarily selected. For example, the p-side electrode 32 and the n-side electrode 30 can have various shapes such as a circle, a triangle, a polygon such as a quadrangle. Further, the size of the p-side electrode 32 and the n-side electrode 30 is not particularly limited, but may be a size suitable for wire bonding, bonding with a bump, or a eutectic layer.
The p-side electrode 32 and the n-side electrode 30 can be formed integrally with the p-side wiring 26 and the n-side wiring 22, and in that case, the same configuration as the above-described p-side wiring 26 and the n-side wiring 22 is preferable. .
When the p-side electrode 32 and the n-side electrode 30 are formed separately from the p-side wiring 26 and the n-side wiring 22, these electrodes 30 are laminated layers of W / Pt / Au, Rh / Pt / Au, or the like. Can be structured.

(Translucent electrode 24)
The translucent electrode 24 can be formed from a metal thin film or a conductive oxide.
As the metal thin film, a thin film having a thickness of 50 to 300 mm made of metal such as Ni / Au is suitable.
As the conductive oxide film, an oxide film containing at least one element selected from the group consisting of zinc (Zn), indium (In), tin (Sn), and magnesium (Mg) is suitable. . Specifically, ZnO, AZO (Al-doped ZnO), IZO (In-doped ZnO), GZO (Ga-doped ZnO), In ₂ O ₃ , ITO (Sn-doped In ₂ O ₃ ), IFO (F-doped In ₂ O ₃ ), SnO ₂ , ATO (Sb-doped SnO ₂ ), FTO (F-doped SnO ₂ ), CTO (Cd-doped SnO ₂ ), MgO, and the like. These materials can be formed by a physical film formation method (evaporation, sputtering, pulsed laser ablation (PLD), etc.) or a chemical film formation method (sol gel, spray, etc.).

(N-side ohmic contact layer 20)
The n-side ohmic contact layer 20 is made of a material that can make ohmic contact with the n-side semiconductor layer 14. For example, a metal material such as Ti or a conductive oxide is suitable. Examples of the conductive oxide suitable for the n-side ohmic contact layer 20 include ZnO, In ₂ O ₃ , SnO ₂ , and ITO, similar to the translucent electrode 24. Further, if the n-side ohmic contact layer 20 and the translucent electrode 24 are formed from the same material and are formed simultaneously, the number of steps can be reduced.

(Semiconductor light emitting element 10)
The configuration of the semiconductor light emitting device of the present invention is particularly suitable for a nitride semiconductor light emitting device. The configuration of the nitride semiconductor light emitting device will be described below.
(Substrate 12)
As the substrate 12 on which the nitride semiconductor light emitting element 10 is formed, for example, a known insulating substrate or conductive substrate such as sapphire, spinel, SiC, nitride semiconductor (for example, GaN), GaAs, or the like can be used. The insulating substrate may be finally removed or may not be removed. When the insulating substrate is not finally removed, both the p-side electrode 32 and the n-side electrode 30 are usually formed on the same surface side of the semiconductor stacked body 13. When the insulating substrate is finally removed or a conductive substrate is used, both the p-side electrode 32 and the n-side electrode 30 may be formed on the same surface side of the semiconductor stacked body 13 or different surfaces. May be formed respectively.

(Semiconductor laminate 13)
The n-type semiconductor layer 14, the active layer 16, and the p-type semiconductor layer 18 constituting the semiconductor stacked body 13 are not particularly limited. For example, In _X Al _Y Ga _1- XYN (0 ≦ A gallium nitride compound semiconductor such as X, 0 ≦ Y, X + Y ≦ 1) is preferably used. Each of these nitride semiconductor layers may have a single layer structure, but may have a laminated structure of layers having different compositions and film thicknesses, a superlattice structure, or the like. In particular, the active layer preferably has a single quantum well or multiple quantum well structure in which thin films that produce quantum effects are stacked.

  In addition, normally, such a semiconductor stacked body 13 may be configured as a homostructure, a heterostructure, a double heterostructure having a MIS junction, a PIN junction, or a PN junction. The semiconductor stacked body 13 can be formed by a known technique such as MOVPE, metal organic chemical vapor deposition (MOCVD), hydride vapor phase epitaxy (HVPE), molecular beam epitaxy (MBE), or the like. Further, the thickness of the nitride semiconductor layer is not particularly limited, and various thicknesses can be applied.

  The stacked structure of the semiconductor stacked body 13 includes, for example, a buffer layer made of AlGaN, an undoped GaN layer, an n-side contact layer made of Si-doped n-type GaN, and a superlattice in which GaN layers and InGaN layers are alternately stacked. Active layer having a multiple quantum well structure in which GaN layers and InGaN layers are alternately stacked, superlattice layer in which Mg-doped AlGaN layers and Mg-doped InGaN layers are alternately stacked, p-side contact made of Mg-doped GaN Layer, and the like.

<Embodiment 2>
In the semiconductor light emitting device 10 shown in FIGS. 4A and 4B, the exposed portion 28, the n-side electrode 30, the p-side electrode 32, and the n-side wiring 22 are different, and the p-side wiring is formed integrally with the p-side electrode 32. The second embodiment is different from the first embodiment in that an n-side bump 30 and a p-side bump 40 are formed on the n-side electrode and the p-side electrode, respectively. The rest is almost the same as in the first embodiment.

The semiconductor stacked body 13 formed on the substrate 12 is partially removed, and the n-type semiconductor layer 14 is exposed. Such an exposed portion 28 can be formed in any number and at any position and in any shape. In the example of FIG. 4A, a total of nine substantially circular exposed portions 28 of 3 × 3 are formed at an inner position away from the edge of the light emitting element 10.
The exposed portion 28 is filled with an n-side conductive portion 44. The lower end of the n-side conductive portion 44 is electrically connected to the n-type semiconductor layer 14 of the exposed portion 28, and the upper end is exposed on the surface of the semiconductor stacked body 13.

In the present embodiment, the n-side wiring 22 is formed on the upper surface side of the p-type semiconductor layer 18 and wired so as to be connected to the n-side conductive portion 44. In the example of FIG. 4A, the n-side wiring 22 is formed to extend in the horizontal direction so as to be connected to three n-side conductive portions 44 arranged in the horizontal direction. An n-side electrode 30 is formed at the end of the n-side wiring 22 (the right end in FIG. 4A). The n-side conductive portion 44 and the n-side wiring 22 may be formed as separate bodies. However, it is preferable that the n-side conductive portion 44 and the n-side wiring 22 are integrally formed because of excellent conductivity and optical characteristics.
4B, an insulating film 42 is formed on the side surface of the exposed portion 28, the upper surface of the semiconductor stacked body 13, and the p-side electrode, and the n-side conductive portion 44, the n-side wiring 22, and n The side electrode is insulated from the semiconductor stacked body 13.

In the light emitting element 10 of the present embodiment, the p-side electrode 32 is formed over almost the entire main surface of the p-type semiconductor layer 18. A plurality of p-side bumps 40 are formed on the p-side electrode 32 (in this example, a total of twelve pieces of 3 × 4 in the vertical direction). The light-emitting element 10 of the present embodiment is suitable for flip chip mounting, and supports the light-emitting element 10 by a plurality of p-side bumps 40 at the time of mounting and supplies current to each p-side electrode 32 from each p-side bump 40. Can do. Therefore, the light emitting element 10 of the present embodiment can spread the current over the entire p-type semiconductor layer 18 without providing the p-side wiring separately. Further, in the present embodiment, the n-side wiring 22 is connected to the n-type semiconductor layers 14 separated from each other over a wide range via the plurality of n-side conductive portions 44, so that the same as in the first embodiment This has the effect of enabling light emission in a wide range by assisting current diffusion to the p-type semiconductor layer 18. Further, the exposed portion 28 for forming the n-side wiring 22 is unnecessary, and the area of the exposed portion 28 is extremely small, so that the area of the active layer 16 can be further increased. Therefore, according to the present embodiment, an effect of increasing the light emission amount of the light emitting element 10 is also expected.
The light emitting element 10 as in this embodiment is excellent in terms of light emission output, and is suitable for the light emitting element 10 having a large size (for example, one side of 600 to 1000 μm).

In the present embodiment, the semiconductor stacked body 13 is stacked in the order of the n-type semiconductor layer 14, the active layer 16 and the p-type semiconductor layer 18 from the substrate 12 side, and the n-side wiring is formed on the upper surface of the p-type semiconductor layer 18. The form in which 22 is formed is shown. However, the present invention is not limited to this, and the p-type semiconductor layer 18, the active layer 16, and the n-type semiconductor layer 14 are stacked in this order from the substrate 12 side, and a p-side wiring is formed on the upper surface of the n-side semiconductor layer 14. The form which is made can also be used preferably.
Further, as in the present embodiment, when the area of the n-side wiring is larger than the area of the exposed portion (particularly, the exposed portion 18 for forming the electrode), the characteristics of the wiring layer are the light emission / electrical characteristics of the semiconductor light emitting device. However, by applying the wiring structure as in the present invention to the n-side wiring, it is possible to realize suitable light emission and element driving. Further, in the embodiment in which the n-side wiring is formed so as to overlap with the p-side electrode and the p-side wiring as in this embodiment, the characteristics of the wiring layer further increase the light emission / electrical characteristics of the semiconductor light emitting device. By adopting the wiring structure as in the present invention, suitable light emission and element driving can be realized. Further, the structure in which the n-side contact layer and the exposed portion and the n-side wiring layer cross each other in a three-dimensional manner enables an increase in the light emitting area.
Further, in the case where the exposed portions are separated from each other as in this embodiment, the n-side wiring, the p-side wiring, and each layer structure of the present invention reduce the potential difference and increase the area. Suitable light emission and element driving with excellent uniformity can be realized.

In each of the embodiments described above, the embodiments have been described in which each electrode is provided on the same surface side of the semiconductor stacked body. However, each electrode faces a different surface of the semiconductor stacked body (for example, the front surface of the semiconductor stacked body and the back surface of the substrate). It is also possible to adopt a form provided. The structure in which each electrode is provided so as to be opposed to each other with the semiconductor stacked body interposed therebetween is the one of the above-described embodiments, preferably the electrode provided in the exposed portion, or the first conductivity type semiconductor layer on the substrate side. This can be achieved by adopting a structure in which the electrode to be connected is taken out to the opposite side. For this purpose, a via hole is formed in the substrate, wiring is performed around the side surface of the substrate, or it is extended to the opposite surface side of the semiconductor stacked body. Connection wiring can be provided. Alternatively, the substrate may be removed by polishing, LLO (laser lift-off), or the like, and an electrode may be provided on the opposite surface side.
In each of the above embodiments, the main light emission side can be the electrode formation surface side or the semiconductor laminate side (substrate side) facing the electrode formation surface. When the electrode forming surface side is the main light emitting side, a light transmitting electrode is used for at least one of the electrodes, preferably the electrode on the upper side of the light emitting layer. In the case where the substrate side is the main light emitting side, a reflective electrode is used as at least one of the electrodes, preferably an electrode on the upper side of the light emitting layer. The first embodiment is preferable for a mode in which the electrode formation surface side is the main light emission side, and the second embodiment is preferable for a mode in which the substrate side is the main light emission side. When the electrode forming surface side is the main light emitting side, the substrate side is the mounting side, and when the substrate side is the main issuing side, the electrode forming surface side is the mounting side.

Hereinafter, the n-side bump 30, the p-side bump 40, the insulating film 42, and the n-side conductive portion 44 will be described in detail.
(N-side bump 30, p-side bump 40)
As the p-side bumps, gold bumps, solder bumps, eutectic layer / metal bonding layer bumps, micro bumps, and the like can be used. The bumps can be formed by using a wire bonder, immersion in molten solder, film formation on the p-type layer 18 such as a eutectic layer / metal bonding layer, and placement / adhesion of micro bumps. The bumps are not essential, and can be bonded to the mounting substrate via an adhesive such as an anisotropic conductive adhesive without providing the bumps.

(N-side conductive part 44)
The n-side conductive portion 44 can be formed entirely from a single material, or can be formed by laminating a plurality of materials. The n-side conductive portion 44 needs to be electrically connected to the n-type semiconductor layer 14 at the lower end. Therefore, at least the lower end of the n-side conductive portion 44 is formed from a material that can make ohmic contact with the n-type semiconductor layer 14. Examples of such materials include Al, Rh, W, Mo, Ti, and V. The portion other than the lower end of the n-side conductive portion 44 only needs to be formed from a conductive material.

(Insulating film 42)
The insulating film 42 is interposed between the n-side conductive portion 44, the n-side wiring 22 and the n-side electrode 30, the active layer 16 and the p-type semiconductor layer 18. It is preventing. The insulating film 42 is formed of a silicon or aluminum oxide such as SiO ₂ or Al ₂ O ₃ or a nitride such as AlN.

The nitride semiconductor light emitting device 10 was produced by the following manufacturing method.
(1. Formation of Semiconductor Stack 13)
Using a MOVPE reactor on a 2-inch φ sapphire substrate 12, a buffer layer made of Al _0.1 Ga _0.9 N is 100 mm, a non-doped GaN layer is 1.5 μm, and an n-type nitride semiconductor layer 14 is made of Si-doped GaN. An n-type contact layer of 2.165 μm, a superlattice n-type clad layer in which GaN layers (40 Å) and InGaN layers (20 Å) are alternately stacked 10 times, 640 Å, and first, an In _0. A multi-quantum well formed by stacking 6 layers of ₃ Ga _0.7 N well layers and 150 μm-thick undoped GaN layers alternately and repeatedly from the barrier layers, and finally the barrier layers. active layer 16 of the structure (total thickness 1230Å), a p-type nitride semiconductor layer 18, the Mg-doped the Al _0.1 Ga _0.9 N layer, (40 Å) and Mg-doped InGaN layer (20 ) And alternately grown superlattice p-type cladding layer formed by laminating 10 times 0.2 [mu] m, a p-type contact layer made of Mg-doped GaN in this order in a thickness of 0.5μm, and to produce a wafer.
The obtained wafer is annealed in a reaction vessel at 600 ° C. in a nitrogen atmosphere to further reduce the resistance of the p-type cladding layer and the p-type contact layer.

(2. Formation of exposed portion 28)
After annealing, the wafer is removed from the reaction vessel, a mask having a predetermined shape is formed on the surface of the uppermost p-type contact layer, and etching is performed from above the mask with an etching apparatus to expose a part of the n-type contact layer. That is, the n-side semiconductor layer 14 is exposed at the formed exposed portion 28.

(3. Formation of translucent electrode 24 and n-side ohmic contact layer 20)
After removing the mask, the wafer is placed in a sputtering apparatus, and the ITO translucent electrode 24 and the n-side ohmic contact layer 20 are formed to a thickness of 2000 mm by sputtering.

(4. Formation of adhesive layer, p-side wiring 26, n-side wiring 22, p-side electrode 32, and n-side electrode 30)
Using a mask having a predetermined pattern on the translucent electrode 24 and the n-side ohmic contact layer 20, by sputtering, the Ti film as the adhesive layer has a thickness of 15 mm, the Rh film as the reflective layer 14 has the thickness of 2000 mm, A Cu film was formed as a low resistance layer 16 with a film thickness of 2000 to 15000 mm, and an Au film was formed as a protective layer 18 with a film thickness of 300 to 4000 mm.

  In the sputtering using the mask, it is confirmed that the sputtered particles slightly wrap around from the pattern shape of the mask. The degree of this wraparound depends on the type of sputtered particles. For example, with Rh, Cu, and Au, Rh is the least wraparound, followed by Cu and Au is the wraparound most easily. Therefore, when the Rh reflection layer 14, the Cu low-resistance layer 16, and the Au protective layer 18 are sequentially formed using the same mask, a stacked state as shown in FIG. 5 can be formed. Since this configuration has the same function as in FIG. 3, it can be applied to the present invention. Although the wraparound distance is extremely short, the wraparound distance cannot be ignored because the width of the wiring is narrow in the present invention. Therefore, in consideration of the wraparound distance of the materials used for the reflective layer 14, the low resistance layer 16, and the protective layer 18, the mask pattern is selected and changed to form a layer structure as shown in FIGS. 3A to 3C. Is preferred.

  Finally, a heat treatment is performed at 300 ° C. or higher with an annealing apparatus, and the resulting wafer is divided at predetermined locations, whereby the nitride semiconductor light emitting device 10 is obtained.

(Light-emitting element 10 of the present invention: Samples 1 to 7)
A sample of the light-emitting element 10 of the present invention was formed by the process of Example 1. Table 1 shows the thickness of the low resistance layer 16 (Cu film) of the wirings 22 and 26 and the thickness of the protective layer 18 (Au film).
The total film thickness is the total film thickness of the wirings 22 and 26 including the adhesive layer (Ti film) 15 mm and the reflective layer 14 (Rh film) 2000 mm.

(Comparative Example 1)
In Comparative Example 1, a light emitting element including wirings 22 and 26 not including the low resistance layer 16 was manufactured. As shown in Table 1, the thickness of the protective layer 18 (Au film) was 5000 mm.
(Comparative Example 2)
In Comparative Example 2, a light emitting device in which the low resistance layer 16 was formed from an Al film instead of the Cu film was manufactured. As shown in Table 1, the thickness of the low resistance layer 16 (Al film) was 5000 mm, and the thickness of the protective layer 18 (Au film) was 300 mm.

(Sheet resistance measurement)
The sheet resistances of the samples 1, 3, 5 and the wirings 22 and 26 of the comparative example 1 were measured, and the results are shown in FIG. The sheet resistance was measured using a four-terminal method after forming a predetermined film thickness on an insulating substrate.
From the results of Samples 1 and 3 and Comparative Example 1, it was revealed that the sheet resistance is significantly reduced when the thickness of the low resistance layer 16 is large even with the same total film thickness. Therefore, it has been clarified that the line width can be narrowed without changing the electric resistance of the wirings 22 and 26 by including the low resistance layer 16 even with the same total film thickness.

(Measurement of light emission pattern, forward voltage, and brightness)
The light emitting element 10 of the sample and the comparative example is actually energized to emit light, and the light emission pattern is observed and evaluated from the semiconductor laminate 13 side.
Only one p-side electrode 32 and one n-side electrode 30 are energized, the image of the CCD camera is converted into a light emission intensity distribution diagram, and Comparative Example 1, Samples 2, 4, 5, 6, and 7 are observed. ,evaluate. As a result, as compared with Comparative Example 1, the areas of the light emitting regions of Sample 5 and Sample 7 increase, and the light emission intensity tends to increase overall. Further, the results of measuring the forward voltage Vf of the light emitting element 10 are summarized in FIG. 7, and the results of measuring the brightness are summarized in FIG. In FIG. 8, the graph is graphed using the relative values based on Comparative Example 1. The brightness was measured with an integrating sphere.

The forward voltage Vf shown in FIG. 7 is lower in Samples 5 and 7 than in Comparative Example 1, and it can be seen that an excellent Vf reduction can be realized. The Vf of sample 2 is almost the same as that of comparative example 1. However, since sample 2 has a smaller total film thickness than that of comparative example 1, a thin film wiring like sample 2 also has a thickness similar to that of comparative example 1. It can be seen that Vf equivalent to the film wiring can be realized, and that the wiring layer can be thinned. In the thick wiring layer, it can be seen that Samples 5 and 7 can realize an element in which Vf is reduced as compared with Comparative Example 1.
In the evaluation of the brightness shown in FIG. 8, the sample 1 is darker than the comparative example 1. This is because the increase in the sheet resistance due to the decrease in the thickness of the Au protective layer 18 is caused by the Cu low resistance layer. This is considered to be because the effect of lowering the sheet resistance due to the formation of 16 was exceeded.

  In the light-emitting element 10 of the present invention, the low resistance layer 16 made of Cu is formed between the reflective layer 14 and the protective layer 18 of the wirings 22 and 26. Therefore, the sheet resistance is effectively reduced and the light-emitting element emits light. The efficiency can be increased, and the wirings 22 and 26 can be narrowed, so that the light extraction efficiency can be improved. Further, by covering the side surface of the low resistance layer 16 with the protective film 18, Cu can be used as an electrode material without adversely affecting the element.

1 is a schematic top view of a semiconductor light emitting element according to a first embodiment. FIG. 2 is a schematic cross-sectional view of the semiconductor light emitting element according to the first embodiment, cut along line AA in FIG. 1. FIG. 2 is a partial schematic cross-sectional view showing an embodiment of a p-side wiring when the semiconductor light emitting element according to the first embodiment is cut along line BB in FIG. 1. FIG. 2 is a partial schematic cross-sectional view showing an embodiment of a p-side wiring when the semiconductor light emitting element according to the first embodiment is cut along line BB in FIG. 1. FIG. 2 is a partial schematic cross-sectional view showing an embodiment of a p-side wiring when the semiconductor light emitting element according to the first embodiment is cut along line BB in FIG. 1. FIG. 3 is a schematic top view of a semiconductor light emitting element according to a second embodiment. It is the schematic sectional drawing which cut | disconnected the semiconductor light-emitting device concerning Embodiment 2 along CC line of FIG. 4A. It is a schematic sectional drawing which shows one form of the p side wiring cut | disconnected along the BB line of FIG. 6 is a graph showing the results of sheet resistance measurement of wiring formed in the semiconductor light emitting device according to Example 2. 7 is a graph showing the results of forward voltage (Vf) measurement of the semiconductor light emitting device according to Example 2. 6 is a graph showing the results of measuring the brightness of a semiconductor light emitting device according to Example 2.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 Light emitting element, 12 board | substrate, 13 semiconductor laminated body, 14 n-type semiconductor layer, 16 active layer, 18 p-type semiconductor layer, 20 n side ohmic contact layer, 22 n side current diffusion wiring (n side wiring), 24 transparent Photoelectric electrode, 26 p-side current diffusion wiring (p-side wiring), 28 exposed portion, 30 n-side electrode, 32 p-side electrode, 34 reflective layer, 36 low resistance layer, 38 protective layer.

Claims (6)

A semiconductor laminate in which a first conductivity type semiconductor layer and a second conductivity type semiconductor layer are sequentially laminated on a substrate;
An exposed portion in which a part of the semiconductor layer is removed to expose the first conductive semiconductor layer on the upper surface side of the semiconductor layer;
A first electrode electrically connected to the exposed first conductive type semiconductor layer;
A semiconductor light emitting device comprising: a second electrode electrically connected to the second conductivity type semiconductor layer;
On either the upper surface side of the cut portion or the upper surface side of the second conductivity type semiconductor,
A reflective layer made of a metallic material having a higher reflectance than copper;
A low resistance layer made of copper,
A first current diffusion wiring is formed by laminating at least three layers of a protective layer made of a metal material having better oxidation resistance than copper,
The first current spreading wiring is electrically connected to either the first electrode or the second electrode;
A side surface of the low resistance layer is covered with the protective layer. On either the upper surface side of the exposed portion or the upper surface side of the second conductivity type semiconductor,
A reflective layer made of a metallic material having a higher reflectance than copper;
A low resistance layer made of copper,
A second current diffusion wiring is formed by laminating at least three layers of a protective layer made of a metal material having better oxidation resistance than copper,
The second current spreading wiring is electrically connected to the other of the first electrode or the second electrode;
The semiconductor light emitting element according to claim 1, wherein a side surface of the low resistance layer is covered with the protective layer. A semiconductor laminate in which a first conductivity type semiconductor layer and a second conductivity type semiconductor layer are sequentially laminated on a substrate;
A first electrode electrically connected to the first conductivity type semiconductor layer;
A semiconductor light emitting device comprising: a second electrode formed on an upper surface side of the second conductivity type semiconductor layer;
On the upper surface side of the second conductivity type semiconductor,
A reflective layer made of a metallic material having a higher reflectance than copper;
A low resistance layer made of copper,
A first current diffusion thin wire formed by laminating at least three layers of a protective layer made of a metal material having better oxidation resistance than copper,
The first current spreading thin wire is electrically connected to the second electrode;
A side surface of the low resistance layer is covered with the protective layer. The first current diffusion wiring connected to the first electrode is formed on the upper surface side of the exposed portion,
3. The semiconductor light emitting element according to claim 1, wherein an ohmic contact layer made of a conductive material capable of being in ohmic contact with the first conductivity type semiconductor is formed between the exposed portion and the first current diffusion wiring. The first current diffusion wiring connected to the second electrode is formed on the upper surface side of the second conductivity type semiconductor layer,
4. The semiconductor light emitting element according to claim 1, wherein a translucent electrode is formed between the second conductivity type semiconductor layer and the current diffusion wiring. 5.   The one of the first electrode and the second electrode is formed integrally with the first current diffusion wiring and has a laminated structure substantially the same as the first current diffusion wiring. The semiconductor light emitting element as described.

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