JP2008193098A - ダブルパターニング工程を用いる半導体素子の微細パターン形成方法 - Google Patents
ダブルパターニング工程を用いる半導体素子の微細パターン形成方法 Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 134
- 239000004065 semiconductor Substances 0.000 title claims abstract description 43
- 238000000059 patterning Methods 0.000 title description 13
- 238000005530 etching Methods 0.000 claims abstract description 204
- 239000006227 byproduct Substances 0.000 claims abstract description 43
- 229920000642 polymer Polymers 0.000 claims abstract description 43
- 239000000758 substrate Substances 0.000 claims abstract description 18
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 14
- 229920005591 polysilicon Polymers 0.000 claims description 14
- 238000001312 dry etching Methods 0.000 claims description 11
- 238000001020 plasma etching Methods 0.000 claims description 8
- 238000004380 ashing Methods 0.000 claims description 3
- 239000011810 insulating material Substances 0.000 claims description 3
- 229910052751 metal Inorganic materials 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 3
- 238000000151 deposition Methods 0.000 claims description 2
- 239000011295 pitch Substances 0.000 description 38
- 239000000463 material Substances 0.000 description 12
- 238000000206 photolithography Methods 0.000 description 9
- 150000004767 nitrides Chemical class 0.000 description 7
- 238000000231 atomic layer deposition Methods 0.000 description 4
- 239000000203 mixture Substances 0.000 description 3
- 238000012546 transfer Methods 0.000 description 3
- 229910003697 SiBN Inorganic materials 0.000 description 2
- 229910004541 SiN Inorganic materials 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000011156 evaluation Methods 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000005368 silicate glass Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 description 1
- 229910021342 tungsten silicide Inorganic materials 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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Abstract
【解決手段】被エッチング膜120を含む基板100上にハードマスク層124bを形成した後第1領域では小さく第2領域では大きい密度を有するマスクパターン130と第2領域ではマスクパターン側壁を覆うバッファ層140をハードマスク層上に形成しマスクパターンを用い第1領域で被エッチング膜の表面が露出するまでバッファ層及びハードマスク層をエッチングする段階、マスクパターンを用いてポリマー副産物発生量の多い雰囲気下で第1領域で露出した被エッチング膜表面上にポリマー副産物160を堆積させ第2領域でハードマスク層を被エッチング膜表面が露出するまでエッチングしてハードマスクパターンを形成する段階、ポリマー副産物を除去した後ハードマスクパターンを使用して被エッチング膜パターンを形成する段階、を含む。
【選択図】図1I
Description
120 被エッチング膜、
120a 被エッチング膜パターン、
124 ハードマスク層、
124a 低い表面部、
124b ハードマスクパターン、
130 第1マスクパターン、
140 バッファ層、
142 リセス、
150 第2マスク層、
150a 第2マスクパターン、
160 ポリマー副産物、
A 低密度パターン領域、
B 高密度パターン領域。
Claims (20)
- 被エッチング膜を有する基板上の第1領域及び第2領域にハードマスク層を形成するハードマスク層形成段階と、
前記第1領域では第1パターン密度を有し、前記第2領域では前記第1パターン密度より大きい第2パターン密度を有して反復して形成される複数のマスクパターンと、前記第2領域で前記複数のマスクパターンの両側壁を所定の幅で覆うバッファ層と、を前記ハードマスク層上に形成する、マスクパターン及びバッファ層形成段階と、
前記複数のマスクパターンをエッチングマスクとして前記第1領域で前記被エッチング膜の第1表面が露出されるまで、第1エッチング雰囲気下で、前記第1領域及び第2領域で前記バッファ層及びハードマスク層をRIE(reactive ion etching)方式でエッチングする第1エッチング段階と、
前記第1領域では前記被エッチング膜の第1表面が露出されており、前記第2領域では前記被エッチング膜が露出されていない状態で、前記複数のマスクパターンをエッチングマスクとして、前記第1エッチング雰囲気下よりポリマー副産物発生量の多い第2エッチング雰囲気下で、前記第1領域で露出されている前記被エッチング膜の第1表面上にポリマー副産物を堆積させつつ、前記第2領域では前記ハードマスク層を前記被エッチング膜の第2表面が露出されるまでエッチングしてハードマスクパターンを形成する第2エッチング段階と、
前記被エッチング膜の第1表面を露出するまで前記第1表面上に堆積されたポリマー副産物を除去するポリマー副産物除去段階と、
前記ハードマスクパターンをエッチングマスクとして前記被エッチング膜の露出された第1表面及び第2表面をエッチングして被エッチング膜パターンを形成する被エッチング膜パターン形成段階と、
を含むことを特徴とする半導体素子の微細パターン形成方法。 - 前記マスクパターン及びバッファ層形成段階は、
前記第2領域で前記複数のマスクパターンの両側壁をそれぞれa及びbの幅で覆うように前記バッファ層を形成し、
前記第1領域で相互に隣接した2個の前記マスクパターン間の間隔は2(a+b)より大きく形成することを特徴とする請求項1に記載の半導体素子の微細パターン形成方法。 - 前記第1エッチング雰囲気及び前記第2エッチング雰囲気は、それぞれO2を含む同じエッチングガス成分からなり、
前記第2エッチング雰囲気でのO2流量は前記第1エッチング雰囲気でのO2流量より少ないことを特徴とする請求項1に記載の半導体素子の微細パターン形成方法。 - 前記第1エッチング雰囲気及び前記第2エッチング雰囲気は、それぞれ同じエッチングガス成分からなり、
前記第2エッチング雰囲気の温度は、前記第1エッチング雰囲気の温度より低いことを特徴とする請求項1に記載の半導体素子の微細パターン形成方法。 - 前記バッファ層及び前記ハードマスク層は酸化膜からなり、
前記マスクパターンは、ポリシリコン膜からなり、
前記第1エッチング雰囲気及び前記第2エッチング雰囲気は、CxFy(x及びyは、それぞれ1〜10の整数)、O2及びArの混合ガスからなることを特徴とする請求項1に記載の半導体素子の微細パターン形成方法。 - 前記第1エッチング段階の後、前記第2エッチング段階の前に、前記被エッチング膜の第1表面が露出されたとき、前記第1エッチング雰囲気を前記第2エッチング雰囲気に切り換える切り換え段階をさらに含み、
前記切り換え段階における前記第2エッチング雰囲気の条件は、O2の流量を除き第1エッチング雰囲気と同一に維持しつつ、O2の流量を減らすことを特徴とする請求項3に記載の半導体素子の微細パターン形成方法。 - 前記第1エッチング段階の後、前記第2エッチング段階の前に、前記被エッチング膜の第1表面が露出されたとき、前記第1エッチング雰囲気を前記第2エッチング雰囲気に切り換える切り換え段階をさらに含み、
前記切り換え段階における前記第2エッチング雰囲気の条件は、エッチング温度を除き第1エッチング雰囲気と同一に維持しつつ、前記第2エッチング雰囲気でのエッチング温度を前記第1エッチング雰囲気でのエッチング温度より低くすることを特徴とする請求項4に記載の半導体素子の微細パターン形成方法。 - 前記ポリマー副産物除去段階は、プラズマ方式のドライエッチング工程を用いて前記ポリマー副産物を除去することを特徴とする請求項1に記載の半導体素子の微細パターン形成方法。
- 前記ポリマー副産物除去段階は、CHF3及びCH2F2のうちから選択された少なくとも1つのガス、O2及びArの混合ガスを使用するプラズマ方式のドライエッチング工程を用いて前記ポリマー副産物を除去することを特徴とする請求項5に記載の半導体素子の微細パターン形成方法。
- 前記ポリマー副産物除去段階は、アッシング及びストリップ工程を用いて前記ポリマー副産物を除去することを特徴とする請求項1に記載の半導体素子の微細パターン形成方法。
- 前記第1エッチング段階は、前記第1領域には前記複数のマスクパターンの間に前記ハードマスク層が露出しており、前記第2領域には前記複数のマスクパターンの間に前記バッファ層が露出している状態で行なわれることを特徴とする請求項1に記載の半導体素子の微細パターン形成方法。
- 前記被エッチング膜は、金属、半導体、または絶縁物質からなることを特徴とする請求項1に記載の半導体素子の微細パターン形成方法。
- 前記複数のマスクパターンは、前記第1領域及び第2領域にそれぞれ形成される第1マスクパターンと、前記第2領域にのみ形成される第2マスクパターンと、を含み、
前記マスクパターン及びバッファ層形成段階は、
前記第1領域では前記第1マスクパターンは前記第1パターン密度を有する所定のピッチで反復形成され、前記第2領域では前記第1マスクパターンは前記第2パターン密度より2倍大きい第3パターン密度を有する第1ピッチで反復形成される、複数の第1マスクパターンを形成する段階と、
前記第1マスクパターンの上面及び側壁と前記ハードマスク層の上面を覆う前記バッファ層を形成する段階と、
前記第2領域で前記複数の第1マスクパターンのうち、相互に隣接した2個の第1マスクパターン間に1個ずつ位置する複数の第2マスクパターンを前記バッファ層上に形成する段階と、を含むことを特徴とする請求項1に記載の半導体素子の微細パターン形成方法。 - 前記バッファ層は、前記複数の第1マスクパターンのうち、相互に隣接した2個の第1マスクパターン間の位置にリセスが形成された上面を有して形成され、
前記第2マスクパターンは、前記バッファ層の上面に形成された前記リセス内に形成されることを特徴とする請求項13に記載の半導体素子の微細パターン形成方法。 - 前記第2マスクパターンは、前記第1マスクパターンと同じ水平面上に形成されることを特徴とする請求項13に記載の半導体素子の微細パターン形成方法。
- 前記第2マスクパターンが形成された後、前記第1マスクパターンの上面が露出されるまで前記バッファ層の一部を除去する段階をさらに含むことを特徴とする請求項13に記載の半導体素子の微細パターン形成方法。
- 前記複数の第1マスクパターンを形成した後、前記バッファ層を形成する前に、前記複数の第1マスクパターンの間に露出された前記ハードマスク層をその上面から第1厚さ除去して、前記ハードマスク層の上面に低い表面部を形成する段階をさらに含むことを特徴とする請求項13に記載の半導体素子の微細パターン形成方法。
- 前記第1厚さは、前記第2領域における前記第1マスクパターンの幅と同じ寸法を有することを特徴とする請求項17に記載の半導体素子の微細パターン形成方法。
- 前記第2領域における前記第1マスクパターンは、前記第1ピッチの1/4の幅を有して形成されることを特徴とする請求項13に記載の半導体素子の微細パターン形成方法。
- 前記第1マスクパターン及び第2マスクパターンは、ポリシリコン膜からなり、前記バッファ層及びハードマスク層は、酸化膜からなることを特徴とする請求項13に記載の半導体素子の微細パターン形成方法。
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US7601647B2 (en) | 2009-10-13 |
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