JP2008187785A - Charge controller - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To adjust timing of voltage step-up/down switching according to fluctuation in the voltage of a charging power supply and to smoothly switch voltage step-up/down to reliably and efficiently carry out charging to a desired full charge voltage. <P>SOLUTION: A charge controller includes: an error amplification signal generating means 120 that detects the charging current I of a capacitor storage power supply 300 and generates an error amplification signal through comparison with a reference value; a PWM controlling means 140 for generating a PWM signal by the error amplification signal; a voltage step-up/down switching means 180 that switches the switch element between a voltage step-down switch element SW1 and a voltage step-up switch element SW2 and supplies the PWM signal to the switch element; and a voltage step-up/down switching controlling means 160 for controlling the voltage step-up/down switching means 180 so that the following is implemented the PWM signal is supplied to the voltage step-down switch element SW1 on condition that the voltage of the capacitor storage power supply 300 is lower than the voltage of a charging power supply 200 and the PWM signal is supplied to the voltage step-up switch element SW2 on condition that the voltage of the capacitor storage power supply has approached the voltage of the charging power supply 200 by a certain value or more. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention connects a step-down / step-down circuit composed of a step-down switch element, a choke coil, a step-up switch, and a rectifier element, switches a PWM signal to the step-down switch element or the step-up switch, supplies the PWM signal, and controls a charging current by PWM control. To a charge control device configured to charge a capacitor storage power source from

  A power storage power source composed of a secondary battery is a substantially constant voltage power source with little voltage fluctuation due to charging / discharging, but is not suitable for large current and high speed charging / discharging. On the other hand, although the voltage of a power storage power source composed of a capacitor greatly varies due to charging / discharging, it can be charged / discharged at a high current and at a high speed, and has a specific use not found in secondary batteries. When charging such a capacitor storage power supply from a charging power supply, if a power supply adjustment circuit for voltage conversion is connected between the charging power supply and the capacitor storage power supply, the rated voltage lower than the full charge voltage of the capacitor storage power supply A charging power source can be used. In addition, if a power supply adjustment circuit that converts voltage between the capacitor storage power supply and the load is connected to a circuit that discharges from the capacitor storage power supply and supplies power to the load, it can be discharged until the voltage of the capacitor storage power supply becomes low. Can improve the efficiency of use.

  FIG. 4 is a diagram for explaining a conventional example of a power supply adjustment circuit, where 100 is a power supply adjustment circuit, 120 is an error amplification signal generation circuit, 140 is a PWM control circuit, 180 is a step-up / down switching circuit, 200 is a charging power supply, and 300 is Capacitor storage power source, C1 and C2 are smoothing capacitors, D1 and D2 are rectifier elements, L1 is a choke coil, R is a current detection resistor, SW1 is a step-down switch element, and SW2 is a step-up switch element.

  For example, as shown in FIG. 4, the conventional power supply adjustment circuit is a power supply adjustment circuit 100 in which a step-down switch element SW1, a choke coil L1, and a rectifier element D2 are connected in series between a charging power supply 200 and a capacitor storage power supply 300. Thus, the rectifier element D1 is connected with a reverse polarity between the series connection point of the step-down switch element SW1 and the choke coil L1 and the common line (ground line), and the series connection point of the choke coil L1 and the rectifier element D2 Is connected to the common line. The step-down switching element SW1 constitutes a step-down chopper by combining the choke coil L1, the rectifying element D1, and the smoothing capacitor C2, and a desired step-down output is taken out from both ends of the smoothing capacitor C2 by controlling the on / off duty ratio. The step-up switch element SW2 is formed by combining the choke coil L1, the rectifying element D2, and the smoothing capacitor C2 to form a step-up chopper, and the step-down switch element SW1 is turned on to control the on / off duty ratio. A desired boosted output is taken out from both ends of the capacitor C2.

  The error amplification signal generation circuit 120 detects the charging current I by the voltage across the current detection resistor R inserted in the common line and compares it with the current set value, and at the same time, the voltage of the capacitor storage power supply (charging voltage) from the output terminal. ) Is detected and compared with the voltage setting value to generate an error amplification signal. The PWM control circuit 140 receives the error amplification signal from the error amplification signal generation circuit 120, generates a PWM signal, and performs PWM control of the step-down switch element SW1 or the step-up switch element SW2. The step-up / step-down switching circuit 180 inputs a PWM signal to the step-down switch element SW1 when the voltage of the capacitor storage power supply is low at the start of charging, and when the voltage of the capacitor storage power supply reaches a certain voltage near the voltage of the charging power supply. The connection is switched so that the step-down switch element SW1 is kept on and the PWM signal is input to the step-up switch element SW2 (see, for example, Patent Documents 1 and 2 and Non-Patent Document 1).

With such a power supply adjustment circuit, in the charging mode, the capacitor storage power supply voltage is stepped down and charged in the initial stage of charging when the voltage is low, and when the voltage increases, the voltage is boosted and charged. And the rated voltage of the charging power source can be determined without depending on the full charging voltage of the capacitor storage power source. Similarly, in the discharge mode, when the voltage of the capacitor storage power supply is high, the voltage is stepped down and discharged. When the voltage drops, the voltage is boosted and discharged, so that the step-down / boost ratio in the power supply adjustment circuit can be reduced. It is possible to secure a desired load voltage and supply stored energy from the capacitor storage power source to a low voltage, thereby increasing efficiency.
Japanese Patent No. 3306326 Japanese Patent No. 3418951 Okamura Ikuo, “Electric Double Layer Capacitor and Power Storage System”, Nikkan Kogyo Shimbun, September 30, 2005, 3rd edition, 1st edition, pages 135-138, pages 142-144

  However, in the normal charging power supply, when an allowable fluctuation range of about ± 10% is expected, there is a problem in the charge control device if the step-up / step-down switching is performed at a constant voltage as in the conventional power supply adjustment circuit 100. FIG. 5 is a diagram for explaining a problem at the time of step-up / step-down switching of a conventional power supply adjustment circuit configured as a charge control device. For example, as shown in FIG. 5, the full charge voltage of the capacitor storage power supply 300 is 20V, 10V is the rated voltage of the charge power supply 200, and the voltage at the step-up / down switching point, and the voltage Vc of the capacitor storage power supply 300 is stepped down until the voltage Vc becomes 10V. Assume that switching is set to operate the chopper and then operate the boost chopper. Under such operating conditions, when the voltage Vi of the charging power source 200 outputs 9V, which is 10% lower than the rated voltage 10V, the capacitor storage power source 300 is charged only up to 9V, and is increased or decreased by the step-up / down switching circuit 180. The voltage does not change to 10V. Therefore, the step-up chopper cannot be operated, and the capacitor storage power supply 300 cannot be charged to the full charge voltage of 20V.

  On the contrary, when the voltage Vi of the charging power source 200 outputs 11V, which is 10% higher than the rated voltage 10V, the capacitor storage power source 300 is charged to 10V and the step-up / step-down switching is performed by the step-up / step-down switching circuit 180. Since voltage Vi of charging power supply 200 is higher than voltage Vc of capacitor storage power supply 300, voltage Vc of capacitor storage power supply 300 is the voltage of charging power supply 200 while step-down switch element SW1 is on and step-up switch element SW2 is off. The charge current control function does not work until the charge current approaches V i and the charge current decreases, and a large charge current flows during this time. That is, the operation of the power supply adjustment circuit 100 temporarily falls into a runaway state. A similar problem occurs when the switching voltage is set low.

  The present invention solves the above-described problem, and in the charge control device, the step-up / step-down switching timing from the step-down circuit operation to the step-up circuit operation can be adjusted according to the fluctuation of the voltage of the charging power source, The capacitor storage power supply can be reliably and efficiently charged to a desired full charge voltage without depending on the rated voltage of the charge power supply.

  For this purpose, the present invention connects a step-up / step-down circuit comprising a step-down switch element, a choke coil, a step-up switch, and a rectifier element, and supplies the step-down switch element or step-up switch by switching a PWM signal to control the charging current by PWM control. In a charge control device configured to charge a capacitor storage power source from a charging power source, an error amplification signal generating unit that detects a charging current of the capacitor storage power source and generates an error amplification signal by comparison with a reference value; and the error PWM control means for generating a PWM signal based on an error amplification signal generated by the amplification signal generating means, step-up / step-down switching means for switching and supplying the PWM signal generated by the PWM control means to the step-down switch element or the step-up switch, Comparing the voltage of the charging power supply with the voltage of the capacitor storage power supply, the key Provided that the PWM signal is supplied to the step-down switch element on the condition that the voltage of the capacitor storage power supply is lower than the voltage of the charging power supply, and that the voltage of the capacitor storage power supply has approached the voltage of the charging power supply more than a certain value And a step-up / step-down switching control means for controlling the step-up / step-down switching means so as to switch and supply the PWM signal to the step-up switch element.

  The error amplification signal generation means compares a constant current signal generation circuit for generating an error amplification signal by comparing whether or not the charging current exceeds a current reference value, and whether or not the charging voltage exceeds a voltage reference value. A constant voltage signal generation circuit that generates an error amplification signal by comparison; and an OR logic circuit that outputs the error amplification signal generated by each of the signal generation circuits to the PWM control means through a diode connected in reverse polarity. A constant current signal generation circuit configured to output any one of the error amplification signals to the PWM control means or to generate an error amplification signal by comparing whether or not the charging current exceeds a current reference value And subtracting the charging voltage from the offset value to generate a current diminishing reference value, comparing whether the charging current exceeds the current diminishing reference value, and outputting an error amplification signal A reduced signal generation circuit; and an OR logic circuit that outputs an error amplification signal generated by each of the signal generation circuits to the PWM control means through a diode connected in reverse polarity, and outputs one of the error amplification signals. It is configured to output to the PWM control means.

  According to the present invention, the PWM signal is generated by the error amplification signal with respect to the reference value, the step-down circuit is PWM-controlled, the capacitor storage power source is charged from the charging power source, and the capacitor storage power source is charged to the voltage of the charging power source. Judgment is made to switch from the step-down circuit to the step-up circuit, and the PWM control is performed to charge the capacitor storage power supply to the desired voltage. Therefore, even if the voltage of the charging power supply fluctuates, the step-down circuit can be switched to the step-up circuit. Or an abnormal charging current after switching can be prevented, and switching from the step-down circuit to the step-up circuit can be performed smoothly. Therefore, even if a charging power supply with a large voltage fluctuation range is used, the timing for switching the step-up / step-down from the step-down circuit operation to the step-up circuit operation can be adjusted according to the fluctuation of the voltage of the charging power supply without being limited by the fluctuation range. Therefore, the capacitor storage power supply can be charged efficiently and efficiently to a desired full charge voltage without depending on the rated voltage of the charge power supply by smoothly switching the step-up / step-down.

  Embodiments of the present invention will be described below. FIG. 1 is a diagram showing an embodiment of a charge control device according to the present invention, where 100 is a charge control device, 120 is an error amplification signal generating unit, 140 is a PWM control unit, 160 is a step-up / down switching control unit, 162 is an operational amplifier, 180 is a step-up / down switching unit, 200 is a charging power source, 300 is a capacitor storage power source, C1 and C2 are smoothing capacitors, D1 and D2 are rectifiers, L1 is a choke coil, R is a current detection resistor, R161 R167 is a fixed resistor, VR16 is a variable resistor, SW1 is a step-down switch element, SW2 is a step-up switch element, and the same reference numerals as those in FIG. 4 denote the same elements as in FIG.

  In the present embodiment shown in FIG. 1, the charging control apparatus 100 inserts and connects a step-down switch element SW1, a choke coil L1, and a rectifying element D2 in series to a power supply line between the charging power source 200 and the capacitor storage power source 300. A boost switch element SW2 is connected in parallel with the capacitor storage power source 300 between a series connection point of the choke coil L1 and the rectifier element D2 and a common line (ground line). Further, a rectifying element D1 is connected between the connection point of the step-down switch element SW1 and the choke coil L1 and a common line, and a step-down chopper by the step-down switch element SW1 and a step-up chopper by the step-up switch element SW2 are configured. Yes. As the step-down switch element SW1 and the step-up switch element SW2, gated elements such as thyristors, FETs, power transistors, IGBTs, and other switching control elements are used. The current detection resistor R detects charge / discharge current of the capacitor storage power source 300 and is inserted and connected to a common line. When charging capacitor storage power supply 300 from charging power supply 200, charge control device 100 performs on / off control of step-down switch element SW1 at a desired duty ratio until capacitor storage power supply 300 is charged to the voltage of charging power supply 200. When the voltage of capacitor storage power supply 300 exceeds the voltage of charging power supply 200 by stepping down to a desired voltage, step-down switch element SW1 is turned on and step-up switch element SW2 is controlled to be turned on / off at a desired duty ratio. And a desired charging current is supplied.

  The step-up / step-down switching control unit 160 inputs the voltage Vi of the charging power supply 200 and the voltage Vc of the capacitor storage power supply 300 and compares them, and the condition is that the voltage Vc of the capacitor storage power supply 300 is lower than the voltage Vi of the charging power supply 200. A signal for switching from the step-down mode to the step-up mode is output on condition that the voltage Vc of the capacitor storage power supply 300 has almost reached the voltage Vi of the charging power supply 200. That is, in the step-up / step-down switching control unit 160, considering the voltage drop due to the line impedance, the voltage Vc of the capacitor storage power source 300 is at least substantially equal to or less than the voltage Vi of the charging power source 200. It becomes a condition. The step-up / step-down switching unit 180 supplies the PWM signal of the PWM control unit 140 to the step-down switch element SW1 by the step-down mode signal output from the step-up / step-down switching control unit 160, and turns on the step-down switch element SW1 by the signal to switch to the step-up mode. The PWM signal of the PWM controller 140 is supplied to the boost switch element SW2.

  The error amplification signal generator 120 inputs the charging current I of the capacitor storage power supply 300 detected by the voltage across the current detection resistor R, the voltage Vc of the capacitor storage power supply 300, and further the voltage Vi of the charging power supply 200. The charging current I is constant in the constant current charging mode, and the charging current I is limited when the voltage Vc becomes larger or the voltage Vi becomes smaller than the reference value. Error amplification signal is generated. The PWM control unit 140 receives the error amplification signal generated by the error amplification signal generation unit 120 and generates a PWM signal. A PWM signal having a desired duty ratio generated in accordance with the error amplification signal is selectively supplied from the PWM control unit 140 to the step-down switch element SW1 or the step-up switch element SW2 via the step-up / step-down switching unit 180. The element SW1 or the boost switch element SW2 is PWM-controlled.

  The specific configuration of the step-up / step-down switching control unit 160 is, for example, as shown in FIG. 1B, by detecting the difference between the voltage Vi of the charging power supply 200 and the voltage Vc of the capacitor storage power supply 300 by an operational amplifier 161. When the voltage Vc of the power supply 300 increases and reaches almost the voltage Vi of the charging power supply 200 (approaches a certain value or more), the output level of the operational amplifier 162 is inverted to switch from the step-down mode signal to the boost mode signal. . By this high level signal, the step-up / step-down switching unit 180 switches from the step-down mode to the step-up mode. The operational amplifier 161 receives the voltage Vc of the capacitor storage power source 300 via the resistor R161 and connects the resistor R164 between the inverting input terminal − and the output terminal to the inverting input terminal −, and the non-inverting input terminal + The voltage dividing point by the resistors R162 and R163 of the voltage Vi of the charging power source 200 is input to the input. On the other hand, the operational amplifier 162 receives the output of the operational amplifier 161 via the resistor R165 at its inverting input terminal −, and the non-inverting input terminal + is divided by the resistor R166 and the variable resistor VR16 with a constant voltage bias V +. A pressure point is input and a resistor R167 is connected between the non-inverting input terminal + and the output terminal.

  In the step-up / step-down switching control unit 160 shown in FIG. 1B, when the operational amplifier 161 is connected to resistors R161 and R164 and resistors R162 and R163 having the same resistance value, as shown in FIG. When the voltage Vc becomes equal to the voltage Vi, the output is 0V. When the voltage Vc is 1V lower than the voltage Vi, for example, a positive voltage “+ 1V” is output. When the voltage Vc is higher than the voltage Vi, the difference is negative. When the voltage, for example, the voltage Vc becomes 11V higher than 10V of the voltage Vi, “−1V” is output. When resistors having different resistance values are connected to the resistors R161 and R164 or the resistors R162 and R163, the output voltage of the operational amplifier 161 also changes with respect to the voltage Vi in accordance with the ratio of the resistance values.

  The operational amplifier 162 divides the constant voltage bias V + by a voltage dividing circuit composed of the resistor R166 and the variable resistor VR16 to set the potential ΔV of the non-inverting input terminal +, and outputs the operational amplifier 161 to the inverting input terminal −. As shown in FIG. 1C, when the potential ΔV of the non-inverting input terminal + is set as a threshold value and the potential of the inverting input terminal − exceeds the threshold value, the output is inverted from the high level to the low level. The voltage of ΔV which is a threshold value is adjusted by the variable resistor VR16. For example, when the resistance value of the variable resistor VR16 is adjusted to set the potential of the non-inverting input terminal + of the operational amplifier 162 to “ΔV = + 0.5 V”, the output of the operational amplifier 161 higher than “+0.5 V” is inverted input. When input to the terminal −, the operational amplifier 162 outputs a low level signal. That is, as shown in FIG. 1C, the operational amplifier 162 outputs a low level signal until the voltage Vc of the capacitor storage power supply 300 is charged to a voltage exceeding 0.5V lower than the voltage Vi of the charging power supply 200. ing. When the input of the inverting input terminal − becomes lower than “+0.5 V”, that is, when the voltage Vc of the capacitor storage power supply 300 is charged and becomes higher, and the difference from the voltage Vi of the charging power supply 200 becomes smaller than 0.5 V. The output of the operational amplifier 162 is inverted to become a high level signal.

  Thus, in the step-up / step-down switching control unit 160, when the voltage Vc of the capacitor storage power supply 300 is lower than the voltage Vi of the charging power supply 200, the operational amplifier 161 outputs a positive voltage, and the output of the operational amplifier 161 is low level (step-down). Mode signal), but when the voltage Vc of the capacitor storage power supply 300 increases and approaches the voltage Vi of the charging power supply 200, the output of the operational amplifier 161 becomes lower than the potential of the non-inverting input terminal + of the operational amplifier 162. The operational amplifier 162 is inverted to high level (boost mode signal).

  Next, a specific configuration of the error amplification signal generator will be described. FIG. 2 is a diagram showing an embodiment of an error amplification signal generator, wherein 121, 123, and 124 are signal generation circuits, AMP1 to AMP4 are operational amplifiers, C11, C31, and C41 are capacitors, and D11, D31, and D41 are diodes. , R11, R31, R41 are resistors, and Vrefi, Vref (vi), Vrefvc are reference values.

  An error amplification signal generator 120 shown in FIG. 1 includes a constant current signal generation circuit 121 that outputs an error amplification signal in comparison with reference values Vrefi, Vref (vi), and Vrefvc as shown in FIG. The generation circuit 123, the constant voltage signal generation circuit 124, and an OR logic circuit of analog signals including diodes D11, D31, and D41, which input the smallest error amplification signal among these error amplification signals to the PWM controller 140. Is done. The diodes D11, D31, and D41 are connected to the input of the PWM controller 140 with opposite polarities from the constant current signal generation circuit 121, the current diminishing signal generation circuit 123, and the constant voltage signal generation circuit 124 that output error amplification signals, respectively. Is done. When the charging current I is made constant (constant current charging) by the output signals of these circuits and the capacitor storage power supply 300 is charged up to a predetermined voltage, the charging current is gradually decreased in proportion to the increase of the charging voltage Vc (current). Switching between the control modes so as not to exceed the charging voltage Vc when the charging voltage Vc reaches a voltage corresponding to full charging (constant voltage charging). Width Modulation (pulse width modulation) control.

  The constant current signal generation circuit 121 takes out the voltage drop between the terminals of the current detection resistor R inserted and connected in series with the output of the charging device 200 as a detection signal of the charging current I, and inputs this as a control object, It is configured by an error amplification circuit that compares the current reference value Vrefi set by the current reference value setting circuit as a reference value and outputs an error amplification signal. Therefore, the error amplification signal output from the constant current signal generation circuit 121 has a larger output value if the input charging current I to be controlled is smaller than the current reference value Vrefi, and the charging current I is larger than the current reference value Vrefi. The output value becomes smaller. When this error amplification signal is input, the PWM controller 140 increases the charging current I when the charging current I is smaller than the current reference value Vrefi, and conversely when the charging current I is larger than the current reference value Vrefi. Since the pulse width (duty ratio) is controlled according to the magnitude of the input error amplification signal so as to decrease the charging current, the charging current is controlled so that the charging current I becomes constant based on the current reference value Vrefi as a result. The constant current charging control mode CC is executed.

  The current diminishing signal generating circuit 123 generates a current reference value Vref (vi) that decreases the charging current I in inverse proportion to the increase in the charging voltage Vc of the capacitor storage power supply 300, and controls the current reference value Vref (vi). A comparison is made as to whether or not the target charging current I has been exceeded, and the error amplification signal is output. In this circuit, a current reference value Vref (vi) that reduces the charging current I in inverse proportion to the increase in the charging voltage Vc of the capacitor storage power supply 300 is generated, and this current reference value Vref (vi) is used as the charging current to be controlled. A comparison is made as to whether or not I has been exceeded, and an error amplification signal is output. For example, the current reference value Vref (vi) inverts the charging voltage Vc of the capacitor storage power supply 300 (Vout = −Vin), It is generated by making the offset value Voff-set positive (= Voff-set−Vin). Therefore, when this error amplification signal is input, PWM controller 140 increases charging current I when charging voltage Vc of capacitor storage power supply 300 is small, and reverses the increase in charging voltage Vc of capacitor storage power supply 300. A current diminishing control mode V-I is executed in which the charging current is controlled to decrease the charging current I in proportion.

  The constant voltage signal generation circuit 124 detects the charging voltage Vc of the capacitor storage power source 300, inputs this as a control target, and compares whether or not the voltage reference value Vrefvc preset by the voltage reference value setting circuit is exceeded. And an error amplification circuit that outputs the error amplification signal. Therefore, the error amplification signal output from the constant voltage signal generation circuit 124 has a larger output value if the input charging voltage Vc to be controlled is smaller than the voltage reference value Vrefvc, and the charging voltage Vc is larger than the voltage reference value Vrefvc. The output value becomes smaller. When this error amplification signal is input, the PWM control unit 140 increases the charging current I when the charging voltage Vc is smaller than the voltage reference value Vrefvc, and conversely, when the charging voltage Vc is larger than the voltage reference value Vrefvc. The constant voltage charging control mode CV is executed to control the charging current so as to reduce the current.

  Further, the configuration of each signal generation circuit shown in FIG. 2 will be specifically described. The constant current signal generation circuit 121 inputs the detection signal of the charging current I to the inverting input terminal − of the operational amplifier AMP1, inputs the current reference value Vrefi to the non-inverting input terminal +, and inputs the inverting input terminal − and the output terminal. An error amplification circuit is configured by connecting a series circuit of a capacitor C11 and a resistor R11 between the two. Similarly, the current diminishing signal generating circuit 123 inputs the detection signal of the charging current I to the inverting input terminal − of the operational amplifier AMP3, inputs the current reference value Vref (vi) to the non-inverting input terminal +, and inputs the inverting input. An error amplifier circuit is configured by connecting a series circuit of a capacitor C31 and a resistor R31 between the terminal-and the output terminal. Further, the constant voltage signal generation circuit 124 inputs the detection signal of the charging voltage Vc to the inverting input terminal − of the operational amplifier AMP4, inputs the voltage reference value Vrefvc to the non-inverting input terminal +, and outputs it to the inverting input terminal −. An error amplifying circuit is configured by connecting a series circuit of a capacitor C41 and a resistor R41 between the terminals.

  The diodes D11, D31, and D41 are connected to the input of the PWM controller 140 with opposite polarities from the constant current signal generation circuit 121, the current diminishing signal generation circuit 123, and the constant voltage signal generation circuit 124 that output error amplification signals, respectively. Therefore, the analog signal having the smallest error amplification signal among the error amplification signals output from the constant current signal generation circuit 121, the current diminishing signal generation circuit 123, and the constant voltage signal generation circuit 124 as an input to the PWM controller 140. It constitutes a signal OR logic circuit.

  The charging mode switching control performed by the OR logic circuit will be further described. First, in the initial stage of starting charging, the constant current charging control mode CC is executed with the diode D11 on and the diodes D31 and D41 off. Is done. That is, when the charging voltage Vc of the capacitor storage power supply 300 is small in the initial stage and the PWM control unit 140 is executing the constant current charging control mode CC based on the error amplification signal output from the constant current signal generation circuit 121, Since both the current diminishing signal generation circuit 123 and the constant voltage signal generation circuit 124 are smaller than the reference value to be compared, even if a large error amplification signal is output, the charging current I is charged by the capacitor storage power supply 300. Since the voltage Vc is not increased and the input voltage Vi is not decreased and the error amplification signal is stuck to the upper limit value, the diodes D31 and D41 are biased in the reverse direction and turned off.

  Next, by continuing constant current charging, the charging voltage Vc of the capacitor storage power supply 300 increases, the current reference value Vref (vi) in the current diminishing signal generating circuit 123 gradually decreases, and the current reference value Vref ( When vi) becomes smaller than the current reference value Vrefi of the constant current signal generation circuit 121, the error amplification signal output from the current diminishing signal generation circuit 123 becomes smaller than the error amplification signal output from the constant current signal generation circuit 121. From this, the diode D11 connected to the output of the constant current signal generation circuit 121 is turned off, the diode D31 connected to the output of the current diminishing signal generation circuit 123 is turned on, and the charging voltage of the capacitor storage power supply 300 is turned on. A current diminishing control mode V-I is executed in which the charging current is controlled to decrease the charging current I in inverse proportion to the increase in Vc.

  Further, when the charging voltage Vc of the capacitor storage power supply 300 increases and becomes larger than the voltage reference value Vrefvc in the constant voltage signal generation circuit 124, the error amplification signal output from the constant voltage signal generation circuit 124 becomes the current diminishing signal generation circuit. 123, the diode D31 connected to the output of the current diminishing signal generating circuit 123 is turned off, and the diode D41 connected to the output of the constant voltage signal generating circuit 124 is turned on. Instead, a constant voltage charging control mode CV is executed in which the charging current is controlled to make the charging voltage Vc smaller than the voltage reference value Vrefvc.

  FIG. 3 is a diagram showing an embodiment of a reference value generating circuit. AMP5 is an operational amplifier, ASr1 and ASr1 ′ are analog switches, Cr1 is a capacitor, R21, R33 and Rr1 are resistors, Rrv and Rrv ′ are variable resistors, + V indicates a bias power supply.

  Each of the reference value setting circuits described above can be configured by various known circuits, for example, as illustrated in FIG. The current reference value Vref (vi) is a value that is inversely proportional to the increase in the charging voltage Vc of the capacitor storage power supply 300 as described above shown in FIG. 2, and is, for example, an operational amplifier AMP5 as shown in FIG. , The detection signal of the charging voltage Vc of the capacitor storage power source 300 is input to the inverting input terminal − via the resistor R32, the offset value Voff-set is input to the non-inverting input terminal +, and the inverting input terminal − and output A subtractor circuit can be constructed and generated by connecting a resistor R33 to the terminal. According to this subtracting circuit, a current reference value Vref (v−i) of Voff−set + (Voff−set−Vc) R33 / R32 (where R33 = R32 is 2Voff−set−Vc) is extracted.

  The reference value of each signal generation circuit including this offset value Voff-set is obtained by dividing the stabilized bias power supply + V by a voltage dividing circuit of a fixed resistor Rr1 and a variable resistor Rrv as shown in FIG. The reference value Vref is taken out from the voltage dividing connection point and adjusted to a predetermined voltage by the variable resistor Rrv. The capacitor Cr1 is connected in parallel to the variable resistor Rrv as a noise countermeasure. Further, as shown in FIG. 3C, a similar circuit may be connected in parallel via the analog switch ASr1 so that the reference value can be switched by turning on / off the analog switch ASr1. The value may be switched by connecting the variable resistor Rrv ′ in parallel with the variable resistor Rrv via the analog switch ASr1 ′. In this way, when the reference value is switched by the analog switch ASr1 or ASr1 ′, for example, when this is adopted in the current reference value setting circuit Vrefi, the constant current charging value is stepwise according to a predetermined condition. Can be switched to. For example, in a capacitor storage power source in which a parallel monitor that bypasses a charging current with a full charge voltage is connected in parallel to each capacitor, the bypass operation signal of the parallel monitor is processed by a logic processing circuit, and the output signal is used as a switching signal. The charging current for constant current charging can be switched according to the operation of the parallel monitor.

  In addition, this invention is not limited to the said embodiment, A various deformation | transformation is possible. For example, in the above-described embodiment, the error amplification signal generation unit 120 has a configuration including the constant current signal generation circuit 121, the current diminishing signal generation circuit 123, the constant voltage signal generation circuit 124, and an OR logic circuit including a diode. For example, a constant current signal generation circuit corresponding to a case where, for example, the charging power source side is combined with one having a function of stopping constant charging by performing constant current charging to determine that the capacitor storage power source has been charged to a predetermined voltage. It may have only 121. Of course, a combination of the constant current signal generation circuit 121 and each of the other signal generation circuits may be used.

The figure which shows embodiment of the charge control apparatus which concerns on this invention. The figure which shows embodiment of an error amplification signal generation part. The figure which shows embodiment of a reference value generation circuit. The figure explaining the prior art example of a power supply adjustment circuit. The figure explaining the problem at the time of the buck-boost switching of the conventional power supply adjustment circuit comprised as a charge control apparatus.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 100 ... Charge control apparatus, 120 ... Error amplification signal generation part, 140 ... PWM control part, 160 ... Buck-boost switching control part, 161, 162 ... Operational amplifier, 180 ... Buck-boost switching part, 200 ... Charging power supply, 300 ... Capacitor Storage power supply, C1, C2 ... smoothing capacitor, D1, D2 ... rectifier element, L1 ... choke coil, R ... current detection resistor, R161-R167 ... fixed resistor, VR16 ... variable resistor, SW1 ... step-down switch element, SW2 ... step-up switch element

Claims (3)

A step-up / step-down circuit comprising a step-down switch element, a choke coil, a step-up switch, and a rectifier element is connected, a PWM signal is switched and supplied to the step-down switch element or step-up switch, a charging current is controlled by PWM control, and a capacitor storage power source is supplied from the charge power source. In the charging control device configured to charge
An error amplification signal generating means for detecting a charging current of the capacitor storage power source and generating an error amplification signal by comparison with a reference value;
PWM control means for generating a PWM signal by the error amplification signal generated by the error amplification signal generation means;
Step-up / step-down switching means for switching and supplying the PWM signal generated by the PWM control means to the step-down switch element or the step-up switch;
Comparing the voltage of the charging power supply and the voltage of the capacitor storage power supply, and supplying the PWM signal to the step-down switch element on condition that the voltage of the capacitor storage power supply is lower than the voltage of the charging power supply, A step-up / step-down switching control means for controlling the step-up / step-down switching means so as to switch and supply the PWM signal to the step-up switch element on the condition that the voltage of the power storage power source approaches the voltage of the charging power source or more. A charge control device comprising: The error amplification signal generation means compares a constant current signal generation circuit for generating an error amplification signal by comparing whether or not the charging current exceeds a current reference value, and whether or not the charging voltage exceeds a voltage reference value. A constant voltage signal generation circuit that generates an error amplification signal by comparison; and an OR logic circuit that outputs the error amplification signal generated by each of the signal generation circuits to the PWM control means through a diode connected in reverse polarity. The charge control device according to claim 1, wherein any one of the error amplification signals is output to the PWM control means. The error amplification signal generation means includes a constant current signal generation circuit that generates an error amplification signal by comparing whether or not the charging current exceeds a current reference value, and a current reduction reference by subtracting the charging voltage from an offset value A current diminishing signal generation circuit that outputs an error amplification signal by comparing whether or not the charging current exceeds the current diminishing reference value, and the error amplification signal generated by each of the signal generation circuits is inverted. 2. An OR logic circuit for outputting to the PWM control means through a diode connected to the polarity, and configured to output any one of the error amplification signals to the PWM control means. Charge control device.

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