JP2008158491A5

JP2008158491A5 -

Info

Publication number: JP2008158491A5
Application number: JP2007214299A
Authority: JP
Filing date: 2007-08-21
Publication date: 2010-10-07
Anticipated expiration: 2027-08-21

Claims

A source driver for driving a source line of an electro-optical device,
A gradation voltage generation circuit for outputting each gradation voltage of the first and second gradation voltages corresponding to the gradation data;
A source line driving circuit for driving the source line based on the first and second gradation voltages,
The source line driving circuit is
A source driver comprising a flip-around sample-and-hold circuit that outputs an output gradation voltage between the first gradation voltage and the second gradation voltage to the source line.

In claim 1,
The flip-around sample-and-hold circuit is
An operational amplifier circuit;
A plurality of capacitive elements having one end connected to the input of the operational amplifier circuit;
In the sampling period, with the output of the operational amplifier circuit and the source line electrically disconnected, the input and output of the operational amplifier circuit are electrically connected to each capacitive element of the plurality of capacitive elements. Accumulating charges corresponding to the first or second gradation voltage,
In the hold period after the sampling period, the input and output of the operational amplifier circuit are electrically cut off, and the charge accumulated in the plurality of capacitive elements is supplied to the output of the operational amplifier circuit. A source driver that outputs an output voltage of an operational amplifier circuit to the source line.

In claim 2 ,
A source driver comprising: an auxiliary capacitance element to which a given voltage is supplied at one end and an inverting input terminal of the operational amplifier circuit is connected to the other end.

In claim 3 ,
The auxiliary capacitance element is
A source driver, wherein the source driver is also used as a dummy capacitor element formed in a capacitor element formation region.

In claim 3 or 4 ,
Each source driver block for driving each source line of the electro-optical device includes a plurality of source driver blocks including the gradation voltage generation circuit and the source line drive circuit,
Each source driver block
A capacitor element forming region in which the first to jth capacitor elements and the auxiliary capacitor element are formed in a direction intersecting an arrangement direction of the plurality of source driver blocks;
The auxiliary capacitance element is
A source driver, wherein the source driver is formed along a boundary facing the array in the direction intersecting the arrangement direction among the boundaries of the capacitor element formation regions.

In any of claims 2 to 5 ,
The operational amplifier circuit includes:
A source driver, wherein a class A amplification operation is performed during the sampling period, and a class AB amplification operation is performed during the hold period.

In any one of Claims 2 thru | or 6 .
The operational amplifier circuit includes:
An operational amplifier for amplifying a difference value between an input of the operational amplifier circuit and an output of the operational amplifier circuit;
A first drive transistor of a first conductivity type provided on the first power supply side, the gate electrode of which is controlled based on the voltage of the output node of the operational amplifier;
A second drive transistor of a second conductivity type provided on the second power supply side in series with the first drive transistor;
A capacitor for capacitively coupling the gate electrode of the first driving transistor and the gate electrode of the second driving transistor;
And a charge supply circuit that supplies charge to the gate electrode of the second drive transistor in the sampling period and stops supply of charge to the gate electrode of the second drive transistor in the hold period. Source driver to use.

In claim 7 ,
The charge supply circuit comprises:
A current generation circuit;
A switch circuit inserted between the current generation circuit and one end of the capacitor and the gate electrode of the second drive transistor;
The switch circuit is
The source driver is controlled to be turned on during the sampling period and turned off during the hold period.

In claim 8 ,
The current generating circuit is
Including a current source transistor which is supplied with current to its drain and is diode-connected,
The switch circuit is
A source driver, wherein the source driver is inserted between the gate electrode of the current source transistor and one end of the capacitor and the gate electrode of the second driving transistor.

In claim 1,
The flip-around sample-and-hold circuit is
An operational amplifier circuit in which a given voltage is supplied to the non-inverting input terminal;
A feedback switch inserted between the inverting input terminal of the operational amplifier circuit and the output of the operational amplifier circuit;
First to jth (j is an integer greater than or equal to 1) capacitive elements having one end connected to the inverting input terminal;
A first to jth flip-around in which a p-th (1 ≦ p ≦ j, p is an integer) flip-around switch is inserted between the other end of the p-th capacitive element and the output of the operational amplifier circuit. Switch for
First to jth input switches in which one end of the pth input switch is connected to the other end of the pth capacitive element;
An output switch inserted between the output of the operational amplifier circuit and the source line,
The first or second gradation voltage is supplied to the other end of each of the first to jth input switches,
In the sampling period, the first and jth flip-around switches are turned off, the feedback switch is turned on, and the output switch is turned off. Supplying one of the second gradation voltages;
In the hold period after the sampling period, the first gradation voltage and the second gradation voltage obtained by turning on the first to jth flip-around switches, turning off the feedback switch, and turning on the output switch. An output grayscale voltage between the grayscale voltages of the source driver and the source line is output to the source line.

In claim 10 ,
When the output gradation voltage is closer to the highest potential voltage of the voltage output to the source line than the lowest potential voltage of the voltage output to the source line, the gradation voltage generation circuit includes the first and second gradation voltages. Are output in descending order of potential,
When the output gradation voltage is closer to the lowest potential voltage than the highest potential voltage, the gradation voltage generation circuit outputs the first and second gradation voltages in order of increasing potential. Source driver.

In claim 11 ,
When the output gradation voltage is closer to the highest potential voltage than the lowest potential voltage, the gradation voltage on the high potential side of the first and second gradation voltages is the first to jth capacitive elements. The first to jth inputs so that the low-potential-side grayscale voltage is supplied to any one of the first to jth capacitive elements while being supplied to any one of the capacitive elements. A source driver characterized by performing switch control of a switch.

In claim 11 ,
When the output gradation voltage is closer to the lowest potential voltage than the highest potential voltage, among the first and second gradation voltages, the gradation voltage on the low potential side is that of the first to jth capacitive elements. The first to jth inputs so that the high-potential-side gradation voltage is supplied to any one of the first to jth capacitive elements while being supplied to any one of the capacitive elements. A source driver characterized by performing switch control of a switch.

In any of claims 10 to 13 ,
The source driver characterized in that the capacitance values of the first to jth capacitive elements are equal.

A plurality of scan lines;
Multiple source lines,
A plurality of pixels each of which is specified by each scanning line of the plurality of scanning lines and each source line of the plurality of source lines;
15. An electro-optical device comprising: the source driver according to claim 1 for driving the plurality of source lines.

An electronic apparatus comprising the source driver according to claim 1.

An electronic apparatus comprising the electro-optical device according to claim 15.