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JP2008029163A - Driving circuit for voltage-driving semiconductor switching element - Google Patents

Driving circuit for voltage-driving semiconductor switching element Download PDF

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JP2008029163A
JP2008029163A JP2006201816A JP2006201816A JP2008029163A JP 2008029163 A JP2008029163 A JP 2008029163A JP 2006201816 A JP2006201816 A JP 2006201816A JP 2006201816 A JP2006201816 A JP 2006201816A JP 2008029163 A JP2008029163 A JP 2008029163A
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arm element
voltage
reverse bias
upper arm
power supply
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Yoshihiko Yamagata
義彦 山方
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Fuji Electric Co Ltd
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Fuji Electric Systems Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To enable to apply a reverse bias voltage to a switching element in an off-state by only adding the minimum number of components, even when the number of upper and lower arms are equivalent to a plurality of phases. <P>SOLUTION: A driving circuit drives two voltage-driving semiconductor switching elements connected between positive and negative poles of a DC power source for a main circuit and alternately repeating on/off operations. The driving circuit is provided with a reverse bias capacitor 11 to be charged from a reverse bias DC power supply 9 via a diode 10 when an upper arm element 2 connected to the positive pole of the main circuit DC power supply 1 is turned on, out of the switching elements. When the upper arm element 2 is turned off, a reverse bias voltage is applied to the upper arm element 2 using a charging voltage of the reverse vias capacitor 11. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、電圧駆動型半導体スイッチング素子を確実にオフさせるための逆バイアス印加機能を備えた駆動回路に関するものである。   The present invention relates to a drive circuit having a reverse bias application function for reliably turning off a voltage-driven semiconductor switching element.

図３は、直列に接続された２つの電圧駆動型半導体スイッチング素子の駆動回路の従来技術を示しており、電圧駆動型半導体スイッチング素子としてＩＧＢＴを用いた例である。
図３において、上アーム素子２のエミッタと下アーム素子３のコレクタとを接続して直列回路を形成し、上アーム素子２のコレクタは主回路用直流電源１の正極に、下アーム素子３のエミッタは主回路用直流電源１の負極に接続される。ここで、上アーム素子２と下アーム素子３とは交互にオン・オフが繰り返される。 FIG. 3 shows a prior art of a drive circuit for two voltage-driven semiconductor switching elements connected in series, and is an example in which an IGBT is used as the voltage-driven semiconductor switching element.
In FIG. 3, the emitter of the upper arm element 2 and the collector of the lower arm element 3 are connected to form a series circuit. The collector of the upper arm element 2 is connected to the positive electrode of the DC power source 1 for the main circuit, and The emitter is connected to the negative electrode of the DC power supply 1 for the main circuit. Here, the upper arm element 2 and the lower arm element 3 are repeatedly turned on and off alternately.

また、下アーム素子３のエミッタには駆動回路用直流電源４の負極が接続され、その正極は下アーム素子３用のゲート駆動回路８のスイッチ８ａ及びダイオード５のアノードに接続される。ダイオード５のカソードは駆動用コンデンサ６の一端と上アーム素子２用のゲート駆動回路７のスイッチ７ａに接続されており、コンデンサ６の他端は上アーム素子２のエミッタに接続されている。   Further, the negative electrode of the drive circuit DC power supply 4 is connected to the emitter of the lower arm element 3, and the positive electrode thereof is connected to the switch 8 a of the gate drive circuit 8 for the lower arm element 3 and the anode of the diode 5. The cathode of the diode 5 is connected to one end of the driving capacitor 6 and the switch 7 a of the gate driving circuit 7 for the upper arm element 2, and the other end of the capacitor 6 is connected to the emitter of the upper arm element 2.

下アーム素子３は、駆動回路用直流電源４からゲート駆動回路８のスイッチ８ａを介してゲートに電荷を注入することによってオン状態となり、また、スイッチ８ａを切り換えてゲートの電荷を引き抜くことでオフ状態となる。
一方、上アーム素子２は、コンデンサ６からゲート駆動回路７のスイッチ７ａを介してゲートに電荷を注入することによってオン状態となり、また、スイッチ７ａを切り換えてゲートの電荷を引き抜くことでオフ状態となる。
なお、前記スイッチ７ａ，８ａは制御回路（図示せず）からの制御信号によって切換動作するものである。 The lower arm element 3 is turned on by injecting electric charge from the driving circuit DC power supply 4 to the gate through the switch 8a of the gate driving circuit 8, and is turned off by switching the switch 8a to extract the gate electric charge. It becomes a state.
On the other hand, the upper arm element 2 is turned on by injecting charge from the capacitor 6 to the gate via the switch 7a of the gate drive circuit 7, and is turned off by switching the switch 7a to extract the gate charge. Become.
The switches 7a and 8a are switched by a control signal from a control circuit (not shown).

駆動用コンデンサ６は、下アーム素子３がオンのときに、駆動回路用直流電源４→ダイオード５→コンデンサ６→下アーム素子３→駆動回路用直流電源４の経路で充電され、充電された電荷は、前述したように上アーム素子２をオンする際にそのゲートに注入される。
ダイオード５は、上アーム素子２がオンで下アーム素子３がオフのときに、駆動回路用直流電源４及びコンデンサ６に対して主回路用直流電源１の電圧が印加されないようにするためのものである。 When the lower arm element 3 is on, the driving capacitor 6 is charged through the path of the driving circuit DC power source 4 → the diode 5 → the capacitor 6 → the lower arm element 3 → the driving circuit DC power source 4, and the charged electric charge. Is injected into the gate when the upper arm element 2 is turned on as described above.
The diode 5 is for preventing the voltage of the main circuit DC power supply 1 from being applied to the drive circuit DC power supply 4 and the capacitor 6 when the upper arm element 2 is ON and the lower arm element 3 is OFF. It is.

なお、この図３と実質的に同一の回路構成を有し、単一の駆動回路用直流電源を備えたインバータ装置の駆動回路が、特許文献１に記載されている。   A drive circuit for an inverter device having a circuit configuration substantially the same as that of FIG. 3 and having a single DC power supply for the drive circuit is described in Patent Document 1.

特公平５−８４１５１号公報（第２頁右欄第２７行〜第３頁右欄第１０行、第４図等）Japanese Examined Patent Publication No. 5-84151 (page 2, right column, line 27 to page 3, right column, line 10, line 4, etc.)

図３に示した従来技術では、上アーム素子２と下アーム素子３とが同時にオン状態になると、主回路用直流電源１から短絡電流が流れて素子２，３は破壊する。従って、それぞれの素子２，３がオフのときは、誤オンを防止するためにノイズ等によってゲート電位が上昇しないようにしなければならない。このため、素子２，３がオフしている期間は、ゲート電位をエミッタ電位よりも低くすること（逆バイアス印加）が必要になる。   In the prior art shown in FIG. 3, when the upper arm element 2 and the lower arm element 3 are turned on at the same time, a short-circuit current flows from the DC power source 1 for the main circuit and the elements 2 and 3 are destroyed. Therefore, when the respective elements 2 and 3 are off, it is necessary to prevent the gate potential from rising due to noise or the like in order to prevent erroneous on-state. For this reason, it is necessary to make the gate potential lower than the emitter potential (reverse bias application) while the elements 2 and 3 are off.

ところが、図３の回路では、上アーム素子２がオフ（下アーム素子３がオン）のときに、前述したコンデンサ６の充電経路が存在することからも分かるように、上アーム素子２のゲート電位はエミッタ電位以下にはならない。
上アーム素子２に逆バイアス電圧を印加するためには別の直流電源が必要になるが、上下アーム素子を複数相分並列に接続してインバータを構成する場合のように、相数が増えれば相数と同じ数の別電源が必要になり、回路構成の複雑化やコストの増加を招くという問題がある。 However, in the circuit of FIG. 3, when the upper arm element 2 is off (the lower arm element 3 is on), the gate potential of the upper arm element 2 can be seen from the fact that the charging path of the capacitor 6 described above exists. Does not fall below the emitter potential.
In order to apply a reverse bias voltage to the upper arm element 2, another DC power supply is required. However, if the number of phases increases as in the case where an inverter is configured by connecting upper and lower arm elements in parallel for a plurality of phases. As many separate power supplies as the number of phases are required, there is a problem that the circuit configuration becomes complicated and the cost increases.

そこで、本発明の解決課題は、上下アーム数が複数相分ある場合でも最小限の部品を追加するだけで、オフ状態のスイッチング素子への逆バイアス印加を可能にした電圧駆動型半導体スイッチング素子の駆動回路を提供することにある。   Therefore, the problem to be solved by the present invention is that a voltage-driven semiconductor switching element that can apply a reverse bias to an off-state switching element only by adding a minimum number of components even when there are a plurality of upper and lower arms. It is to provide a driving circuit.

上記課題を解決するため、請求項１に記載した発明は、主回路用直流電源の正極と負極との間に直列に接続されて交互にオン・オフを繰り返す２つの電圧駆動型半導体スイッチング素子を駆動する駆動回路において、
前記半導体スイッチング素子のうち主回路用直流電源の正極に接続された上アーム素子のオン時に、逆バイアス用直流電源からダイオードを介して充電される逆バイアス用コンデンサを備え、
前記上アーム素子のオフ時に、前記逆バイアス用コンデンサの充電電圧により前記上アーム素子に逆バイアス電圧を印加するものである。 In order to solve the above-mentioned problem, the invention described in claim 1 includes two voltage-driven semiconductor switching elements that are connected in series between a positive electrode and a negative electrode of a DC power supply for a main circuit and are repeatedly turned on and off alternately. In the drive circuit to drive,
A reverse bias capacitor that is charged via a diode from a reverse bias DC power supply when the upper arm element connected to the positive electrode of the main circuit DC power supply among the semiconductor switching elements is turned on;
When the upper arm element is turned off, a reverse bias voltage is applied to the upper arm element by a charging voltage of the reverse bias capacitor.

請求項２に記載した発明は、請求項１に記載した電圧駆動型半導体スイッチング素子の駆動回路において、
前記上アーム素子と直列に接続された下アーム素子を駆動するための駆動回路用直流電源と、前記下アーム素子のオン時に前記駆動回路用直流電源により充電され、かつその充電電圧により前記上アーム素子をオンさせる駆動用コンデンサと、を備え、
前記駆動用コンデンサと前記逆バイアス用コンデンサとを直列に接続したものである。 The invention described in claim 2 is the drive circuit for the voltage driven semiconductor switching element according to claim 1,
A DC power source for a driving circuit for driving a lower arm element connected in series with the upper arm element; and the DC power source for the driving circuit that is charged when the lower arm element is turned on; A driving capacitor for turning on the element,
The drive capacitor and the reverse bias capacitor are connected in series.

請求項３に記載した発明は、請求項１に記載した電圧駆動型半導体スイッチング素子の駆動回路を、前記上アーム素子及び下アーム素子の直列回路を一相分として複数相分備え、複数相分の前記逆バイアス用直流電源を単一の直流電源により共用するものである。   According to a third aspect of the present invention, there is provided a drive circuit for the voltage-driven semiconductor switching element according to the first aspect, comprising a plurality of phases corresponding to a series circuit of the upper arm element and the lower arm element as one phase. The reverse bias DC power source is shared by a single DC power source.

請求項４に記載した発明は、請求項２に記載した電圧駆動型半導体スイッチング素子の駆動回路を、前記上アーム素子及び下アーム素子の直列回路を一相分として複数相分備え、複数相分の前記逆バイアス用直流電源を単一の直流電源により共用し、かつ、複数相分の前記駆動回路用直流電源を別の単一の直流電源により共用するものである。   According to a fourth aspect of the present invention, there is provided a drive circuit for the voltage-driven semiconductor switching element according to the second aspect, comprising a plurality of phases corresponding to a series circuit of the upper arm element and the lower arm element as one phase. The DC power source for reverse bias is shared by a single DC power source, and the DC power source for driving circuits for a plurality of phases is shared by another single DC power source.

本発明によれば、単一の逆バイアス用直流電源とダイオード及びコンデンサを追加するだけで、上アーム素子のオフ時に逆バイアス電圧を印加して上アーム素子を確実にオフすることができる。
また上アーム素子と下アーム素子との直列回路が複数相分ある場合でも、単一の逆バイアス用直流電源及び駆動回路用電源を共用できるため、回路構成の簡略化、低コスト化が可能である。 According to the present invention, only by adding a single reverse bias DC power supply, a diode, and a capacitor, the upper arm element can be reliably turned off by applying a reverse bias voltage when the upper arm element is turned off.
In addition, even when there are multiple phase circuits for the upper arm element and lower arm element, a single DC power supply for reverse bias and a power supply for driving circuit can be shared, so the circuit configuration can be simplified and the cost can be reduced. is there.

以下、図に沿って本発明の実施形態を説明する。まず、図１は、本発明の第１実施形態を示す回路図である。
図１において、上アーム素子２のエミッタと下アーム素子３のコレクタとを接続して直列回路を形成し、上アーム素子２のコレクタは主回路用直流電源１の正極に、下アーム素子３のエミッタは主回路用直流電源１の負極に接続される。従来技術と同様に、これらの上アーム素子２と下アーム素子３とは交互にオン・オフが繰り返される。 Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram showing a first embodiment of the present invention.
In FIG. 1, the emitter of the upper arm element 2 and the collector of the lower arm element 3 are connected to form a series circuit, and the collector of the upper arm element 2 is connected to the positive electrode of the DC power supply 1 for the main circuit, The emitter is connected to the negative electrode of the DC power supply 1 for the main circuit. Similar to the prior art, the upper arm element 2 and the lower arm element 3 are alternately turned on and off.

下アーム素子３のエミッタには駆動回路用直流電源４の負極が接続され、その正極は、下アーム素子３用のゲート駆動回路８のスイッチ８ａとダイオード５のアノードとに接続される。ダイオード５のカソードは駆動用コンデンサ６の一端と上アーム素子２用のゲート駆動回路７のスイッチ７ａとに接続され、コンデンサ６の他端は上アーム素子２のエミッタに接続される。   The emitter of the lower arm element 3 is connected to the negative electrode of the DC power supply 4 for driving circuit, and the positive electrode is connected to the switch 8 a of the gate driving circuit 8 for the lower arm element 3 and the anode of the diode 5. The cathode of the diode 5 is connected to one end of the driving capacitor 6 and the switch 7 a of the gate drive circuit 7 for the upper arm element 2, and the other end of the capacitor 6 is connected to the emitter of the upper arm element 2.

上アーム素子２のコレクタには逆バイアス用直流電源９の正極が接続され、その負極はダイオード１０のカソードに接続される。ダイオード１０のアノードは逆バイアス用コンデンサ１１の一端と前記ゲート駆動回路７のスイッチ７ａとに接続され、コンデンサ１１の他端は駆動用コンデンサ６の他端と上アーム素子２のエミッタとに接続されている。   The collector of the upper arm element 2 is connected to the positive electrode of the reverse bias DC power supply 9, and the negative electrode is connected to the cathode of the diode 10. The anode of the diode 10 is connected to one end of the reverse bias capacitor 11 and the switch 7a of the gate drive circuit 7. The other end of the capacitor 11 is connected to the other end of the drive capacitor 6 and the emitter of the upper arm element 2. ing.

上記構成において、下アーム素子３は、駆動回路用直流電源４からゲート駆動回路８のスイッチ８ａを介してゲートに電荷を注入することによってオン状態となり、スイッチ８ａを切り換えてゲートの電荷を引き抜くことでオフ状態となる。
上アーム素子２は、駆動用コンデンサ６からゲート駆動回路７のスイッチ７ａを介してゲートに電荷を注入することによってオン状態となり、スイッチ７ａを切り換えて逆バイアス用コンデンサ１１からゲートに対して負の電荷を注入することによりオフ状態となる。
ここで、前記スイッチ７ａ，８ａは制御回路（図示せず）からの制御信号によって切換動作するものである。 In the above configuration, the lower arm element 3 is turned on by injecting charges from the drive circuit DC power supply 4 to the gate via the switch 8a of the gate drive circuit 8, and the switch 8a is switched to extract the gate charge. Turns off.
The upper arm element 2 is turned on by injecting electric charge from the driving capacitor 6 to the gate via the switch 7a of the gate driving circuit 7, and the switch 7a is switched so that the reverse bias capacitor 11 is negative with respect to the gate. It is turned off by injecting electric charge.
Here, the switches 7a and 8a are switched by a control signal from a control circuit (not shown).

駆動用コンデンサ６は、下アーム素子３がオンのときに、駆動回路用直流電源４→ダイオード５→駆動用コンデンサ６→下アーム素子３→駆動回路用直流電源４の経路で充電され、充電された電荷は、上アーム素子２をオンする際にゲートに注入される。
逆バイアス用コンデンサ１１は、上アーム素子２がオンのときに、逆バイアス用直流電源９→上アーム素子２→逆バイアス用コンデンサ１１→ダイオード１０→逆バイアス用直流電源９の経路で充電され、充電された電荷は、上アーム素子２をオフする際にゲートに注入される。 When the lower arm element 3 is turned on, the driving capacitor 6 is charged and charged through the path of the driving circuit DC power source 4 → the diode 5 → the driving capacitor 6 → the lower arm element 3 → the driving circuit DC power source 4. The charges are injected into the gate when the upper arm element 2 is turned on.
When the upper arm element 2 is on, the reverse bias capacitor 11 is charged through the path of the reverse bias DC power supply 9 → the upper arm element 2 → the reverse bias capacitor 11 → the diode 10 → the reverse bias DC power supply 9. The charged electric charge is injected into the gate when the upper arm element 2 is turned off.

ダイオード５は、上アーム素子２がオンで下アーム素子３がオフのときに、駆動回路用直流電源４に対して主回路用直流電源１の電圧が印加されないようにするためのものであり、ダイオード１０は、上アーム素子２がオフで下アーム素子３がオンのときに、逆バイアス用直流電源９及び逆バイアス用コンデンサ１１に対して主回路用直流電源１の電圧が印加されないようにするためのものである。   The diode 5 is for preventing the voltage of the main circuit DC power supply 1 from being applied to the drive circuit DC power supply 4 when the upper arm element 2 is ON and the lower arm element 3 is OFF. The diode 10 prevents the voltage of the main circuit DC power supply 1 from being applied to the reverse bias DC power supply 9 and the reverse bias capacitor 11 when the upper arm element 2 is OFF and the lower arm element 3 is ON. Is for.

この実施形態の回路構成を図３の従来技術と比較すると、逆バイアス用直流電源９、ダイオード１０及び逆バイアス用コンデンサ１１が追加されているだけであり、上アーム素子２のオン時に逆バイアス用直流電源９から前述の経路で充電された逆バイアス用コンデンサ１１の電圧が、上アーム素子２のオフ時にそのゲート−エミッタ間に逆バイアスとして作用するので、下アーム素子３がオンしている状態でノイズ等により上アーム素子２が同時にオン状態となるのを防止することができる。
特に、逆バイアス用直流電源９、ダイオード１０及び逆バイアス用コンデンサ１１によるコストや体積の増加は僅かなものであり、少ない負担で上下アームの短絡防止を達成することができる。 When the circuit configuration of this embodiment is compared with the prior art of FIG. 3, only a reverse bias DC power supply 9, a diode 10 and a reverse bias capacitor 11 are added. Since the voltage of the reverse bias capacitor 11 charged from the DC power source 9 through the above-described path acts as a reverse bias between the gate and the emitter when the upper arm element 2 is turned off, the lower arm element 3 is turned on. Thus, it is possible to prevent the upper arm element 2 from being simultaneously turned on due to noise or the like.
In particular, the increase in cost and volume due to the reverse bias DC power source 9, the diode 10, and the reverse bias capacitor 11 is slight, and short-circuit prevention of the upper and lower arms can be achieved with a small burden.

次に、図２は本発明の第２実施形態を示す回路図であり、上述した第１実施形態を一相分の上下アーム素子に対する基本構成として、これを二相分並列に接続した例を示している。
すなわち、追加される一相分の回路は、上アーム素子１２、下アーム素子１３、ダイオード１４，１８、駆動用コンデンサ１５、逆バイアス用コンデンサ１９、ゲート駆動回路１６，１７から構成されており、駆動回路用直流電源、逆バイアス用直流電源としては、それぞれ第１実施形態における各直流電源４，９を二相分に共用している。 Next, FIG. 2 is a circuit diagram showing a second embodiment of the present invention. An example in which the above-described first embodiment is used as a basic configuration for the upper and lower arm elements for one phase and is connected in parallel for two phases. Show.
That is, the circuit for one phase to be added is composed of the upper arm element 12, the lower arm element 13, the diodes 14 and 18, the driving capacitor 15, the reverse bias capacitor 19, and the gate driving circuits 16 and 17. As the DC power source for drive circuit and the DC power source for reverse bias, the DC power sources 4 and 9 in the first embodiment are shared by two phases, respectively.

本実施形態によれば、上下アーム素子からなる直列回路の数、すなわち上下アームの相数が増加しても駆動回路用直流電源及び逆バイアス用直流電源を相数分設ける必要がなく、回路構成の簡略化、低コスト化を図りながら上アーム素子２，１２への逆バイアス印加を容易に実現することができる。
上下アーム数が三相以上になった場合も、同様にして単一の駆動回路用直流電源及び逆バイアス用直流電源をそれぞれ共用できることは言うまでもない。 According to this embodiment, even if the number of series circuits composed of upper and lower arm elements, that is, the number of phases of the upper and lower arms increases, there is no need to provide a DC power source for driving circuits and a DC power source for reverse bias for the number of phases. It is possible to easily realize reverse bias application to the upper arm elements 2 and 12 while simplifying and reducing costs.
Needless to say, even when the number of upper and lower arms is three or more, a single DC power source for driving circuit and a DC power source for reverse bias can be shared in the same manner.

本発明の第１実施形態を示す回路図である。1 is a circuit diagram showing a first embodiment of the present invention. 本発明の第２実施形態を示す回路図である。It is a circuit diagram which shows 2nd Embodiment of this invention. 従来技術を示す回路図である。It is a circuit diagram which shows a prior art.

符号の説明Explanation of symbols

１：主回路用直流電源
２，３，１２，１３：電圧駆動型半導体スイッチング素子（上アーム素子または下アーム素子）
４：駆動回路用直流電源
５，１０，１４，１８：ダイオード
６，１５：駆動用コンデンサ
７，８，１６，１７：ゲート駆動回路
７ａ，８ａ，１６ａ，１７ａ：スイッチ
９：逆バイアス用直流電源
１１，１９：逆バイアス用コンデンサ
1: DC power supply for main circuit 2, 3, 12, 13: Voltage-driven semiconductor switching element (upper arm element or lower arm element)
4: DC power source for driving circuit 5, 10, 14, 18: Diode 6, 15: Capacitor for driving 7, 8, 16, 17: Gate driving circuit 7a, 8a, 16a, 17a: Switch 9: DC power source for reverse bias 11, 19: Reverse bias capacitor

Claims (4)

主回路用直流電源の正極と負極との間に直列に接続されて交互にオン・オフを繰り返す２つの電圧駆動型半導体スイッチング素子を駆動する駆動回路において、
前記半導体スイッチング素子のうち主回路用直流電源の正極に接続された上アーム素子のオン時に、逆バイアス用直流電源からダイオードを介して充電される逆バイアス用コンデンサを備え、
前記上アーム素子のオフ時に、前記逆バイアス用コンデンサの充電電圧により前記上アーム素子に逆バイアス電圧を印加することを特徴とする電圧駆動型半導体スイッチング素子の駆動回路。 In a drive circuit for driving two voltage-driven semiconductor switching elements that are connected in series between a positive electrode and a negative electrode of a DC power source for a main circuit and repeatedly turn on and off alternately,
A reverse bias capacitor that is charged via a diode from a reverse bias DC power supply when the upper arm element connected to the positive electrode of the main circuit DC power supply among the semiconductor switching elements is turned on;
A drive circuit for a voltage-driven semiconductor switching element, wherein a reverse bias voltage is applied to the upper arm element by a charging voltage of the reverse bias capacitor when the upper arm element is turned off. 請求項１に記載した電圧駆動型半導体スイッチング素子の駆動回路において、
前記上アーム素子と直列に接続された下アーム素子を駆動するための駆動回路用直流電源と、
前記下アーム素子のオン時に前記駆動回路用直流電源により充電され、かつその充電電圧により前記上アーム素子をオンさせる駆動用コンデンサと、
を備え、
前記駆動用コンデンサと前記逆バイアス用コンデンサとを直列に接続したことを特徴とする電圧駆動型半導体スイッチング素子の駆動回路。 In the drive circuit of the voltage drive type semiconductor switching element according to claim 1,
A DC power supply for a drive circuit for driving the lower arm element connected in series with the upper arm element;
A driving capacitor that is charged by the DC power source for the driving circuit when the lower arm element is turned on, and that turns on the upper arm element by the charging voltage;
With
A drive circuit for a voltage-driven semiconductor switching element, wherein the drive capacitor and the reverse bias capacitor are connected in series. 請求項１に記載した電圧駆動型半導体スイッチング素子の駆動回路を、前記上アーム素子及び下アーム素子の直列回路を一相分として複数相分備え、複数相分の前記逆バイアス用直流電源を単一の直流電源により共用することを特徴とする電圧駆動型半導体スイッチング素子の駆動回路。   A drive circuit for a voltage-driven semiconductor switching element according to claim 1 is provided for a plurality of phases, each of which includes a series circuit of the upper arm element and the lower arm element as one phase, and the reverse bias DC power supply for a plurality of phases is provided as a single unit A drive circuit for a voltage-driven semiconductor switching element, which is shared by a single DC power supply. 請求項２に記載した電圧駆動型半導体スイッチング素子の駆動回路を、前記上アーム素子及び下アーム素子の直列回路を一相分として複数相分備え、複数相分の前記逆バイアス用直流電源を単一の直流電源により共用し、かつ、複数相分の前記駆動回路用直流電源を別の単一の直流電源により共用することを特徴とする電圧駆動型半導体スイッチング素子の駆動回路。
A drive circuit for a voltage-driven semiconductor switching element according to claim 2 is provided for a plurality of phases of the series circuit of the upper arm element and the lower arm element as one phase, and the reverse bias DC power supply for the plurality of phases is provided as a single unit. A drive circuit for a voltage-driven semiconductor switching element, wherein the drive circuit is shared by one DC power supply, and the DC power supply for the drive circuit for a plurality of phases is shared by another single DC power supply.
JP2006201816A 2006-07-25 2006-07-25 Driving circuit for voltage-driving semiconductor switching element Pending JP2008029163A (en)

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JP2010035389A (en) * 2008-07-31 2010-02-12 Daikin Ind Ltd Inverter circuit
DE102016123678A1 (en) * 2016-12-07 2018-06-07 Hanon Systems Arrangement and method for generating a negative voltage for a high-side switch in an inverter
KR20180065888A (en) * 2016-12-07 2018-06-18 한온시스템 주식회사 Device and method for generating a negative voltage for a high side switch in an inverter
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KR102051001B1 (en) 2016-12-07 2019-12-03 한온시스템 주식회사 Device and method for generating a negative voltage for a high side switch in an inverter
US11394288B2 (en) 2018-01-29 2022-07-19 Rohm Co., Ltd. Negative voltage generation circuit and power conversion device using same

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