JP2008028426A - Method of fabricating semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent a non-defective product of a semiconductor chip from being mounted on a defective die pad of a frame. <P>SOLUTION: A method of fabricating a semiconductor device includes steps of: providing a lead frame 1 that is used for manufacturing the semiconductor device with a bar code 5 corresponding to an identification number the lead frame 1; detecting defects of a die pad while inspecting the lead frame 1; storing position coordinate information in a storage medium after making the position coordinate information on the defective die pad correspond to the identification number on the lead frame 1; reading the identification number (ID) on the lead frame 1 from the bar code 5 on the lead frame 1 with a bar code reader 6 before die-bonding processes; and reading the position coordinate information on the defective die pad corresponding to the identification number (ID) of the lead frame 1 from the storage medium. The die bonding process, followed by processes for fabricating the semiconductor device, are performed by using the position coordinate information on the read defective die pad. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor device manufacturing technique, and more particularly, to a technique for managing good / bad coordinate data of a die pad for each frame and using it in a semiconductor device manufacturing process.

  Conventionally, a method of manufacturing a semiconductor device by packaging a semiconductor chip using a lead frame is known. For example, a semiconductor chip is bonded onto each die pad of the lead frame, the electrode of the semiconductor chip is wire bonded to the lead part of the lead frame, and the semiconductor chip, the lead part, and the bonding wire are sealed with mold resin, and unnecessary lead parts Is cut, a semiconductor device is manufactured.

  In recent years, as the number of pins of a semiconductor device is increased, the pattern of the lead frame tends to be complicated and increased in density, and the lead frame itself has become very expensive.

  The lead frame is manufactured by processing a metal plate into a predetermined shape by etching or pressing. During manufacturing of a lead frame, defects such as disconnection may occur in some die pads or lead portions around the die pad in one lead frame.

  Discarding the lead frame having the defective die pad increases the manufacturing cost. On the other hand, when a lead frame having a defective die pad is used, if a non-defective semiconductor chip is mounted on the defective die pad, an expensive semiconductor chip is required, which increases the manufacturing cost.

  In order to prevent this, the present inventor applies a defect mark indicating a defect to each defective die pad of the lead frame, although this is not a known technique. Then, by performing die bonding while determining the presence or absence of a defective mark with an image identification device or the like, a non-defective semiconductor chip is not mounted on the defective die pad.

  However, since die bonding is performed while determining the presence or absence of a defective mark for each die pad, the manufacturing process of the semiconductor device becomes complicated and the manufacturing time becomes longer. In addition, after the die bonding process or the resin sealing process, the defect mark is covered with the semiconductor chip or the mold resin, so that it is impossible to confirm the presence or absence of the defect mark. For this reason, defective products must be selected and removed by inspecting the finished product of the semiconductor device with a tester. These increase manufacturing costs.

  An object of the present invention is to provide a method of manufacturing a semiconductor device that can prevent a non-defective semiconductor chip from being mounted on a defective die pad without applying a defect mark to each defective die pad of a frame.

  Another object of the present invention is to provide a method of manufacturing a semiconductor device that can simplify the manufacturing process and shorten the manufacturing time.

  Still another object of the present invention is to provide a semiconductor device manufacturing method capable of reducing the manufacturing cost.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  A method of manufacturing a semiconductor device according to the present invention includes a step of preparing a frame having a plurality of die pads on which a semiconductor chip is to be mounted, and having identification means corresponding to its own ID number provided in part, and inspecting the frame A step of detecting a defective die pad among a plurality of die pads, a step of storing information relating to the position coordinates of the defective die pad of the frame in association with the ID number of the frame, and a frame ID number from the frame identification unit And reading the information related to the position coordinates of the defective die pad of the frame according to the ID number of the read frame from the storage means, and manufacturing the semiconductor device using the frame, This is performed using information related to the position coordinates of the defective die pad of the read frame.

  The method for manufacturing a semiconductor device according to the present invention includes a step of preparing a frame having a plurality of die pads on which a semiconductor chip is to be mounted, a step of inspecting the frame and detecting a defective die pad among the plurality of die pads, and a frame defect. A step of providing a frame with a code corresponding to information relating to the position coordinates of the die pad, and a step of reading information relating to the position coordinates of the defective die pad of the frame from the code of the frame by a reading means, and a semiconductor using the frame The apparatus is manufactured using information related to the position coordinates of the defective die pad of the read frame.

  The present invention also provides a frame having a plurality of die pads on which a semiconductor chip is to be mounted, a plurality of the die pads being two-dimensionally arranged, and identification means corresponding to its own ID number being provided in part. A step of inspecting the frame to detect a defective die pad of the plurality of die pads, and information related to a position coordinate of the defective die pad of the frame in correspondence with an ID number of the frame, Storing in a storage means provided separately; reading the ID number of the frame from the identification means of the frame by a reading means; and according to the read ID number of the frame, the defective die pad of the frame Reading information relating to position coordinates from the storage means, on the plurality of die pads of the frame When each of the semiconductor chips is mounted, a plurality of normal ones on the die pad excluding the defective die pad among the plurality of die pads are obtained by using information related to the position coordinates of the defective die pad of the read frame. A step of stacking and mounting the semiconductor chips, and a step of collectively performing resin sealing by transfer molding on the plurality of die pads of the frame.

  The present invention also includes a frame having a plurality of die pads on which a semiconductor chip is to be mounted, wherein the die pads are arranged in an array of a plurality of rows and a plurality of columns, and a barcode corresponding to its own ID number is provided in part. A step of inspecting the frame to detect a defective die pad of the plurality of die pads, and information related to the position coordinates of the defective die pad of the frame, corresponding to the ID number of the frame, Storing in a storage means provided separately from the frame, reading a frame ID number from the barcode of the frame by a barcode reader, and according to the read frame ID number, Reading out information related to the position coordinates of the defective die pad from the storage means, the frame of the frame A die pad excluding the defective die pad of the plurality of die pads using information related to the position coordinates of the defective die pad of the read frame when mounting semiconductor chips on a plurality of die pads. A step of stacking and mounting a plurality of normal semiconductor chips thereon, and a step of collectively performing resin sealing by transfer molding on the plurality of die pads of the frame.

  Further, the present invention has a plurality of chip mounting areas on which semiconductor chips are to be mounted, a large number of the chip mounting areas are two-dimensionally arranged, and identification means corresponding to its own ID number is provided in part. A step of preparing a substrate on which a wiring pattern is formed; a step of inspecting the substrate to detect a defective chip mounting region among the plurality of chip mounting regions; and a position coordinate of the defective chip mounting region of the substrate Storing the related information in a storage means provided separately from the substrate in association with the ID number of the substrate; reading the ID number of the substrate from the identification means of the substrate by the reading means; Reading out information related to the position coordinates of the defective chip mounting area of the substrate from the storage means in accordance with the ID number of the substrate, the plurality of the substrates When each semiconductor chip is mounted on the chip mounting area, the information related to the position coordinates of the defective chip mounting area of the substrate that has been read is used, and the plurality of chip mounting areas are selected. A step of mounting a plurality of normal semiconductor chips on a chip mounting region excluding a defective chip mounting region, and a resin sealing by transfer molding are collectively performed on the plurality of chip mounting regions of the substrate. A process.

  Further, the present invention has a plurality of chip mounting areas on which semiconductor chips are to be mounted, a large number of the chip mounting areas are two-dimensionally arranged, and identification means corresponding to its own ID number is provided in part. A step of preparing a film on which a wiring pattern is formed, a step of inspecting the film to detect a defective chip mounting region among the plurality of chip mounting regions, and a position coordinate of the defective chip mounting region of the film Storing related information in a storage means provided separately from the film in association with the ID number of the film, reading the film ID number from the identification means of the film by a reading means, In accordance with the ID number of the film, information related to the position coordinates of the defective chip mounting area of the film is stored in the storage means. When reading a semiconductor chip on each of the plurality of chip mounting areas of the film, using the information related to the position coordinates of the defective chip mounting area of the read film, A step of mounting a plurality of normal semiconductor chips on a chip mounting region excluding the defective chip mounting region of the plurality of chip mounting regions; and a step of resin sealing by transfer molding The method includes a step of performing collectively on the chip mounting area.

  The outline | summary of the other invention shown in this application is as follows.

Item 1: A step of preparing a frame having a plurality of die pads on which a semiconductor chip is to be mounted and having identification means corresponding to its own ID number provided in part.
Inspecting the frame and detecting a defective die pad of the plurality of die pads;
Storing information related to the position coordinates of the defective die pad of the frame in a storage means in association with the ID number of the frame;
Reading the ID number of the frame by the reading means from the identification means of the frame; and
Reading from the storage means information related to the position coordinates of the defective die pad of the frame according to the read ID number of the frame;
And manufacturing the semiconductor device using the frame using information related to the position coordinates of the defective die pad of the read frame.

Item 2: A step of preparing a frame having a plurality of die pads on which a semiconductor chip is to be mounted and having identification means corresponding to its own ID number provided in part,
Inspecting the frame to detect a defective die pad of the plurality of die pads;
Storing information related to the position coordinates of the defective die pad of the frame in a storage means in association with the ID number of the frame;
Reading the ID number of the frame from the identification means of the frame by a reading means;
Reading from the storage means information related to the position coordinates of the defective die pad of the frame according to the read ID number of the frame; and
When mounting a semiconductor chip on each of the plurality of die pads of the frame, using the information related to the position coordinates of the defective die pad read out of the frame, the defect among the plurality of die pads is used. Mounting a normal semiconductor chip on the die pad excluding the die pad;
A method for manufacturing a semiconductor device, comprising:

Item 3: A step of preparing a frame having a plurality of die pads on which a semiconductor chip is to be mounted and having a bar code corresponding to its own ID number provided in part.
Inspecting the frame to detect a defective die pad of the plurality of die pads;
Storing information related to the position coordinates of the defective die pad of the frame in a storage means in association with the ID number of the frame;
Reading the ID number of the frame from the barcode of the frame with a barcode reader;
Reading from the storage means information related to the position coordinates of the defective die pad of the frame according to the read ID number of the frame; and
When mounting a semiconductor chip on each of the plurality of die pads of the frame, using the information related to the position coordinates of the defective die pad read out of the frame, the defect among the plurality of die pads is used. Mounting a normal semiconductor chip on the die pad excluding the die pad;
A method for manufacturing a semiconductor device, comprising:

Item 4: Preparing a frame having a plurality of die pads on which a semiconductor chip is to be mounted,
Inspecting the frame to detect a defective die pad of the plurality of die pads;
Providing the frame with a code corresponding to information related to the position coordinates of the defective die pad of the frame; and
Reading information related to the position coordinates of the defective die pad of the frame from the code of the frame by a reading unit;
And manufacturing the semiconductor device using the frame using information related to the position coordinates of the defective die pad of the read frame.

Item 5: A step of preparing a frame having a plurality of die pads on which a semiconductor chip is to be mounted,
Inspecting the frame to detect a defective die pad of the plurality of die pads;
Providing the frame with a barcode corresponding to information related to the position coordinates of the defective die pad of the frame;
Reading information related to the position coordinates of the defective die pad of the frame from the barcode of the frame by a barcode reader; and
When the semiconductor chip is mounted on each of the plurality of die pads of the frame, the defective die pad of the plurality of die pads is used by using the information related to the position coordinates of the defective die pad of the read frame. Mounting a normal semiconductor chip on the die pad excluding
A method for manufacturing a semiconductor device, comprising:

  Among the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  Since the good / bad coordinate data of the die pad of the frame can be managed for each frame, the manufacturing process of the semiconductor device can be simplified.

  The manufacturing cost of the semiconductor device can be reduced.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiments, and the repetitive description thereof will be omitted. In the following embodiments, the description of the same or similar parts will not be repeated in principle unless particularly necessary.

  The manufacturing method of the semiconductor device of this embodiment will be described in the order of steps with reference to the drawings.

  First, a lead frame is prepared. FIG. 1 is a conceptual plan view of a lead frame used in this embodiment, and FIG. 2 is a partial enlarged cross-sectional view of the lead frame of FIG.

  As shown in FIGS. 1 and 2, a lead frame 1 used in this embodiment is connected to a die pad 2 for mounting a semiconductor chip thereon, an end of the die pad 2, and the die pad 2 is used as a lead frame. A die pad support portion or suspension lead (not shown) for supporting, an inner lead 3 for being electrically connected to the electrode of the semiconductor chip, and being connected to the inner lead 3 and being an external electrode The outer leads 4 and the like are formed and have a structure in which a large number of these patterns are connected two-dimensionally. In FIG. 1, only the two-dimensional array position of the die pad 2 is shown for easy understanding, and the die pad support portion, the inner lead 3, the outer lead 4 and the like are not shown.

  The lead frame 1 can be manufactured by a desired method. For example, an iron-based or copper-based metal plate such as an iron (Fe) -nickel (Ni) alloy or copper (Cu) is processed by etching or pressing and the like. Manufactured by patterning into shapes. The pattern shape of the lead frame 1 can be designed according to the type and number of semiconductor chips to be mounted.

  As shown in FIG. 1, a management code that can identify itself, for example, a bar code 5, is assigned to a predetermined position of the lead frame 1. The bar code 5 is a bar code corresponding to a lead frame ID number determined for each lead frame.

  The bar code 5 can be applied to an empty portion of the lead frame 1, but for example, if it is formed in an unpatterned flat plate region near the end of the lead frame 1 as shown in FIG. Is easy to read the bar code 5 and does not adversely affect the bar code 5 during die bonding and subsequent processes. Further, the barcode 5 can be read by the barcode reader 6 and has good operability. However, other than the barcode, an identification means that can be read by various apparatuses or methods and can identify each lead frame 1 is used as the lead frame. For example, the lead frame ID number itself may be assigned to the lead frame 1. Alternatively, it may be a protrusion or hole corresponding to the lead frame ID number. Further, the lead frame ID number can be composed of not only numbers but also letters, symbols, codes, numbers, and combinations thereof.

  Next, the lead frame 1 is inspected for each die pad 2 for defects. Inspection of die pad defects can be performed by various devices or methods such as, for example, an image identification device, a tester, or visual inspection. Here, the defect of the die pad is, for example, a defect in the pattern shape of the die pad itself, or a disconnection of a lead portion (inner lead 3 and outer lead 4) to be electrically connected to a semiconductor chip mounted on the die pad. It is. Therefore, a defective die pad corresponds to a die pad on which a normal semiconductor chip, that is, a non-defective semiconductor chip is mounted to manufacture a semiconductor device, and a defective semiconductor device is manufactured there.

  Next, information such as the position coordinates of the die pad (defective die pad) 2a in which a defect in the lead frame is found is associated with the lead frame ID number in a storage medium such as a recording medium or floppy (registered trademark) in a computer. Store it on a disc.

  For a plurality of lead frames, each lead frame ID number and information such as the position coordinates of the defective die pad of the lead frame corresponding thereto are stored in a storage medium in association with each other and managed.

  Before starting the die bonding process using the lead frame 1 prepared as described above, map data of the lead frame 1 is created, and the die bonding process and subsequent processes are performed based on the map data. FIG. 3 is an explanatory diagram showing a procedure for creating lead frame map data. FIG. 4 is a flowchart showing a procedure for creating lead frame map data.

  First, as shown in FIGS. 3 and 4, the lead frame 1 is transported to the barcode reading position (step S1). Then, the barcode 5 of the lead frame 1 is read by the barcode reader 6 (Step S2).

  Next, the lead frame ID number of the lead frame 1 is identified from the barcode 5 read by the barcode reader 6 (step S3).

  Next, frame data corresponding to the lead frame ID number of the lead frame 1 is read from a storage medium on which information such as the position coordinates of the defective die pad 2a is recorded, and taken into a computer 7 such as a frame mapping display personal computer, for example. It is displayed (step S4). As frame data, for example, coordinate data (for example, position coordinates of each die pad, position coordinates of defective die pad, frame length, frame width, pitch in X direction, pitch in Y direction, etc.) and frame product information (for example, product name) , Lead frame ID number, number of good products, grade, number of defective products, etc.). Further, as shown in FIG. 3, the position coordinates of each die pad 2 and the position coordinates of the defective die pad 2 a are mapped, and are displayed two-dimensionally as map data of the lead frame 1 on the computer 7.

  Then, the computer 7 transmits coordinate data corresponding to the lead frame ID number of the lead frame 1, for example, the position coordinates of each die pad 2 and the position coordinates of the defective die pad 2a, to the die bonder or die bonding apparatus (step S5).

  The die bonding apparatus receives coordinate data corresponding to the lead frame ID number and starts die bonding to the lead frame 1 (step S6).

  5 to 8 are sectional views showing a die bonding process and subsequent process steps.

  As shown in FIG. 5, an adhesive 8 such as a thermosetting resin or silver paste is applied on each die pad 2 of the lead frame 1, and an IC or a semiconductor chip 9 is sequentially applied onto the die pad 2 via the adhesive 8. Mounted and glued.

  At this time, the die bonding apparatus is based on coordinate data such as the position coordinates 2 of each die pad and the position coordinates of the defective die pad 2a, and a normal semiconductor only on a die pad other than the defective die pad 2a in the die pad 2, that is, a normal die pad. A chip 9 is mounted.

  On the defective die pad 2a, it is possible to skip to the next normal die pad position without applying adhesive or mounting the semiconductor chip 9. Thereby, manufacturing time can be shortened.

  A defective semiconductor chip that cannot be used as a product may be mounted on the defective die pad 2a. In this case, since the semiconductor chip is bonded onto both normal and defective die pads, the mold resin can be formed more uniformly in the resin sealing step described later. For example, it is effective when resin sealing is performed collectively at a plurality of die pad positions by transfer molding. Further, since a semiconductor chip that cannot be used as a product is mounted on the defective die pad, the manufacturing cost can be suppressed.

  Next, the wire bonding apparatus receives coordinate data corresponding to the lead frame ID number, for example, the position coordinates of each die pad 2 and the position coordinates of the defective die pad 2a, and starts wire bonding. That is, as shown in FIG. 6, the electrodes 10 of the semiconductor chip 9 mounted on each die pad 2 and the inner leads 3 located near the periphery of the die pad are electrically connected by the bonding wires 11. At this time, the wire bonding apparatus can skip the wire bonding at the defective die pad position and skip to the next normal die pad position based on the coordinate data. This increases the machine cycle and shortens the manufacturing time.

  The wire-bonded lead frame 1 is resin-sealed by a molding apparatus. As shown in FIG. 7, the semiconductor chip 9, the inner lead 3 and the bonding wire 11 are sealed with a mold resin 12 made of a thermosetting resin or the like, and the outer lead 4 is exposed from the mold resin 12.

  Then, the outer lead 4 is subjected to solder plating, for example, by electrolytic plating, and unnecessary lead portions are cut to form the external electrode 4a. Thereby, the semiconductor device 20 shown in FIG. 8 is completed. Further, the semiconductor device 20 can be mounted on a printed wiring board (not shown) or the like as necessary.

  The semiconductor device manufactured with the position coordinates of the defective die pad 2a of the lead frame 1 is selected and removed as a defective product without inspection based on coordinate data such as the position coordinates of the defective die pad corresponding to the lead frame ID number.

  According to the present embodiment, since the coordinate data of the good / bad of the die pad of the lead frame is managed for each lead frame, it is not necessary to apply the defective mark to the defective die pad, and the defect mark is determined for each die pad in the die bonding process. There is no need to determine the presence or absence. Since die bonding is performed based on coordinate data for each lead frame, it is possible to easily prevent an expensive normal semiconductor chip from being mounted on a defective die pad. For this reason, the manufacturing process of the semiconductor device can be simplified and the manufacturing time can be shortened.

  Also, even when multiple semiconductor chips are stacked like a stack type product, the position of the defective die pad can be grasped without a defective mark, and normal semiconductor chips are prevented from being stacked on the defective die pad. Can do.

  Further, the position of the defective die pad can be grasped even after the resin sealing step. For this reason, the defective product of the semiconductor device manufactured at the defective die pad position can be selected without inspecting it with a tester or the like.

  Further, by performing an operation such as preforming or bonding based on the coordinate data extracted from the lead frame map data, the preforming or bonding operation can be skipped at the coordinate position of the defective die pad. As a result, the cycle of each manufacturing apparatus can be increased, and the manufacturing time can be shortened.

  Further, as in the case of semiconductor wafers, the number of die bonding, the number of defective die pads, the number of non-defective products, etc. can be managed in lead frame units.

  By using together with the wafer mapping function, it is possible to classify the grade of the semiconductor chip to be mounted for each die pad.

  Furthermore, from these effects, the manufacturing cost of the semiconductor device can be significantly reduced.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  In the above-described embodiment, the case where the lead frame is used to package the semiconductor chip has been described. However, the present invention is not limited to this, and a substrate frame, for example, a wiring pattern is provided in addition to the lead frame. Various frames that can be used for manufacturing a semiconductor device by mounting a semiconductor chip, such as a formed glass epoxy insulating substrate and a film frame, for example, an insulating film on which a wiring pattern is formed, can be used.

  In the above-described embodiment, the lead frame ID number is converted into a barcode and assigned to the lead frame. However, the position coordinate data of the defective die pad in the lead frame itself is encoded, for example, converted into a barcode, and after the defect inspection of the die pad. It can also be given to each lead frame. In this case, the position coordinate data of the defective die pad is read from the barcode of the lead frame before die bonding, and the die bonding step and subsequent steps are performed in the same manner as in the above embodiment based on the read position coordinate data of the defective die pad. It can be performed.

  The present invention is effective when applied to semiconductor device manufacturing technology.

It is a conceptual top view of the lead frame used with the manufacturing method of the semiconductor device which is one embodiment of this invention. FIG. 2 is a partial enlarged cross-sectional view of the lead frame in FIG. 1. It is explanatory drawing which shows the preparation procedure of the map data of a lead frame. It is a flowchart which shows the preparation procedure of the map data of a lead frame. It is sectional drawing which shows the manufacturing method of the semiconductor device which is one embodiment of this invention. It is sectional drawing which shows the manufacturing method of the semiconductor device which is one embodiment of this invention. It is sectional drawing which shows the manufacturing method of the semiconductor device which is one embodiment of this invention. It is sectional drawing which shows the manufacturing method of the semiconductor device which is one embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Lead frame 2 Die pad 2a Defective die pad 3 Inner lead 4 Outer lead 4a External electrode 5 Bar code 6 Bar code reader 7 Computer 8 Adhesive material 9 Semiconductor chip 10 Electrode 11 Bonding wire 12 Mold resin 20 Semiconductor device

Claims (4)

A step of preparing a frame having a plurality of die pads to be mounted with semiconductor chips, two-dimensionally arranged in a number of the die pads, and a part of identification means corresponding to its own ID number;
Inspecting the frame to detect a defective die pad of the plurality of die pads;
Storing information related to the position coordinates of the defective die pad of the frame in a storage means provided separately from the frame in association with the ID number of the frame;
A step of reading an ID number of the frame from the identification unit of the frame by a reading unit;
Reading from the storage means information related to the position coordinates of the defective die pad of the frame according to the read ID number of the frame;
When mounting a semiconductor chip on each of the plurality of die pads of the frame, using the information related to the position coordinates of the defective die pad read out of the frame, the defect among the plurality of die pads is used. Stacking and mounting a plurality of normal semiconductor chips on a die pad excluding the die pad; and
A step of collectively performing resin sealing by transfer molding on the plurality of die pads of the frame;
A method for manufacturing a semiconductor device, comprising: A step of providing a frame having a plurality of die pads on which semiconductor chips are to be mounted, the die pads being arranged in an array of a plurality of rows and a plurality of columns, and a bar code corresponding to its own ID number provided in part;
Inspecting the frame to detect a defective die pad of the plurality of die pads;
Storing information related to the position coordinates of the defective die pad of the frame in a storage means provided separately from the frame in association with the ID number of the frame;
Reading the ID number of the frame from the barcode of the frame with a barcode reader;
Reading from the storage means information related to the position coordinates of the defective die pad of the frame in accordance with the ID number of the read frame;
When mounting a semiconductor chip on each of the plurality of die pads of the frame, using the information related to the position coordinates of the defective die pad read out of the frame, the defect among the plurality of die pads is used. Stacking and mounting a plurality of normal semiconductor chips on a die pad excluding the die pad; and
A step of collectively performing resin sealing by transfer molding on the plurality of die pads of the frame;
A method for manufacturing a semiconductor device, comprising: A wiring pattern having a plurality of chip mounting areas on which semiconductor chips are to be mounted, a large number of the chip mounting areas being two-dimensionally arranged, and identification means corresponding to its own ID number being provided in part is formed Preparing a substrate,
Inspecting the substrate to detect a defective chip mounting area among the plurality of chip mounting areas;
Storing information related to the position coordinates of the defective chip mounting area of the substrate in a storage means provided separately from the substrate in association with the ID number of the substrate;
A step of reading an ID number of the substrate from the identification unit of the substrate by a reading unit;
Reading information related to the position coordinates of the defective chip mounting area of the substrate from the storage unit according to the read ID number of the substrate;
When mounting a semiconductor chip on each of the plurality of chip mounting regions of the substrate, the plurality of chips are utilized by using the read information related to the position coordinates of the defective chip mounting region of the substrate. A step of mounting a plurality of normal semiconductor chips on a chip mounting region excluding the defective chip mounting region in the mounting region, and a resin sealing by transfer molding in the plurality of chip mounting regions of the substrate Process for batch
A method for manufacturing a semiconductor device, comprising: A wiring pattern having a plurality of chip mounting areas on which semiconductor chips are to be mounted, a large number of the chip mounting areas being two-dimensionally arranged, and identification means corresponding to its own ID number being provided in part is formed Preparing a film,
Inspecting the film and detecting a defective chip mounting area among the plurality of chip mounting areas;
Storing information related to the position coordinates of the defective chip mounting area of the film in a storage means provided separately from the film in association with the ID number of the film;
A step of reading an ID number of the film from the identification unit of the film by a reading unit;
Reading out information relating to the position coordinates of the defective chip mounting area of the film from the storage means in accordance with the read ID number of the film;
When mounting a semiconductor chip on each of the plurality of chip mounting areas of the film, the plurality of chips are obtained using information related to the read position coordinates of the defective chip mounting area of the film. Mounting a plurality of normal semiconductor chips on a chip mounting area excluding the defective chip mounting area in the mounting area; and
A step of collectively performing resin sealing by transfer molding on the plurality of chip mounting regions of the film;
A method for manufacturing a semiconductor device, comprising:

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