JP2008059195A - Interface method and data processing system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To quicken the transfer speed of data in a system where a plurality of data processors are connected. <P>SOLUTION: This data processing system is provided with a first data processor having an interface circuit for transmitting data; a second processor having an interface circuit for receiving data; and a storage device for storing data to be transferred. This interface method for transferring data includes an address notification step for notifying the interface circuit of the second data processor of address information showing the data to be transferred in the storage device from the interface circuit of the first data processor; and a data read step for making the second data processor perform access to the storage device on the basis of the address information, and read the data to be transferred. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an interface method for transferring data between a plurality of data processing apparatuses.

  Conventionally, as an interface method in a system in which a plurality of data processing devices are connected, a method of connecting data processing devices with an existing interface protocol has been used.

  FIG. 2 is a block diagram showing a configuration of a system for transferring data between two LSIs (large scale integration) by a conventional interface method. In FIG. 2, a front-end LSI 101 that is in charge of a pre-process of a series of data processing and a back-end LSI 102 that is in charge of a post-process are connected by an existing interface 103. In this case, communication between the front end LSI 101 and the back end LSI 102 is performed according to the protocol of the existing interface 103.

  According to FIG. 2, a plurality of data processing devices that perform independent processing can be connected and operated by diverting a small amount of hardware and software related to the interface. .

  There is also a method for realizing an interface by sharing a memory among a plurality of data processing apparatuses (see, for example, Patent Document 1). FIG. 3 is a block diagram showing a configuration of a system in which a plurality of data processing apparatuses respectively use the same shared memory. In the system shown in FIG. 3, each of the data processing devices 201 and 202 writes data to be transmitted to one of the other data processing devices to the shared memory 204 via the shared bus 203, and one receives from the other data processing device. Data to be read is read from the shared memory 204 via the shared bus 203.

By using this interface method, by storing data in the shared memory, even when the data processing device on the transmission side and the data processing device on the reception side are asynchronous, data with a large capacity can be transmitted and received.
Japanese Patent Laid-Open No. 5-225127 (FIG. 1)

  The interface method in the system of FIG. 2 is suitable for issuing an instruction, for example, because communication between data processing devices is performed according to a protocol specific to the interface. However, according to this interface method, when data is transferred, there is a problem that the transfer speed is lowered due to the overhead of the protocol.

  FIG. 4 is a block diagram showing in detail the configuration of the system of FIG. As shown in FIG. 4, the transmission-side and reception-side LSIs use different areas of the buffer memory 105, and store the data before transfer and the transferred data in the buffer memory 105, respectively. For this reason, the system as a whole has a plurality of identical data on the memory resource, and there is a problem that an area larger than the capacity of the transfer data is used.

  The interface method in the system shown in FIG. 3 is suitable for transferring large-capacity data, but has a problem that the response decreases when an instruction is issued. In addition, when it is functionally complete independently, such as front-end LSI and back-end LSI, it is necessary to drastically change the hardware and embedded software related to communication possessed by each data processing device. In addition, there is a problem that it is difficult to ensure compatibility of functions.

  It is an object of the present invention to increase the data transfer speed while minimizing software and hardware changes in a system in which a plurality of data processing devices are connected. It is another object of the present invention to reduce a buffer memory area necessary for data transfer.

  In order to solve the above-mentioned problem, the means of the invention of claim 1 transfers the first data processing apparatus having an interface circuit for performing transmission and the second data processing apparatus having an interface circuit for performing reception. An interface method for transferring data in a data processing system comprising a storage device for holding data to be stored, wherein address information indicating the data to be transferred in the storage device is used as an interface of the first data processing device An address notification step for notifying the interface circuit of the second data processing device from the circuit, and data for the second data processing device to access the storage device based on the address information and read the data to be transferred A reading step.

  According to the first aspect of the present invention, data is transferred between the interface circuits so that the data written by the transmitting side is read by the receiving side without being transferred between the interface circuits. Therefore, the data transfer speed can be increased without being affected by the protocol overhead between the interface circuits. In addition, since the transmission side and the reception side handle the same data on the storage device, the area of the storage device used for data transfer can be reduced.

  According to a second aspect of the present invention, in the interface method according to the first aspect, a data transfer instruction for transferring data from the interface circuit of the first data processing device to the interface circuit of the second data processing device is sent to the address The method further includes a step of replacing with a command for performing the notification step and the data reading step.

  According to the invention of claim 2, since the existing instruction is used by being replaced, it is possible to suppress an increase in the types of instructions from the existing interface protocol.

  According to a third aspect of the present invention, in the interface method according to the first aspect, a new type of data transfer instruction for performing the address notification step and the data read step is used.

  According to the invention of claim 3, since a new command is added to the existing interface protocol and used, it is possible to have upward compatibility with the existing interface protocol.

  According to a fourth aspect of the present invention, in the interface method according to the first aspect, the first data processing device and the second data processing device share at least a part of an address space of the storage device. .

  According to a fifth aspect of the present invention, in the interface method according to the fourth aspect, at least one of the first data processing device and the second data processing device incorporates the storage device.

  According to a sixth aspect of the present invention, in the interface method according to the fourth aspect, the data processing system comprises the storage device outside the first data processing device and the second data processing device. is there.

  According to a seventh aspect of the present invention, in the interface method according to the first aspect, the data processing system includes a plurality of the storage devices, and the first data processing device and the second data processing device include the plurality of storage devices. It shares at least part of the address space of the storage device.

  According to an eighth aspect of the present invention, there is provided a first data processing device having an interface circuit that performs transmission, a second data processing device having an interface circuit that performs reception, and the first data processing that holds data to be transferred. An interface method for transferring data in a data processing system comprising a storage device having a first area used by a device and a second area used by the second data processing device, wherein the transfer method A data copy step of copying data to be transferred from the first area to the second area, and the second data processing apparatus accesses the storage device and copies the data copied to the second area. A data read step for reading.

  According to the eighth aspect of the present invention, the data is not transferred between the interface circuits, and the data on the storage device is copied so that the data on the transmitting side is copied to the receiving side so that the receiving side reads the data. Transfer. For this reason, since it is not affected by the protocol overhead between the interface circuits, the data transfer rate can be increased.

  According to a ninth aspect of the present invention, in the interface method according to the eighth aspect, a data transfer instruction for transferring data from the interface circuit of the first data processing device to the interface circuit of the second data processing device is sent to the data The method further includes a step of replacing with a command for performing the copying step and the data reading step.

  A tenth aspect of the present invention is the interface method according to the eighth aspect, wherein a new type of data transfer instruction for performing the data copy step and the data read step is used.

  The invention of claim 11 comprises a storage device for holding data to be transferred, a first data processing device having a first interface circuit for transmission, and a second interface circuit for reception, wherein the transfer A second data processing device that reads data to be read from the storage device, and the first interface circuit notifies the second interface circuit of address information indicating the data to be transferred in the storage device The second data processing device reads the data to be transferred from the storage device based on the address information.

  According to the present invention, only the data transfer is not performed directly between the interface circuits. Therefore, the hardware and software are slightly changed as compared with the case where the data transfer is actually performed between the interface circuits. Thus, the data transfer speed can be increased. In addition, the area of the storage device used for data transfer can be reduced. Therefore, a large-scale system having many data processing devices can be accelerated and reduced in cost.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a block diagram showing a configuration of a data processing system according to an embodiment of the present invention. The data processing system of FIG. 1 includes data processing devices 10 and 20 and a storage device 40. The data processing devices 10 and 20 are LSIs, for example, and have interface circuits 12 and 22, respectively. The storage device 40 has a transfer data buffer area 42. The data processing devices 10 and 20 share at least a part of the address space in the transfer data buffer area 42 and write and read arbitrary data, respectively.

  The interface circuits 12 and 22 are connected to each other, and exchange a command 411 and a response 412 to the command 411. The interface circuits 12 and 22 comply with, for example, an ATA (advanced technology attachment) standard. In this standard, a host that issues and transmits a command and a device that receives and responds to the command are paired. In this embodiment, the interface circuit 12 is a host-side interface circuit, and the interface circuit 22 is a device-side interface circuit.

  When communication is performed between the data processing device 10 and the data processing device 20, processing is performed as follows. First, the interface circuit 12 transmits an instruction 411 to the interface circuit 22 for communication. The interface circuit 22 decodes and executes the received instruction 411 and transmits a response 412 to the interface circuit 12. As described above, communication is established between the interface circuit 12 and the interface circuit 22 by the exchange of the command 411 and the response 412.

  When the content of communication performed between the data processing device 10 and the data processing device 20 is data transfer from the data processing device 10 to the data processing device 20, processing is performed as follows. First, the interface circuit 12 transmits an instruction code assigned to data transfer as an instruction 411 to the interface circuit 22. Further, the data processing device 10 writes data to be transferred to the data processing device 20 in the transfer data buffer area 42 in advance. After transmitting the instruction code, the interface circuit 12 notifies the interface circuit 22 of address information indicating the data to be transferred arranged in the transfer data buffer area 42, for example, the start address and the data size.

  When the interface circuit 22 receives the instruction code assigned to the data transfer, the interface circuit 22 latches the address information transmitted immediately thereafter as the address information of the data to be transferred to the data processing device 20. The data processing device 20 accesses the transfer data buffer area 42 based on the address information latched by the interface circuit 22 and reads the data to be transferred as necessary.

  Communication other than data transfer performed between the data processing device 10 and the data processing device 20 is performed between the interface circuit 12 and the interface circuit 22. As a result, software and hardware changes can be minimized.

  Further, when data is transferred from the data processing device 20 to the data processing device 10, the same processing as described above can be performed.

  It should be noted that a process for transferring data from the interface circuit 12 to the interface circuit 22, a process for notifying the interface circuit 22 of the address information of the data to be transferred, a data transfer command according to an existing interface protocol, and transfer data It may be replaced with an instruction for performing processing for reading data to be transferred from the buffer area 42. This can suppress an increase in the types of instructions in the existing interface protocol.

  It is to be noted that a new type of data transfer instruction is used for performing a process of notifying the interface circuit 22 of address information of data to be transferred and a process of reading data to be transferred from the transfer data buffer area 42. Also good. As a result, upward compatibility with the existing interface protocol can be achieved.

  In the storage device 40, the data processing devices 10 and 20 perform data transfer using the areas individually used by the data processing devices 10 and 20 instead of the transfer data buffer region 42 that shares the address space. Also good. In this case, the data to be transferred is copied from the area used by the data processing apparatus 10 to the area used by the data processing apparatus 20. The data processing device 20 reads the copied data from the area used by the data processing device 20 in the storage device 40 as necessary.

  It should be noted that a data transfer command based on an existing interface protocol for performing a process of transferring data from the interface circuit 12 to the interface circuit 22 is sent from the area where the data processor 10 uses the data to be transferred. An instruction for performing a process of copying to the area to be used and a process of reading the copied data from the area used by the data processing device 20 may be used.

  A process for copying data to be transferred from an area used by the data processing apparatus 10 to an area used by the data processing apparatus 20 and a process for reading the copied data from the area used by the data processing apparatus 20 are performed. Therefore, a new type of data transfer instruction may be used.

  Note that the storage device 40 may be external to each of the data processing devices 10 and 20, or at least one of the data processing devices 10 and 20 may incorporate the storage device 40.

  The data processing system may include a plurality of storage devices 40, and the data processing devices 10 and 20 may share at least a part of the address space in these storage devices 40.

  As described above, according to the present embodiment, the data transfer rate can be increased in a system in which a plurality of data processing devices are connected. In addition, the area of the storage device used for data transfer can be reduced. Therefore, when a single LSI is constructed by integrating a plurality of LSIs each having an interface circuit into one chip, the system can be speeded up and the cost can be reduced.

  As described above, the present invention increases the data transfer speed, and thus is useful for a system having a plurality of data processing devices that perform data transfer.

It is a block diagram which shows the structure of the data processing system which concerns on embodiment of this invention. It is a block diagram showing a system configuration for transferring data between two LSIs by a conventional interface method. 1 is a block diagram showing a configuration of a system in which a plurality of data processing devices respectively use the same shared memory. It is a block diagram which shows the structure of the system of FIG. 2 in detail.

Explanation of symbols

10, 20 Data processing device 12, 22 Interface circuit 40 Storage device

Claims (11)

Data transfer in a data processing system comprising a first data processing device having an interface circuit that performs transmission, a second data processing device having an interface circuit that performs reception, and a storage device that holds data to be transferred An interface method for performing
An address notification step of notifying address information indicating the data to be transferred in the storage device from the interface circuit of the first data processing device to the interface circuit of the second data processing device;
An interface method, comprising: a data reading step in which the second data processing device accesses the storage device based on the address information and reads the data to be transferred. The interface method according to claim 1,
Replacing a data transfer instruction for transferring data from the interface circuit of the first data processing apparatus to the interface circuit of the second data processing apparatus with an instruction for performing the address notification step and the data reading step; An interface method, further comprising: The interface method according to claim 1,
An interface method using a new type of data transfer command for performing the address notification step and the data read step. The interface method according to claim 1,
The interface method, wherein the first data processing device and the second data processing device share at least part of an address space of the storage device. 5. The interface method according to claim 4, wherein
An interface method, wherein at least one of the first data processing device and the second data processing device incorporates the storage device. 5. The interface method according to claim 4, wherein
The interface method, wherein the data processing system includes the storage device outside the first data processing device and the second data processing device. The interface method according to claim 1,
The data processing system includes a plurality of the storage devices,
The interface method, wherein the first data processing device and the second data processing device share at least a part of an address space of the plurality of storage devices. A first data processing device having an interface circuit for performing transmission, a second data processing device having an interface circuit for performing reception, and a first data processing device that holds data to be transferred and is used by the first data processing device. In a data processing system comprising a storage device having a region and a second region used by the second data processing device, an interface method for transferring data,
A data copy step of copying the data to be transferred from the first area to the second area;
An interface method, comprising: a data reading step in which the second data processing device accesses the storage device and reads data copied to the second area. 9. The interface method according to claim 8, wherein
Replacing a data transfer instruction for transferring data from the interface circuit of the first data processing apparatus to the interface circuit of the second data processing apparatus with an instruction for performing the data copying step and the data reading step; An interface method, further comprising: 9. The interface method according to claim 8, wherein
An interface method using a new type of data transfer instruction for performing the data copy step and the data read step. A storage device holding data to be transferred;
A first data processing device having a first interface circuit for transmitting;
A second interface circuit for receiving, and a second data processing device for reading out the data to be transferred from the storage device,
The first interface circuit includes:
Address information indicating the data to be transferred in the storage device is notified to the second interface circuit;
The second data processing device includes:
A data processing system which reads out the data to be transferred from the storage device based on the address information.

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