JP2008047578A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve the adhesion properties between copper wiring and an insulation film by contriving the structure of a barrier film. <P>SOLUTION: The semiconductor device comprises: a second insulation film 21 for covering first wiring 17 formed on a first insulation film 12 on a substrate 11; a wiring groove 25 formed on the second insulation film 21; a connection hole 26 that is formed on the second insulation film 21 at the bottom of the wiring groove 25, and is connected to the first wiring 17; a first barrier film 31 formed in the inner surfaces of the wiring groove 25 and the connection hole 26 excluding the bottom of the connection hole 26; a second barrier film 34 formed on the first insulation film 12 at the bottom of the connection hole 26; and second wiring 35 (including a plug 36) buried into the wiring groove 25 and the connection hole 26 via the first barrier film 31 and the second barrier film 34. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor device having a trench wiring and a method for manufacturing the same.

Alloy target containing manganese (Mn) without forming a tantalum (Ta) film or a tantalum nitride (TaN) film as a diffusion barrier in a recess serving as a groove wiring in a copper wiring process of a semiconductor device For example, after a seed layer for electrolytic plating is formed by sputtering using a copper manganese (CuMn) target, copper (Cu) is embedded in the recesses. Then, by performing an annealing process at 300 ° C. for 30 minutes, manganese silicate (MnSi _x O _y ) is formed at the interface between the interlayer insulating film in which the recess is formed (for example, a silicon oxide film formed from a TEOS raw material) and copper. ) Form a copper diffusion barrier in the film. Thereafter, surplus manganese is precipitated as manganese oxide (MnO) on the surface of the copper plating film, and the resistance value of copper that has increased due to the addition of manganese is reduced. A technique using such a MnSi _x O _y film as a barrier has been reported (for example, see Non-Patent Document 1).

However, a wiring structure using a low dielectric constant (Low-k) film composed of a plurality of layers as the insulating film, for example, a plasma silicon oxide (P-SiO ₂ ) film, a polyaryl ether film, a SiCOH film, a SiCN from the upper layer. In the wiring structure formed in the insulating film configured like a film, the type of the insulating film appearing on the surface of the wiring groove or connection hole is different, so the easiness of forming MnSi _x O _{y on} each film surface is different, There is a region where the adhesion between copper and the insulating film is not sufficient. As a result, when the excess copper is peeled off due to mechanical stress when chemical mechanical polishing (CMP) is applied, and when thermal stress is applied, the copper interface moves because of insufficient adhesion. As a result, disconnection failure occurs.

  In addition, when a barrier film made of a metal such as tantalum (Ta) is formed so as to cover all the inner surfaces of the wiring grooves and connection holes, adhesion is ensured, but the connection holes and the connection holes The electrical resistance with the lower layer wiring to be connected increases.

`` Low Resistive and Highly Reliable Cu Dual-Damascene Interconnect Technology Using Self '' by T. Usui, H. Nasu, J. Koike, M. Wada, S. Takahashi, N. Shimizu, T. Nishikawa, M. Yoshimura and H. Shibata -Formed MnSixOy Barrier Layer ”IEEE International Interconnect Technology Conference 2005 p.188-190 2005

  The problem to be solved is that when a wiring groove and a connection hole are formed in an insulating film composed of a plurality of layers, the wiring material and the insulating film are caused by different film structures of the insulating film inside the wiring groove and the connection hole. In addition, when a barrier film made of a metal such as tantalum (Ta) is formed so as to cover all the inner surfaces of the wiring grooves and connection holes, the adhesion is ensured. However, since a barrier film is formed between the connection hole and the lower layer wiring at the bottom of the connection hole, the electrical resistance is increased.

  An object of the present invention is to improve the adhesion between copper and an insulating film through a barrier film.

  The semiconductor device of the present invention includes a second insulating film that covers the first wiring formed on the first insulating film on the substrate, a wiring groove formed on the second insulating film, and the bottom of the wiring groove. A connection hole that is formed in the second insulating film and communicates with the first wiring; a first barrier film formed on an inner surface of the wiring groove and the connection hole excluding the bottom of the connection hole; and a bottom of the connection hole. A second barrier film formed on the first insulating film; and a second wiring embedded in the wiring groove and the connection hole through the first barrier film and the second barrier film. And

  In the semiconductor device of the present invention, since the first barrier film is formed on the inner surface of the wiring groove and the connecting hole except for the bottom of the connecting hole, the first barrier film is made to adhere to the second insulating film and the second wiring. An excellent film can be formed. For example, when copper is used as the material of the second wiring, a tantalum (Ta) film or a titanium (Ti) film having excellent adhesion with copper and an insulating film can be used for the first barrier film. For this reason, even if the second insulating film is formed of a plurality of different types of insulating films, adhesion between the second insulating film and the second wiring is ensured through the first barrier film. In addition, since the second barrier film is formed only on the first insulating film at the bottom of the connection hole, the first wiring and the second wiring are directly connected without passing through the barrier film. Adhesion with the second wiring is ensured and contact resistance is reduced.

  The method for manufacturing a semiconductor device of the present invention includes a step of forming a wiring groove in the second insulating film covering the first wiring formed in the first insulating film on the substrate and a connection hole at the bottom of the wiring groove; Forming a first barrier film on the inner surfaces of the wiring groove and the connection hole excluding the bottom of the connection hole, forming a second barrier film on the first insulating film at the bottom of the connection hole, and the wiring Forming a second wiring in the groove and the connection hole via the first barrier film and the second barrier film.

  In the method for manufacturing a semiconductor device according to the present invention, the first barrier film is formed so as not to be formed at the bottom of the connection hole. Therefore, a film having excellent adhesion between the second insulating film and the second wiring is formed on the first barrier film. Can be formed. For example, when copper is used as the material for the second wiring, a tantalum (Ta) film or a titanium (Ti) film having excellent adhesion to copper can be used for the first barrier film. For this reason, even if the second insulating film is formed of different types of insulating films, adhesion between the second insulating film and the second wiring is ensured through the first barrier film. In addition, since the second barrier film is formed only on the first insulating film at the bottom of the connection hole, the first wiring and the second wiring are directly connected without passing through the barrier film. Adhesion with the wiring is ensured and contact resistance is reduced.

  According to the semiconductor device of the present invention, since the first barrier film having high adhesion can be used in the portion other than the bottom of the connection hole, the adhesion between the second wiring and the second insulating film can be ensured. There is an advantage that a semiconductor device having a highly reliable wiring structure can be provided. In addition, since the connection between the first wiring and the second wiring at the bottom of the connection hole is a direct connection between the wirings without passing through the barrier film, adhesion can be ensured and contact resistance can be reduced. There is an advantage that a semiconductor device having a highly reliable wiring structure can be provided.

  According to the method for manufacturing a semiconductor device of the present invention, the first barrier film having high adhesion can be formed on the portion other than the bottom of the connection hole, and therefore the adhesion between the second wiring and the second insulating film is ensured. Therefore, there is an advantage that the wiring reliability can be improved. In addition, since the connection between the first wiring and the second wiring at the bottom of the connection hole is a direct connection between the wirings without passing through the barrier film, adhesion can be ensured and contact resistance can be reduced. There is an advantage that reliability can be improved.

  An embodiment (first example) according to a semiconductor device of the present invention will be described with reference to a schematic sectional view of FIG.

  As shown in FIG. 1, a first insulating film 12 is formed on a substrate 11 (illustration is omitted from FIG. 1 (2)). The first insulating film 12 is formed of, for example, a laminated film of a low dielectric constant organic insulating film 13 and an inorganic insulating film 14 from the lower layer. The low dielectric constant film in the present invention refers to a film having a dielectric constant lower than that of the silicon oxide film, and more preferably a film having a dielectric constant of 3.0 or less. The organic insulating film 13 is formed of, for example, a low dielectric constant polyaryl ether film. The inorganic insulating film 14 is formed of, for example, a silicon oxide carbide (SiOC) film.

  A wiring groove 15 is formed in the first insulating film 12, and a first wiring 17 is formed in the wiring groove 15 via a barrier film 16.

  A second insulating film 21 including a stopper film 20 covering the first wiring 17 is formed on the first insulating film 12. The stopper film 20 may be any film that stops etching when the second insulating film 21 on the upper layer is etched. For example, a silicon nitride oxide (SiCN) film is used. The second insulating film 21 on the stopper film 20 is formed by laminating an inorganic insulating film 22, an organic insulating film 23, and an inorganic insulating film 24 in this order from the lower layer, for example. As the inorganic insulating film 22, for example, a methyl silsesquioxane (MSQ) film or a hydrosilsesquioxane (HSQ) film is used. For the organic insulating film 23, for example, a polyaryl ether film or a polyimide film is used. Further, a film having an etching selectivity with respect to the organic insulating film is used for the inorganic insulating film 24, for example, a silicon carbide oxide film.

  A wiring groove 25 is formed in the inorganic insulating film 24 and the organic insulating film 23, and a connection hole 26 is formed in the inorganic insulating film 22 at the bottom of the wiring groove 25, and the connection hole 26 connects the stopper film 20. It penetrates and communicates with the first wiring 17 in the lower layer.

  A first barrier film 31 is formed on the inner surface of the connection hole 26 excluding the wiring groove 25 and the bottom of the connection hole 26. The first barrier film 31 may be any film that has a function of ensuring adhesion between the second insulating film 21 and particularly copper as a wiring material and preventing copper diffusion, oxygen intrusion, and the like. A tantalum (Ta) film or a titanium (Ti) film is formed to a thickness of 3 nm to 10 nm, for example.

A second barrier film 34 is formed on the first insulating film 12 (inorganic insulating film 14) at the bottom of the connection hole 26. The second barrier film 34 is made of, for example, silicon-containing manganese oxide (MnSi _x O _y : x, y is arbitrary) or manganese oxide (Mn _x O _y : x, y is arbitrary). As a result, there is no region where the wiring material 33 and the first and second insulating films 12 and 21 are in direct contact with each other at the bottom of the connection hole 26. The first wiring 17 is connected to the wiring material 33 at the bottom of the connection hole 26.

  A second wiring 35 made of a wiring material 33 is formed in the wiring groove 25 via the first barrier film 31, and the first barrier film 31 and the second barrier film 34 are formed in the connection hole 26. A plug 36 of the second wiring 35 connected to the first wiring 17 is formed. Further, a barrier film 37 is formed on the second insulating film 21 so as to cover the second wiring 35. The barrier film 37 is formed of, for example, an insulating film made of silicon and carbon, for example, a silicon carbide (SiC) film, or an insulating film made of, for example, silicon, carbon, and nitrogen, for example, a silicon nitride carbide (SiCN) film.

  According to the semiconductor device 1, since the first barrier film 31 with high adhesion can be used in the portion other than the bottom of the connection hole 26, the second wiring 35 and the second insulating film are interposed via the first barrier film 31. Since the adhesiveness with 21 can be ensured, there is an advantage that the semiconductor device 1 having a highly reliable wiring structure can be provided. In addition, since the connection between the first wiring 17 and the second wiring 35 at the bottom of the connection hole 26 is a direct connection between the wirings without passing through the barrier film, adhesion can be ensured and contact resistance can be reduced. Thus, there is an advantage that the semiconductor device 1 having a highly reliable wiring structure can be provided. Further, by reducing the contact resistance between the first wiring 17 and the second wiring 35 (plug 36), for example, the operation speed can be improved.

  An embodiment (first example) according to a method for manufacturing a semiconductor device of the present invention will be described with reference to the manufacturing process sectional views of FIGS.

  As shown in FIG. 2A, a first insulating film 12 is formed on a substrate 11 (illustration is omitted from FIG. 1B). The first insulating film 12 is formed of, for example, a laminated film of a low dielectric constant organic insulating film 13 and an inorganic insulating film 14 from the lower layer. The low dielectric constant film in the present invention refers to a film having a dielectric constant lower than that of the silicon oxide film, and more preferably a film having a dielectric constant of 3.0 or less. The organic insulating film 13 is formed of, for example, a low dielectric constant polyaryl ether film. The inorganic insulating film 14 is formed of, for example, a silicon oxide carbide film.

  A wiring groove 15 is formed in the first insulating film 12, and a first wiring 17 is formed in the wiring groove 15 via a barrier film 16.

  A second insulating film 21 including a stopper film 20 is formed on the first insulating film 12. The stopper film 20 may be a film that stops etching when the upper second insulating film 21 is etched. For example, a silicon nitride oxide (SiCN) film is used. The second insulating film 21 on the stopper film 20 is formed by laminating an inorganic insulating film 22, an organic insulating film 23, and an inorganic insulating film 24 in this order from the lower layer, for example. As the inorganic insulating film 22, for example, a methyl silsesquioxane (MSQ) film or a hydrosilsesquioxane (HSQ) film is used. For the organic insulating film 23, for example, a polyaryl ether film or a polyimide film is used. Further, a film having an etching selectivity with respect to the organic insulating film is used for the inorganic insulating film 24, for example, a silicon carbide oxide film.

  A wiring groove 25 is formed in the inorganic insulating film 24 and the organic insulating film 23, and a connection hole 26 is formed in the inorganic insulating film 22 at the bottom of the wiring groove 25, and the connection hole 26 connects the stopper film 20. It penetrates and communicates with the first wiring 17 in the lower layer.

  First, as shown in FIG. 2B, a first barrier film 31 is formed on the inner surfaces of the wiring groove 25 and the connection hole 26. The first barrier film 31 may be any film that has a function of ensuring adhesion between the insulating film 21 and copper as a wiring material to be formed later, and preventing copper diffusion, oxygen intrusion, and the like. A tantalum (Ta) film and a titanium (Ti) film are formed. For example, when the first barrier film 31 is formed of a tantalum (Ta) film, an ionized PVD (Physical Vapor Deposition) method is used to cover the inner surfaces of the wiring grooves 25 and the connection holes 26 including the stepped portions. The first barrier film 31 is formed. As an example of the film formation conditions of the first barrier film 31, the DC power is 10 kW, the substrate RF bias power is 200 W, the process gas is argon (Ar), and the pressure of the film formation atmosphere is 67 mPa. A thick film was formed. The film formation conditions can be changed within a range in which the first barrier film 31 is formed so as to cover the inner surfaces of the wiring groove 25 and the connection hole 26.

  Thereafter, as shown in FIG. 3C, a high bias is applied to the substrate (not shown), and the first barrier film 31 formed on the bottom of the connection hole 26 is removed. In this process, the first barrier film 31 is formed while applying a high RF bias to the substrate, thereby suppressing the shaving of the shoulder of the connection hole 26 and the shoulder of the wiring groove 25 and the first of the bottom of the connection hole 26. The barrier film 31 is removed. In addition, the first barrier film 31 formed on the bottom of the wiring trench 25 is also scraped, but the first barrier film in that portion may be thinned or removed. As an example of the processing conditions, the DC power was 3 kW, the substrate RF bias power was 500 W, the process gas was argon (Ar), the processing atmosphere pressure was 0.13 Pa, and the processing time was 12 seconds. This processing time is appropriately changed depending on the film thickness of the first barrier film 31. Other processing conditions can be changed within a range in which the purpose of selectively removing the first barrier film 31 formed on the bottom of the connection hole 26 can be achieved.

  Next, as shown in FIG. 3 (4), a seed film 32 for copper plating is formed on the surface of the first barrier film 31. Here, the seed film 32 is formed of a copper manganese (CuMn) alloy. The manganese (Mn) concentration in the CuMn alloy was 2 wt% to 10 wt%. As an example of the film forming conditions of the CuMn alloy film, a PVD method is used. For example, the DC power is 15 kW, the substrate RF bias power is 400 W, the process gas is argon (Ar), and the process atmosphere is The pressure was set to 6.7 mPa, and the film was formed to a thickness of 60 nm, for example.

  Next, as shown in FIG. 4 (5), a wiring material 33 is formed on the seed film 32 so as to fill the inside of the wiring groove 25 and the connection hole 26. For example, copper is used as the wiring material, and a plating method is used as the film forming method.

Next, heat treatment is performed as shown in FIG. By this heat treatment, manganese (Mn) in the seed film 32 reacts with silicon (Si) and oxygen (O) in the inorganic insulating film 14 of the silicon oxide carbide film to cause silicon-containing manganese oxide (MnSi _x O _y). : X and y are arbitrary) and the second barrier film 34 is formed of a film or a manganese oxide (Mn _x O _y : x and y are arbitrary) films. That is, the second barrier film 34 is formed in a self-aligning manner. As a result, there is no region where the wiring material 33 and the first and second insulating films 12 and 21 are in direct contact with each other at the bottom of the connection hole 26. The first wiring 17 is connected to the wiring material 33 at the bottom of the connection hole 26. As an example of the heat treatment conditions, the heat treatment temperature is 300 ° C. to 400 ° C., and hydrogen (H ₂ ) gas and diluting nitrogen (N ₂ ) gas capable of removing the oxide film formed on the copper surface are flowed. For 1 hour. This processing time is an example, and can be appropriately changed as long as the second barrier film 34 is formed.

  Next, as shown in FIG. 5 (7), for example, an excess wiring material 33 (including the seed film 32) on the second insulating film 21, the first barrier film 31, and the like by a chemical mechanical polishing (CMP) method. In addition, the insulating film 21 is exposed, the second wiring 35 made of the wiring material 33 (including the seed film 32) is formed in the wiring groove 25 via the first barrier film 31, and the connection hole 26 is formed. The plug 36 of the second wiring 35 connected to the first wiring 17 is formed of the wiring material 33 (including the seed film 32) through the first barrier film 31 and the second barrier film 34 inside. Next, a barrier film 37 is formed on the second insulating film 21 so as to cover the second wiring 35. The barrier film 37 is formed of, for example, an insulating film made of silicon and carbon, for example, a silicon carbide (SiC) film, or an insulating film made of, for example, silicon, carbon, and nitrogen, for example, a silicon nitride carbide (SiCN) film. As this film forming method, for example, a chemical vapor deposition (CVD) method can be adopted.

  According to the manufacturing method of the first embodiment, the first barrier film 31 having high adhesion can be formed on the portion other than the bottom of the connection hole 26, so that the gap between the first barrier film 31 and the seed film 32 can be formed. That is, it is possible to ensure strong adhesion having an intermetallic bond between tantalum (Ta) and copper manganese (CuMn). Further, since the first barrier film 31 is formed of a tantalum (Ta) film or a titanium (Ti) film, adhesion with the second insulating film 21 can be ensured. Therefore, the adhesion between the second wiring 35 and the second insulating film 21 can be ensured through the first barrier film 31, so that there is an advantage that the wiring reliability can be improved. In addition, since the connection between the first wiring 17 and the second wiring 35 at the bottom of the connection hole 26 is a direct connection between the wirings without passing through the barrier film, adhesion can be ensured and contact resistance can be reduced. Therefore, there is an advantage that the wiring reliability can be improved. Further, by reducing the contact resistance between the first wiring 17 and the second wiring 35 (plug 36), for example, the operation speed can be improved.

  In addition, since the adhesion can be improved, it is possible to suppress disconnection failure caused by peeling of the wiring material 33 due to mechanical stress during chemical mechanical polishing and movement of the copper interface due to thermal stress during heat treatment. . From this point, the wiring reliability can be improved.

  Next, an embodiment (second example) according to the method for manufacturing a semiconductor device of the present invention will be described with reference to the manufacturing process sectional views of FIGS.

  After the steps from FIG. 2A to FIG. 3C are performed, the surface of the first barrier film 31 on the bottom surface of the wiring groove 25 and the bottom surface of the connection hole 26 is formed as shown in FIG. A seed film 32 for copper plating is formed. Here, the seed film 32 is formed of a copper manganese (CuMn) alloy. At this time, the seed film 32 is also formed on the first barrier film 31 on the second insulating film 21. The manganese (Mn) concentration in the CuMn alloy was 2 wt% to 10 wt%. As an example of the film forming conditions for the CuMn alloy film, a PVD film forming method is used. For example, the DC power is 15 kW, the substrate RF bias power is 0 W, the process gas is argon (Ar), and the process atmosphere is The pressure was set to 6.7 mPa, and the film was formed to a thickness of 20 nm, for example.

  Next, as shown in FIG. 6B, a copper seed film 41 for copper plating is formed through the seed film 32 on the bottom surface of the wiring groove 25 and the bottom surface of the connection hole 26. Here, the copper seed film 41 is formed of pure copper. As an example of the pure copper film forming conditions, a PVD film forming method is used. For example, the DC power is 15 kW, the substrate RF bias power is 400 W, the process gas is argon (Ar), and the pressure of the process atmosphere is set. The film was formed to a thickness of 40 nm, for example, 40 nm.

  Next, as shown in FIG. 7 (3), a wiring material 33 is formed on the seed film 32 so as to fill the inside of the wiring groove 25 and the connection hole 26. For example, copper is used as the wiring material, and a plating method is used as the film forming method.

Next, heat treatment is performed as shown in FIG. By this heat treatment, manganese (Mn) in the seed film 32, silicon (Si) in the inorganic insulating film 14 of the silicon oxide carbide film, and oxygen (O) react to react with silicon-containing manganese oxide (MnSi _x O _y). : X and y are arbitrary) and the second barrier film 34 is formed of a film or a manganese oxide (Mn _x O _y : x and y are arbitrary) films. That is, the second barrier film 34 is formed in a self-aligning manner. As a result, there is no region where the wiring material 33 and the first and second insulating films 12 and 21 are in direct contact with each other at the bottom of the connection hole 26. The first wiring 17 is connected to the wiring material 33 at the bottom of the connection hole 26. As an example of the heat treatment conditions, the heat treatment temperature is 300 ° C. to 400 ° C., and hydrogen (H ₂ ) gas and diluting nitrogen (N ₂ ) gas capable of removing the oxide film formed on the copper surface are flowed. For 1 hour. This processing time is an example, and can be appropriately changed as long as the second barrier film 34 is formed.

  Next, as shown in FIG. 8 (5), for example, an excessive wiring material 33 (including the seed film 32) on the second insulating film 21, the first barrier film 31, and the like by a chemical mechanical polishing (CMP) method. In addition, the insulating film 21 is exposed, the second wiring 35 made of the wiring material 33 (including the seed film 32) is formed in the wiring groove 25 via the first barrier film 31, and the connection hole 26 is formed. The plug 36 of the second wiring 35 connected to the first wiring 17 is formed of the wiring material 33 (including the seed film 32) through the first barrier film 31 and the second barrier film 34 inside. Next, a barrier film 37 is formed on the second insulating film 21 so as to cover the second wiring 35. The barrier film 37 is formed of, for example, an insulating film made of silicon and carbon, for example, a silicon carbide (SiC) film, or an insulating film made of, for example, silicon, carbon, and nitrogen, for example, a silicon nitride carbide (SiCN) film. As this film formation method, for example, a chemical vapor deposition (CVD) method can be adopted.

  According to the manufacturing method of the second embodiment, the first barrier film 31 having high adhesion can be formed in the portion excluding the bottom of the connection hole 26, so that the gap between the first barrier film 31 and the seed film 32 can be formed. That is, it is possible to ensure strong adhesion having an intermetallic bond between tantalum (Ta) and copper manganese (CuMn). Further, since the first barrier film 31 is formed of a tantalum (Ta) film or a titanium (Ti) film, adhesion with the second insulating film 21 can be ensured. Therefore, the adhesion between the second wiring 35 and the second insulating film 21 can be ensured through the first barrier film 31, so that there is an advantage that the wiring reliability can be improved. In addition, since the connection between the first wiring 17 and the second wiring 35 at the bottom of the connection hole 26 is a direct connection between the wirings without passing through the barrier film, adhesion can be ensured and contact resistance can be reduced. Therefore, there is an advantage that the wiring reliability can be improved. Further, by reducing the contact resistance between the first wiring 17 and the second wiring 35 (plug 36), for example, the operation speed can be improved.

  Next, an embodiment (third example) according to the method for manufacturing a semiconductor device of the present invention will be described with reference to the manufacturing process cross-sectional views of FIGS.

  As shown in FIG. 9A, a first insulating film 12 is formed on a substrate 11 (illustration is omitted from FIG. 1B). The first insulating film 12 is formed of, for example, a laminated film of a low dielectric constant organic insulating film 13 and an inorganic insulating film 14 from the lower layer. The low dielectric constant film in the present invention refers to a film having a dielectric constant lower than that of the silicon oxide film, and more preferably a film having a dielectric constant of 3.0 or less. The organic insulating film 13 is formed of, for example, a low dielectric constant polyaryl ether film. The inorganic insulating film 14 is formed of, for example, a silicon oxide carbide film.

  A wiring groove 15 is formed in the first insulating film 12, and a first wiring 17 is formed in the wiring groove 15 via a barrier film 16.

  A second insulating film 21 including a stopper film 20 is formed on the first insulating film 12. The stopper film 20 may be a film that stops etching when the upper second insulating film 21 is etched. For example, a silicon nitride oxide (SiCN) film is used. The second insulating film 21 on the stopper film 20 is formed by laminating an inorganic insulating film 22, an organic insulating film 23, and an inorganic insulating film 24 in this order from the lower layer, for example. As the inorganic insulating film 22, for example, a methyl silsesquioxane (MSQ) film or a hydrosilsesquioxane (HSQ) film is used. For the organic insulating film 23, for example, a polyaryl ether film or a polyimide film is used. Further, a film having an etching selectivity with respect to the organic insulating film is used for the inorganic insulating film 24, for example, a silicon carbide oxide film.

  A wiring groove 25 is formed in the inorganic insulating film 24 and the organic insulating film 23, and a connection hole 26 is formed in the inorganic insulating film 22 at the bottom of the wiring groove 25, and the connection hole 26 connects the stopper film 20. It penetrates and communicates with the first wiring 17 in the lower layer.

First, a silicon oxide (SiCOH) film 51 containing hydrogen and carbon is formed on the inner surfaces of the wiring trench 25 and the connection hole 26 in order to facilitate the formation of a manganese silicate film. The silicon oxide film 51 containing hydrogen and carbon is a film that facilitates the formation of a manganese silicate (MnSi _x O _y ) film having a density of 1.5 g / cm ³ or less, for example. The silicon oxide film 51 containing hydrogen and carbon is formed by, for example, a chemical vapor deposition method. As an example of the film formation conditions, trimethylsilane and oxygen are used as a source gas, and their supply flow rates are as follows: Trimethylsilane wp 1000 cm ³ / min, oxygen 400 cm ³ / min, parallel plate RF power 700 W (13.56 MHz), film forming atmosphere pressure 0.67 kPa, substrate temperature 350 ° C., film forming time 5 minutes did. The film forming conditions can be changed within a range in which the silicon oxide film 51 containing hydrogen and carbon is formed so as to cover the inner surfaces of the wiring groove 25 and the connection hole 26.

Next, as shown in FIG. 9B, the silicon oxide film 51 containing hydrogen and carbon on the bottom of the connection hole 26 and the bottom of the wiring groove 25 is removed by a reverse sputtering method having directivity. For example, the reverse sputtering method using a chamber capable of applying a high frequency to the ICP coil and the substrate stage. As an example of this processing condition, argon (Ar) is used as a process gas, the flow rate is 30 cm ³ / min, the ICP coil RF power is 300 W (13.56 MHz), the substrate bias power is 300 W (13.56 MHz), The pressure of the film forming atmosphere was 0.13 Pa, and an electrostatic chuck type stage was used as a stage for supporting the substrate, and this stage was performed by water cooling near room temperature (for example, about 18 ° C. to 25 ° C.). The processing conditions can be changed as long as the silicon oxide film 51 containing hydrogen and carbon at the bottom of the connection hole 26 and the bottom of the wiring trench 25 can be selectively removed. Note that the silicon oxide film 51 containing hydrogen and carbon may remain thin at the bottom of the wiring trench 25.

  Next, as shown in FIG. 10 (3), a seed film 32 for copper plating is formed on the inner surface of the wiring groove 25 and the inner surface of the connection hole 26 through the silicon oxide film 51 containing hydrogen and carbon. To do. Here, the seed film 32 is formed of a copper manganese (CuMn) alloy. At this time, the seed film 32 is also formed on the first barrier film 31 on the second insulating film 21. The manganese (Mn) concentration in the CuMn alloy was 2 wt% to 10 wt%. As an example of the film forming conditions for the CuMn alloy film, a PVD film forming method is used. For example, the DC power is 15 kW, the substrate RF bias power is 0 W, the process gas is argon (Ar), and the process atmosphere is The pressure was set to 6.7 mPa, and the film was formed to a thickness of 60 nm, for example.

  Next, as shown in FIG. 10 (4), a wiring material 33 is formed on the seed film 32 so as to fill the inside of the wiring groove 25 and the connection hole 26. For example, copper is used as the wiring material, and a plating method is used as the film forming method.

Next, heat treatment is performed as shown in FIG. By this heat treatment, manganese (Mn) in the seed film 32, silicon (Si) in the silicon oxide film 51 containing hydrogen and carbon, and oxygen (O) react to react with each other, and thus a silicon-containing manganese oxide (MnSi _x O _y). : X and y are arbitrary) and a barrier film 52 made of a manganese oxide (Mn _x O _y : x and y are arbitrary) film is formed. That is, the barrier film 52 is formed in a self-aligning manner. As a result, there is no region where the wiring material 33 and the first and second insulating films 12 and 21 are in direct contact with each other on the inner surface of the wiring groove 25 and the inner surface of the connection hole 26. The first wiring 17 is connected to the wiring material 33 at the bottom of the connection hole 26. As an example of the heat treatment conditions, the heat treatment temperature is 300 ° C. to 400 ° C., and hydrogen (H ₂ ) gas and diluting nitrogen (N ₂ ) gas capable of removing the oxide film formed on the copper surface are flowed. For 1 hour. This processing time is an example, and can be appropriately changed as long as the second barrier film 34 is formed.

  Next, as shown in FIG. 11 (6), the excess wiring material 33 (including the seed film 32), the barrier film 52, and the like on the second insulating film 21 are removed by, for example, chemical mechanical polishing (CMP). Then, the insulating film 21 is exposed, the second wiring 35 made of the wiring material 33 (including the seed film 32) is formed in the wiring groove 25 via the barrier film 52, and the first inside the connection hole 26 is formed. A plug 36 of the second wiring 35 connected to the first wiring 17 is formed of the wiring material 33 (including the seed film 32) via the barrier film 31 and the second barrier film 34. Next, a barrier film 37 is formed on the second insulating film 21 so as to cover the second wiring 35. The barrier film 37 is formed of, for example, an insulating film made of silicon and carbon, for example, a silicon carbide (SiC) film, or an insulating film made of, for example, silicon, carbon, and nitrogen, for example, a silicon nitride carbide (SiCN) film. As this film forming method, for example, a chemical vapor deposition (CVD) method can be adopted.

  According to the manufacturing method of the third embodiment, since the barrier film 52 having high adhesion can be formed in the portion excluding the bottom of the connection hole 26, the barrier film 52 and the seed film 32, that is, tantalum ( Strong adhesion having an intermetallic bond between Ta) and copper manganese (CuMn) can be ensured. In addition, the adhesion between the barrier film 52 and the second insulating film 21 can be secured by the silicon oxide film 51 containing hydrogen and carbon, which is highly adhered to each other. Therefore, the adhesiveness between the second wiring 35 and the second insulating film 21 can be ensured through the barrier film 52, so that there is an advantage that the wiring reliability can be improved. In addition, since the connection between the first wiring 17 and the second wiring 35 at the bottom of the connection hole 26 is a direct connection between the wirings without passing through the barrier film, adhesion can be ensured and contact resistance can be reduced. Therefore, there is an advantage that the wiring reliability can be improved. Further, by reducing the contact resistance between the first wiring 17 and the second wiring 35 (plug 36), for example, the operation speed can be improved.

  In addition, since the adhesion can be improved, it is possible to suppress disconnection failure caused by peeling of the wiring material 33 due to mechanical stress during chemical mechanical polishing and movement of the copper interface due to thermal stress during heat treatment. . From this point, the wiring reliability can be improved.

1 is a schematic cross-sectional view showing an embodiment (first embodiment) of a semiconductor device according to the present invention. It is manufacturing process sectional drawing which showed one Embodiment (1st Example) which concerns on the manufacturing method of the semiconductor device of this invention. It is manufacturing process sectional drawing which showed one Embodiment (1st Example) which concerns on the manufacturing method of the semiconductor device of this invention. It is manufacturing process sectional drawing which showed one Embodiment (1st Example) which concerns on the manufacturing method of the semiconductor device of this invention. It is manufacturing process sectional drawing which showed one Embodiment (1st Example) which concerns on the manufacturing method of the semiconductor device of this invention. It is manufacturing process sectional drawing which showed one Embodiment (2nd Example) which concerns on the manufacturing method of the semiconductor device of this invention. It is manufacturing process sectional drawing which showed one Embodiment (2nd Example) which concerns on the manufacturing method of the semiconductor device of this invention. It is manufacturing process sectional drawing which showed one Embodiment (2nd Example) which concerns on the manufacturing method of the semiconductor device of this invention. It is manufacturing process sectional drawing which showed one Embodiment (3rd Example) which concerns on the manufacturing method of the semiconductor device of this invention. It is manufacturing process sectional drawing which showed one Embodiment (3rd Example) which concerns on the manufacturing method of the semiconductor device of this invention. It is manufacturing process sectional drawing which showed one Embodiment (3rd Example) which concerns on the manufacturing method of the semiconductor device of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Semiconductor device, 11 ... Board | substrate, 12 ... 1st insulating film, 17 ... 1st wiring, 21 ... 2nd insulating film, 25 ... Wiring groove, 26 ... Connection hole, 31 ... 1st barrier film, 34 ... 2nd Barrier film, 35 ... second wiring

Claims (5)

A second insulating film covering the first wiring formed on the first insulating film on the substrate;
A wiring groove formed in the second insulating film;
A connection hole that is formed in the second insulating film at the bottom of the wiring groove and communicates with the first wiring;
A first barrier film formed on the inner surface of the wiring groove and the connection hole excluding the bottom of the connection hole;
A second barrier film formed on the first insulating film at the bottom of the connection hole;
A semiconductor device comprising: a second wiring embedded in the wiring groove and the connection hole through the first barrier film and the second barrier film. Forming a wiring groove in the second insulating film covering the first wiring formed on the first insulating film on the substrate and a connection hole at the bottom of the wiring groove;
Forming a first barrier film on the inner surface of the wiring groove and the connection hole excluding the bottom of the connection hole;
Forming a second barrier film on the first insulating film at the bottom of the connection hole;
And a step of forming a second wiring in the wiring trench and the connection hole via the first barrier film and the second barrier film. Forming a second barrier film on the insulating film at the bottom of the connection hole;
Forming a copper manganese film on each inner surface of the connection hole and the wiring groove;
The second barrier film is formed by reacting manganese in the copper-manganese film with silicon and oxygen in the insulating film in contact with the copper-manganese film to form manganese silicate on the insulating film at the bottom of the connection hole. The method of manufacturing a semiconductor device according to claim 2, further comprising: Forming a second barrier film on the insulating film at the bottom of the connection hole;
Forming a copper manganese film at the bottom of the connection hole and the bottom of the wiring groove;
The second barrier film is formed by reacting manganese in the copper-manganese film with silicon and oxygen in the insulating film in contact with the copper-manganese film to form manganese silicate on the insulating film at the bottom of the connection hole. The method of manufacturing a semiconductor device according to claim 2, further comprising: Instead of the first barrier film, a silicon oxide film containing hydrogen and carbon is formed on the inner surfaces of the wiring groove and the connection hole excluding the bottom of the connection hole,
Forming a second barrier film on the insulating film at the bottom of the connection hole;
Forming a copper manganese film on the inner surface of the connection hole and the wiring groove;
Reacting manganese in the copper-manganese film with silicon and oxygen in the silicon oxide film containing hydrogen and carbon to form manganese silicate to form the second barrier film. A method of manufacturing a semiconductor device according to claim 2.

Images