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JP2007274043A - Piezoelectric oscillator - Google Patents

Piezoelectric oscillator Download PDF

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Publication number
JP2007274043A
JP2007274043A JP2006093672A JP2006093672A JP2007274043A JP 2007274043 A JP2007274043 A JP 2007274043A JP 2006093672 A JP2006093672 A JP 2006093672A JP 2006093672 A JP2006093672 A JP 2006093672A JP 2007274043 A JP2007274043 A JP 2007274043A
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integrated circuit
circuit element
piezoelectric
lid
piezoelectric oscillator
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Riyouma Sasagawa
亮磨 笹川
Hiroyuki Miura
浩之 三浦
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Kyocera Crystal Device Corp
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Kyocera Crystal Device Corp
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Priority to JP2006093672A priority Critical patent/JP2007274043A/en
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a piezoelectric oscillator compatible with downsizing, for ensuring a sealing state, preventing an integrated circuit element from being wasted, and whose manufacturing is facilitated. <P>SOLUTION: The piezoelectric oscillator includes: a base 10 formed with a substrate 11 and a frame 12; a piezoelectric resonator element 20 mounted on the substrate 11; a cover 30 joined with a step difference part 13 formed to the frame 12 and air-tightly sealing a space part C1 wherein the piezoelectric resonator element 20 is mounted; an integrated circuit element 40 coming into contact with the surface of the cover 30, a wiring part S reaching a mount position of the piezoelectric resonator element 20 from a tip of the frame 12 and provided inside the base 10; and a circuit board 50 joined with the tip of the frame 12 and bumps 42 provided to the integrated circuit element 40 and making the wiring part S and the integrated circuit element 40 conductive with each other, and the cover 30 is configured to include a hook lock part 32 for fixing the integrated circuit element 40, and the circuit board 50 is configured to include throughholes corresponding to positions of the bumps 42, and to include a circuit pattern provided to the surface exposed to connect the bumps 42 and the wiring part S via the throughholes. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description


本発明は、電子機器に用いられる圧電発振器に関する。

The present invention relates to a piezoelectric oscillator used in an electronic device.

従来より、携帯用通信機器等の電子機器に圧電発振器が用いられている。かかる従来の圧電発振器は、基板の一方の主面に集積回路素子と圧電発振器を搭載するための第一のキャビティ部と第二のキャビティ部とが形成されており、第一のキャビティ部の上に第二のキャビティ部が位置し、第一のキャビティ部に集積回路素子が搭載され、第二のキャビティ部に圧電振動素子が搭載され、これら第一のキャビティ部と第二のキャビティ部とを蓋体で気密封止された構造となっている(例えば、特許文献1参照)。
また、圧電振動素子と集積回路素子とを搭載する圧電発振器において、基板に凹部を形成して空間部とし、その空間部を蓋体にて2つの空間部に仕切り、下側の空間部に圧電振動素子、上側の空間部に集積回路素子を配置した構成の圧電発振器も提案されている(例えば、特許文献2参照)。
Conventionally, piezoelectric oscillators have been used in electronic devices such as portable communication devices. In such a conventional piezoelectric oscillator, a first cavity portion and a second cavity portion for mounting the integrated circuit element and the piezoelectric oscillator are formed on one main surface of the substrate. The second cavity is located, the integrated circuit element is mounted on the first cavity, the piezoelectric vibration element is mounted on the second cavity, and the first cavity and the second cavity are connected to each other. The structure is hermetically sealed with a lid (see, for example, Patent Document 1).
Further, in a piezoelectric oscillator including a piezoelectric vibration element and an integrated circuit element, a concave portion is formed on a substrate to form a space portion, the space portion is divided into two space portions by a lid, and a piezoelectric portion is formed in a lower space portion. There has also been proposed a piezoelectric oscillator having a configuration in which an oscillation circuit and an integrated circuit element are arranged in an upper space (see, for example, Patent Document 2).

この圧電発振器は、例えば、1つの空間部を2つの空間部に仕切る蓋体に集積回路素子を実装し、蓋体にビアホールを形成して配線を設け、圧電振動素子と集積回路素子との導通を図っている。また、配線パターンを設けた回路基板に集積回路素子を搭載し、この回路基板で2つめの空間部を塞いでいる。
また、回路基板に集積回路素子を実装し、この回路基板で残された2つめの空間部を封止しつつ、この空間部内に集積回路素子が収まるように構成された圧電発振器も提案されている。
さらに、このような構造の圧電発振器は、当該集積回路素子に各種データを書き込むための書込制御端子が第一の容器体又は/及び第二の容器体の外側面に形成されている(例えば、特許文献3参照。)。
特開平10−22772号公報(段落0029〜0053、図1) 特開2001−177347号公報(段落0010〜0015、図2) 特開平10−98151号公報(段落0021〜0029、図5)
In this piezoelectric oscillator, for example, an integrated circuit element is mounted on a lid body that divides one space portion into two space portions, via holes are formed in the lid body, wiring is provided, and conduction between the piezoelectric vibration element and the integrated circuit element is achieved. I am trying. Further, an integrated circuit element is mounted on a circuit board provided with a wiring pattern, and the second space is closed with this circuit board.
In addition, a piezoelectric oscillator is also proposed in which an integrated circuit element is mounted on a circuit board and a second space remaining on the circuit board is sealed, and the integrated circuit element is accommodated in the space. Yes.
Further, in the piezoelectric oscillator having such a structure, a write control terminal for writing various data to the integrated circuit element is formed on the outer surface of the first container body and / or the second container body (for example, , See Patent Document 3).
Japanese Patent Laid-Open No. 10-22772 (paragraphs 0029 to 0053, FIG. 1) JP 2001-177347 A (paragraphs 0010 to 0015, FIG. 2) JP-A-10-98151 (paragraphs 0021 to 0029, FIG. 5)

しかしながら、電子機器の小型化に伴い、圧電発振器も小型化が要求されている中で、特許文献2に示されている圧電発振器では、封止する部材(従来では蓋体)にビアホールを形成すると、接合面が十分に取れなくなり、気密状態を保てなくなる恐れがある。   However, along with the downsizing of electronic equipment, piezoelectric oscillators are also required to be downsized. In the piezoelectric oscillator disclosed in Patent Document 2, when a via hole is formed in a member to be sealed (conventionally a lid). There is a risk that the joint surface cannot be sufficiently removed and the airtight state cannot be maintained.

また、回路基板に集積回路素子を搭載してから圧電振動素子を搭載する空間部よりも上に位置する空間部を当該回路基板で塞ぐ圧電発振器では、回路基板に集積回路素子を搭載する製造ラインと、圧電振動素子や蓋体等を作り込む製造ラインとの2つのラインが必要となり、製造が煩雑になる恐れがある。   In addition, in a piezoelectric oscillator in which an integrated circuit element is mounted on a circuit board and a space portion located above the space section on which the piezoelectric vibration element is mounted is closed with the circuit board, a production line for mounting the integrated circuit element on the circuit board And a manufacturing line for manufacturing a piezoelectric vibration element, a lid, and the like are necessary, and there is a risk that the manufacturing becomes complicated.

また、特許文献1に示されている圧電発振器では、設けられるキャビティ内に集積回路素子を実装した後にその集積回路素子の上方に圧電振動素子を搭載する構造の圧電発振器では、圧電振動素子が不良であった場合、集積回路素子ごと破棄することとなり、高価で正常な集積回路素子が無駄になるという問題があった。   Further, in the piezoelectric oscillator disclosed in Patent Document 1, the piezoelectric oscillator having a structure in which the integrated circuit element is mounted in the cavity provided and then mounted on the integrated circuit element is defective. In this case, the integrated circuit elements are discarded, and there is a problem that expensive and normal integrated circuit elements are wasted.

また、従来のような圧電発振器は、外側面等に設けられた書込制御端子が設けられているが、これらの書込制御端子を配置させるための広いスペースが容器体の表面に必要となることから、容器体の面積が面方向もしくは厚み方向に大きくなり、全体構造の小型化に供しないという不都合があった。
また、このような圧電発振器をマザーボード等の外部電気回路に搭載する際に、両者の接合に用いられている導電性接合材の一部が書込制御端子に付着して圧電発振器の外部端子との間で短絡を招く恐れがあり、そのため、前記外部端子に対応したマザーボード側の電極形状に自由度がなくなる等の製品の取扱いが煩雑になるという欠点もあった。
In addition, the conventional piezoelectric oscillator is provided with the write control terminals provided on the outer surface or the like, but a large space for arranging these write control terminals is required on the surface of the container body. For this reason, the area of the container body is increased in the surface direction or the thickness direction, and there is a disadvantage that the entire structure is not miniaturized.
Further, when such a piezoelectric oscillator is mounted on an external electric circuit such as a mother board, a part of the conductive bonding material used for bonding the two adheres to the write control terminal, and the piezoelectric oscillator external terminal As a result, there is a disadvantage that handling of the product becomes complicated, such as the freedom of the electrode shape on the mother board side corresponding to the external terminal.

そこで本発明は、前記課題を解決し、小型化に対応し、封止状態を確実にし、集積回路素子の無駄を防ぎ、製造を容易とする圧電発振器を提供することを課題とする。   Accordingly, an object of the present invention is to provide a piezoelectric oscillator that solves the above-described problems, that is compatible with downsizing, that ensures a sealed state, prevents waste of integrated circuit elements, and that is easy to manufacture.

前記課題を解決するため、本発明の圧電発振器は、基板と枠部とで一体に形成される基体に設けられた1つの空間部を蓋体で2つの空間部に仕切り、前記基板側の空間部に圧電振動素子が搭載され、前記枠部の先端側に集積回路素子が位置する圧電発振器であって、前記枠部の先端から前記圧電振動素子の搭載位置まで達し、前記基体内部に設けられる配線部と、前記枠部の先端と前記電気的接続用となる所定のバンプと前記書込用となる所定のバンプとに接合されて回路基板とを備え、前記集積回路素子が回路形成面に電気的接続用となる所定のバンプと書込用となる所定のバンプとが設けられ、前記蓋体に載置され前記回路形成面とは反対側の面が前記蓋体の表面に当接され、前記蓋体が集積回路素子を載置する際に位置を固定する掛止部を備え、前記回路基板が前記書込用となる所定のバンプの位置に対応させたスルーホールを有し、このスルーホールを介して露出する表面に前記バンプと繋ぐように設けられた書込端子を備えて構成されることを特徴とする。   In order to solve the above-described problems, the piezoelectric oscillator according to the present invention divides one space portion provided in a base body integrally formed of a substrate and a frame portion into two space portions by a lid, and thereby provides a space on the substrate side. A piezoelectric oscillator in which a piezoelectric vibration element is mounted on a portion and an integrated circuit element is positioned on a tip side of the frame portion, reaches from the tip of the frame portion to a mounting position of the piezoelectric vibration element, and is provided inside the base body A wiring board; a circuit board bonded to the tip of the frame part; the predetermined bump for electrical connection; and the predetermined bump for writing; and the integrated circuit element on a circuit forming surface Predetermined bumps for electrical connection and predetermined bumps for writing are provided, and the surface opposite to the circuit forming surface placed on the lid is in contact with the surface of the lid. A latch that fixes the position of the lid when the integrated circuit element is placed. The circuit board has a through hole corresponding to the position of the predetermined bump for writing, and a write terminal provided to be connected to the bump on the surface exposed through the through hole It is characterized by comprising.

また、本発明の圧電発振器は、前記回路基板の中央に開口部を有し、前記開口部から前記枠部内に樹脂を充填してなることを特徴とする。   The piezoelectric oscillator according to the present invention is characterized in that an opening is formed in the center of the circuit board, and resin is filled into the frame from the opening.

本発明の圧電発振器によれば、蓋体にビアホールを設けることがないので、圧電振動素子が搭載される空間部の封止を確実にすることができる。
また、集積回路素子が蓋体の上に載置するだけで固定できるため製造ラインを一本化することができるので製造が容易となり、製造コストを低くすることができる。
According to the piezoelectric oscillator of the present invention, since no via hole is provided in the lid, it is possible to reliably seal the space in which the piezoelectric vibration element is mounted.
In addition, since the integrated circuit element can be fixed simply by being placed on the lid, the production line can be unified, so that the production is facilitated and the production cost can be reduced.

また、集積回路素子を搭載する前に圧電振動素子の特性を確認して良否判定を行うことができるので、集積回路素子を搭載してからの圧電振動素子の特性の確認を行う場合と異なり、圧電振動素子が良品でなかった場合に集積回路素子を無駄にするのを防ぐことができる。
枠部内に樹脂を注入するので、蓋体も樹脂で覆われて、蓋体と枠部との間に隙間が生じても注入された樹脂で気密漏れを防ぐことができる。
In addition, since it is possible to check the quality of the piezoelectric vibration element before mounting the integrated circuit element, it is possible to make a pass / fail judgment, so unlike the case of checking the characteristics of the piezoelectric vibration element after mounting the integrated circuit element, When the piezoelectric vibration element is not a good product, it is possible to prevent the integrated circuit element from being wasted.
Since the resin is injected into the frame portion, the lid body is also covered with the resin, and even if a gap is generated between the lid body and the frame portion, airtight leakage can be prevented with the injected resin.

さらに、回路基板の表面に集積回路素子の端子に対応する回路パターンを設けたことにより、マザーボード等に実装する際の短絡を防ぐと共に、容易に集積回路素子に書き込みが行えるようにすることができる。   Further, by providing a circuit pattern corresponding to the terminal of the integrated circuit element on the surface of the circuit board, it is possible to prevent a short circuit when mounted on a motherboard or the like and to easily write to the integrated circuit element. .

次に、本発明を実施するための最良の形態(以下、「実施形態」という。)について、適宜図面を参照しながら詳細に説明する。
なお、各実施形態において、同一の構成要素については同一符号を付し、重複する説明を省略する。
また、本実施形態における集積回路素子を、絶縁性セラミック等から成る基体の下面に、周囲の温度状態を検知する感温素子(サーミスタ)、圧電振動素子の温度特性を補償する温度補償データを格納するとともに該温度補償データに基づいて圧電振動素子の振動特性を温度変化に応じて補正する温度補償回路、該温度補償回路に接続されて所定の発振出力を生成する発振回路等の電子回路が設けられているものとして説明する。
Next, the best mode for carrying out the present invention (hereinafter referred to as “embodiment”) will be described in detail with reference to the drawings as appropriate.
In addition, in each embodiment, the same code | symbol is attached | subjected about the same component and the overlapping description is abbreviate | omitted.
In addition, the temperature compensation data for compensating the temperature characteristics of the temperature sensing element (thermistor) for detecting the ambient temperature state and the piezoelectric vibration element are stored on the lower surface of the substrate made of insulating ceramic or the like for the integrated circuit element in this embodiment. And an electronic circuit such as a temperature compensation circuit for correcting the vibration characteristics of the piezoelectric vibration element according to the temperature change based on the temperature compensation data, and an oscillation circuit connected to the temperature compensation circuit to generate a predetermined oscillation output. It will be described as being.

(第一の実施形態)
図1は、本発明の第一の実施形態に係る圧電発振器の一例を示す分解斜視図である。図2(a)は蓋体を基体に接合した状態を示す図であり(b)は回路基板を基体に接合する前の状態を示す図である。図3(a)は本発明の第一の実施形態に係る圧電発振器の一例を示す斜視図であり、(b)は(a)のA−A断面図である。
(First embodiment)
FIG. 1 is an exploded perspective view showing an example of the piezoelectric oscillator according to the first embodiment of the present invention. FIG. 2A is a view showing a state in which the lid is bonded to the base body, and FIG. 2B is a view showing a state before the circuit board is bonded to the base body. FIG. 3A is a perspective view showing an example of the piezoelectric oscillator according to the first embodiment of the present invention, and FIG. 3B is a cross-sectional view taken along line AA in FIG.

図1に示すように、本発明の第一の実施形態に係る圧電発振器100は、圧電振動素子である水晶振動素子(以下、「圧電振動素子」という。)20と、圧電振動素子20が搭載される基体10と、圧電振動素子20を気密封止する蓋体30と、蓋体30に載置固定される集積回路素子40と、集積回路素子40と導通する回路基板50と、基体10内に設けられる配線部Sと、とから主に構成されている。   As shown in FIG. 1, a piezoelectric oscillator 100 according to the first embodiment of the present invention includes a quartz crystal vibration element (hereinafter referred to as “piezoelectric vibration element”) 20 that is a piezoelectric vibration element, and a piezoelectric vibration element 20. Base body 10, lid 30 for hermetically sealing piezoelectric vibration element 20, integrated circuit element 40 placed and fixed on lid 30, circuit board 50 electrically connected to integrated circuit element 40, and base 10 And the wiring part S provided in the main part.

図1に示す圧電振動素子20は、水晶を所定の結晶軸でカットした圧電片21の両主面に一対の振動電極22を被着・形成して成り、外部からの変動電圧が一対の振動電極22を介して圧電片21に印加されると、所定の周波数で厚みすべり振動を起こすようになっている。この圧電振動素子20は、後述する基体10を構成する基体11側の空間部C1内に搭載されることとなる。   A piezoelectric vibration element 20 shown in FIG. 1 is formed by attaching and forming a pair of vibration electrodes 22 on both main surfaces of a piezoelectric piece 21 obtained by cutting a crystal along a predetermined crystal axis, and a fluctuation voltage from the outside is a pair of vibrations. When applied to the piezoelectric piece 21 via the electrode 22, thickness shear vibration is caused at a predetermined frequency. The piezoelectric vibration element 20 is mounted in the space C1 on the base 11 side constituting the base 10 described later.

図1及び図3(b)に示すように、基体10は、矩形平板状の基板11と、この基板11の縁部に設けられる段差13を有した平面視環状の枠部12とで主に構成され、ガラス布基材エポキシ樹脂やポリカーボネイト,エポキシ樹脂,ポリイミド樹脂等の樹脂材料やガラス−セラミック,アルミナセラミックス等のセラミック材料等が用いられ、基板11と枠部12とを積層して平面視矩形形状を成すように一体に形成されている。
この基体10は、枠部12の段差部13により、この段差部13から基板11までの間に形成される空間部C1と、段差部13から枠部12の先端までの間に形成される空間部C2とが形成されている。
As shown in FIGS. 1 and 3B, the base body 10 is mainly composed of a rectangular plate-like substrate 11 and a frame portion 12 having an annular shape having a step 13 provided at an edge of the substrate 11. It is made of glass cloth base resin such as epoxy resin, polycarbonate, epoxy resin, polyimide resin, or ceramic material such as glass-ceramic, alumina ceramic, and the like. It is integrally formed so as to form a rectangular shape.
The base body 10 has a space C1 formed between the step portion 13 and the substrate 11 by the step portion 13 of the frame portion 12, and a space formed between the step portion 13 and the tip of the frame portion 12. Part C2 is formed.

図1及び図3(b)に示すように、基板11は、空間部C1内に前記圧電振動素子20を搭載するための一対の搭載パッド14が設けられており、Auバンプや半田、異方性導電接着材等の導電性接着剤DSによって圧電振動素子20を搭載することができる。この導電性接着剤DSにより、圧電振動素子20は搭載パッド14と電気的・機械的に接続されることとなる。   As shown in FIG. 1 and FIG. 3B, the substrate 11 is provided with a pair of mounting pads 14 for mounting the piezoelectric vibration element 20 in the space C1, and Au bumps, solder, anisotropic The piezoelectric vibration element 20 can be mounted by a conductive adhesive DS such as a conductive conductive adhesive. The piezoelectric adhesive element 20 is electrically and mechanically connected to the mounting pad 14 by the conductive adhesive DS.

この基板11の裏側、つまり、枠部12が設けられる表面とは反対側となる面の四隅部に外部接続端子(電源電圧端子、グランド端子、発振出力端子、発振制御端子)STが形成され、4つの外部接続電極端子間の周縁には少なくとも2個の書込制御端子(図示せず)が形成されている。
なお、4つの外部接続端子は、本発明の実施形態に係る圧電発振器100をマザーボード等の外部配線基板(図示せず)に接続するための端子として機能するものであり、圧電発振器100を外部配線基板上に搭載する際、外部配線基板の回路配線と半田等の導電性接着剤を介して電気的に接続されるようになっている。
External connection terminals (power supply voltage terminal, ground terminal, oscillation output terminal, oscillation control terminal) ST are formed at the back side of the substrate 11, that is, at the four corners of the surface opposite to the surface on which the frame portion 12 is provided. At least two write control terminals (not shown) are formed on the periphery between the four external connection electrode terminals.
The four external connection terminals function as terminals for connecting the piezoelectric oscillator 100 according to the embodiment of the present invention to an external wiring board (not shown) such as a mother board. The piezoelectric oscillator 100 is connected to the external wiring. When mounted on a substrate, it is electrically connected to the circuit wiring of the external wiring substrate through a conductive adhesive such as solder.

図1及び図3(b)に示すように、枠部12は、平面視矩形形状であって環状に形成されており、基板11の縁部に設けられている。この枠部12は、その中間高さ近傍に段差部13を形成しており、基板11側の空間部C1より枠部12の先端側の空間部C2が大きくなるように形成されている。
段差部13には後述する蓋体30と接合するためのメタライズ層15が設けられている。また、枠部12の先端は、後述する板状の回路基板50が接合される面となり、この回路基板50に設けられた回路パターンの端部と対応する位置に接続パッド16A〜16Nが設けられている。
As shown in FIGS. 1 and 3B, the frame portion 12 has a rectangular shape in plan view, is formed in an annular shape, and is provided at an edge portion of the substrate 11. The frame portion 12 is formed with a step portion 13 in the vicinity of the intermediate height thereof, and is formed such that the space portion C2 on the distal end side of the frame portion 12 is larger than the space portion C1 on the substrate 11 side.
The stepped portion 13 is provided with a metallized layer 15 for joining with a lid 30 described later. The front end of the frame portion 12 is a surface to which a plate-like circuit board 50 described later is joined, and connection pads 16A to 16N are provided at positions corresponding to the end portions of the circuit pattern provided on the circuit board 50. ing.

図1及び図3(b)に示すように、これらの搭載パッド14や外部接続端子ST、接続パッド16A〜16Nのうちの所定の接続パッドは、基体(基板11と枠部12)10の内部に設けられるビアホール(図示せず)内に設けられた配線部Sを介して、対応するもの同士、相互に電気的に接続されている。つまり、所定の配線部Sは、基体10内部に設けられ、枠部12の先端から基板11上に設けられた圧電振動素子20の搭載位置(搭載パッド14)まで達している。   As shown in FIGS. 1 and 3B, the mounting pads 14, the external connection terminals ST, and the predetermined connection pads among the connection pads 16 </ b> A to 16 </ b> N are inside the substrate (substrate 11 and frame portion 12) 10. Corresponding ones are electrically connected to each other through a wiring portion S provided in a via hole (not shown) provided in. That is, the predetermined wiring portion S is provided inside the base body 10 and reaches from the tip of the frame portion 12 to the mounting position (mounting pad 14) of the piezoelectric vibration element 20 provided on the substrate 11.

集積回路素子40は、従来からのものが用いられ、図1に示すように、その形状は、平面視で矩形形状となっている。この集積回路素子40の一方の主面は回路形成面となっており、その面の外周に沿って長手方向に4つ、短手方向に3つの合計8個の端子41が設けられている。また、この集積回路素子40の他方の主面を蓋体30の表面に当接させる。各端子41には従来から用いられている導電性の材質からなる電気的接続用となるバンプと書込用となるバンプ42とが設けられている。   As the integrated circuit element 40, a conventional one is used. As shown in FIG. 1, the shape of the integrated circuit element 40 is a rectangular shape in plan view. One main surface of the integrated circuit element 40 is a circuit forming surface, and four terminals 41 in total in the longitudinal direction and three in the lateral direction are provided along the outer periphery of the surface. Further, the other main surface of the integrated circuit element 40 is brought into contact with the surface of the lid 30. Each terminal 41 is provided with a bump for electrical connection and a bump 42 for writing made of a conductive material conventionally used.

図1及び図3(b)に示すように、蓋体30は、平面視矩形形状となる板体となっており、その一方の主面の縁部に封止材31が設けられ、他方の主面には、その中央部に載置される集積回路素子40の載置位置を固定するための掛止部32が設けられている。この封止材は、従来から用いられているロウ材(金スズ、銀ロウ)が用いられる。   As shown in FIG.1 and FIG.3 (b), the cover body 30 becomes a plate body used as planar view rectangular shape, and the sealing material 31 is provided in the edge of the one main surface, and the other side The main surface is provided with a latching portion 32 for fixing the placement position of the integrated circuit element 40 placed at the center thereof. Conventionally used brazing materials (gold tin, silver brazing) are used as the sealing material.

また、掛止部32は、集積回路素子40が嵌合する大きさの凹みとなっている。この掛止部32は、例えば、蓋体30が金属からなる場合は打ち込みによって集積回路素子40の表面積と同じ面積が凹むようにして形成される。
これにより、集積回路素子40は、段差部13から枠部12の先端までの間に形成される空間部C2に位置することとなる。
Moreover, the latching | locking part 32 is a dent of the magnitude | size which the integrated circuit element 40 fits. For example, when the lid 30 is made of metal, the latching portion 32 is formed such that the same area as the surface area of the integrated circuit element 40 is recessed by driving.
As a result, the integrated circuit element 40 is positioned in the space C2 formed between the step portion 13 and the tip of the frame portion 12.

また、蓋体30は、枠部12の段差部13上に設けられたメタライズ層15の上に、封止材31をこのメタライズ層15と接触するように載置し、封止材31とメタライズ層15とを接合することで圧電振動素子20が搭載されている空間部C1を気密封止する。   The lid 30 is placed on the metallized layer 15 provided on the stepped portion 13 of the frame 12 so as to be in contact with the metallized layer 15, and the lid 30 is metalized with the sealant 31. By joining the layer 15, the space C1 in which the piezoelectric vibration element 20 is mounted is hermetically sealed.

図1と図2(b)と図3(b)に示すように、回路基板50は、基体10と対応するように平面視矩形形状となり中央部に開口部53を有し、集積回路素子40に設けられた8個のバンプのうち、書込用として用いられるバンプ42の位置に対応した位置に形成されたスルーホールを介して回路基板50の外側を向く表面に書込端子51K,51Lが設けられ、それ以外のバンプの位置に対応した位置と枠部12の先端に設けられた接続パッド16A〜16Nに対応した位置まで交差することなく繋げられた回路パターン51A〜51D、51F〜51Iが設けられている。また、設けられたスルーホールと対向する表面に回路パターン51E、51Jが設けられている。   As shown in FIGS. 1, 2 (b), and 3 (b), the circuit board 50 has a rectangular shape in plan view so as to correspond to the base 10, and has an opening 53 at the center, and the integrated circuit element 40. Of the eight bumps provided in the write terminals 51K and 51L on the surface facing the outside of the circuit board 50 through through holes formed at positions corresponding to the positions of the bumps 42 used for writing. Circuit patterns 51A to 51D and 51F to 51I that are provided without crossing the positions corresponding to the positions of the other bumps and the positions corresponding to the connection pads 16A to 16N provided at the tip of the frame portion 12 are provided. Is provided. Further, circuit patterns 51E and 51J are provided on the surface facing the provided through hole.

例えば、集積回路素子40の短辺側に設けられる3つのバンプのうち、中央に位置するバンプ42を書込用とした場合、回路基板50にはこのバンプ42と対応する位置にスルーホールが設けられる。このスルーホールを介して回路基板50の外側を向く表面(集積回路素子40と対向する表面とは反対側の表面)に書込端子51K,51Lが設けられる。また、集積回路素子40と対向する回路基板50の表面には、書込用として用いないバンプに対応する位置から枠部12の先端に設けられた接続パッド16A〜16Nに対応した位置まで交差することなく回路パターン51A〜51D、51F〜51Iと、設けられたスルーホールと対向する表面に回路パターン51E、51Jが設けられている。   For example, when the bump 42 located at the center of the three bumps provided on the short side of the integrated circuit element 40 is used for writing, the circuit board 50 is provided with a through hole at a position corresponding to the bump 42. It is done. Write terminals 51K and 51L are provided on the surface facing the outside of the circuit board 50 through the through hole (surface opposite to the surface facing the integrated circuit element 40). Further, the surface of the circuit board 50 facing the integrated circuit element 40 intersects from a position corresponding to the bump not used for writing to a position corresponding to the connection pads 16A to 16N provided at the tip of the frame portion 12. The circuit patterns 51 </ b> A to 51 </ b> D and 51 </ b> F to 51 </ b> I and the circuit patterns 51 </ b> E and 51 </ b> J are provided on the surface facing the provided through holes.

なお、集積回路素子40には、機械的な接続の強度を増すために設けられたバンプが存在するが、このようなバンプに対しても回路基板50には回路パターンが設けられる。これは、集積回路素子40の回路状態で変更される電気的接続用の端子の位置に対応するためである。したがって、電気的接続用の端子の位置が変更されても対応可能となっている。   The integrated circuit element 40 has bumps provided to increase the strength of mechanical connection, but the circuit board 50 is also provided with a circuit pattern for such bumps. This is because it corresponds to the position of the terminal for electrical connection that is changed depending on the circuit state of the integrated circuit element 40. Therefore, even if the position of the terminal for electrical connection is changed, it can respond.

また、回路パターン51B、51C、51G、51Hの外縁側の端部は、基体10の枠部12の先端に設けられた接続パッド16B、16C、16I、16Jの位置と対応するように、回路基板本体51の外縁側に設けられている。また、回路パターン51E、51Jの外縁側の端部は、基体10の枠部12の先端に設けられた接続パッド16F、16Mの位置と対応するように、回路基板本体51の外縁側に設けられている。   In addition, the circuit board is arranged so that the end portions on the outer edge side of the circuit patterns 51B, 51C, 51G, 51H correspond to the positions of the connection pads 16B, 16C, 16I, 16J provided at the tip of the frame portion 12 of the base body 10. It is provided on the outer edge side of the main body 51. Further, the end portions on the outer edge side of the circuit patterns 51E and 51J are provided on the outer edge side of the circuit board main body 51 so as to correspond to the positions of the connection pads 16F and 16M provided on the front end of the frame portion 12 of the base body 10. ing.

また、回路パターン51A、51D、51F、51Iの外縁側の端部は、回路基板本体51の角部で直角に交わる二つの辺に向けて分岐し、それぞれ、回路パターン51Aの外縁側の端部は回路パターン51AA、51AB、回路パターン51Dの外縁側の端部は回路パターン51DA、51DB、回路パターン51Fの外縁側の端部は回路パターン51FA、51FB、回路パターン51Iの外縁側の端部は回路パターン51IA、51IB、となっている。
これら回路パターン51AA、51AB、51DA、51DB、51FA、51FB、51IA、51IB、は、基体10の枠部12の先端に設けられた接続パッド16A、16N、16D、16E、16G、16H、16K、16L、の位置と対応するように、回路基板本体51の集積回路素子40と向かい合う面の縁部側に設けられている。
Further, the end portions on the outer edge side of the circuit patterns 51A, 51D, 51F, and 51I branch toward two sides that intersect at right angles at the corners of the circuit board body 51, and end portions on the outer edge side of the circuit pattern 51A, respectively. Are the circuit patterns 51AA, 51AB, the circuit pattern 51D is the outer edge of the circuit pattern 51DA, 51DB, the circuit pattern 51F is the outer edge of the circuit pattern 51FA, 51FB, and the circuit pattern 51I is the outer edge of the circuit pattern 51I. The patterns are 51IA and 51IB.
These circuit patterns 51AA, 51AB, 51DA, 51DB, 51FA, 51FB, 51IA, 51IB are connection pads 16A, 16N, 16D, 16E, 16G, 16H, 16K, 16L provided at the tip of the frame portion 12 of the base body 10. The circuit board body 51 is provided on the edge side of the surface facing the integrated circuit element 40 so as to correspond to the positions of

このように形成することにより接続箇所が多くなるので、回路基板50を枠部12に接続した場合の接続強度を高めることができる。
また、回路基板50の露出する表面に、スルーホールを介して書込端子51K,51Lを設けたので、集積回路素子40への書込が容易となり、また、従来のように圧電発振器の側面に書き込み端子が設けられないので短絡の恐れがなく、また、圧電発振器100の系面形状を有効に利用することができるので、小型化に対応させることができる。
Since the number of connection points increases by forming in this way, the connection strength when the circuit board 50 is connected to the frame portion 12 can be increased.
In addition, since the write terminals 51K and 51L are provided on the exposed surface of the circuit board 50 through the through holes, writing to the integrated circuit element 40 is facilitated, and the side surface of the piezoelectric oscillator is conventionally provided. Since no writing terminal is provided, there is no fear of a short circuit, and the system surface shape of the piezoelectric oscillator 100 can be used effectively, so that the size can be reduced.

次に、本発明の第一の実施形態に係る圧電発振器の製造工程について説明する。
図1に示す、外部接続端子STと搭載パッド14とを有する基板11の縁部に段差部13が形成され先端に接続パッド16A〜16Nを枠部12の先端に有し、この接続パッド16A〜16Nと接続する配線部が内部に形成された基体10において、まず、搭載パッド14に、圧電振動素子20を搭載する。このとき、圧電振動素子20の励振電極21から伸びる引き出し電極と搭載パッド14とを導電性接着剤DSで接続する。
Next, the manufacturing process of the piezoelectric oscillator according to the first embodiment of the present invention will be described.
As shown in FIG. 1, a stepped portion 13 is formed at the edge of a substrate 11 having an external connection terminal ST and a mounting pad 14, and connection pads 16A to 16N are provided at the tip of the frame portion 12, and the connection pads 16A to 16A are provided. In the base body 10 in which the wiring portion connected to 16N is formed, the piezoelectric vibration element 20 is first mounted on the mounting pad. At this time, the lead electrode extending from the excitation electrode 21 of the piezoelectric vibration element 20 and the mounting pad 14 are connected by the conductive adhesive DS.

図2(a)に示すように、圧電振動素子20を搭載した後に蓋体30を基体10の枠部12の段差部13に載置し、圧電振動素子20が搭載された空間部C1を気密封止する。
この状態で、圧電振動素子20の特性を確認し、「良品」と判定されたものだけを用いる。
As shown in FIG. 2A, after the piezoelectric vibration element 20 is mounted, the lid 30 is placed on the stepped portion 13 of the frame 12 of the base body 10, and the space C1 in which the piezoelectric vibration element 20 is mounted is opened. Seal tightly.
In this state, the characteristics of the piezoelectric vibration element 20 are confirmed, and only those determined as “non-defective” are used.

図2(b)に示すように、蓋体30に設けられた掛止部32内に集積回路素子40を配置して回路形成面とは反対側の面が蓋体30の表面と当接させ、この掛止部32で集積回路素子40の載置位置を固定させる。   As shown in FIG. 2 (b), the integrated circuit element 40 is arranged in the latching portion 32 provided on the lid 30, and the surface opposite to the circuit forming surface is brought into contact with the surface of the lid 30. The mounting position of the integrated circuit element 40 is fixed by the latching portion 32.

図3(a)及び図3(b)に示すように、集積回路素子40の位置が固定された後に回路基板50を枠部12上に載置する。このとき、回路基板50の外側の集積回路素子40と向かい合う面の縁部に位置する回路パターンの一方の端部51AA、51B、51C、51DA、51DB、51E、51FA、51FB、51G、51H、51IA、51IB、51J、51ABとそれぞれ対応する枠部12の接続パッド16A〜16Nとの間に導電性接着剤(図示せず)を介して接続しつつ、他方の端部を集積回路素子40に設けられたバンプと接続する。また、集積回路素子40の書込用のバンプ42は回路基板50の書込端子51K,51Lと接続する。なお、各バンプは、それぞれ対応する各回路パターンに溶融して接合されても良いし、導電性接着剤で接合しても良い。   As shown in FIGS. 3A and 3B, after the position of the integrated circuit element 40 is fixed, the circuit board 50 is placed on the frame portion 12. At this time, one end 51AA, 51B, 51C, 51DA, 51DB, 51E, 51FA, 51FB, 51G, 51H, 51IA of the circuit pattern located at the edge of the surface facing the integrated circuit element 40 outside the circuit board 50 , 51IB, 51J, 51AB and the connection pads 16A to 16N of the corresponding frame 12 are connected via a conductive adhesive (not shown), and the other end is provided in the integrated circuit element 40. Connect with the bumps. The write bumps 42 of the integrated circuit element 40 are connected to the write terminals 51K and 51L of the circuit board 50. Each bump may be melted and bonded to each corresponding circuit pattern, or may be bonded with a conductive adhesive.

なお、この状態で集積回路素子40と接続している書込端子51K,51Lを用いて、当該集積回路素子40に所定の情報の書き込みを行う。   In this state, predetermined information is written to the integrated circuit element 40 using the write terminals 51K and 51L connected to the integrated circuit element 40.

したがって、このように圧電発振器100を構成したので、製造ラインを複雑にすることなく1本化することができるので製造が容易となり、製造コストを低くすることができる。また、蓋体30にスルーホールを設けることがないので、圧電振動素子20が搭載される空間部C1の封止を確実にすることができる。   Therefore, since the piezoelectric oscillator 100 is configured as described above, it is possible to integrate the piezoelectric oscillator 100 without complicating the manufacturing line, thereby facilitating the manufacturing and reducing the manufacturing cost. In addition, since no through hole is provided in the lid 30, the sealing of the space C <b> 1 in which the piezoelectric vibration element 20 is mounted can be ensured.

また、集積回路素子40を搭載する前に圧電振動素子20の特性を確認して良否判定を行うことができるので、集積回路素子40を搭載してからの圧電振動素子20の特性の確認を行う場合と異なり、圧電振動素子20が良品でなかった場合に集積回路素子40を無駄にするのを防ぐことができる。   In addition, since the characteristics of the piezoelectric vibration element 20 can be confirmed before the integrated circuit element 40 is mounted and the quality can be determined, the characteristics of the piezoelectric vibration element 20 after the integrated circuit element 40 is mounted are confirmed. Unlike the case, it is possible to prevent the integrated circuit element 40 from being wasted when the piezoelectric vibration element 20 is not a good product.

(第二の実施形態)
図4は、本発明の第二の実施形態に係る圧電発振器の一例を示す断面図である。
本発明の第二の実施形態に係る圧電発振器101は、空間部C2内に樹脂Jが充填されている点で第一の実施形態と異なる。
(Second embodiment)
FIG. 4 is a cross-sectional view showing an example of a piezoelectric oscillator according to the second embodiment of the present invention.
The piezoelectric oscillator 101 according to the second embodiment of the present invention is different from the first embodiment in that the resin J is filled in the space C2.

この樹脂Jは、絶縁性の材料からなり、図4に示すように、回路基板50に設けられた開口部53から空間部C2内に充填される。
このとき、樹脂Jは、集積回路素子40が載置されている蓋体30の全面を覆いつつ、集積回路素子40の回路形成面(蓋体30に当接している面とは反対側の面)を覆うまで充填される。なお、開口部53に達するまで樹脂Jを充填しても良い。
The resin J is made of an insulating material, and is filled into the space C2 from the opening 53 provided in the circuit board 50 as shown in FIG.
At this time, the resin J covers the entire surface of the lid body 30 on which the integrated circuit element 40 is placed, while the circuit forming surface of the integrated circuit element 40 (the surface opposite to the surface in contact with the lid body 30). ) Until it covers. The resin J may be filled until the opening 53 is reached.

これにより、蓋体も樹脂で覆われて、蓋体と枠部との間に隙間が生じても注入された樹脂で気密漏れを防ぐことができ、また、集積回路素子40の回路形成面も保護することができる。   As a result, the lid body is also covered with the resin, and even if a gap is generated between the lid body and the frame portion, it is possible to prevent airtight leakage with the injected resin. Also, the circuit formation surface of the integrated circuit element 40 can be prevented. Can be protected.

(第三の実施形態)
図5(a)は本発明の第二の実施形態に係る圧電発振器の一例を示す図であり、(b)は(a)のB−B断面図である。
本発明の第三の実施形態に係る圧電発振器102は、回路基板50の書込端子51K,51Lが形成されている面に保護フィルムFを貼り付けても良い。この保護フィルムFは、絶縁性材料が用いられ、書込端子51K,51Lの短絡を防ぐ役割を果たす。
これにより、マザーボード等に本発明の圧電発振器102を搭載しても、異物の混入が起きても書込端子51K,51Lの短絡を防ぐことができる。
(Third embodiment)
Fig.5 (a) is a figure which shows an example of the piezoelectric oscillator which concerns on 2nd embodiment of this invention, (b) is BB sectional drawing of (a).
In the piezoelectric oscillator 102 according to the third embodiment of the present invention, the protective film F may be attached to the surface of the circuit board 50 on which the write terminals 51K and 51L are formed. This protective film F is made of an insulating material and plays a role of preventing a short circuit between the write terminals 51K and 51L.
Thus, even if the piezoelectric oscillator 102 of the present invention is mounted on a mother board or the like, even if foreign matter is mixed in, it is possible to prevent the writing terminals 51K and 51L from being short-circuited.

なお、本発明は上述の実施形態に限定されるものではなく、本発明の要旨を逸脱しない範囲において種々の変更、改良等が可能である。例えば、掛止部を蓋体から突起するように形成しても良い。つまり、掛止部を4つの突起状に形成された壁部とし、集積回路素子40の下方の4つの端辺を押さえるように構成しても集積回路素子40の位置を固定することができる。このとき、この掛止部の集積回路素子40側の側面は蓋体30の表面から離れるにつれて開口が広がるようにテーパを付け、集積回路素子40を載置する際には、当該集積回路素子40がこのテーパ状の表面を滑るようにして蓋体30の表面に載置する。したがって、蓋体30の表面に集積回路素子40が載置されると、この掛止部32により集積回路素子40が載置された位置を固定することができる。
また、この掛止部は、蓋体30の上に接着剤等により貼り付けてもよい。
また、回路基板に形成される回路パターンは、集積回路素子に設けられるバンプの配置位置に対応していれば良く、その回路パターンの形状は、第一の実施形態の形状に限定されない。
また、この保護フィルムにシールド効果のある材質の板材を内部に設けて、外部からの電磁波による干渉を防いでも良い。
The present invention is not limited to the above-described embodiment, and various changes and improvements can be made without departing from the gist of the present invention. For example, you may form a latching part so that it may protrude from a cover body. In other words, the position of the integrated circuit element 40 can be fixed even if the latching part is formed as a wall part formed into four protrusions and the four lower edges of the integrated circuit element 40 are pressed. At this time, the side surface of the latching portion on the side of the integrated circuit element 40 is tapered so that the opening widens as the distance from the surface of the lid 30 increases, and when the integrated circuit element 40 is placed, the integrated circuit element 40 is placed. Is placed on the surface of the lid 30 so as to slide on the tapered surface. Therefore, when the integrated circuit element 40 is placed on the surface of the lid 30, the position where the integrated circuit element 40 is placed can be fixed by the latching portion 32.
In addition, this hooking portion may be affixed on the lid 30 with an adhesive or the like.
The circuit pattern formed on the circuit board only needs to correspond to the arrangement position of the bumps provided on the integrated circuit element, and the shape of the circuit pattern is not limited to the shape of the first embodiment.
Further, a plate material having a shielding effect may be provided inside the protective film to prevent interference due to electromagnetic waves from the outside.

本発明の第一の実施形態に係る圧電発振器の一例を示す分解斜視図である。1 is an exploded perspective view showing an example of a piezoelectric oscillator according to a first embodiment of the present invention. (a)は蓋体を基体に接合した状態を示す図であり(b)は回路基板を基体に接合する前の状態を示す図である。(A) is a figure which shows the state which joined the cover body to the base | substrate, (b) is a figure which shows the state before joining a circuit board to a base | substrate. (a)は本発明の第一の実施形態に係る圧電発振器の一例を示す斜視図であり、(b)は(a)のA−A断面図である。(A) is a perspective view which shows an example of the piezoelectric oscillator which concerns on 1st embodiment of this invention, (b) is AA sectional drawing of (a). 本発明の第二の実施形態に係る圧電発振器の一例を示す断面図である。It is sectional drawing which shows an example of the piezoelectric oscillator which concerns on 2nd embodiment of this invention. (a)は本発明の第二の実施形態に係る圧電発振器の一例を示す図であり、(b)は(a)のB−B断面図である。(A) is a figure which shows an example of the piezoelectric oscillator which concerns on 2nd embodiment of this invention, (b) is BB sectional drawing of (a).

符号の説明Explanation of symbols

100、101 圧電発振器
10 基体
11 基板
12 枠部
13 段差部
20
圧電振動素子
30 蓋体
32 掛止部
40 集積回路素子
42 バンプ
50 回路基板
51K,51L 書込端子
53 開口部
C1,C2 空間部
S 配線部
J 樹脂
F 保護フィルム
DESCRIPTION OF SYMBOLS 100,101 Piezoelectric oscillator 10 Base | substrate 11 Board | substrate 12 Frame part 13 Level difference part 20
Piezoelectric vibration element 30 Lid 32 Latching part 40 Integrated circuit element 42 Bump 50 Circuit board 51K, 51L Writing terminal 53 Opening part C1, C2 Space part S Wiring part J Resin F Protective film

Claims (2)

基板と枠部とで一体に形成される基体に設けられた1つの空間部を蓋体で2つの空間部に仕切り、前記基板側の空間部に圧電振動素子が搭載され、前記枠部の先端側に集積回路素子が位置する圧電発振器であって、
前記枠部の先端から前記圧電振動素子の搭載位置まで達し、前記基体内部に設けられる配線部と、
前記枠部の先端と前記電気的接続用となる所定のバンプと前記書込用となる所定のバンプとに接合されて回路基板とを備え、
前記集積回路素子が回路形成面に電気的接続用となる所定のバンプと書込用となる所定のバンプとが設けられ、前記蓋体に載置され前記回路形成面とは反対側の面が前記蓋体の表面に当接され、
前記蓋体が集積回路素子を載置する際に位置を固定する掛止部を備え、
前記回路基板が前記書込用となる所定のバンプの位置に対応させたスルーホールを有し、このスルーホールを介して露出する表面に前記バンプと繋ぐように設けられた書込端子を備えて構成されることを特徴とする圧電発振器。
One space portion provided in a base body integrally formed with a substrate and a frame portion is divided into two space portions by a lid, and a piezoelectric vibration element is mounted in the space portion on the substrate side, and the tip of the frame portion A piezoelectric oscillator having an integrated circuit element on its side,
Reaching the mounting position of the piezoelectric vibration element from the tip of the frame part, and a wiring part provided inside the base body,
A circuit board bonded to the tip of the frame portion, the predetermined bump for electrical connection and the predetermined bump for writing, and
The integrated circuit element is provided with predetermined bumps for electrical connection and predetermined bumps for writing on a circuit formation surface, and the surface opposite to the circuit formation surface is placed on the lid. Abutted against the surface of the lid,
The lid includes a latching portion for fixing a position when the integrated circuit element is placed,
The circuit board has a through hole corresponding to the position of a predetermined bump for writing, and a writing terminal provided on the surface exposed through the through hole so as to be connected to the bump. A piezoelectric oscillator characterized by comprising.
前記回路基板の中央に開口部を有し、前記開口部から前記枠部内に樹脂を充填してなることを特徴とする請求項1に記載の圧電発振器。   2. The piezoelectric oscillator according to claim 1, wherein an opening is provided in the center of the circuit board, and resin is filled into the frame from the opening.
JP2006093672A 2006-03-30 2006-03-30 Piezoelectric oscillator Pending JP2007274043A (en)

Priority Applications (1)

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JP2006093672A JP2007274043A (en) 2006-03-30 2006-03-30 Piezoelectric oscillator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006093672A JP2007274043A (en) 2006-03-30 2006-03-30 Piezoelectric oscillator

Publications (1)

Publication Number Publication Date
JP2007274043A true JP2007274043A (en) 2007-10-18

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Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010153966A (en) * 2008-12-24 2010-07-08 Nippon Dempa Kogyo Co Ltd Surface mount crystal oscillator

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010153966A (en) * 2008-12-24 2010-07-08 Nippon Dempa Kogyo Co Ltd Surface mount crystal oscillator

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