JP2007133263A - Image processing apparatus, image processing method, image processing program, and recording medium - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To carry out image processing on sequential transmission data by seamless switching. <P>SOLUTION: A shift register section 2 receives continuous transmission data including synchronizing information representing the top of a frame and subsequent image data. A synchronizing information detecting section 3 detects synchronizing information included in the transmission data received by the shift register section 2. A register section 5 outputs information stored in a register set corresponding to the synchronizing information detected by the synchronizing information detecting section 3, to a data processing section 4. The data processing section 4 carries out image processing corresponding to the synchronizing information upon the image data included in the transmission data. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an image processing apparatus, an image processing method, an image processing program, and a recording medium that perform image processing on transmission data including synchronization information indicating the head of a frame.

  In recent years, the amount of image information that can be processed by a mobile terminal device tends to increase. For example, in addition to the currently mainstream QVGA (240 dots × 320 lines) liquid crystal, there is a high possibility that higher-definition VGA (480 dots × 640 lines) liquid crystal will be adopted in mobile terminal devices in the future. On the other hand, with respect to image data (content), VGA size and smaller size (for example, QVGA) are mixed. For this reason, it is necessary to appropriately switch image data having different sizes while displaying an image.

  A conventional image processing apparatus displays an image after recording image data after enlargement processing in a VRAM. Therefore, a memory area equivalent to the VGA size is used for image data having a size equal to or smaller than the VGA.

Also, Patent Document 1 discloses an image communication terminal device that receives transmission data including synchronization information indicating the head of a frame. In the technique of Patent Document 1, display position data is added to a predetermined frame synchronization signal, and the received second image data is the position designated by the previous display position data in the first first image data. Overlay. As a result, it is necessary to synchronize communication between the transmission unit and the reception unit in the serial transmission that realizes the image superimposition processing while reducing the software load. In order to achieve this synchronization, synchronization information is added to the head of the frame of transmission data. In the conventional image communication terminal device described above, display position data is added to the synchronization information. However, Patent Document 1 does not disclose that image processing (enlargement processing) is performed on the image data itself. Also, Patent Document 1 does not disclose an improvement effect and a solution for an increase in memory usage, an increase in current consumption, and a visual effect that occur due to image processing (enlargement processing).
Japanese Patent Laid-Open No. 3-278766 (released on December 10, 1991)

  As described above, when displaying image data having a size smaller than VGA on the VGA screen, it is necessary to enlarge the data. Image data is enlarged by software and hardware, stored in the VRAM, and then displayed on a screen through a path including a serial transmission path from the VRAM to the display circuit. At this time, data exceeding the information amount of the image data before enlargement is handled. For this reason, a large amount of memory area and current are consumed when displaying image data having a size equal to or smaller than VGA.

  Such an information processing apparatus preferably executes the image data enlargement process immediately before the image display circuit. However, the display circuit requires image rewriting several tens of times per second in order to maintain display quality. Accordingly, continuous image data is transmitted regularly and frequently to the path from the VRAM to the display circuit. Thus, in order to switch image data of different sizes without interrupting image display, it is necessary to simultaneously switch the settings on the transmission side and reception side devices of serial transmission at the frame breaks.

  However, there are many setting items that need to be switched, such as the size of the image to be transmitted, the liquid crystal on / off timing setting, and the clock setting. Therefore, the larger the size of the transmitted image data, the longer the time required for setting, and there is a possibility that the setting will not be in time within a predetermined time. In this case, when the image data is switched, it is necessary to pause the display, so that the display quality is deteriorated.

  The present invention has been made to solve the above problems, and an object of the present invention is to provide an image processing apparatus, an image processing method, an image processing program, and a recording medium for seamlessly switching and displaying image data of different sizes. There is to do.

In order to solve the above problems, an image processing apparatus according to the present invention provides:
An image processing apparatus that performs image processing on continuous transmission data having communication synchronization information and subsequent image data,
Synchronization information detecting means for detecting the synchronization information included in the transmission data;
And image processing means for performing image processing corresponding to the synchronization information detected by the synchronization information detection means on the image data.

  According to said structure, a synchronous information detection means detects the synchronous information contained in transmission data. This synchronization information is, for example, information included in the head of the frame and indicating that it is the head of the frame.

  At this time, the image processing means performs image processing corresponding to the synchronization information detected by the synchronization information detecting means on the image data included in the transmission data. For example, when image processing of enlargement processing is associated with certain synchronization information in advance, if the synchronization information is detected, the enlargement processing is performed on the image data. Therefore, the image data is enlarged.

  As described above, the image processing means can perform appropriate image processing corresponding to the synchronization information on each piece of continuous transmission data on the image data included in the transmission data. Therefore, it is not necessary to switch the image processing contents between the transmission data before and after the continuous transmission in accordance with the timing by interrupt processing or the like. As a result, the image processing apparatus has an effect that image processing for continuous transmission data can be switched seamlessly.

In order to solve the above problems, an image processing method according to the present invention provides:
An image processing method executed by an image processing apparatus that performs image processing on continuous transmission data having communication synchronization information and subsequent image data,
A synchronization information detecting step for detecting the synchronization information included in the transmission data;
An image processing step for performing image processing corresponding to the synchronization information detected in the synchronization information detection step on the image data.

  According to said structure, there exists an effect similar to the image processing apparatus mentioned above.

In the image processing apparatus according to the present invention, further,
The transmission data includes the image data for one frame,
It is preferable that the image processing unit further includes an output unit that continuously outputs the image data after the image processing is performed to the display device.

  According to the above configuration, the transmission data includes image data for one frame. At this time, since the image processing means performs image processing on the image data for one frame, it is possible to perform appropriate image processing on transmission data such as a moving image including a large number of continuous frames.

  The output means continuously outputs the image data subjected to the image processing to the display device. Therefore, the image processing apparatus has an effect that image data of successive frames can be correctly displayed on the display device.

In the image processing apparatus according to the present invention, further,
The synchronization information and the image processing are preferably in a one-to-one relationship.

  According to the above configuration, the synchronization information and the image processing have a one-to-one relationship in the image processing apparatus. Therefore, when the synchronization information detecting unit detects synchronization information, the image processing unit does not need to select an image process corresponding to the synchronization information from a plurality of candidates, and selects one unconditionally. To do. As a result, the image processing means can more quickly determine which image processing is to be performed on the image data. Accordingly, the image processing apparatus has an effect that image data can be processed more quickly.

In the image processing apparatus according to the present invention, further,
The image processing means includes
The image processing is preferably performed on the image data so that the image data is enlarged to the same size after the processing.

  According to the above configuration, the image processing means performs image processing on each image data so that each image data is enlarged to the same size after processing. Accordingly, since the sizes of the processed image data are the same, there is an effect that it is easy to see when the processed image data is displayed on the display device with respect to the size of the image data included in the transmission data.

  The image processing apparatus may be realized by a computer. In this case, an image processing program for realizing the image processing apparatus in the computer by operating the computer as each of the above means and a computer-readable recording medium on which the image processing program is recorded also fall within the scope of the present invention.

  As described above, the image processing apparatus according to the present invention includes image processing means for performing image processing corresponding to the synchronization information included in the transmission data on the image data included in the same transmission data. There is an effect that image processing for continuous transmission data can be performed by seamless switching.

  An embodiment according to the present invention will be described below.

  FIG. 1 is a block diagram showing a main configuration of an image processing apparatus 1 according to an embodiment of the present invention. FIG. 1 shows a display unit 6 that displays processing data output from the image processing apparatus 1 on the screen together with the image processing apparatus 1.

  As shown in FIG. 1, the image processing apparatus 1 includes a shift register unit 2, a synchronization information detection unit 3, a data processing unit 4, and a register unit 5. The register unit 5 includes a register set A7 and a register set B8. The shift register unit 2 includes a first shift register input terminal 11, a second shift register input terminal 21, a first shift register output terminal 12, and a second shift register output terminal 14. The shift register input terminal 11 is electrically connected to a predetermined transmission line. Further, continuous transmission data 9 serially transmitted from a predetermined transmission unit is received via a predetermined transmission path.

(Structure of transmission data 9)
FIG. 2 is a diagram illustrating a data structure of transmission data 9 received by the image processing apparatus 1. Each transmission data 9 includes a VF (Vertical Front) code 30 and a transmission data body (image data) 31 as shown in FIG. The VF code 30 is communication synchronization information and represents the head of a frame. In the present embodiment, the transmission data main body 31 is image data for one frame. The transmission data body 31 includes a plurality of pixel data. At this time, in the transmission data main body 31, pixel data are arranged in order from the left to the right of the image.

(Shift register 2)
The shift register unit 2 receives the transmission data 9 serially transmitted via a predetermined transmission path, one bit at a time, through the first shift register input terminal 11. The shift register unit 2 outputs the received transmission data 9 to the synchronization information detection unit 3 and the data processing unit 4. Specifically, the shift register unit 2 outputs the bit string of the transmission data 9 to the synchronization information detection unit 3 and the data processing unit 4 in the order received. The shift register unit 2 sequentially receives the transmission data 9 described above from the VF code 30 toward the transmission data body 31. The shift register unit 2 can hold, that is, store data of a predetermined number of bits in the transmission data 9.

  When the transmission data 9 is input, the shift register unit 2 always holds, for example, 32-bit data. As a result, according to the necessary timing, only the necessary data amount is output to the synchronization information detecting unit 3 and the data processing unit 4. Specifically, for example, when the data amount of the VF code 30 is 32 bits, the shift register unit 2 detects data of 32 bits representing the first VF code 30 included in the transmission data 9. Does not transmit data held in the data processing unit 4. On the other hand, after detecting 32-bit data representing the VF code 30, the data is transmitted to the data processing unit 4 by 16 bits.

  The shift register unit 2 outputs the received transmission data 9 through the first shift register output terminal 12 and the second shift register output terminal 14. More specifically, the shift register unit 2 outputs a bit string (specifically, 16 bits) of the transmission data 9 having a predetermined amount of data to the synchronization information detection unit 3 through the first shift register output terminal 12. . Further, after the transmission data 9 is output to the synchronization information detection unit 3, the transmission data 9 is output to the data processing unit 4 through the second shift register output terminal 14 after being delayed for a predetermined time.

(Details of the synchronization information detection unit 3)
The synchronization information detection unit 3 includes a detection unit input terminal 13, a first detection unit output terminal 15, and a second detection unit output terminal 22. The synchronization information detection unit 3 is electrically connected to the first shift register output terminal 12 and the second shift register input terminal 21 of the shift register unit 2. The transmission information 9 output from the shift register unit 2 is input to the synchronization information detection unit 3. As a result, the VF code 30 that is the synchronization information included at the head of the transmission data 9 is detected. More specifically, the synchronization information detection unit 3 detects the VF code 30 by comparing the bit string of the transmission data 9 with the bit string of sample data prepared in advance.

(VF code 30)
The data amount of the VF code 30 is determined in advance. The amount of data is, for example, 16 bits or more and less than 64 bits, and preferably 32 bits. It is preferable that the data amount of the VF code 30 is 16 bits, and a unique code that is not used for transmission data, excluding synchronization information, is arranged in the preceding stage of the VF code 30. Thereby, it is possible to prevent the bit string of the main body of the transmission data 9 from matching with the bit string of the sample data. Therefore, the reliability of synchronization information detection can be improved.

  For example, it is prohibited to set the codes “0xFF” and “0x00” in the transmission data 9 and the predetermined data amount is 32 bits. At this time, by setting the VF code 30 to “0xFF000001”, the transmission data 9 body does not match the synchronization information at any timing. For example, when the predetermined amount of data is 16 bits, the VF code 30 may be “0xF001”. Furthermore, when the predetermined data amount is 64 bits, the VF code 30 may be “0xFFFF000000000001”. These are all examples, and other configurations may be used.

  If the data amount of the VF code 30 is less than 64 bits, it is possible to prevent the data amount of the synchronization information from increasing. Thereby, it can prevent that the data amount of the transmission data 9 increases.

  In the following example, certain transmission data includes synchronization information A and VGA size image data. Other transmission data includes synchronization information B and QVGA size image data. The synchronization information A is information indicating that the size of the image data included in the transmission data is VGA. On the other hand, the synchronization information B is data in which the size of the image data included in the transmission data indicates the QVGA size. That is, the transmission data received by the image processing apparatus 1 includes synchronization information that can specify at least the size of the image data included in the transmission data.

  The synchronization information detection unit 3 holds a plurality of sample data whose bit strings match the VF code 30, for example, sample data A and sample data B. Thereby, the bit string input from the shift register unit 2 is compared with the bit strings of the sample data A and the sample data B that are held. When they match, it is determined that the synchronization information A and the synchronization information B are detected.

  For example, when the sample data A is detected, the synchronization information detection unit 3 notifies the shift register unit 2 of a signal (synchronization information detection signal) for notifying that the synchronization information A has been detected. At the same time, a signal notifying that the synchronization information A has been detected is output through the first detection unit output terminal 15. Conversely, when the sample data B is detected, the synchronization information detection unit 3 outputs a signal (synchronization information detection signal) notifying the shift register unit 2 that the synchronization information B has been detected. At the same time, a signal notifying that the synchronization information B has been detected is output through the first detection unit output terminal 15.

  That is, the synchronization information detection unit 3 notifies the shift register unit 2 that at least one of the synchronization information A and the synchronization information B has been detected. At this time, a notification signal including the type of detected synchronization information is output through the first detection unit output terminal 15.

  Specifically, when the VF code 30 cannot be detected, the synchronization information detection unit 3 maintains the output synchronization information detection signal at a low (L) level. On the other hand, when the VF code 30 is detected, the output synchronization information detection signal is maintained at a high (H) level for a predetermined time. The synchronization information detection unit 3 outputs a synchronization information detection signal through the second detection unit output terminal 22. In addition, a synchronization information type signal indicating the type of the detected synchronization signal is output to the register unit 5 through the first detection unit output terminal 15. For example, when the synchronization signal A is detected, the synchronization information detection unit 3 maintains the level of the synchronization information type signal to be output at a low (L) level. On the other hand, when the synchronization signal B is detected, it is maintained at a high (H) level. The synchronization information detection unit 3 maintains the level of the synchronization information type signal at the current low (L) level or high (H) level until the next synchronization signal is detected.

(Dot counter)
The shift register unit 2 includes a dot counter. The dot counter counts the number of bits included in the image data 31. When the synchronization information detection unit 3 detects the VF code 30, the shift register unit 2 switches the signal level of the image enable signal from the low (L) level to the high (H) level. When the signal level of the image enable signal is switched from the low (L) level to the high (H) level, the dot counter starts counting bits. When the dot counter counts bits up to a predetermined count, the shift register unit 2 switches the signal level of the image enable signal from the high (H) level to the low (L) level.

(Details of register unit 5)
For example, most of the register unit 5 is configured by an FF (flip-flop), and records various parameters. The register unit 5 includes a register input terminal 17 and a register output terminal 19. The register input terminal 17 is electrically connected to the first detection unit output terminal 15 of the synchronization information detection unit 3. The register unit 5 includes a register set A7 and a register set B8. The register set A7 and the register set B8 are composed of a plurality of registers (recording elements).

  For example, the register set A7 includes n registers REG_A_0 to REG_A_n. Specifically, the REG_A_0 to REG_A_n include the image data size of the transmission data, the enlargement ratio of the image data, the setting of the image data gamma correction circuit ON or OFF, and the image data YUV to RGB conversion circuit ON or OFF setting. Information for determining settings, clock frequency settings, and the like is recorded. Similarly, the register set B8 has a register group (REG_B_0 to REG_B_n) that is exactly the same as the various registers (REG_A_0 to REG_A_n) included in the register set A7.

  A synchronization information type signal output from the synchronization information detection unit 3 is input to the register unit 5 through the register input terminal 17. As a result, the register unit 5 selects either the register set A7 or the register set B8 according to the input synchronization information type signal. More specifically, when the signal level of the synchronization information type signal is low (L) level, the register unit 5 selects the register set A7 (REG_A_0 to REG_A_n). On the other hand, when the signal level of the synchronization information type signal is high (H) level, the register unit 5 selects the register set B8 (REG_B_0 to REG_B_n).

  The register unit 5 outputs the information stored in the selected register set through the register output terminal 19. Specifically, the register output terminal 19 of the register unit 5 has n output signal lines REG_0 to REG_n. When the register set A7 is selected, the register unit 5 connects REG_A_0 to REG_A_n to REG_0 to REG_n. On the other hand, when the register set B8 is selected, REG_B_0 to REG_B_n are connected to REG_0 to REG_n. Therefore, when the register unit 5 selects the register set A7, the register unit 5 outputs the information stored in the REG_A_0 to REG_A_n through the register output terminal 19. On the other hand, when register set B8 is selected, the information stored in REG_B_0 to REG_B_n is output through register output terminal 19.

(Data processing unit 4)
The data processing unit 4 is a processing circuit such as a microcomputer and a digital signal processor (abbreviated as DSP). The data processing unit 4 includes a first data input terminal 16, a second data input terminal 18, and a data output terminal 20. The first data input terminal 16 is electrically connected to the second shift register output terminal 14 of the shift register unit 2. The second data input terminal 18 is electrically connected to the register output terminal 19 of the register unit 5.

  The transmission data 9 output from the shift register unit 2 is input to the data processing unit 4 through the first data input terminal 16. Thereby, the data processing unit 4 performs image processing on the transmission data 9. At this time, for example, a clock frequency may be set. The data processing unit 4 generates processing data by performing image processing on the transmission data 9. The data processing unit 4 outputs the generated processing data to the display unit 6 through the data output terminal 20.

As the image processing, the data processing unit 4 converts the image data included in the transmission data 9 into a predetermined data format, enlargement processing for enlarging and displaying the image, and color tone that makes the image look good for humans. The process to convert to, etc. is executed. At this time, which image processing is to be executed is determined based on the information of the register set (REG_0 to REG_n) input through the second data input terminal 18 by the register unit 5.

  More specifically, for example, when the transmission data 9 includes the VF code 30 indicating the synchronization information B and QVGA size image data, the data processing unit 4 is connected to the register unit via the second data input terminal 18. The register set B8 including the enlargement process selected by 5 is input. As a result, the data processing unit 4 enlarges the image size of the QVGA size image data of the transmission data 9, converts it to VGA size processing data, and outputs the processed data through the data output terminal 20.

  For example, when the transmission data 9 includes the VF code 30 indicating the synchronization information A and the VGA size image data, the data processing unit 4 has the image selected by the register unit 5 through the second data input terminal 18. A register set A7 not including the enlargement process is input. Thereby, the data processing unit 4 executes, for example, a color tone conversion process on the VGA size image data of the transmission data 9 and outputs the VGA size processing data from the data output terminal 20. At this time, the data processing unit 4 does not need to process anything, for example.

  The processing data output from the data processing unit 4 through the data output terminal 20 is displayed on the screen by the display device 6 described later. The display device 6 displays the processing data in a predetermined size, for example, a VGA size. Therefore, the size of the processing data must be VGA size.

(Display unit 6)
The display unit 6 is a display device such as a liquid crystal display panel and an organic EL panel. The display unit 6 includes a display input terminal 21. The processing data output from the data processing unit 4 is input to the display unit 6 through the display input terminal 21. Thereby, the display circuit displays the processing data on, for example, a liquid crystal display panel. The display unit 6 can display only image data having a predetermined size. Therefore, the image size that can be displayed by the display unit 6 matches the size of the processing data output by the data processing unit 4.

  When the size (for example, QVGA) of the image data included in the transmission data 9 is different from the image size (for example, VGA) that can be displayed on the display unit 6, the data processing unit 4 displays the image data included in the transmission data 9 Is enlarged and converted to an image size (for example, VGA) that can be displayed on the display unit 6.

(Processing of the synchronization information detection unit 3)
FIG. 3 is a flowchart for explaining the flow of processing executed by the synchronization information detection unit 3. The shift register unit 2 outputs a part of the transmission data 9 to the synchronization information detection unit 3. The synchronization information detector 3 compares predetermined sample data A and sample data B with the bit string of the input transmission data 9. As a result, synchronization information detection is started, the signal level of the synchronization information detection signal output through the second synchronization information output terminal 22 is maintained at a low (L) level, and the synchronization information type output through the first synchronization information output terminal 15 The signal level of the signal is maintained at a low (L) level (step S10).

Next, the synchronization information detection unit 3 determines whether or not the VF code 30 that is the synchronization information is detected from the transmission data 9 (step S11). When it is determined in step S11 that the VF code 30 has not been detected (No), the process of step S11 is repeated. On the other hand, step S1
1, when it is determined that the VF code 30 is detected (Yes), the synchronization information detection unit 3 changes the signal level of the synchronization information detection signal from a low (L) level to a high (H) level for a predetermined time. (Step S12).

  Next, the synchronization information detector 3 determines the signal level of the synchronization information type signal according to the synchronization information detected in step S11 (step S13). For example, when the synchronization information A is detected, the synchronization information type signal is maintained at a low (L) level. On the other hand, when the synchronization information B is detected, the synchronization information type signal is switched to the high (H) level.

  When the above process ends, the process returns to step S11, and the synchronization information detection unit 3 repeats the above-described process. Note that the processing shown in the flowchart of FIG. 3 can be terminated by stopping the supply of power to the synchronization information detection unit 3.

(Processing of register unit 5)
FIG. 4 is a flowchart showing a flow of processing executed by the register unit 5. After the power is supplied, the register unit 5 selects the register set A7. Thus, the information stored in REG_A_0 to REG_A_n is output to the data processing unit 4 through the register output terminal 19 (step S20).

  Next, the register unit 5 determines whether or not the signal level of the synchronization information type signal is high (H) level (step S21). Here, when it is determined that the signal level of the synchronization information type signal is the low (L) level (No), the register unit 5 selects the register set A7. Thus, the information stored in REG_A_0 to REG_A_n is output through the register output terminal 19 (step S22). Thereafter, the process returns to step S21, and the register unit 5 repeats the process described above. In other words, the register unit 5 determines whether or not the VF code 30 included in the transmission data 9 is the synchronization information A. When determining that the VF code 30 is the synchronization information A, the register unit 5 sends the REG_A_0 to the data processing unit 4. The information stored in REG_A_n is output.

  On the other hand, when it is determined in step S21 that the signal level of the synchronization information type signal is high (H) level (Yes), the register unit 5 selects the register set B8. Accordingly, the information stored in REG_B_0 to REG_B_n is output through the register output terminal 19 (step S23). In other words, the register unit 5 stores in REG_B_0 to REG_B_n when it is determined that the VF code 30 included in the transmission data 9 is the synchronization information B by determining whether the VF code 30 is the synchronization information B. The information is output to the data processing unit 4.

  Note that the processing shown in the flowchart of FIG. 4 can be terminated by stopping the supply of power to the register unit 5.

  The fact that the signal level of the synchronization information type signal has shifted from the low (L) level to the high (H) level or from the high (H) level to the low (L) level indicates that the synchronization information detection unit 3 detects the VF code 30. Means that That is, it means that the image data for one frame is just before being input to the data processing unit 4. At this time, the synchronization information type signal shifts from the low (L) level to the high (H) level, or from the high (H) level to the low (L) level, whereby image data for one frame following the VF code 30 is obtained. It is determined whether image processing (for example, enlargement processing) based on the register set A7 or image processing based on the register set B8 is performed. Therefore, the register set is not switched during the transmission of the image data, and the data processing unit 4 can output rectangular image data of the same size to the display unit 6.

(Processing of the data processing unit 4)
FIG. 5 is a flowchart showing a flow of processing executed by the data processing unit 4. Below, the case where the data processing part 4 is a starting state is demonstrated. Transmission data 9 is input to the data processing unit 4 through the first data input terminal 16 (step S30). When the transmission data 9 is input, the data processing unit 4 performs image processing on the image data for one frame based on the information stored in the register set given from the register unit 5, thereby processing the processed data. Generate (step S31).

  As described above, the register unit 5 selects the register set A7 or the register set B8 based on the synchronization information included in the transmission data 9, and sends the information stored in the selected register set to the data processing unit 4. Output. Therefore, the data processing unit 4 does not have to determine whether the image processing to be executed is based on the register set A7 or the register set B8. Next, the data processing unit 4 outputs the generated processing data to the display unit 6 through the data output terminal 20 (step S32). Thereafter, the processing returns to step S31, and the data processing unit 4 repeats the above-described processing.

  Note that the process shown in the flowchart of FIG. 5 can be terminated by stopping the supply of power to the data processing unit 4.

(Relation between transmission data 9 and internal signal)
FIG. 6 is a timing chart showing the relationship between the transmission data 9 and the internal signal of the image processing apparatus 1. In the example of FIG. 6, the first frame is composed of 10-dot image data, the second frame is composed of 5-dot image data, and the third frame is composed of 10-dot image data. 8 shows a flow of processing executed by the image processing apparatus 1 when 9 is input.

  For example, when the image processing apparatus 1 is actually used, the first frame may be VGA size image data, the second frame may be QVGA size image data, and the third frame may be VGA size image data. (1) in FIG. 6 represents the transmission data 9 input to the shift register unit 2. (2) in FIG. 6 represents an image enable signal. (3) in FIG. 6 represents the count state of the dot counter. (4) in FIG. 6 represents the processing data. (5) in FIG. 6 represents a synchronization information detection signal. (6) in FIG. 6 represents a synchronization information identification signal. (7) in FIG. 6 represents the state of the register set selected by the register unit 5. In FIG. 6, the horizontal axis represents time. 6 (2), (5), and (6), the vertical axis represents the signal level.

  First, the relationship between the transmission data 9 and the internal signal of the image processing device 1 will be described with reference to FIG. In the starting state of the image processing apparatus 1, the signal level of the image enable signal is low (L). The count number of the dot counter is “0”. The signal level of the synchronization information detection signal is low (L). Further, the signal level of the synchronization information identification signal is a low (L) level. The register set selected by the register unit 5 is a register set A7.

  At time t1, transmission data 9 of the first frame is input to the image processing apparatus 1. At this time, when the synchronization information detection unit 3 detects the synchronization information B as the VF code 30, the signal level of the synchronization information detection signal is switched from the low (L) level to the high (H) level at time t2. Further, the signal level of the image enable signal is switched from the low (L) level to the high (H) level. Further, the dot counter starts counting.

  At time t2, the synchronization information type signal is switched from the low (L) level to the high (H) level. At the same time, the register unit 5 selects the register set B8. At the same time, transmission data 9 is input to the data processing unit 4. Thus, the data processing unit 4 starts image processing based on the information stored in the register set (register set B8) given from the register unit 5.

  The dot counter starts counting from time t2. At this time, for example, the transmission data 9 is counted bit by bit. The dot counter counts the number of bits of the image data 31, and when the predetermined number is counted, the count number is reset to “0”. At the time t3 when the dot counter count returns to “0”, the signal level of the image enable signal is switched from the high (H) level to the low (L) level.

  A predetermined time T1 until transmission data 9 for one frame is input to the image processing apparatus 1 and the next transmission data 9 subsequent to the transmission data 9 is input is, for example, 0 milliseconds (ms) to 50 milliseconds (ms).

  At time t4, the transmission data 9 is input to the image processing apparatus 1 again. At this time, when the synchronization information detection unit 3 detects the synchronization information A as the VF code 30, the signal level of the image enable signal is switched from the low (L) level to the high (H) level at time t5. At the same time, the dot counter starts counting. At time t5, the signal level of the synchronization information detection signal is switched from the low (L) level to the high (H) level. At this time, the register unit 5 selects the register set A7. At time t5, transmission data 9 is input to the data processing unit 4. Thus, the data processing unit 4 starts image processing based on the information stored in the register set (register set A7) given from the register unit 5.

  Similarly in the third frame, transmission data 9 of the third frame is input to the image processing apparatus 1 at time t7. At this time, when the synchronization information detecting unit 3 detects the synchronization information A as the VF code 30, the signal level of the synchronization information detection signal is switched from the low (L) level to the high (H) level at time t8. Further, the signal level of the image enable signal is switched from the low (L) level to the high (H) level, and the dot counter starts counting. At time t8, the synchronization information type signal is switched from the low (L) level to the high (H) level, and the register unit 5 selects the register set B8. At time t8, transmission data 9 is input to the data processing unit 4. As a result, the data processing unit 4 starts image processing based on the information stored in the register set (register set B8) given from the register unit 5.

  The data processing unit 4 enlarges the image data of the second frame. Therefore, the data amount of the processing data generated from the image data is increased as compared with the case where the processing data is not enlarged. More specifically, it increases to about 1 to 16 times, for example, 4 times. Specifically, when the data processing unit 4 expands QVGA size image data to VGA size image data, the amount of data is four times that of the QVGA size. In addition, the data amounts of the processing data in 1, 2, and 3 frames are all the same.

  As described above, since the data processing unit 4 enlarges the image data of the second frame, the processing data increases. Therefore, the third frame from the time when the transmission data 9 of the second frame is input, than the time T1 from the time when the transmission data 9 of the first frame is input until the time when the transmission data 9 of the second frame is input. It is necessary to make the time T2 until the transmission data 9 is input longer. Thereby, the time until all the processing data is output from the data processing unit 4 can be further shortened.

(Summary)
As described above, in the image processing apparatus 1, when the synchronization information detection unit 3 detects the VF code 30, the register set selected by the register unit 5 based on the detected type of synchronization information (synchronization information A or synchronization information B). A7 and register set B8 are switched. Further, based on the register set selected by the register unit 5, the data processing unit 4 performs image processing, for example, enlargement processing, on the image data.

  A VF code 30 is included at the beginning of the transmission data 9 input to the image processing apparatus 1. Therefore, the image data has not yet been input to the data processing unit 4 at the timing when the register unit 5 switches the register set. As a result, the data processing unit 4 can perform image processing (for example, enlargement processing) on the transmission data 9 according to each VF code 30. Therefore, the data processing unit 4 can seamlessly switch image processing for continuous transmission data. Therefore, for example, since the processing data adjusted to the same size can be generated, the display unit 6 can display the image normally.

  The register unit 5 selects the type of image processing to be executed by the data processing unit 4 based on communication synchronization information included in the transmission data 9. Therefore, special information does not need to be added to the transmission data 9, and an increase in the data amount of the transmission data 9 can be prevented.

  Further, switching processing by software between the transmission data 9 and the next transmission data 9, for example, processing for changing all the differences individually from the register set A7 to the register set B8 is not required. Thereby, the space | interval of the frame of the continuous transmission data 9 can be made small. Therefore, the transmission rate of the transmission data 9 can be improved without increasing the clock frequency for transmitting the transmission data 9 through a predetermined transmission line.

  When the display unit 6 displays the transmission data 9 having a size smaller than the displayable size, the data processing unit 4 enlarges the transmission data 9. Thereby, the data amount of the transmission data 9 in the transmission path can be made smaller than the actual display size.

  Because of the above characteristics, various devices including the image processing apparatus 1 can suppress power consumption as much as possible. Furthermore, the circuit design can be more easily implemented, and the transmission rate of the transmission data 9 can be improved. Furthermore, the image processing apparatus 1 can improve the frame rate while reducing the load of software or the like when switching data processing. In other words, a higher quality frame rate can be realized with an easier design.

(Portable wireless communication device 50)
FIG. 7 is a block diagram illustrating a configuration of the portable wireless communication device 50 including the image processing device 1. The portable wireless communication device 50 is a mobile phone device, for example. The portable wireless communication device 50 includes the image processing device 1 described above. Furthermore, a control unit 51, an imaging unit 52, a display unit 6, an operation unit 54, a communication unit 55, an audio input unit 56, an audio output unit 57, and a memory 58 are included.

  The image processing apparatus 1 receives transmission data 9 including image data (for example, VGA size image data) transmitted from the imaging unit 52 via the control unit 51. As a result, the received transmission data 9 is subjected to image processing, processing data is generated, and displayed on the display unit 6. The image processing apparatus 1 also receives transmission data 9 including predetermined image data (for example, a QVGA size menu screen) recorded in the memory 58 and transmitted via the control unit 51. As a result, the received transmission data 9 is subjected to image processing (for example, enlargement processing), processing data is generated and displayed on the display unit 6.

  As described above, the image processing apparatus 1 appropriately performs image processing on the contents (image data) having various sizes, various data formats, and various characteristics handled by the control unit 51, so that the display unit 6 has high quality. Can be displayed.

(Control unit 51)
The control unit 51 includes the above-described central processing unit (abbreviated as CPU) and a storage unit that stores a control program executed by the central processing unit. The central processing unit controls each unit of the apparatus, specifically, the imaging unit 52, the display unit 53, the operation unit 54, and the communication unit 55 by executing a control program stored in the storage unit. The control program includes a program for sending and receiving e-mail, for example. Thereby, the control part 51 can transmit an e-mail to a predetermined | prescribed notification destination via the communication part 55 and a wireless base station, and can receive an e-mail.

  The imaging unit 52 includes a camera unit and an image processing unit. The camera unit includes an imaging lens and a solid-state imaging device such as a charge coupled device (abbreviated as CCD) image sensor, which is a solid-state imaging device, and a complementary metal oxide semiconductor (abbreviated as CMOS) image sensor. ing. The camera unit further includes, for example, three color filters of red (R), green (G), and blue (B). The camera unit separates the light reflected by the subject and incident on the imaging lens into three color lights of R, G, and B through a color filter, and converts each of the three colors of R, G, and B into an electrical signal by a solid-state imaging device. To do.

  The image processing unit includes an image amplification unit, an analog / digital (abbreviated as A / D) conversion unit, and a signal processing unit. The amplifying unit amplifies an analog electrical signal (hereinafter referred to as an analog signal) corresponding to each of the three color lights of R, G, and B given from the camera unit, and outputs the amplified signal to the A / D conversion unit. The A / D conversion unit converts analog signals corresponding to R, G, and B amplified by the amplification unit into digital signals, generates image data, and outputs the image data to the signal processing unit. The signal processing unit performs signal processing such as pixel interpolation processing on the image data given from the A / D conversion unit. Further, the signal processing unit outputs image data subjected to signal processing to the control unit 51 based on a command from the control unit 51.

  The display unit 6 is a display device, and includes a display panel and a display control unit. The display panel can display predetermined display contents in color, and is, for example, a liquid crystal display panel or an organic electroluminescence (Electroluminescence) panel. The display control unit is realized by a processing circuit such as a microcomputer, for example, and displays an image on the display panel based on given image data. The display unit 6 displays the given image data based on a control command from the control unit 51. Transmission data 9 provided from the control unit 51 to the display unit 6 is serially transmitted using, for example, a differential signal (Low Voltage Differential Signal: LVDS).

  The operation unit 54 has a plurality of operation keys. The operator can input information and a processing request by operating the operation keys. The information includes, for example, telephone number information and e-mail text information. The processing request is, for example, a request for the imaging unit 52 to pick up an image, a request for calling a destination with a predetermined telephone number, and a request for sending an e-mail.

  The wireless communication unit 55 includes a wireless unit and a communication control unit. The radio unit receives and demodulates radio waves acquired from the radio base station via the antenna unit 56, and acquires character data, image data, audio data, and the like. The wireless unit outputs the acquired character data, image data, voice data, and the like to the communication control unit. The wireless unit modulates character data, image data, audio data, and the like sent from the communication control unit, and transmits the modulated data as radio waves to the base station via the antenna unit 56.

  The communication control unit outputs received data such as character data and image data demodulated by the wireless unit to the control unit 51. On the other hand, the audio data demodulated by the radio unit is output to the audio output unit 57. Received data such as character data and image data from the other party received via the wireless unit and the communication control unit is stored in the memory 58 by the control unit 51. The communication control unit also transmits character data, image data, and other transmission data stored in the memory 58 provided from the control unit 51 and audio data input from the audio input unit 56 based on a predetermined communication protocol. Send to.

  The antenna unit 56 emits or acquires radio waves obtained by modulating voice data, character data, image data, and the like when performing wireless communication with the base station. The voice input unit 56 is realized by a microphone, for example, and receives input of voice data. The audio output unit 57 is realized by a speaker, for example, and emits sound based on audio data provided from the wireless communication unit 55.

  When the user operates the operation unit 54 to set the camera imaging mode, the control unit 51 controls the imaging unit 52 to receive image data. As a result, the transmission data 9 including the received image data is output to the image processing apparatus 1. The image processing apparatus 1 images the input transmission data 9. As a result, processing data subjected to size adjustment and image quality adjustment is generated and displayed on the display unit 6. The display control unit included in the display unit 6 displays a moving image by causing the display panel to display given processing data, specifically, image data.

  In addition, this invention is not limited to embodiment mentioned above, A various change is possible in the range shown to the claim. In other words, embodiments obtained by combining technical means appropriately changed within the scope of the claims are also included in the technical scope of the present invention.

  For example, the synchronization information included in the transmission data 9 is not limited to the VF code 30 and may be any information as long as the information indicates communication synchronization. For example, synchronization information indicating the end of the frame may be included at the end of each transmission data 9.

  Further, the synchronization information and the register set are preferably in a one-to-one relationship. At this time, when the synchronization information detection unit 3 detects certain synchronization information, the register unit 5 does not need to select a register set corresponding to the synchronization information from a plurality of candidates, and one item is unconditionally selected. Select with. As a result, the data processing unit 4 can more quickly determine which image processing is to be performed on the image data. Therefore, the image processing apparatus 1 can perform image processing of image data more quickly.

  The data processing unit 4 preferably performs image processing on each image data so that each image data is enlarged to the same size after processing. As a result, the sizes of the processed image data are the same, and therefore, the processed image data relating to the size of the image data included in the transmission data can be easily viewed when displayed on the display device.

  Further, for example, the synchronization information detection unit 3 may be configured to be able to detect the synchronization information included in the transmission data 9 and its type. In particular, the configuration is not limited to the above-described configuration as long as the type of image processing (for example, enlargement processing) applied to the transmission data 9 can be selected based on the detected synchronization information.

  Further, the image processing apparatus 1 described above may be provided in the control unit 51. At this time, the image processing apparatus 1 may receive the transmission data 9 transmitted from the imaging unit 52, execute image processing to generate processing data, and output the processing data to the control unit 51.

(Program and recording medium)
Finally, each block included in the image processing apparatus 1 may be configured by hardware logic. Alternatively, it may be realized by software using a CPU (Central Processing Unit) as follows.

  That is, the image processing apparatus 1 includes a CPU that executes instructions of a profile setting program that realizes each function, a ROM (Read Only Memory) that stores the profile setting program, and a RAM that expands the profile setting program into an executable format. (Random Access Memory) and a storage device (recording medium) such as a memory for storing the profile setting program and various data. With this configuration, the object of the present invention can be achieved by a predetermined recording medium.

  The recording medium only needs to record the program code (execution format program, intermediate code program, source program) of the profile setting program of the image processing apparatus 1 that is software that realizes the above-described functions so that it can be read by a computer. This recording medium is supplied to the image processing apparatus 1. Thereby, the image processing apparatus 1 (or CPU or MPU) as a computer may read and execute the program code recorded on the supplied recording medium.

  The recording medium that supplies the program code to the image processing apparatus 1 is not limited to a specific structure or type. That is, the recording medium includes, for example, a tape system such as a magnetic tape and a cassette tape, a magnetic disk such as a floppy (registered trademark) disk / hard disk, and an optical disk such as a CD-ROM / MO / MD / DVD / CD-R. A disk system, a card system such as an IC card (including a memory card) / optical card, or a semiconductor memory system such as a mask ROM / EPROM / EEPROM / flash ROM can be used.

  Moreover, even if the image processing apparatus 1 is configured to be connectable to a communication network, the object of the present invention can be achieved. In this case, the program code is supplied to the image processing apparatus 1 via a communication network. This communication network is not limited to a specific type or form as long as it can supply program codes to the image processing apparatus 1. For example, the Internet, an intranet, an extranet, a LAN, an ISDN, a VAN, a CATV communication network, a virtual private network, a telephone line network, a mobile communication network, a satellite communication network, or the like may be used.

  The transmission medium constituting the communication network may be any medium that can transmit the program code, and is not limited to a specific configuration or type. For example, wired communication such as IEEE 1394, USB (Universal Serial Bus), power line carrier, cable TV line, telephone line, ADSL (Asymmetric Digital Subscriber Line) line, infrared light such as IrDA or remote control, Bluetooth (registered trademark), 802. 11 wireless, HDR, mobile phone network, satellite line, terrestrial digital network, etc. can also be used. The present invention can also be realized in the form of a computer data signal embedded in a carrier wave in which the program code is embodied by electronic transmission.

(Other configurations)
In addition, this invention is realizable also as a structure shown below.

(First configuration)
A receiving unit for receiving continuous transmission data having communication synchronization information at the head of the frame;
A synchronization information detecting unit for detecting synchronization information included in each transmission data received by the receiving unit;
A register unit that appropriately selects one from two or more predetermined register sets based on the synchronization information given by the synchronization information detection unit;
A data processing unit that receives each transmission data received by the receiving unit, generates image data by performing image processing according to a register set given by the register unit, and outputs the generated processing data Information processing apparatus.

(Second configuration)
The information processing apparatus according to the second configuration, wherein the synchronization information detection unit detects synchronization information included in transmission data given from a reception unit, and outputs the synchronization information to a register unit.

(Third configuration)
The reception unit outputs the image data for one frame following the synchronization information detected by the synchronization information detection unit to the data processing unit after the synchronization information detection unit detects the synchronization information. The information processing apparatus according to 2, the configuration.

(Fourth configuration)
The register unit selects one of two or more predetermined register sets based on the synchronization information given by the synchronization information detection unit, and outputs the selected register set to the data processing unit. The information processing apparatus according to any one of the first to third configurations.

(Fifth configuration)
Each transmission data includes synchronization information and one frame of image data,
5. The information processing apparatus according to any one of the first to fourth configurations, wherein the data processing unit displays the processing data on a liquid crystal panel or the like by outputting the processing data to a screen display unit.

(Sixth configuration)
The information processing apparatus according to any one of the first to fifth configurations, wherein the synchronization information has the same number of types as the register set, and the synchronization information and the register set have a one-to-one relationship.

(Seventh configuration)
The information processing apparatus according to any one of the first to sixth configurations, wherein the two or more register sets predetermined by the register unit include an element that determines an enlargement process of the image data.

(Functions and effects achieved by other configurations)
According to the above configuration, when the receiving unit receives the transmission data, the synchronization information detecting unit detects the synchronization information included in the received transmission data. Synchronization information, in other words, information indicating the head of the frame is added to the head of the frame of transmission data. When the synchronization information is detected, the synchronization information detection unit gives a synchronization information detection signal to the reception unit and outputs the synchronization information to the register unit.

  When receiving the synchronization information detection signal from the synchronization information detection unit, the reception unit outputs the transmission data excluding the synchronization information of the transmission data including the synchronization information, that is, image data for one frame to the data processing unit.

  The register unit holds two or more predetermined register sets, and selects one of the register sets according to the type of synchronization information given by the synchronization information detection unit, and outputs it to the data processing unit. When the previous period synchronization information changes, the selected register set changes each time. The register set is composed of one or more registers. In other words, the register is a parameter and is an element that determines the processing content executed by the data processing unit.

  The data processing unit executes image data processing in accordance with a register set given by the register unit. For example, the processing includes image data enlargement processing. Thus, in the present invention, the processing content in the data processing unit is determined according to the type of synchronization information included in the transmission data. In addition, since the transmission data includes one synchronization information and one frame of image data at the head, even when continuous transmission data is given, different processing can be selected for each transmission data. . That is, when the process is an enlargement process, for example, even when QVGA-size image data and VGA-size image data are successively given, it is possible to instantaneously switch to individual correspondence. In addition, since the synchronization information included in the head of the frame is used as a trigger for switching the register set to be output to the data processing unit, it is not necessary to add special information to the transmission data. It is prevented from increasing. Further, according to the present invention, for example, transmission data of QVGA size is given, the enlargement process is performed in the data processing unit, and all are adjusted to the same image size. Therefore, when it is given from the data processing unit to the display unit, for example, it is enlarged to the VGA size, so that normal display can be performed, and transmission data can be given only the amount of information corresponding to the QVGA size. In addition, the amount of processing in the receiving unit can be reduced.

  In addition, the data processing unit gives processing data obtained by executing image processing to one frame of image data to the display unit for display. For example, in order to display image data on the display unit, the image data is periodically output to the display unit. For example, it is necessary to continuously output image data to the display unit 30 times per second. Therefore, in order to display the image data on the display unit, it is necessary to increase the transmission rate of the transmission data as much as possible. For this reason, the time between the transmission data is shortened. For example, in order to switch the processing content of the data processing unit from the QVGA size processing to the VGA size processing, the switching processing is finished within a short time between the transmission data. It is necessary to make it.

  According to the conventional technique, it is necessary for the switching processing to switch each register group individually by using an interrupt or the like between transmission data and estimating the timing by software or the like. However, according to the present invention, it is possible to reduce time constraints and burden on software and the like as compared with the conventional technique.

  In order to display image data on the display unit, it is necessary to increase the transmission rate of the transmission data as much as possible. In the present invention, since the transmission rate can be improved by shortening the time between the transmission data, it can be suitably used when displaying the image data on the display unit.

  According to the present invention, since the interval between frames of continuous transmission data given to the data processing unit can be reduced, the transmission rate of transmission data can be increased without increasing the clock frequency for transmitting transmission data via the transmission path. Can be improved. As a result, the clock frequency is not increased, so that the power consumption can be suppressed as much as possible and the transmission rate of the transmission data can be improved in the device including the information processing apparatus of the present invention.

  According to the present invention, for example, when QVGA size transmission data is displayed on a VGA size screen, the amount of transmission data on the transmission path can be reduced, so that power consumption can be suppressed as much as possible.

  According to the present invention, since it is necessary to complete, for example, switching processing between QVGA and VGA between frames of continuous transmission data having different image sizes given to the data processing unit, the burden on software and the like can be reduced. .

  According to the prior art, for example, when it takes a long time to switch between QVGA and VGA, it has been considered that the temporary image display is unavoidably stopped in order to ensure the display quality of the display unit. However, according to the present invention, since the time required for switching can be greatly shortened, it is not necessary to stop the image display, it is possible to maintain a certain display quality, and an image that does not feel uncomfortable for the user. Data can be displayed.

  According to the present invention, the synchronization information detection unit can instantaneously determine the type of synchronization information included in the head portion of each transmission data of, for example, QVGA size and VGA size for each frame, so that the image included in each transmission data Each information can be appropriately subjected to, for example, enlargement processing.

  According to the present invention, all the image data given from the data processing unit is unified to the same size, and the display unit can display image data with no space on the entire screen. Regardless of size, it is possible to provide an easy-to-see display image.

  The present invention can be widely used as an image processing apparatus that seamlessly switches and executes image processing applied to a plurality of image data having different sizes, such as a PDA or a mobile phone device.

1 is a block diagram illustrating a main configuration of an image processing apparatus according to an embodiment of the present invention. It is a figure which shows the data structure of the transmission data which an image processing apparatus receives. It is a flowchart explaining the flow of the process which a synchronous information detection part performs. It is a flowchart which shows the flow of the process which a register part performs. It is a flowchart which shows the flow of the process which a data processing part performs. 6 is a timing chart showing a relationship between transmission data and an internal signal of the image processing apparatus. It is a block diagram which shows the structure of the portable radio | wireless communication apparatus provided with the image processing apparatus.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Image processing apparatus 2 Shift register part 3 Synchronization information detection part (Synchronization information detection means)
4 Data processing unit (image processing means)
5 Register section 6 Display section (display device)
7 Register set A
8 Register set B
9 Transmission data 30 VF code 31 Image data

Claims (7)

An image processing apparatus that performs image processing on continuous transmission data having communication synchronization information and subsequent image data,
Synchronization information detecting means for detecting the synchronization information included in the transmission data;
An image processing apparatus comprising: image processing means for performing image processing corresponding to the synchronization information detected by the synchronization information detection means on the image data. The transmission data includes the image data for one frame,
The image processing apparatus according to claim 1, further comprising output means for continuously outputting the image data after the image processing means performs the image processing to a display device.   The image processing apparatus according to claim 1, wherein the synchronization information and the image processing have a one-to-one relationship. The image processing means includes
The image processing apparatus according to claim 1, wherein the image processing is performed on each image data so that the image data is changed to the same size after the processing. An image processing method executed by an image processing apparatus that performs image processing on continuous transmission data having communication synchronization information and subsequent image data,
A synchronization information detecting step for detecting the synchronization information included in the transmission data;
An image processing method comprising: performing image processing corresponding to the synchronization information detected in the synchronization information detection step on the image data.   An image processing program for operating the image processing apparatus according to claim 1, wherein the image processing program causes a computer to function as each of the above means. A computer-readable recording medium in which the image processing program according to claim 6 is recorded.

Images