JP2007121430A - Flat image display apparatus - Google Patents
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3216—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using a passive matrix
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- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3275—Details of drivers for data electrodes
- G09G3/3283—Details of drivers for data electrodes in which the data driver supplies a variable data current for setting the current through, or the voltage across, the light-emitting elements
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3275—Details of drivers for data electrodes
- G09G3/3291—Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0243—Details of the generation of driving signals
- G09G2310/0248—Precharge or discharge of column electrodes before or after applying exact column voltages
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0272—Details of drivers for data electrodes, the drivers communicating data to the pixels by means of a current
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0223—Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0233—Improving the luminance or brightness uniformity across the screen
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
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Abstract
Description
本発明は、主に電流により輝度が変化する発光素子を用い、発光部に断続的に流入する電荷量を制御することにより、発光輝度を調節する平板型画像表示装置に係り、特に、電子源である陰極からの電子放出が生じて発光を開始する閾値である電子放出開始電圧の差異による輝度ばらつきを抑制することを可能にした平板型画像表示装置に関する。 The present invention relates to a flat-panel image display apparatus that uses a light-emitting element whose luminance changes mainly by an electric current and controls the amount of electric charge that flows intermittently into a light-emitting portion, and in particular, adjusts the luminance of light emission. The present invention relates to a flat panel display capable of suppressing luminance variations due to a difference in electron emission start voltage, which is a threshold value at which emission of electrons from a cathode occurs.
所定の時間内に電子放出源から発光層に入射する電荷量、つまりは電流により発光強度が決まる電流駆動型の表示素子がある。その例として、フィールドエミッションディスプレイ(Field Emission Display、以下「FED」という。)や、有機エレクトロルミネッセンス(Electro Luminescence Display、以下「有機EL」という。)がある。 There is a current-driven display element whose light emission intensity is determined by the amount of charge incident on the light emitting layer from the electron emission source within a predetermined time, that is, current. Examples thereof include a field emission display (hereinafter referred to as “FED”) and an organic electroluminescence display (hereinafter referred to as “organic EL”).
FEDは、複数ある画素毎に形成された多数の冷電子源から真空を介して蛍光面に向かって電子線を照射することにより発光を得る。 The FED obtains light emission by irradiating an electron beam from a large number of cold electron sources formed for each of a plurality of pixels toward a phosphor screen through a vacuum.
また、FEDには、用いる電子源によりいくつかのタイプがあり、微細な円錐形電子源を用いたSpindt型や、表面伝導型と呼ばれる電子源を用いたもの、酸化膜の超薄膜を介したMIM型電子源を用いたものや、カーボンナノチューブ(Carbon Nano Tube、以下「CNT」という。)を用いたCNT−FEDなどがあるが、いずれの電子源を用いた場合にも、その発光強度は発光層である蛍光面の電圧と、単位時間内における蛍光面への電子線の照射量、つまり電流により決まる。 In addition, there are several types of FED depending on the electron source used. The FED uses a Spindt type using a fine conical electron source, an electron source called a surface conduction type, and an ultrathin oxide film. There are those using an MIM type electron source and CNT-FED using a carbon nanotube (hereinafter referred to as “CNT”). The emission intensity of any electron source is as follows. It is determined by the voltage of the phosphor screen as the light emitting layer and the amount of electron beam irradiation to the phosphor screen within a unit time, that is, the current.
この蛍光体の特性から蛍光面の電圧は、数kV以上の高電圧が用いられることから、直流電圧を印加することが一般的であり、FEDの輝度は専ら蛍光面電流である入射電子線量により変化する。 Due to the characteristics of this phosphor, a high voltage of several kV or higher is used as the voltage on the phosphor screen. Therefore, it is common to apply a DC voltage, and the brightness of the FED depends on the incident electron dose that is exclusively the phosphor screen current. Change.
そこで、入射電子線量は、電子源からの電子放出量を変化させることで決められているが、例えば、Spindt型やCNT−FEDでは、電子源からの電子放出量は、陰極と制御電極に適切な電圧を印加することで制御している。 Therefore, the incident electron dose is determined by changing the amount of electron emission from the electron source. For example, in Spindt type or CNT-FED, the amount of electron emission from the electron source is appropriate for the cathode and the control electrode. It is controlled by applying various voltages.
また、MIM型や表面伝導型においては、陰極と制御電極という構成をしていないが、いずれも2電極間に電圧を印加して流れる電流の一部を電子放出として真空中に取り出している。 Further, the MIM type and the surface conduction type do not have a configuration of a cathode and a control electrode, but in either case, a part of the current flowing by applying a voltage between the two electrodes is taken out into the vacuum as electron emission.
一方、有機ELでは、画素毎に形成された発光層に、陰極から電子を陽極から正孔を注入することにより発光を得ている。有機薄膜である発光層に注入された電子と正孔の再結合により発せられるエネルギにより、発光層内で励起状態が生じ、それが緩和されることにより発光が生じる。したがって、有機ELにおける発光強度は単位時間内に発光層に注入される電子・正孔の数で概ね決まる。 On the other hand, in organic EL, light emission is obtained by injecting electrons from the cathode and holes from the anode into the light emitting layer formed for each pixel. The energy emitted by the recombination of electrons and holes injected into the light emitting layer, which is an organic thin film, causes an excited state in the light emitting layer, which is relaxed to emit light. Therefore, the emission intensity in the organic EL is generally determined by the number of electrons / holes injected into the light emitting layer within a unit time.
つまりは、陽極から陰極に向かって発光層を流れる電流により決まっていることになるが、一般的には、陽極と陰極に印加する電圧により制御している。(FEDにおける陰極からの電子放出と、有機ELにおける陰極からの電子注入を合せて、以下「電子放出」ともいう。) That is, it is determined by the current flowing through the light emitting layer from the anode toward the cathode, but is generally controlled by the voltage applied to the anode and the cathode. (The electron emission from the cathode in the FED and the electron injection from the cathode in the organic EL are collectively referred to as “electron emission” hereinafter.)
以上のように、FED・有機ELともに、電流により発光強度が決まる素子であるにもかかわらず、所定の電極電圧を印加する電圧駆動を行っている。この場合、複数ある各画素のそれぞれにおける電極電圧−電子放出特性の違いの影響を受け、所定の電極電圧を印加した場合においても、画素毎の輝度差が生じる可能性がある。 As described above, both the FED and the organic EL are driven by applying a predetermined electrode voltage regardless of the element whose emission intensity is determined by the current. In this case, there is a possibility that a luminance difference is generated for each pixel even when a predetermined electrode voltage is applied due to an influence of a difference in electrode voltage-electron emission characteristics in each of a plurality of pixels.
これを避けるためには、素子を流れる電流を直接制御することが検討されており、これを有機ELに適用する従来技術が、下記特許文献1に記載されている。
In order to avoid this, direct control of the current flowing through the element has been studied, and a conventional technique for applying this to an organic EL is described in
この特許文献1においては、有機ELの発光強度を陰極に接続する定電流源により駆動することにより発光強度を制御し、さらには、各陰極において非選択から選択への遷移時における浮遊容量への充電を、他の大容量の定電流源又は定電圧源から行っている。これにより、浮遊容量充電にかかる時間を短くし、陰極選択時における発光の立ち上がり特性を改善して応答性を高くしている。
In this
また、FEDや有機ELのような表示素子は、マトリクス構造を有しており、マトリクスを構成する2種の電極のいずれか一方を順次選択していく線順次表示方法を用いている。 A display element such as an FED or an organic EL has a matrix structure, and uses a line-sequential display method in which one of two kinds of electrodes constituting the matrix is sequentially selected.
この駆動方法では、各画素においては、短時間の選択期間と比較的長時間の非選択期間との2種の状態の組合せからなる。一選択期間は短時間であるため、その中での輝度変化は観察者には認識されにくい。したがって、選択期間中に一定輝度で発光した場合でも、選択期間中に短時間に強く発光した場合でも、一選択期間内の輝度積分が同じならば同じ輝度として認識される。 In this driving method, each pixel consists of a combination of two states, a short selection period and a relatively long non-selection period. Since one selection period is a short time, a change in luminance in the selection period is difficult for an observer to recognize. Therefore, even when light is emitted at a constant luminance during the selection period or when light is emitted strongly in a short time during the selection period, the same luminance is recognized as long as the luminance integration within one selection period is the same.
この現象を用いて、一選択期間内に、陰極電源から陰極に流れ込む総電荷量を制御して、一選択期間内の積分発光強度を制御する方法を、FEDに適用した従来技術が下記特許文献2に、さらに、有機ELにも適用した従来技術が下記特許文献3に記載されている。これらの従来技術においては、一旦、浮遊容量又は外部容量素子に充電した電荷を、陰極からパルス的に放出させる方法を用いている。 A prior art in which a method for controlling the integrated light emission intensity within one selection period by controlling the total amount of charge flowing from the cathode power supply to the cathode within one selection period using this phenomenon is applied to the FED is disclosed in the following patent document. 2 and the prior art applied to organic EL are described in Patent Document 3 below. In these conventional techniques, a method is used in which the charge once charged in the stray capacitance or the external capacitance element is pulsedly emitted from the cathode.
FEDや有機ELのような表示素子は、マトリクス構造を有するため必然的に電極同士が対向する領域が大きく、各電極には浮遊容量を有する。さらには、外部容量によりその容量を補正することもできる。その総容量のばらつきを小さくすることは、電子放出素子の電圧−電流特性のばらつきを小さくすることと比較して容易であり、画素間の輝度ばらつきを小さくすることができる。さらには、既知の容量素子への充電電荷は、その素子に印加する充電電圧により決まるため、駆動には構成が簡単な定電圧源を用いることができる。 Since a display element such as an FED or an organic EL has a matrix structure, a region where the electrodes face each other is necessarily large, and each electrode has a stray capacitance. Furthermore, the capacity can be corrected by an external capacity. It is easier to reduce the variation in the total capacitance than to reduce the variation in the voltage-current characteristics of the electron-emitting devices, and the luminance variation between pixels can be reduced. Furthermore, since the charge charged to a known capacitor element is determined by the charge voltage applied to the element, a constant voltage source with a simple configuration can be used for driving.
ここで、本発明が対象としているFEDにおける電極間電圧−電子放出特性、いわゆる電圧−電流特性を図3に、有機ELの電極間電圧−素子電流特性の一例を図11に示す。 Here, FIG. 3 shows an interelectrode voltage-electron emission characteristic, so-called voltage-current characteristic, in an FED targeted by the present invention, and FIG. 11 shows an example of an interelectrode voltage-element current characteristic of an organic EL.
いずれの素子においても、図3に示すように、FEDにおける制御電極と陰極の間には、電子放出開始電圧が存在し、図11に示すように、有機ELにおける陽極と陰極の間の電極間電圧には、発光開始電圧と示した閾値が存在し、この閾値以下では電流が流れず、これを超えると急激に電流が流れ始めて発光を生じるという特性を持っている。(以下、図11に示す有機EL素子においても、陰極からの電子放出により発光が始まるので、発光開始電圧も含めて「電子放出開始電圧」という。) In any element, as shown in FIG. 3, there is an electron emission starting voltage between the control electrode and the cathode in the FED, and as shown in FIG. 11, between the electrodes between the anode and the cathode in the organic EL. The voltage has a threshold value indicated as a light emission start voltage, and current does not flow below this threshold value. When the voltage exceeds this threshold, current suddenly starts to flow and light emission occurs. (Hereinafter, also in the organic EL element shown in FIG. 11, since light emission starts by electron emission from the cathode, it is referred to as “electron emission start voltage” including the light emission start voltage.)
このように、陰極から電子放出を生じさせるためには、電極間電圧が電子放出開始電圧に達するまでに必要な電荷Qcと、所定の輝度の発光を得るのに必要な電荷Qeの和を供給する必要がある。電荷Qcは、陰極及び陰極ラインが持つ浮遊容量の影響も大きく受けるため、FED素子において浮遊容量を決める絶縁膜厚のばらつきが必要な電荷量Qcに影響与える。 As described above, in order to cause electron emission from the cathode, the sum of the charge Qc necessary for the interelectrode voltage to reach the electron emission start voltage and the charge Qe necessary for obtaining light emission of a predetermined luminance is supplied. There is a need to. Since the charge Qc is also greatly affected by the stray capacitance of the cathode and the cathode line, the variation in the insulating film thickness that determines the stray capacitance in the FED element affects the required charge amount Qc.
このため絶縁膜厚のばらつきに対応した電子放出開始電圧設定と、放出させるための電荷注入を組み合わせることにより、画素間の輝度ばらつきを抑制する従来技術が、下記特許文献4に記載されている。 For this reason, Japanese Patent Application Laid-Open Publication No. 2004-228688 discloses a conventional technique that suppresses luminance variation between pixels by combining electron emission start voltage setting corresponding to variation in insulating film thickness and charge injection for emission.
この従来技術においては、画素選択時の第一期間において、制御電極には電子放出抑制電圧を印加したまま、制御電極に電子放出電圧を印加しても電極間電圧が電子放出開始電圧よりやや低い電圧となるような電圧V1を陰極に印加して充電する。 In this prior art, the interelectrode voltage is slightly lower than the electron emission start voltage even if the electron emission voltage is applied to the control electrode while the electron emission suppression voltage is applied to the control electrode in the first period at the time of pixel selection. The voltage V1 which becomes a voltage is applied to the cathode and charged.
次に、V1に加えて、さらに放出させる電荷Qeを充電するための電圧を印加した後に、制御電極に電子放出電圧を印加する。これにより、均一性が改善された電子放出を電圧源のみで生じさせることができる。
上記特許文献1に示された定電圧源又は定電流源により、第一期間において電極を充電し、第二期間において定電流源により輝度制御する方法では、定電圧源と比較して構成の複雑な定電流源を備える必要があり高価になるという問題に加え、第一期間における充電条件の設定(電圧、電流、時間)が難しく、各画素の素子状態の時間変化に対応できないという問題もある。
In the method of charging the electrode in the first period by the constant voltage source or the constant current source disclosed in
また、上記特許文献2,3に示されている電荷を制御する方法においては、浮遊容量を活用することにより電圧駆動とほぼ同じ回路構成で実現できるため、駆動回路が複雑化することはないが、陰極の特性である電子放出開始電圧が存在することに対して配慮されていない。このため電子放出に寄与せず電極電圧を開始電圧まで変化させるに必要な電荷量分だけ陰極からの放出電荷量が減少するという問題がある。 In addition, in the methods for controlling charges shown in Patent Documents 2 and 3, the drive circuit is not complicated because it can be realized with a circuit configuration almost the same as that of voltage drive by utilizing the stray capacitance. However, no consideration is given to the existence of an electron emission starting voltage which is a characteristic of the cathode. For this reason, there is a problem in that the amount of charge emitted from the cathode decreases by the amount of charge necessary for changing the electrode voltage to the start voltage without contributing to electron emission.
これに対処し、電子放出開始電圧を考慮したものが上記特許文献4であるが、電子放出開始電圧を考慮した補正が、製造時の絶縁膜厚つまりは電極間の浮遊容量しか考慮の対象になっていない。この特許文献4が対象としているFEDの陰極では、表面が接している雰囲気内のガス吸着等により、表面状態が変化する。このような陰極表面の状態変化は、電極形成後の真空排気プロセス中や表示動作中にも生じ、それに伴って電子放出開始電圧の時間変化が生じる恐れがある。 In order to cope with this, the above-mentioned Patent Document 4 considers the electron emission start voltage, but the correction taking the electron emission start voltage into consideration only considers the insulating film thickness at the time of manufacture, that is, the stray capacitance between the electrodes. is not. In the FED cathode targeted by Patent Document 4, the surface state changes due to gas adsorption or the like in the atmosphere in contact with the surface. Such a change in the state of the cathode surface also occurs during the evacuation process after the electrode formation and during the display operation, and there is a possibility that the time change of the electron emission start voltage may occur accordingly.
また、特許文献4に示された技術においては、電極構造形成後やその後の動作中における電子放出開始電圧の変化に対する考慮がなされていなかった。さらに、特許文献4の対象はFEDのみであるが、有機ELにおいても動作中に陰極を含む各層間の界面状態の変化に伴い、発光を開始する電子放出開始電圧の変化が生じるため、動作中の時間変化に対応できる機構が必要となる。 Further, in the technique disclosed in Patent Document 4, no consideration has been given to changes in the electron emission start voltage after the electrode structure is formed or during the subsequent operation. Furthermore, although only the FED is the subject of Patent Document 4, since the change of the interface state between each layer including the cathode during the operation also in the organic EL, the change in the electron emission start voltage for starting the light emission occurs. It is necessary to have a mechanism that can respond to changes in time.
そこで、本発明の目的は、FEDや有機ELにおいて、陰極から放出される電荷量を制御する駆動機構を有し、かつ、発光を開始する電子放出開始電圧を測定する機構を駆動装置内に備えて、電子放出開始電圧の変化を検出し、その結果を基に駆動信号を補正する機構を備えることにより、発光均一性が高く、高画質の画像表示を可能とした平面型画像表示装置を提供することにある。 SUMMARY OF THE INVENTION An object of the present invention is to provide a driving device that has a driving mechanism for controlling the amount of electric charge emitted from a cathode in an FED or an organic EL and that measures an electron emission starting voltage for starting light emission. By providing a mechanism that detects changes in the electron emission start voltage and corrects the drive signal based on the change, a flat-type image display device that has high emission uniformity and enables high-quality image display is provided. There is to do.
上記目的を達成するため、本発明は、次の構成を有することを特徴とする。すなわち、(1)複数の第1電極ラインと複数の第2電極ラインとの交差部に配置された画素と、前記第1電極ラインに輝度信号に応じた電圧を印加する第1電極駆動部と、前記第2電極ラインに選択電圧を印加する第2電極駆動部と、前記選択電圧による選択期間内で輝度信号に応じた電圧を一時的に保持する浮遊容量とを有する平板型画像表示装置において、
前記第1電極駆動部が第1電極ラインを開放した状態で選択期間終了直前における第1電極ラインの電圧を測定する電圧測定部と、測定された電圧の値を記録する記録テーブルと、記録された電圧の値を基に第1電極ラインに印加する輝度信号に応じた電圧を補正する電圧補正部とを備えたことにより達成することができる。
In order to achieve the above object, the present invention has the following structure. That is, (1) a pixel disposed at an intersection of a plurality of first electrode lines and a plurality of second electrode lines, a first electrode driver that applies a voltage according to a luminance signal to the first electrode lines, A flat panel image display device comprising: a second electrode driver that applies a selection voltage to the second electrode line; and a stray capacitance that temporarily holds a voltage corresponding to a luminance signal within a selection period based on the selection voltage. ,
A voltage measuring unit for measuring a voltage of the first electrode line immediately before the end of the selection period in a state where the first electrode driving unit opens the first electrode line; a recording table for recording a value of the measured voltage; This can be achieved by providing a voltage correction unit that corrects a voltage corresponding to the luminance signal applied to the first electrode line based on the value of the voltage.
また、本発明は、前記記録テーブルに記録されている電圧の値と新規に測定された電圧の値とを用いて演算処理を行い、その演算結果を新たな電圧の値として記録テーブルに記録させる演算処理部を備えるものである。 Further, the present invention performs a calculation process using the voltage value recorded in the recording table and the newly measured voltage value, and records the calculation result in the recording table as a new voltage value. An arithmetic processing unit is provided.
また、本発明は、前記第2電極駆動部は第2電極ラインに非選択電圧を印加し、前記第1電極駆動部は第1電極ラインに輝度信号に応じた電圧を印加して浮遊容量を充電した後に、第1電極ラインを開放し、第2電極駆動部は選択された第2電極ラインに選択電圧を印加することを特徴とするものである。 In the present invention, the second electrode driving unit applies a non-selection voltage to the second electrode line, and the first electrode driving unit applies a voltage according to a luminance signal to the first electrode line to reduce the stray capacitance. After charging, the first electrode line is opened, and the second electrode driver applies a selection voltage to the selected second electrode line.
また、本発明は、前記第1電極ラインに外部容量を付加させるものである。 According to the present invention, an external capacitor is added to the first electrode line.
さらに、本発明は、次の構成を有することを特徴とする。すなわち、(2)前記第1電極ラインに接続された第1電極と、前記第2電極ラインに接続された第2電極とを備え、第1電極から放出された電子が、大気圧よりも低く減圧された空間を介して蛍光面パネルに入射し、蛍光面が発光することにより画像を表示することを特徴とする。 Furthermore, this invention has the following structures. That is, (2) a first electrode connected to the first electrode line and a second electrode connected to the second electrode line, wherein electrons emitted from the first electrode are lower than atmospheric pressure. The light is incident on the phosphor screen through the decompressed space, and the phosphor screen emits light to display an image.
また、本発明は、前記第1電極から電子放出が生じる状態における、第1電極電圧をVk、第2電極電圧をVg及び蛍光面電圧をVpとし、蛍光面と第1電極との間の距離をdpk、蛍光面と第2電極との間の距離をdpgとしたとき、dpk>dpgであって、Vg<(Vp−Vk)/dpk×(dpk−dpg)+Vkである表示素子を用いたことを特徴とする。 In the present invention, in the state where electron emission occurs from the first electrode, the first electrode voltage is Vk, the second electrode voltage is Vg, and the phosphor screen voltage is Vp, and the distance between the phosphor screen and the first electrode. Where dpk is dpk and the distance between the phosphor screen and the second electrode is dpg, dpk> dpg and Vg <(Vp−Vk) / dpk × (dpk−dpg) + Vk. It is characterized by that.
また、本発明は、前記第1電極から電子放出が生じる状態における、第1電極電圧をVk、第2電極電圧をVg及び蛍光面電圧をVaとし、蛍光面と第1電極との間の距離をdpk、蛍光面と第2電極との間の距離をdpgとしたとき、dpk−dpgの絶対値が、第1電極の膜厚と第2電極の膜厚のうち厚い方の膜厚以下であって、Vg≦Vkである表示素子を用いたことを特徴とする。 In the present invention, the first electrode voltage is Vk, the second electrode voltage is Vg, and the phosphor screen voltage is Va in a state where electrons are emitted from the first electrode, and the distance between the phosphor screen and the first electrode. Is dpk, and the distance between the phosphor screen and the second electrode is dpg, the absolute value of dpk-dpg is less than the thickness of the thicker of the first electrode and the second electrode. Thus, a display element satisfying Vg ≦ Vk is used.
また、本発明は、前記第1電極の表面に、繊維状炭素材料を含む表示素子を備えたことを特徴とする。 In addition, the present invention is characterized in that a display element containing a fibrous carbon material is provided on the surface of the first electrode.
さらに、本発明は、次の構成を有することを特徴とする。すなわち、(3)前記第1電極と第2電極との間に有機発光層を有する発光素子を用いたことを特徴とする。 Furthermore, this invention has the following structures. (3) A light emitting element having an organic light emitting layer between the first electrode and the second electrode is used.
なお、本発明は、上記の各構成及び後述する実施例に記載される構成に限定されるものではなく、本発明の技術思想を逸脱することなく、種々の変更が可能であることは言うまでもない。 It should be noted that the present invention is not limited to the above-described configurations and the configurations described in the embodiments described below, and it goes without saying that various modifications can be made without departing from the technical idea of the present invention. .
本発明によれば、FEDや有機ELに代表される電圧ではなく電流により輝度が決まるマトリクス構造の表示素子を用いた画像表示装置において、画素間の電子放出開始電圧すなわち閾電圧の違いや、動作中における閾電圧の変動を補正することができる。これにより、輝度均一性のよい発光を行わせることが可能となり、高画質の平板型画像表示装置を提供することができる。 According to the present invention, in an image display device using a display element having a matrix structure in which luminance is determined by current rather than voltage represented by FED and organic EL, the difference in electron emission start voltage between pixels, that is, threshold voltage, operation The fluctuation of the threshold voltage in the medium can be corrected. As a result, it is possible to emit light with good luminance uniformity, and a flat image display device with high image quality can be provided.
以下、本発明の実施例について、図面を参照して詳細に説明する。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
本発明によるFEDを用いた平板型画像表示装置の実施例1について、図1を用いて説明する。図1(a)及び(b)は、本実施例の制御電極及び陰極駆動部の構成を示す図である。 Example 1 of a flat panel image display device using an FED according to the present invention will be described with reference to FIG. FIGS. 1A and 1B are diagrams showing the configuration of the control electrode and the cathode driving unit of this embodiment.
図1に示したように、本実施例では、表示素子としてFED(FE)を用いており、電子を放出する陰極(K)、陰極表面の電界を制御する制御電極(G)、陰極(K)から放出された電子の入射により発光する蛍光面(P)の3電極を主体に構成される。 As shown in FIG. 1, in this embodiment, an FED (FE) is used as a display element, a cathode (K) that emits electrons, a control electrode (G) that controls the electric field on the cathode surface, and a cathode (K ) Is mainly composed of three electrodes of a phosphor screen (P) that emits light by the incidence of electrons emitted from it.
複数の陰極ライン(KL)と複数の制御電極ライン(GL)とにより、マトリクス構造が形成されており、その交差部に、陰極ライン(KL)に電気的に接続された陰極(K)と、制御電極ライン(GL)に電気的に接続された制御電極(G)とから構成されている電子線源があり蛍光面(P)上の発光部とともに画素を形成する。 A matrix structure is formed by the plurality of cathode lines (KL) and the plurality of control electrode lines (GL), and a cathode (K) electrically connected to the cathode line (KL) at the intersection thereof, There is an electron beam source composed of a control electrode (G) electrically connected to the control electrode line (GL), and a pixel is formed together with a light emitting portion on the phosphor screen (P).
陰極(K)と制御電極(G)のそれぞれの電極群を接続している陰極ライン(KL)と制御電極ライン(GL)により、マトリクス構造が形成されており、他の電極との対向面も大きいことから、各々の陰極ライン(KL)には浮遊容量Ckが存在する。 A matrix structure is formed by the cathode line (KL) and the control electrode line (GL) connecting the respective electrode groups of the cathode (K) and the control electrode (G), and a surface facing the other electrode is also formed. Since it is large, each cathode line (KL) has a stray capacitance Ck.
陰極ライン(KL)には、それぞれのライン毎に電圧設定をすることができる陰極駆動部(DK)が接続されており、発光させたい輝度信号に応じた設定電圧Vbを印加することができるとともに、駆動部を切り換えることにより開放された状態、つまり、ハイインピーダンス状態にもすることができる。 The cathode line (KL) is connected to a cathode drive unit (DK) capable of setting a voltage for each line, and can apply a set voltage Vb corresponding to a luminance signal to be emitted. By switching the drive unit, the open state, that is, the high impedance state can be obtained.
一方、制御電極ライン(GL)にも、それぞれのライン毎に電子放出電圧(選択電圧)VgONと電子放出抑制電圧(非選択電圧)VgOFFを選択して印加することができる制御電極駆動部(DG)が接続されている。 On the other hand, a control electrode driver (DG) that can selectively apply an electron emission voltage (selection voltage) VgON and an electron emission suppression voltage (non-selection voltage) VgOFF to each control electrode line (GL). ) Is connected.
蛍光面(P)には、その表面に塗布されている蛍光体(図示せず)が発光するのに十分なエネルギーを電子に与えることができる高電圧の蛍光面電源(PP)が接続されている。 Connected to the phosphor screen (P) is a high voltage phosphor screen power source (PP) that can give electrons sufficient energy for the phosphor (not shown) applied on the surface to emit light. Yes.
制御電極ライン(GL)側を順次選択することと、選択する制御電極ライン上にある画素に要求される発光強度に応じた電圧出力を一斉に陰極ライン(KL)側に印加することとの組合せにより、各画素を構成する陰極表面から所望の電子放出を生じさせ、この放出電子が蛍光面(P)上の蛍光体を発光させることにより所望の画像を表示する。 A combination of sequentially selecting the control electrode line (GL) side and simultaneously applying voltage outputs corresponding to emission intensity required for pixels on the selected control electrode line to the cathode line (KL) side. Thus, desired electron emission is generated from the cathode surface constituting each pixel, and the emitted electron causes the phosphor on the phosphor screen (P) to emit light, thereby displaying a desired image.
本実施例においては、制御電極駆動部(DG)の動作に同期したトリガ信号(TR)により、動作タイミングを制御して、陰極ライン(KL)電圧Vkを測定することができる閾電圧測定部(VM)を備えている。 In this embodiment, a threshold voltage measuring unit (which can measure the cathode line (KL) voltage Vk by controlling the operation timing by a trigger signal (TR) synchronized with the operation of the control electrode driving unit (DG). VM).
この閾電圧測定部(VM)での閾電圧測定は、陰極駆動部(DK)により、陰極ライン(KL)が陰極電源(PK)から切り離されて、ハイインピーダンス状態になった時に行う。なお、図1(a)においては、閾電圧測定部(VM)を直接陰極ライン(KL)に接続しているが、図1(b)に示すように、陰極駆動部(DK)内の遮断側に接続しても測定することができる。また、閾電圧測定部(VM)内を流れる電流が多いと、測定誤差や放出電子量の低下につながるため、閾電圧測定部(VM)の内部インピーダンスは、安定動作範囲内において高いことが望ましい。 The threshold voltage measurement in the threshold voltage measuring unit (VM) is performed when the cathode line (KL) is disconnected from the cathode power source (PK) by the cathode driving unit (DK) and becomes a high impedance state. In FIG. 1 (a), the threshold voltage measurement unit (VM) is directly connected to the cathode line (KL). However, as shown in FIG. 1 (b), the interruption in the cathode drive unit (DK) is performed. Even if connected to the side, it can be measured. In addition, if a large amount of current flows through the threshold voltage measurement unit (VM), it leads to a measurement error and a decrease in the amount of emitted electrons. Therefore, it is desirable that the internal impedance of the threshold voltage measurement unit (VM) is high within a stable operating range. .
本実施例においては、陰極ライン(KL)上の浮遊容量Ckを活用しているが、浮遊容量だけでは容量不足の場合や、各陰極ラインの間で浮遊容量のばらつきが著しく大きい場合には、各陰極ライン(GL)に外部容量を付加させることもできる。この場合には、付加する外部容量を各陰極ラインの浮遊容量の状態に合せて適切に選択することにより、電圧可変範囲の狭い陰極駆動部(DK)を用いても駆動できるようにすることもできる。外部容量を付加した場合は、結局、陰極ライン(KL)上の浮遊容量が大きい場合と同様であるので、以下においては、外部容量を付加した場合の説明は省略する。 In this embodiment, the stray capacitance Ck on the cathode line (KL) is utilized. However, when the stray capacitance alone is insufficient, or when the variation in stray capacitance between the cathode lines is extremely large, An external capacity can be added to each cathode line (GL). In this case, the external capacitance to be added is appropriately selected according to the state of the stray capacitance of each cathode line, so that it can be driven even by using a cathode driving unit (DK) having a narrow voltage variable range. it can. When an external capacitor is added, the result is the same as when the stray capacitance on the cathode line (KL) is large. Therefore, the description of the case where the external capacitor is added will be omitted below.
以下、図1に示した構造における駆動手順を、各電極の電圧変化および電子放出による電流変化を示した図2と、FEDに用いる陰極と制御電極の間の電極間電圧−電子放出強度特性を示した図3とを用いて説明する。 Hereinafter, the driving procedure in the structure shown in FIG. 1 is shown in FIG. 2 showing the voltage change of each electrode and the current change due to electron emission, and the interelectrode voltage-electron emission intensity characteristics between the cathode and the control electrode used in the FED. This will be described with reference to FIG.
図2には、これから選択制御ラインとなるj番目の制御電極ラインの電圧Vg(j)、次の選択制御電極ラインの電圧Vg(j+1)、ある陰極ライン用の陰極駆動部出力電圧Vb、駆動部から同陰極ラインへの流入電流Ik、同陰極ラインの電圧Vk、同陰極からの放出電子による電流Ieを示している。また、図2中に示した各タイミングにおける制御電極と陰極との間の電極間電圧Vgkと電子放出の状態を図3中にT0〜T3により表してある。 FIG. 2 shows the voltage Vg (j) of the jth control electrode line that will be the selection control line, the voltage Vg (j + 1) of the next selection control electrode line, the cathode driver output voltage Vb for a certain cathode line, the drive The inflow current Ik from the part to the cathode line, the voltage Vk of the cathode line, and the current Ie due to the emitted electrons from the cathode are shown. Further, the interelectrode voltage Vgk between the control electrode and the cathode and the state of electron emission at each timing shown in FIG. 2 are represented by T0 to T3 in FIG.
まず、制御電極電源(PG)と制御電極駆動部(DG)により、j番目の制御電極ライン(GL(j))を含めた全ての制御電極ライン(GL)の電圧を、電子放出抑制電圧VgOFFにした状態にする(タイミング0(T0))。この時には、電極間電圧Vgkは、図3中のT0で示したところとなっており電子放出は生じない。 First, the voltage of all control electrode lines (GL) including the jth control electrode line (GL (j)) is set to the electron emission suppression voltage VgOFF by the control electrode power source (PG) and the control electrode driving unit (DG). (Time 0 (T0)). At this time, the interelectrode voltage Vgk is as indicated by T0 in FIG. 3, and no electron emission occurs.
この状態で、これから電子放出を生じさせようとする陰極(K)に接続された陰極ライン(KL)を、陰極駆動部(DK)を介して、陰極電源(PK)に接続し、所望の輝度を得るに必要な電圧Vb1に充電する(第一期間(P1))。 In this state, the cathode line (KL) connected to the cathode (K) from which electrons are to be emitted is connected to the cathode power source (PK) via the cathode driving unit (DK) to obtain a desired luminance. Is charged to the voltage Vb1 necessary for obtaining the voltage (first period (P1)).
この時、出力電圧Vb1の値は、事前に記録してある当該陰極の閾電圧Vthと、所定の発光を得るのに必要な電荷量から決まる電圧の和から決定される。陰極駆動部出力電圧Vbの決定方法については後述する。 At this time, the value of the output voltage Vb1 is determined from the sum of the threshold voltage Vth of the cathode recorded in advance and the voltage determined from the amount of charge necessary for obtaining predetermined light emission. A method of determining the cathode drive unit output voltage Vb will be described later.
出力電圧Vb1の陰極駆動出力を接続した陰極ライン(KL)に電子が流入することにより、陰極ライン電圧VkがVb1に向かって低下する。 Electrons flow into the cathode line (KL) to which the cathode driving output of the output voltage Vb1 is connected, so that the cathode line voltage Vk decreases toward Vb1.
陰極ライン(KL)上に存在する浮遊容量Ckに対して電荷は蓄えられるが、全ての制御電極ライン(GL)に電子放出抑制電圧VgOFFが印加されているので電子放出は生じない。この時の電極間電圧Vgkは、図3中のT1に示したところに移るが、やはり電子放出は生じない。 Although charges are stored in the stray capacitance Ck existing on the cathode line (KL), no electron emission occurs because the electron emission suppression voltage VgOFF is applied to all the control electrode lines (GL). The interelectrode voltage Vgk at this time moves to the position indicated by T1 in FIG. 3, but no electron emission occurs.
次に、電圧Vb1により浮遊容量Ckに所定の電荷が蓄えられたのち、陰極駆動部(DK)により、陰極電源(PK)と全ての陰極ライン(KL)との間の接続を遮断する(タイミング1(T1))。この状態では、浮遊容量Ckに対して、充電も放電もされないので陰極ライン電圧Vkは維持される(第二期間(P2))。 Next, after a predetermined charge is stored in the stray capacitance Ck by the voltage Vb1, the connection between the cathode power source (PK) and all the cathode lines (KL) is cut off by the cathode driving unit (DK) (timing) 1 (T1)). In this state, neither the charging nor discharging is performed on the stray capacitance Ck, so that the cathode line voltage Vk is maintained (second period (P2)).
続けて、制御電極駆動部(DG)により電子放出を生じさせようとする画素を含む制御電極ライン(GL(j))のみの電圧Vg(j)を電子放出電圧VgONに切り換える(タイミング2(T2))。 Subsequently, the voltage Vg (j) of only the control electrode line (GL (j)) including the pixel that is to cause the electron emission by the control electrode driving unit (DG) is switched to the electron emission voltage VgON (timing 2 (T2 )).
これにより制御電極電圧Vg(j)はVgON、陰極電圧(Vk)はVb1となり、電極間電圧Vgkは、図3に示したT2の状態になり電子放出が生じる。したがって、該当する制御電極ライン(GL(j))に接続されている陰極(K)表面から電子放出が生じて電流Ieが流れる。 As a result, the control electrode voltage Vg (j) becomes VgON, the cathode voltage (Vk) becomes Vb1, and the interelectrode voltage Vgk becomes T2 shown in FIG. 3 to generate electrons. Therefore, electrons are emitted from the surface of the cathode (K) connected to the corresponding control electrode line (GL (j)), and the current Ie flows.
この電子放出に伴い、浮遊容量Ckに充電されていた電荷が放電されて陰極ライン電圧VkがVb1から急激に変化して電極間電圧Vgkが低下(図3のT2からT3に遷移)して、電子放出強度も急激に低下するためにパルス状の電子放出となる(第三期間(P3))。この時の最大電流Iepは、陰極(K)表面に印加されている電界により制限される。 With this electron emission, the charge charged in the stray capacitance Ck is discharged, the cathode line voltage Vk changes suddenly from Vb1, and the interelectrode voltage Vgk decreases (transition from T2 to T3 in FIG. 3). Since the electron emission intensity also decreases rapidly, pulsed electron emission occurs (third period (P3)). The maximum current Iep at this time is limited by the electric field applied to the cathode (K) surface.
陰極ライン電圧Vkが閾電圧Vthに近づくのに応じて、電極間電圧Vgkが電子放出開始電圧に近づき、電子放出電流Ieが減少するので、陰極ライン(KL)からのリーク電流を十分小さくしておけば、陰極ライン電圧VkはVthを越えることはない。 As the cathode line voltage Vk approaches the threshold voltage Vth, the interelectrode voltage Vgk approaches the electron emission start voltage and the electron emission current Ie decreases, so that the leakage current from the cathode line (KL) is sufficiently reduced. In this case, the cathode line voltage Vk does not exceed Vth.
したがって、選択制御電極ライン(GL(j))の電圧Vg(j)を、電子放出電圧VgONから電子放出抑制電圧VgOFFに切り換える時(タイミング3(T3))の直前においては、陰極ライン(KL)の電圧は、各陰極ライン上で電子放出を生じたj番目の制御電極ライン(GL(j))との交点に存在する各陰極(K)が持つ閾電圧Vthとなっているので、この値を閾電圧測定部(VM)により測定して、閾電圧記録テーブルに記録する。 Therefore, immediately before the voltage Vg (j) of the selection control electrode line (GL (j)) is switched from the electron emission voltage VgON to the electron emission suppression voltage VgOFF (timing 3 (T3)), the cathode line (KL). Is the threshold voltage Vth of each cathode (K) present at the intersection with the jth control electrode line (GL (j)) that caused electron emission on each cathode line. Is measured by a threshold voltage measuring unit (VM) and recorded in a threshold voltage recording table.
以上で、j番目の制御電極ライン(GL(j))上の画素の動作が完了し、次の(j+1)番目の制御電極ライン(GL(j+1))上の画素において同様の動作を行う。このように、全ての制御電極ラインにおいて同様の動作を行った後、再びj番目の制御電極ライン(GLj)上の画素の動作を行う場合には、前回記録された閾電圧Vthの値を基にVbを補正することにより、閾電圧Vthの変動を補正することができる。 Thus, the operation of the pixel on the jth control electrode line (GL (j)) is completed, and the same operation is performed on the pixel on the next (j + 1) th control electrode line (GL (j + 1)). As described above, when the same operation is performed on all the control electrode lines and then the operation of the pixel on the jth control electrode line (GLj) is performed again, the value of the threshold voltage Vth recorded last time is used. By correcting Vb, the variation of the threshold voltage Vth can be corrected.
以下に、陰極駆動部(DK)の出力電圧Vbの設定方法について説明する。 Below, the setting method of the output voltage Vb of a cathode drive part (DK) is demonstrated.
発光輝度は上記第三期間内における全放出電子量ΔQeに依存する。そして、全放出電子量ΔQeは、当該陰極ライン(KL)が他の電極等との間に持つ浮遊容量Ckの一方の電極である陰極ラインの電圧Vkが、タイミング(T2)におけるVb1の状態から閾電圧であるVthの状態になるまでの蓄積電荷量変化ΔQに相当する。 The emission brightness depends on the total amount of emitted electrons ΔQe within the third period. Then, the total amount of emitted electrons ΔQe is determined from the state of Vb1 at the timing (T2) when the voltage Vk of the cathode line that is one electrode of the stray capacitance Ck that the cathode line (KL) has with other electrodes or the like. This corresponds to the accumulated charge amount change ΔQ until the threshold voltage Vth is reached.
この間、他の電極電圧は変化しないので陰極ライン電圧Vkのみを考慮すればよく、放出電子量ΔQeは、ΔQe=ΔQ=Ck(Vb1−Vth)……(1)となる。 During this time, since the other electrode voltages do not change, it is only necessary to consider the cathode line voltage Vk, and the amount of emitted electrons ΔQe is ΔQe = ΔQ = Ck (Vb1−Vth) (1).
瞬間的な電子放出強度には、図3に示したように電極間電圧−電子放出強度特性の影響も考慮しなければならないが、(1)式からわかるように一選択期間内で放出される電荷量の総量ΔQeは浮遊容量Ckと陰極ライン電圧Vkの変化幅(Vb−Vth)のみで決まる。なお、浮遊容量は、FED等の発光素子完成時に測定することができる。 As shown in FIG. 3, the instantaneous electron emission intensity must also take into account the influence of the voltage between the electrodes and the electron emission intensity characteristic. However, as can be seen from the equation (1), the emission is performed within one selection period. The total amount of charge ΔQe is determined only by the stray capacitance Ck and the change width (Vb−Vth) of the cathode line voltage Vk. The stray capacitance can be measured when a light emitting element such as an FED is completed.
設定すべき電圧Vbは、陰極部出力電圧Vb1であるので、閾電圧Vthと、上記電荷量変化ΔQe=ΔQに必要な電圧幅ΔVk=(Vb1−Vth)を求める。 Since the voltage Vb to be set is the cathode part output voltage Vb1, the threshold voltage Vth and the voltage width ΔVk = (Vb1−Vth) necessary for the charge amount change ΔQe = ΔQ are obtained.
発光させる輝度、蛍光面(P)の形状や発光効率、走査線数及び電極形状等から導かれる電子の利用効率等から、一選択期間内に陰極から放出させる必要がある電荷量ΔQbを得ることができる。 Obtaining the amount of charge ΔQb that needs to be emitted from the cathode within one selection period from the luminance to be emitted, the shape and light emission efficiency of the phosphor screen (P), the use efficiency of electrons derived from the number of scanning lines and the electrode shape, etc. Can do.
このΔQbから、必要な電圧幅ΔVkは、ΔVk=(Vb1−Vth)=ΔQb/Ck……(2)となる。 From this ΔQb, the required voltage width ΔVk is ΔVk = (Vb1−Vth) = ΔQb / Ck (2).
したがって、閾電圧Vthを得ることができれば、陰極駆動部の出力電圧Vbを得ることができる。 Therefore, if the threshold voltage Vth can be obtained, the output voltage Vb of the cathode driving unit can be obtained.
閾電圧Vthの測定は、上記方法によりタイミング3(T3)直前における陰極ライン電圧Vkを測定することができるので、以下に、これを駆動部出力電圧Vbの補正に用いるための流れについて、図4から図6を用いて説明する。 The threshold voltage Vth can be measured by measuring the cathode line voltage Vk immediately before the timing 3 (T3) by the above method. The flow for using this for correcting the drive unit output voltage Vb will be described below with reference to FIG. Will be described with reference to FIG.
図4に、画像表示装置に用いられる制御部の構成の一例を示す。表示素子としては図1に示したようなFEDを用いており、図5に示したような接続になっている。 FIG. 4 shows an example of the configuration of the control unit used in the image display apparatus. As the display element, an FED as shown in FIG. 1 is used, and the connection is as shown in FIG.
図5において、複数ある陰極ライン(KL)のそれぞれに異なった電圧を印加できる陰極駆動部(DK)と、複数ある制御電極ライン(GL)のうちの0本又は1本に電子放出電圧を印加し、それ以外の制御電極ライン(GL)に電子放出抑制電圧を印加することができる制御電極駆動部(DG)を介して接続している。 In FIG. 5, a cathode drive unit (DK) that can apply different voltages to each of a plurality of cathode lines (KL), and an electron emission voltage is applied to zero or one of the plurality of control electrode lines (GL). And it connects via the control electrode drive part (DG) which can apply an electron emission suppression voltage to the other control electrode line (GL).
さらに、陰極ライン(KL)のそれぞれには閾電圧測定部(VM)が接続され、また、蛍光面(P)には蛍光面電源(PP)が接続されている。なお、画像表示を行うための信号の流れについては一般的であるので省略する。 Further, a threshold voltage measuring unit (VM) is connected to each of the cathode lines (KL), and a phosphor screen power source (PP) is connected to the phosphor screen (P). Note that a signal flow for displaying an image is general and thus omitted.
本発明の特徴的な構成部は、遮断機構を有する陰極駆動部であるが、その構造は図1を用いて説明したとおりであるので省略する。 A characteristic component of the present invention is a cathode driving unit having a blocking mechanism, and the structure thereof is the same as described with reference to FIG.
その他としては、閾電圧測定部や閾電圧記憶テーブルの動作が画像表示に同期させて行えるようタイミング信号が接続されている。 In addition, a timing signal is connected so that the operations of the threshold voltage measurement unit and the threshold voltage storage table can be performed in synchronization with image display.
図1を用いて説明したように表示素子内の陰極ライン(KL)と陰極駆動部(DK)の間を遮断した状態で電子放出を生じさせた後、制御電極電圧Vgを電子放出電圧VgONから電子放出抑制電圧VgOFFに切り換える直前の時の陰極ライン電圧Vkを閾電圧測定部(VM)を用いて測定することにより、電子放出電圧VgONを印加していた制御電極ライン(GL)上の各画素を構成する陰極(K)の閾電圧Vthを測定することができる。このように測定された閾電圧の値は閾電圧記録テーブルに画素毎に記録する。 As described with reference to FIG. 1, after the electron emission is generated in a state where the cathode line (KL) and the cathode driving unit (DK) in the display element are blocked, the control electrode voltage Vg is changed from the electron emission voltage VgON. Each pixel on the control electrode line (GL) to which the electron emission voltage VgON was applied is measured by measuring the cathode line voltage Vk immediately before switching to the electron emission suppression voltage VgOFF using the threshold voltage measurement unit (VM). The threshold voltage Vth of the cathode (K) that constitutes can be measured. The threshold voltage value thus measured is recorded for each pixel in the threshold voltage recording table.
このようにして、複数ある制御電極ライン(GL)には、順次電子放出電圧VgONを印加していくので、これに同期させて各陰極の閾電圧Vthを測定することにより、全画素の陰極の閾電圧Vthを測定し、記録することができる。 In this way, since the electron emission voltage VgON is sequentially applied to a plurality of control electrode lines (GL), by measuring the threshold voltage Vth of each cathode in synchronization with this, the cathode voltage of all the pixels is measured. The threshold voltage Vth can be measured and recorded.
図5には、閾電圧測定部(VM)として1系統の測定部しか示していないが、各陰極ライン(KL)のそれぞれに閾電圧測定部(VM)が接続されており、制御電極ライン(GL)を1本選択して駆動する毎に、当該制御電極ライン(GL)上の画素を構成する全陰極の閾電圧を測定することができる。 FIG. 5 shows only one measurement unit as the threshold voltage measurement unit (VM), but a threshold voltage measurement unit (VM) is connected to each cathode line (KL), and the control electrode line ( Every time one (GL) is selected and driven, the threshold voltages of all the cathodes constituting the pixels on the control electrode line (GL) can be measured.
本実施例では、陰極ライン数分の閾電圧測定部(VM)を備えた構造としたので全制御電極を順次選択して、1画面を表示する毎に、全画素に関する閾電圧Vthを測定することができ、閾電圧の変動に対してほぼリアルタイムに補正することができる。 In the present embodiment, since the threshold voltage measuring units (VM) corresponding to the number of cathode lines are provided, all the control electrodes are sequentially selected and the threshold voltage Vth for all pixels is measured every time one screen is displayed. It is possible to correct the threshold voltage in near real time.
しかし、別途陰極ライン切り換え機構を備えることにより、順次ではあるが全画素に関する閾電圧Vthを測定することはできるので、閾電圧Vthの変動がゆるやかな場合は、陰極ラインよりも少ない系統数の閾電圧測定部(VM)を備えることによっても本発明の効果を得ることができる。 However, by providing a separate cathode line switching mechanism, the threshold voltage Vth for all the pixels can be measured sequentially, but if the fluctuation of the threshold voltage Vth is gentle, the threshold of the number of systems smaller than that of the cathode line can be obtained. The effect of the present invention can also be obtained by providing a voltage measurement unit (VM).
閾電圧記録テーブルに記録された閾電圧値は、該当する画素が次回以降に選択される際に読み出され、(2)式に基づいて、入力信号である画像信号とともに陰極駆動部出力電圧Vbを決定する。決定された電圧Vbは、D/A変換を介して陰極駆動部に伝えられて実際に表示素子の陰極ラインに印加される。 The threshold voltage value recorded in the threshold voltage recording table is read out when the corresponding pixel is selected from the next time onward, and the cathode driver output voltage Vb together with the image signal which is the input signal based on the equation (2). To decide. The determined voltage Vb is transmitted to the cathode driving unit via the D / A conversion and actually applied to the cathode line of the display element.
このような、閾電圧測定、記録、読み出し、陰極駆動部出力電圧決定、電圧印加のサイクルを繰り返すことにより、閾電圧Vthが変動した場合の輝度変化を補正することができる。 By repeating such a cycle of threshold voltage measurement, recording, reading, cathode drive unit output voltage determination, and voltage application, it is possible to correct a luminance change when the threshold voltage Vth fluctuates.
図4では、閾電圧Vthを測定するために閾電圧記録テーブルに直接記録しているが、図6に示したように新たに測定した値と予め記録されている値を用いた演算処理を行い、その結果を閾電圧記録テーブルに新たな値として記録してもよい。 In FIG. 4, in order to measure the threshold voltage Vth, it is directly recorded in the threshold voltage recording table. However, as shown in FIG. 6, a calculation process using a newly measured value and a prerecorded value is performed. The result may be recorded as a new value in the threshold voltage recording table.
この演算として、例えば、重み付き平均化処理を行うことにより、外来ノイズや単発的な閾電圧変化等の影響を抑制して過剰補正を防止することができる。なお、演算処理の内容について平均化に限らず多くの方法が考えられることは言うまでもない。 As this calculation, for example, by performing a weighted averaging process, it is possible to suppress the influence of external noise, a single threshold voltage change, and the like, thereby preventing overcorrection. Needless to say, the contents of the arithmetic processing are not limited to averaging, and many methods are conceivable.
ここで、表示素子としてFEDを用いた場合は、陰極(K)から放出された電子が蛍光面(P)に入射することにより発光を得ており、陰極(K)からの電子放出量を制御することにより発光強度を制御している。 Here, when the FED is used as the display element, light emitted is obtained when electrons emitted from the cathode (K) enter the phosphor screen (P), and the amount of electrons emitted from the cathode (K) is controlled. By doing so, the emission intensity is controlled.
なお、電極の構造上、放出された電子の一部が制御電極(G)に入射してしまう状態でも、電極間電圧−電子放出強度特性に電子放出開始電圧が存在し、かつ、放出電子量と制御電極への入射量の比が一定であれば本発明の効果を得ることができる。 Even in the state where some of the emitted electrons are incident on the control electrode (G) due to the structure of the electrode, the electron emission start voltage exists in the inter-electrode voltage-electron emission intensity characteristic, and the amount of emitted electrons If the ratio of the incident amount to the control electrode is constant, the effect of the present invention can be obtained.
しかし、本発明の効果を十分に活かすためには、制御電極(G)への電子入射がなく、制御している陰極(K)からの放出電荷量が全て蛍光面(P)への入射電荷量となることが望ましい。 However, in order to make full use of the effects of the present invention, there is no incidence of electrons on the control electrode (G), and the amount of charge emitted from the controlled cathode (K) is all incident charge on the phosphor screen (P). It is desirable to be an amount.
この条件を満たすことができ、さらに効果的に本発明を活用することができるFEDの電極構造を図7及び図8に示す。図7及び図8に示すように、FEDは、主に陰極(K)、制御電極(G),蛍光面(P)の3種の電極から構成されている。 7 and 8 show an electrode structure of the FED that can satisfy this condition and can effectively use the present invention. As shown in FIGS. 7 and 8, the FED is mainly composed of three types of electrodes: a cathode (K), a control electrode (G), and a phosphor screen (P).
図7は、制御電極(G)が、陰極(K)と蛍光面(P)の間に配置された構造を示している。この構造において、電子放出が生じている時の陰極(K)の電圧をVk、制御電極(G)の電圧をVg、蛍光面(P)の電圧をVpとし、蛍光面(P)と陰極(K)の間の距離をdpk、蛍光面(P)と制御電極(G)の間の距離をdpgとしたとき、dpk>dpgであって、Vg<(Vp−Vk)/dpk×(dpk−dpg)+Vkとなるような条件下で駆動することにより、陰極(K)から放出された電子線は、制御電極(G)付近において集束し、制御電極(G)への入射を極力抑えることができる。 FIG. 7 shows a structure in which the control electrode (G) is disposed between the cathode (K) and the phosphor screen (P). In this structure, when the electron emission occurs, the voltage of the cathode (K) is Vk, the voltage of the control electrode (G) is Vg, the voltage of the phosphor screen (P) is Vp, and the phosphor screen (P) and the cathode ( K) is dpk, and the distance between the phosphor screen (P) and the control electrode (G) is dpg, dpk> dpg, and Vg <(Vp−Vk) / dpk × (dpk− dpg) By driving under the condition of + Vk, the electron beam emitted from the cathode (K) is focused near the control electrode (G), and the incidence to the control electrode (G) can be suppressed as much as possible. it can.
これにより、陰極(K)から放出された電子のほとんどを蛍光面(P)に入射させることができ、本発明の効果を有効に活用することができる。 Thereby, most of the electrons emitted from the cathode (K) can be incident on the phosphor screen (P), and the effect of the present invention can be effectively utilized.
また、図8に示したように、制御電極(G)を陰極(K)と概ね同じ高さの位置に設置することによっても、制御電極(G)への電子入射を抑制し、放出電荷制御の効果を有効に活用することができる。このような電極配置(以下「IPG構造」という。)においては、陰極から放出される電子は、正の高電圧を印加している蛍光面(P)に向かって放出されるため、制御電極(G)の近傍を通過しない。特に、蛍光面電圧Vp、陰極電圧Vk及び蛍光面−陰極間距離dpkにより定まる、蛍光面(P)と陰極(K)間の平均電界Fpk=(Vp−Vk)/dpk……(3)よりも低い電界によっても十分な電子放出を得られる陰極材料を用いた場合において効果的である。 Further, as shown in FIG. 8, by placing the control electrode (G) at a position substantially the same height as the cathode (K), it is possible to suppress the incidence of electrons on the control electrode (G) and control the emission charge. The effect of can be utilized effectively. In such an electrode arrangement (hereinafter referred to as “IPG structure”), electrons emitted from the cathode are emitted toward the phosphor screen (P) to which a positive high voltage is applied. Do not pass in the vicinity of G). In particular, the average electric field Fpk between the phosphor screen (P) and the cathode (K) determined by the phosphor screen voltage Vp, the cathode voltage Vk, and the phosphor screen-cathode distance dpk = (Vp−Vk) / dpk (3) In particular, it is effective when a cathode material capable of obtaining sufficient electron emission even with a low electric field is used.
このような陰極材料としては、カーボンナノチューブや、カーボンナノファイバを始めとする太さがナノメートルサイズである炭素系繊維材料があり、これらを陰極の下地膜上に直接成長させるか、または、溶剤に分散させたのち樹脂剤等を混合したペーストを印刷することにより、低電界で電子放出が得られる陰極を形成することができる。例えば、カーボンナノチューブをペースト化したものを印刷することにより形成される陰極では、約3V/μm程度で十分な電子放出を得ることができる。 Examples of such cathode materials include carbon nanotubes and carbon-based fiber materials having a nanometer size such as carbon nanofibers, and these are directly grown on the cathode base film or solvent. Then, a paste in which a resin agent or the like is mixed is printed, whereby a cathode capable of emitting electrons in a low electric field can be formed. For example, in a cathode formed by printing a paste of carbon nanotubes, sufficient electron emission can be obtained at about 3 V / μm.
この陰極を用いて、図8に示したIPG構造を形成し、蛍光面−陰極(制御電極)間距離dpk(=dpg)を2mm、蛍光面電圧Vpを6kV、制御電極間隔150μmとした場合の、電子放出時の制御電極電圧Vg及び陰極電圧Vkは、いずれも0Vであり、制御電極Vgを−100Vにするか、陰極電圧Vkを+100Vにすることにより電子放出を遮断することができる。 Using this cathode, the IPG structure shown in FIG. 8 is formed, and the phosphor screen-cathode (control electrode) distance dpk (= dpg) is 2 mm, the phosphor screen voltage Vp is 6 kV, and the control electrode interval is 150 μm. The control electrode voltage Vg and the cathode voltage Vk at the time of electron emission are both 0 V, and electron emission can be blocked by setting the control electrode Vg to −100 V or the cathode voltage Vk to +100 V.
この電極電圧制御を組み合わせることによりマトリクス動作の電子線源を構成することができ、図5に示すように、蛍光面パネル(P)と組み合わせることによりFEDを構成することができる。 By combining this electrode voltage control, a matrix operation electron beam source can be configured, and as shown in FIG. 5, an FED can be configured by combining with a phosphor screen panel (P).
以上は表示素子としてFEDを用いた場合を示したが、次に表示素子として有機EL素子を用いた実施例2を、図9から図13を用いて説明する。 The above shows the case where the FED is used as the display element. Next, Example 2 using an organic EL element as the display element will be described with reference to FIGS.
図9は本実施例の有機EL素子を用いた画像表示装置の電極信号印加部の構成を示す図、図10は有機EL素子の発光部の膜構成を表す図、図11は本実施例に用いる有機EL素子の電極間電圧−素子電流特性の一例を表すグラフ、図12は駆動部と表示素子である有機EL素子の接続を表す図、図13は画像表示装置の全体構成図である。 FIG. 9 is a diagram showing a configuration of an electrode signal application unit of an image display apparatus using the organic EL element of this example, FIG. 10 is a diagram showing a film configuration of a light emitting unit of the organic EL element, and FIG. FIG. 12 is a graph showing an example of an interelectrode voltage-element current characteristic of an organic EL element to be used, FIG. 12 is a diagram showing a connection between a drive unit and an organic EL element as a display element, and FIG. 13 is an overall configuration diagram of an image display device.
図9において、本実施例の表示装置は、各画素の有機EL素子(EL)の画素である発光部(ELC)の陽極同士及び陰極同士を接続して、陽極ライン(AL)及び陰極ライン(KL)を構成し、それぞれのラインに所定の電圧を印加することにより、画素の発光/非発光を制御する。 In FIG. 9, the display device of this example connects anodes and cathodes of a light emitting section (ELC) that is a pixel of an organic EL element (EL) of each pixel to connect anode lines (AL) and cathode lines ( KL), and applying a predetermined voltage to each line controls the light emission / non-light emission of the pixel.
発光部(ELC)は、図10に示した膜構造のものを用いており、陽極(A)上に、正孔注入層(HIL)、発光層(EM)、電子注入層(EIL)、陰極(K)の順に積層したものである。 The light emitting part (ELC) has the film structure shown in FIG. 10, and on the anode (A), a hole injection layer (HIL), a light emitting layer (EM), an electron injection layer (EIL), a cathode These are stacked in the order of (K).
この発光部(ELC)の両端に電圧を印加すると、図11に示すように電極間電圧−素子電流特性を示し、電子放出開始電圧以上の電圧を印加することにより、素子電流が流れて発光する。 When a voltage is applied to both ends of the light-emitting portion (ELC), the inter-electrode voltage-element current characteristic is shown as shown in FIG. 11. By applying a voltage higher than the electron emission start voltage, the element current flows and emits light. .
ここで、図9に示すように、陽極ライン(AL)と陰極ライン(KL)によりマトリクス構造を形成しており、電子放出開始電圧以下の電圧を印加して素子電流が流れていない状態においては、浮遊容量(Ck)の影響を受ける。 Here, as shown in FIG. 9, the matrix structure is formed by the anode line (AL) and the cathode line (KL), and in the state where the device current does not flow by applying a voltage equal to or lower than the electron emission start voltage. , Affected by stray capacitance (Ck).
各陽極ライン(AL)には、陽極電源(PA)により供給される選択電圧VaONと非選択電圧VaOFFの2電圧を切り換えて印加することができる陽極駆動部(DA)が接続されている。 Connected to each anode line (AL) is an anode driving section (DA) that can switch and apply two voltages, a selection voltage VaON and a non-selection voltage VaOFF, supplied by an anode power source (PA).
一方、陰極ライン(KL)には、陰極電源(PK)により供給される電圧を輝度に応じた所定の電圧Vbに調整して供給したり、陰極ライン(KL)を陰極電源(PK)から遮断してハイインピーダンス状態にしたりすることができる陰極駆動部(DK)が接続されている。 On the other hand, the cathode line (KL) is supplied with the voltage supplied from the cathode power supply (PK) adjusted to a predetermined voltage Vb according to the luminance, or the cathode line (KL) is cut off from the cathode power supply (PK). Thus, a cathode driving unit (DK) that can be in a high impedance state is connected.
そこで、図12に示すように、陰極駆動部(DK)や陽極駆動部(DA)は、それぞれの陽極ライン(AL)や陰極ライン(KL)の電圧を個別に制御できるように接続してある。 Therefore, as shown in FIG. 12, the cathode driving unit (DK) and the anode driving unit (DA) are connected so that the voltages of the respective anode lines (AL) and cathode lines (KL) can be individually controlled. .
画像表示の際には、陽極ライン(AL)側を順次選択し、陰極ライン(KL)側に各画素の発光に必要な電圧を印加することにより画像表示を行う。 When displaying an image, the anode line (AL) side is sequentially selected, and a voltage necessary for light emission of each pixel is applied to the cathode line (KL) side to display the image.
以下に、図9に示すj番目の陽極ライン(AL(j))上の発光部(ELC)を発光させる場合の動作ステップを説明する。 In the following, an operation step when the light emitting unit (ELC) on the jth anode line (AL (j)) shown in FIG. 9 is caused to emit light will be described.
まず、j番目の陽極ラインを含めて全ての陽極ラインに非選択電圧VaOFFを印加する。この状態において、陰極駆動部(DK)を陰極電源(PK)側に切り換え、陰極ライン(KL)には、j番目の陽極ライン(AL(j))と各陰極ライン(KL)の交点での画素の発光に必要な電圧Vbを印加する。各陰極ライン(KL)には、それぞれ浮遊容量Ckが存在し、印加した電圧により充電される。この状態では、陽極電圧Vaは非選択電圧VaOFFであり、陽極(A)−陰極(K)間電圧が電子放出開始電圧以下となるように設定しているために発光は生じない(期間1)。 First, the non-selection voltage VaOFF is applied to all the anode lines including the jth anode line. In this state, the cathode drive unit (DK) is switched to the cathode power source (PK) side, and the cathode line (KL) is connected to the jth anode line (AL (j)) and the intersection of each cathode line (KL). A voltage Vb necessary for light emission of the pixel is applied. Each cathode line (KL) has a stray capacitance Ck and is charged by the applied voltage. In this state, the anode voltage Va is the non-selection voltage VaOFF, and light emission does not occur because the voltage between the anode (A) and the cathode (K) is set to be equal to or lower than the electron emission start voltage (period 1). .
その後、陰極駆動部(DK)を開放側に切り換えて、陰極ライン(KL)と陰極電源(PK)を遮断した後に、j番目の陽極ライン(AL(j))に選択電圧VaONを印加する。期間1において充電された陰極ライン上の画素においては、充電された電荷を放電するために陽極(A)−陰極(K)間に素子電流が流れ、充電電荷量に応じた発光を生じる。一方、期間1において充電されなかった陰極ライン上の画素においては、放電されるべき電荷がないので素子電流が流れず発光は生じない(期間2)。
Thereafter, the cathode drive unit (DK) is switched to the open side, the cathode line (KL) and the cathode power source (PK) are shut off, and then the selection voltage VaON is applied to the jth anode line (AL (j)). In the pixel on the cathode line charged in the
充電された画素においては、図11に示した電極間電圧−素子電流特性に応じたピーク電流が流れるが、陰極ライン(KL)が陰極電源(PK)から遮断されているために、陰極(K)電圧はしだいに陽極(A)に近づき、電極間電圧Vakが電子放出開始電圧に達すると素子電流が流れなくなるため、電極間電圧Vakが電子放出開始電圧以下になることはない。 In the charged pixel, a peak current corresponding to the interelectrode voltage-element current characteristic shown in FIG. 11 flows, but the cathode line (KL) is cut off from the cathode power source (PK), so that the cathode (K ) Since the voltage gradually approaches the anode (A) and the inter-electrode voltage Vak reaches the electron emission start voltage, the device current stops flowing, so the inter-electrode voltage Vak does not fall below the electron emission start voltage.
電子放出開始電圧に達するまでに素子電流量の積分値、つまりは、1発光期間に素子を流れる電荷量は、FEDの場合と同様に、期間1において陰極ライン(KL)に印加した電圧Vbと放電が終了する時の閾電圧Vthとの差と、浮遊容量Ckにより表される。この浮遊容量Ckは測定することができる。
The integrated value of the device current amount before reaching the electron emission start voltage, that is, the amount of charge flowing through the device in one light emission period is the voltage Vb applied to the cathode line (KL) in
さらには、期間2の放電(発光)期間において、j番目の陽極ライン(AL(j))の印加電圧を選択電圧VaONから非選択電圧VaOFFに切り換える直前には十分放電した状態であるので、この時の各陰極ラインの電圧を測定することにより、j番目の陽極ライン(AL(j))上の画素の閾電圧Vthを閾電圧測定部(VM)により測定することができる。 Further, in the discharge (light emission) period of period 2, since the applied voltage of the jth anode line (AL (j)) is sufficiently discharged immediately before switching from the selection voltage VaON to the non-selection voltage VaOFF, By measuring the voltage of each cathode line at the time, the threshold voltage Vth of the pixel on the jth anode line (AL (j)) can be measured by the threshold voltage measuring unit (VM).
発光に寄与する電荷を充電するに必要な電圧(Vb−Vth)は、電極間電圧−素子電流特性と、発光部(ELC)の持つ発光効率、浮遊容量Ckから求めることができる。したがって、期間1に印加すべき電圧Vbを求めることができる。
The voltage (Vb−Vth) necessary for charging the electric charge contributing to light emission can be obtained from the interelectrode voltage-element current characteristics, the light emission efficiency of the light emitting portion (ELC), and the stray capacitance Ck. Therefore, the voltage Vb to be applied in the
図13に示す構成により、陽極ラインの線順次走査と各陰極ラインの閾電圧測定を組み合わせて、表示素子内の各画素の閾電圧を閾電圧測定部により測定し、閾電圧記録テーブルに記録する。この閾電圧記録テーブル上の閾電圧を基に補正し、次の発光期間には、輝度信号により要求される発光強度を得るに必要な電圧値Vbを求める。 With the configuration shown in FIG. 13, the line voltage scanning of the anode line and the threshold voltage measurement of each cathode line are combined, the threshold voltage of each pixel in the display element is measured by the threshold voltage measuring unit, and recorded in the threshold voltage recording table. . Correction is made based on the threshold voltage on the threshold voltage recording table, and a voltage value Vb necessary for obtaining the light emission intensity required by the luminance signal is obtained in the next light emission period.
この、閾電圧測定、記録、補正のサイクルは、各表示期間(例えば、1/60秒毎)に行えば、より正確に輝度補正を行うことができるが、表示素子の閾電圧の変動状況に応じて適切な測定周期を選択してもよい。 If this cycle of threshold voltage measurement, recording, and correction is performed in each display period (for example, every 1/60 seconds), brightness correction can be performed more accurately. An appropriate measurement cycle may be selected accordingly.
以上のような閾電圧測定及び補正を用いて、1発光期間内に画素を流れる電荷量を制御することにより、FEDの場合と同様に、有機EL素子を表示素子として用いた場合においても発光均一性のよい画像表示装置が得られる。なお、表示素子として有機ELを用いた場合においても、図6に示した演算機能を有する補正部が有効であることはいうまでもない。 By using the threshold voltage measurement and correction as described above, by controlling the amount of charge flowing through the pixel within one light emission period, the light emission is uniform even when the organic EL element is used as a display element as in the case of FED. A good image display device can be obtained. Needless to say, the correction unit having the calculation function shown in FIG. 6 is also effective when an organic EL is used as the display element.
FE…電界放射型表示素子、P…蛍光面、G…制御電極、K…陰極、KL…陰極ライン、GL…制御電極ライン、Ck…陰極ライン浮遊容量、PP…蛍光面電源、PG…制御電極電源、PK…陰極電源、DG…制御電極駆動部、DK…陰極駆動部、VM…閾電圧測定部、TR…陰極電圧測定トリガ信号、EL…有機EL素子、ELC…有機EL発光部、A…陽極、HIL…正孔注入層、EM…発光層、EIL…電子注入層、AL…陽極ライン、PA…陽極電源、DA…陽極駆動部、e…電子線、dgk…陰極−制御電極間距離、dpg…陽極−制御電極間距離、dpk…陽極−陰極間距離、Vth…閾電圧、Vg…制御電極ライン電圧、VgON…電子放出電圧(選択電圧)、VgOFF…電子放出抑制電圧(非選択電圧)、VaON…選択陽極ライン電圧、VaOFF…非選択陽極ライン電圧、Vk…陰極ライン電圧、Vgk…制御電極−陰極間電圧、Vb…陰極駆動部出力電圧、Ik…陰極ライン流入電流、Ie…電子放出による電流、Iep…電子放出による電流のピーク値、P1…駆動の第一期間(陰極ラインへの充電期間)、P2…駆動の第二期間(陰極ライン電圧維持期間)、P3…駆動の第三期間(電子放出期間)、T0…一選択期間の開始(充電開始)、T1…第1のタイミング(充電終了)、T2…第2のタイミング(電子放出開始)、T3…第3のタイミング(閾電圧測定及び一選択期間終了)。
FE ... field emission display element, P ... phosphor screen, G ... control electrode, K ... cathode, KL ... cathode line, GL ... control electrode line, Ck ... cathode line stray capacitance, PP ... phosphor screen power supply, PG ... control electrode Power supply, PK ... Cathode power supply, DG ... Control electrode drive unit, DK ... Cathode drive unit, VM ... Threshold voltage measurement unit, TR ... Cathode voltage measurement trigger signal, EL ... Organic EL element, ELC ... Organic EL light emission unit, A ... Anode, HIL ... hole injection layer, EM ... light emitting layer, EIL ... electron injection layer, AL ... anode line, PA ... anode power source, DA ... anode drive unit, e ... electron beam, dgk ... cathode-control electrode distance, dpg ... anode-control electrode distance, dpk ... anode-cathode distance, Vth ... threshold voltage, Vg ... control electrode line voltage, VgON ... electron emission voltage (selection voltage), VgOFF ... electron emission suppression voltage (non-selection voltage) , VaON ... Select Pole line voltage, VaOFF ... non-selection anode line voltage, Vk ... cathode line voltage, Vgk ... control electrode-cathode voltage, Vb ... cathode driver output voltage, Ik ... cathode line inflow current, Ie ... current due to electron emission, Iep ... peak value of current due to electron emission, P1 ... first period of driving (charge period to cathode line), P2 ... second period of driving (cathode line voltage maintaining period), P3 ... third period of driving (electron emission) Period), T0 ... start of one selection period (charge start), T1 ... first timing (charge end), T2 ... second timing (electron emission start), T3 ... third timing (threshold voltage measurement and one) End of selection period).
Claims (9)
前記第1電極駆動部が第1電極ラインを開放した状態で選択期間終了直前における第1電極ラインの電圧を測定する電圧測定部と、測定された電圧の値を記録する記録テーブルと、記録された電圧の値を基に第1電極ラインに印加する輝度信号に応じた電圧を補正する電圧補正部とを備えたことを特徴とする平板型画像表示装置。 A pixel disposed at an intersection of the first electrode line and the second electrode line, a first electrode driver for applying a voltage corresponding to a luminance signal to the first electrode line, and a selection voltage for the second electrode line In a flat-panel image display device having a second electrode driving unit that applies voltage and a stray capacitance that temporarily holds a voltage according to a luminance signal within a selection period based on the selection voltage,
A voltage measuring unit for measuring a voltage of the first electrode line immediately before the end of the selection period in a state where the first electrode driving unit opens the first electrode line; a recording table for recording a value of the measured voltage; And a voltage correction unit for correcting a voltage corresponding to a luminance signal applied to the first electrode line based on the value of the obtained voltage.
The flat panel display according to any one of claims 1 to 4, wherein a light emitting element having an organic light emitting layer between the first electrode and the second electrode is used.
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Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPWO2013008272A1 (en) * | 2011-07-12 | 2015-02-23 | パナソニック株式会社 | Display device and driving method of display device |
JPWO2013005257A1 (en) * | 2011-07-06 | 2015-02-23 | パナソニック株式会社 | Display device |
US9019323B2 (en) | 2010-07-02 | 2015-04-28 | Joled, Inc. | Display device and method for driving display device |
US9058772B2 (en) | 2010-01-13 | 2015-06-16 | Joled Inc. | Display device and driving method thereof |
US9105231B2 (en) | 2011-07-12 | 2015-08-11 | Joled Inc. | Display device |
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JP4909587B2 (en) * | 2005-12-28 | 2012-04-04 | Necディスプレイソリューションズ株式会社 | Image display device |
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JPH11231834A (en) | 1998-02-13 | 1999-08-27 | Pioneer Electron Corp | Luminescent display device and its driving method |
JP3293571B2 (en) | 1998-10-28 | 2002-06-17 | 日本電気株式会社 | Field emission type cold cathode device, driving method thereof, and image display device using the same |
JP2001209352A (en) * | 2000-01-24 | 2001-08-03 | Nec Corp | Electrostatic electron emission type display device and its driving method |
JP2002023688A (en) | 2000-07-04 | 2002-01-23 | Sharp Corp | Display device and driving method therefor |
JP2002055652A (en) | 2000-08-11 | 2002-02-20 | Sharp Corp | Driving method of display device |
US7009590B2 (en) * | 2001-05-15 | 2006-03-07 | Sharp Kabushiki Kaisha | Display apparatus and display method |
-
2005
- 2005-10-25 JP JP2005310014A patent/JP2007121430A/en active Pending
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- 2006-10-24 US US11/585,224 patent/US8089428B2/en not_active Expired - Fee Related
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US9058772B2 (en) | 2010-01-13 | 2015-06-16 | Joled Inc. | Display device and driving method thereof |
US9019323B2 (en) | 2010-07-02 | 2015-04-28 | Joled, Inc. | Display device and method for driving display device |
JP5788876B2 (en) * | 2010-07-02 | 2015-10-07 | 株式会社Joled | Display device and driving method thereof |
US9185751B2 (en) | 2011-06-16 | 2015-11-10 | Joled Inc. | Display device |
US9275572B2 (en) | 2011-06-23 | 2016-03-01 | Joled Inc. | Display device and display device driving method for causing reduction in power consumption |
JPWO2013005257A1 (en) * | 2011-07-06 | 2015-02-23 | パナソニック株式会社 | Display device |
JPWO2013008272A1 (en) * | 2011-07-12 | 2015-02-23 | パナソニック株式会社 | Display device and driving method of display device |
US9105231B2 (en) | 2011-07-12 | 2015-08-11 | Joled Inc. | Display device |
Also Published As
Publication number | Publication date |
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US20070145902A1 (en) | 2007-06-28 |
US8089428B2 (en) | 2012-01-03 |
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