JP2007189129A - Solid-state photographing device, and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solid-state photographing device and a manufacturing method thereof which so suppresses the generation of smears even in the peripheries of its photographing portion whereon oblique lights are made incident as to be able to improve its sensibility. <P>SOLUTION: With respect to a photographing portion of the photographing device, there are arranged in a two-dimensional way in a semiconductor substrate 22 light receivers 25 for so receiving lights as to subject them to photoelectric conversions, and a plurality of photographing picture elements 21 having vertical charge transferring portions 29 for transferring the charges stored in the respective light receiving portions 25. There are provided in the form of a grid in the semiconductor substrate 22 separating regions 44 for separating from each other the light receivers 25 of the photographing picture elements 21 adjacent to each other. In this photographing portion, the widths of the separating regions 44 are made different from each other correspondingly to the positions of the separating parts. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a solid-state imaging device and a manufacturing method thereof, and more particularly to a solid-state imaging device in which a light receiving portion is formed deep in a substrate in order to effectively photoelectrically convert incident light and a manufacturing method thereof.

  Hereinafter, a conventional solid-state imaging device (Patent Document 1) will be described with reference to FIGS.

  5 is a plan view showing a schematic configuration of the solid-state imaging device, FIG. 6 is a schematic diagram of incident light in the imaging unit of the VI-VI line of FIG. 5, and FIG. 7 is a structural sectional view of the pixel unit of the VII-VII line of FIG. It is.

  In FIG. 5, the solid-state imaging device includes an imaging unit 20 including a plurality of imaging pixels 21 and a vertical charge transfer unit 29 arranged in a grid, a horizontal charge transfer unit 12 and an AMP unit (amplifier) 11. Yes.

As shown in FIG. 7, the imaging pixel 21 has a first conductivity type, for example, a second conductivity type, that is, a p-type first semiconductor, which becomes an overflow barrier region, at a deep position of a semiconductor substrate 22 made of n-type silicon. A well region 23 is formed, and a high resistance region 24 having a high specific resistance, such as a p ⁻ region, a non-doped region, or an n ⁻ region, is formed on the first p-type semiconductor well region 23.

On the surface of the high resistance region 24, an n ⁺ semiconductor region 26 and a p ⁺ positive charge storage region 27 on the light receiving portions 25 in the matrix arrangement are formed.

The p ⁺ positive charge accumulation region 27 suppresses generation of dark current due to the interface state. The n ⁺ semiconductor region 26 becomes a so-called charge storage region.

n ⁺ a high resistance region 24 below the semiconductor region 26, n ⁺ semiconductor region 26 a first p-type semiconductor well region, a charge collection region to reach the so-called overflow barrier region 23, rather than the high resistance region 24 concentration A high n ⁻ semiconductor region 40 is formed.

  An n-type buried transfer channel region (hereinafter referred to as a charge transfer unit) 30 serving as a vertical charge transfer unit 29 across the read gate region 28 is located at a position corresponding to one side of each light receiving unit column of the high resistance region 24. It is formed. A second p-type semiconductor well region 31 is formed so as to surround the charge transfer portion 30.

  Further, a p-type channel stop region 32 that partitions each pixel including the light receiving portion 25 is formed.

  A transfer electrode 35 made of, for example, polycrystalline silicon is formed on the charge transfer unit 30, the channel stop region 32, and the readout gate unit 28 via a gate insulating film 34, and the charge transfer unit 30, the gate insulating film 34, and the transfer electrode are formed. A vertical charge transfer unit 29 having a CCD structure is constituted by 35.

  A light shielding film 37 made of Al, for example, is formed on the entire surface of the other part except the opening of the light receiving part 25 via the interlayer insulating film 36 covering the transfer electrode 35.

  Further, a so-called microlens 39 that collects incident light to the light receiving unit 25 corresponding to each light receiving unit 25 is formed through a planarizing film 38 and a color filter (not shown).

In particular, the n ⁺ semiconductor region 26 that is deeper than the n ⁺ semiconductor region 26 serving as the charge accumulation region of the light receiving portion 25 and shallower than the first p-type semiconductor well region 23 that functions as the overflow barrier region is newly added to the position in the n ⁻ semiconductor region 40. Two n-type semiconductor regions 41 are formed.

The n-type semiconductor region 41 is wider than the n ⁺ semiconductor region 26, and in this example, is formed so as to enter the vertical charge transfer portion 29 beyond the read gate region 28.

The concentration of the second n-type semiconductor region (hereinafter referred to as n semiconductor region) 41 is lower than that of the n ⁺ semiconductor region 26, for example, at least half the concentration of the n ⁺ semiconductor region 26, and in the n ⁻ semiconductor region 40. Make the density higher than the density.

Is because the not to the region that is the charge accumulated in the position of the n ⁺ semiconductor region 26 can not charge readout, density setting, such as the potential profile gradually rises toward the n semiconductor region 41 to the n ⁺ semiconductor region 26 It is to make it.

Here, the n semiconductor region 41 may be formed separately under the vertical charge transfer portion 29 and under the n ⁺ semiconductor region 26 and may be composed of portions having different concentrations, but in terms of potential, the n semiconductor region 41. Must be integrated.

  The depth of the n semiconductor region 41 is set from a position deep enough not to collapse the barrier of the second p-type semiconductor well region 31 serving as an overflow barrier of the vertical charge transfer unit 29, that is, the second p-type semiconductor well region 31. However, it may be anywhere from a depth deep enough not to crush the potential barrier to a depth before the first p-type semiconductor well region 23. However, if the saturation signal amount of the light receiving unit 25 is constant, the n semiconductor region 41 needs to be lighter in the deeper position.

The photoelectric conversion region of the light receiving unit 25 includes an n ⁺ semiconductor region 26, an n ⁻ semiconductor region 40 in front of the first p-type semiconductor well region 23 in a depletion layer extending downward from the substrate, and an n semiconductor. It consists of region 41.

  Further, a second p-type channel stop region 44 serving as an isolation region is formed from the second p-type semiconductor well region 31 to the first p-type channel stop region 32 at a depth substantially equal to that of the n semiconductor region 41. .

According to this structure, the n semiconductor region 41 is formed so as to enter under the vertical charge transfer unit 29 at a deep position below the n ⁺ semiconductor region 26, thereby extending the charge collection region 43 to below the vertical charge transfer unit 29. be able to. Thereby, the ratio of the obliquely incident light L passing through the charge collection region 41 of the light receiving unit 25 is increased, so that the discarded charges can be collected and the sensitivity can be improved.

  By the way, when the charge collection region 43 formed by the n semiconductor region 41 is extended to the lower part of the vertical charge transfer unit 29, a depletion layer extends to the adjacent light receiving unit 25 and blooming occurs.

  Therefore, by forming the second p-type channel stop region 44 from the second p-type semiconductor well region 31 to the first p-type channel stop region 32 at a depth substantially equal to that of the n semiconductor region 41, A potential barrier is formed to reliably prevent blooming.

With the configuration having the second p-type channel stop region 44, the n semiconductor region 41 can be greatly extended below the second p-type semiconductor well region 31, and the charge collection region 43 can be reliably connected to the limit. Can be increased. If the concentration of the second p-type channel stop region 44 is high, the n semiconductor region 41 can be extended to the vicinity of the p-type channel stop region 44.
JP 2001-185711 A

  However, in the conventional solid-state imaging device, there is a problem that smear characteristics deteriorate in the peripheral portion of the imaging unit where the oblique light L is likely to be incident on the substrate.

  That is, as shown in FIG. 6, in the imaging pixels 21a and 21c arranged in the peripheral part of the imaging unit, since the optical axis of the micro lens 39 is shifted in the light incident direction, the oblique light L is microscopic. The light is effectively condensed on the light receiving unit 25 by the lens 39.

  However, even when the light receiving portion 25 is formed deep in the depth direction as shown in FIG. 7, light entering obliquely is photoelectrically converted at a position outside the region where the light receiving portion 25 is formed. Thus, the photoelectrically converted signal charge may not be effectively accumulated in the light receiving unit 25. Further, a part of the light proceeds to the p impurity regions 23 and 44 and the silicon substrate 22 without being photoelectrically converted, and the electric charge is thrown away to the substrate.

  As described above, the method of forming the light receiving portion 25 deeply in the substrate is not an effective measure for the smear generation mode in which the photoelectric conversion is performed in the silicon substrate described above and flows into the charge transfer portion 30 particularly in the peripheral portion. In addition, there is a problem that the charge generation region is not wide enough and the charge is thrown away to the substrate.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a solid-state imaging device capable of suppressing the occurrence of smear and improving sensitivity even in the peripheral portion of the imaging unit where oblique light is incident. It is to provide a manufacturing method.

  The solid-state imaging device according to the present invention has a two-dimensional imaging pixel in which a light receiving unit that receives light and performs photoelectric conversion and a vertical charge transfer unit that transfers charges accumulated in each light receiving unit are provided in a semiconductor substrate. In an imaging unit in which separation regions for separating light receiving units of imaging pixels adjacent to each other are provided in a lattice shape, the width of the separation region varies depending on the position of each separation unit. And

  Specifically, the width of the separation region becomes narrower from the central part to the peripheral part in the imaging unit. Further, the width ratio of the separation region differs in the vertical direction and the horizontal direction as it goes from the central part to the peripheral part in the imaging unit.

  A method of manufacturing a solid-state imaging device according to the present invention includes a plurality of imaging pixels provided with a light receiving unit that receives light and performs photoelectric conversion in a silicon substrate, and a vertical charge transfer unit that transfers charges accumulated in each light receiving unit. Are two-dimensionally arranged, and in the imaging unit in which the separation regions for separating the light receiving portions of the adjacent imaging pixels are provided in a grid shape, the width of the separation region differs depending on the position of each separation unit A method for manufacturing a solid-state imaging device, the step of forming an inorganic film of silicon oxide or nitride on the surface of the silicon substrate, the step of forming a lower layer resist on the inorganic film, and the lower layer resist On top of the above, a step of forming an upper layer resist whose reactive ion etching is slower than that of the lower layer resist, and patterning this, and using the pattern made of the upper layer resist as a mask, And etching by reactive ion etching a layer resist, in order to form the isolation region, and a step of performing ion implantation with high implantation energy to specific locations of the silicon substrate.

  According to the solid-state imaging device and the manufacturing method thereof of the present invention, it is possible to suppress the occurrence of smear and improve the sensitivity even in the peripheral portion of the imaging unit where oblique light is incident.

  Hereinafter, a solid-state imaging device and a method for manufacturing the same according to an embodiment of the present invention will be described with reference to the drawings.

  1 and 3 show a cross-sectional configuration of the periphery of the imaging unit in the solid-state imaging device, and FIG. 2 shows a cross-sectional configuration of the central part of the imaging unit. In this embodiment, the present invention is applied to a CCD solid-state imaging device.

In the solid-state imaging device, a first p-type well region 23 serving as an overflow barrier region is formed at a deep position on a semiconductor substrate 22 made of n-type silicon. The light receiving unit 25 is a pixel, and a plurality of light receiving units 25 are arranged in a grid (matrix) as pixels. The light receiving portion 25 is composed of an n ⁺ type impurity region 26 and a p ⁺ type impurity region 27 thereon. The n ⁺ -type impurity region 26 is a charge storage region in which generated charges are mainly stored, and the p ⁺ -type impurity region 27 is a region that suppresses the generation of dark current due to the interface order. The n ⁻ impurity region 40 under the n ⁺ type impurity region 26 is a charge generation region where light is received and charges are mainly generated by photoelectric conversion.

An n-type charge transfer section 30 is formed at a position corresponding to one side of each light-receiving section row of the n ⁻ impurity region 40 with the readout gate section 28 interposed therebetween. A second p-type well region 31 is formed so as to surround the charge transfer unit 30. In addition, p-type channel stop regions 32 and 44 that partition each pixel including the light receiving unit 25 are formed.

  A transfer electrode 35 made of, for example, polycrystalline silicon is formed on the charge transfer unit 30, the channel stop region 32, and the read gate unit 28 via a gate insulating film 34. Further, a light shielding film 37 made of, for example, W is formed on the entire surface of the other part except the opening of the light receiving part 25 through the interlayer insulating film 36 that covers the transfer electrode 35.

  Furthermore, a so-called microlens 39 that collects incident light to each light receiving portion 25 through a planarizing film 38 and a color filter (not shown) is formed.

  In the above configuration, in the present embodiment, the first p-type channel stop region (hereinafter referred to as the separation region) 44 in the peripheral portion of the imaging unit is formed narrower than the central portion. The reason why such a structure is used will be described below.

  In general, in order to respond to further improvement in image quality, a solid-state imaging device needs to increase the array density by increasing the size of pixels and increase the resolution, and compensate for the sensitivity reduction associated therewith. When the pixels are downsized, the amount of incident light is reduced, and the sensitivity characteristics of the light receiving unit 25 of each pixel are lowered. Therefore, if the opening of the light shielding film 37 serving as the opening of the light receiving unit 25 is increased in the horizontal direction in order to improve sensitivity, smear due to light mixing into the vertical charge transfer unit 29 is likely to occur. Further, when the opening of the light shielding film 37 is increased in the vertical direction, the transfer electrode 35 is thinned and the resistance is increased, so that the charge transfer voltage becomes dull in the imaging unit.

  As described above, since there is a limit to increasing the opening of the light receiving unit in the horizontal direction and the vertical direction, a microlens 39 is provided above the light receiving unit 25 to improve the light collection efficiency on the light receiving unit 25. Has been made.

  Further, due to the reduction in the pixel size and the reduction in the size of the camera and the lens used, oblique light components are likely to be incident on the periphery of the imaging unit. The occurrence of smear has become noticeable.

  As one of countermeasures, magnification correction is performed at the time of drawing a photomask for forming a microlens, and the position of the microlens 39 is shifted with respect to the opening at the periphery of the image pickup unit to collect even oblique light at the center of the opening. Luminous structures have been used.

  However, since it is technically difficult to increase the light collection efficiency with the microlens 39 alone, in recent years, the light receiving unit 25 is provided in a conventional manner so that charges that are photoelectrically converted in a deep silicon substrate can be effectively extracted as signal charges. Techniques for forming deeper than those have been proposed.

The light receiving unit 25 is formed on the substrate surface portion of the n ⁺ -type impurity region 26 and the n ⁺ -type impurity region 26 for accumulating charges after the incident light is photoelectrically converted. A p ⁺ -type impurity region 27 for suppressing (dark current) is formed.

Further, a p-type well region 23 for forming an overflow barrier (OFB) is formed deep in the substrate below the light receiving portion 25, and the n ⁺ impurity region 26 for accumulating charges after photoelectric conversion of incident light and the above-mentioned The n ⁻ impurity region 40 is formed so as to connect to the p-type well region 23, and the depletion layer of the light receiving portion 25 is smoothly extended.

In this structure, the n ⁻ impurity region 40 is formed by ion implantation in multiple stages while changing the implantation energy.

As described above, in the solid-state imaging device according to the present embodiment, the incident light L is condensed on the light receiving unit 25 by the microlens 39 and the signal charge in an amount corresponding to the incident light amount photoelectrically converted by the light receiving unit 25 is generated. appear. Since this charge is accumulated for a certain period in the n ⁺ impurity region 26 in the light receiving section 25 and then read out as a charge, the n ⁺ impurity region can be effectively used without throwing away the charge generated by photoelectric conversion deep in the substrate. 26, the sensitivity can be improved.

  Further, the oblique light L is incident on the peripheral portions 21a and 21c of the imaging unit 20, but the first p-type channel stop region (separation region) 44 of the peripheral portions 21a and 21c is formed narrower than the central portion 21b. Thus, the charge generation region can be expanded. That is, the proportion of light passing through the charge generation region can be increased, more charges can be collected, and the sensitivity characteristics of the solid-state imaging device can be improved.

  Note that in the solid-state imaging device, the angle of incident light with respect to the normal of the substrate surface increases as the distance from the central portion 21b to the peripheral portions 21a and 21c of the imaging portion 20 increases, making it easier for oblique light to enter. Therefore, in the present embodiment, it is preferable that the separation region 44 is also formed so as to continuously decrease from the central portion 21b of the imaging unit 20 to the peripheral portions 21a and 21c.

Furthermore, in the present embodiment, the concentration of the isolation region 44 is generally determined by the overall potential depending on the depth of the first p-type semiconductor well region 23, the amount of impurities in the n ⁺ impurity region 26, and the pixel size. However, it is set to prevent potential blooming by forming a potential barrier.

  Next, an example of the method for manufacturing the solid-state imaging device in the present embodiment will be described.

As shown in FIGS. 1-3, the first p-type semiconductor well region 23 is formed in the semiconductor substrate 22, n on the p-type semiconductor well region 23 ^- charge transfer section 30 to the impurity region 40, a second p A type semiconductor well region 31 and p type channel stop regions 32 and 44 are formed.

  In order to control the photoelectric conversion region 40 by the width and position of the separation region 44, it is necessary to implant impurities into a deeper portion in a narrower region. For this purpose, it is necessary to form a thick photoresist layer in order to ensure sufficient ion blocking ability for high implantation energy. In this embodiment, a multilayer resist method including a plurality of resist layers is used.

  FIG. 4 shows an outline of the process flow for the two-layer resist. The lower resist 51 is coated with a thick film in order to ensure sufficient ion blocking ability for high implantation energy. If the lower layer resist 51 is not sufficiently crosslinked, the lower layer resist 51 may absorb the acid generated when the upper layer resist 52 is exposed to cause a pattern defect of the upper layer resist 52. It is. Since the upper resist 52 requires a resist capable of forming a fine pattern and having high etching resistance, for example, a Si-containing resist is applied.

After the upper resist 52 is exposed and developed, the surface of the upper resist 52 is changed to SiO ₂ by etching with oxygen plasma, and the lower resist is etched using the upper resist 52 as a mask. Thereby, a resist with a high aspect ratio is formed, and the isolation region 44 is formed with high implantation energy.

  Further, when etching the lower resist 51, specifically, etching with oxygen plasma, it is preferable to implant from above the protective film of the CVD inorganic film such as an oxide film or a nitride film so that the substrate is not affected by the plasma. desirable.

  In addition, pattern formation of a material that can be used as a hard mask in forming a base resist pattern by CVD, inorganic film such as polyimide, oxide film or nitride film and metal film is also considered, but it is difficult to finely process with polyimide, CVD inorganic films generally have a large film stress in the pulling direction, so cracks occur when the film thickness is increased.Metal films are difficult to form and peel off, and cause metal contamination due to the knock-on phenomenon, degrading the image quality of the image sensor. End up.

Next, the p ⁺ impurity region 27 of the light receiving portion 25 is formed, and further, the gate insulating film 34 and the transfer electrode 35 are formed. Since the subsequent steps are the same as usual, description thereof is omitted.

  As described above, according to the configuration of the present embodiment, it can be realized only by adding one process of the multilayer resist method to the conventional manufacturing process.

  Further, the charge generation region 40 can be extended to below the vertical charge transfer unit 29. As a result, even if the light L is incident obliquely through the microlens 39, the ratio of passing through the charge generation region 40 of the photodiode increases, so that charges that have been discarded in the past can be collected and the sensitivity can be improved.

  Further, in the above-described embodiment, the separation regions 44 are arranged in parallel in the horizontal direction. However, although not shown, the separation regions 44 are arranged in the vertical direction in the same manner, and the separation region 44 is arranged in the imaging unit 20. May be formed in a lattice shape. As a result, the rate at which the obliquely incident light L passes through the charge collection region 40 of the photodiode is further increased, and charges that have been discarded in the past can be collected, and the sensitivity can be further improved. The ratio of the width of the separation region 44 may be equal in the vertical direction and the horizontal direction, or may be different. That is, the width of the vertical and horizontal separation regions 44 formed in a grid pattern on the imaging unit 20 is continuously narrowed at the same rate from the central part 21b of the imaging unit 20 to the peripheral parts 21a and 21c. Alternatively, it may be narrowed continuously at different rates. For example, the ratio of the separation regions 44 arranged side by side in the horizontal direction narrowing toward the periphery is reduced, or the ratio of the separation regions 44 arranged in the vertical direction becoming narrow toward the periphery is decreased or vice versa. May be.

  Note that the solid-state imaging device of the present invention can be applied regardless of the size of pixels. Further, it is also suitable for a solid-state imaging device in which a depletion region of the light receiving unit is formed deeply and sensitivity is also provided in the near infrared region. Furthermore, the present invention is not limited to the above-described embodiment, and various other configurations can be taken without departing from the gist of the present invention.

  The solid-state imaging device of the present invention is useful for a color camera or the like that requires reduction in smear and sensitivity.

Sectional drawing of the peripheral part of the imaging part in the solid-state imaging device of embodiment of this invention Sectional drawing of the center part of the imaging part in the solid-state imaging device of embodiment of this invention Sectional drawing of the peripheral part of the imaging part in the solid-state imaging device of embodiment of this invention Schematic diagram of a two-layer resist process flow in an embodiment of the present invention Plan view showing schematic configuration of solid-state imaging device VI-VI cross section of Fig. 5 VII-VII sectional view of FIG.

Explanation of symbols

20 Image pickup unit 21 Image pickup pixel 22 Semiconductor substrate 25 Light receiving unit 29 Vertical charge transfer unit 44 Separation region

Claims (4)

  In a semiconductor substrate, a plurality of imaging pixels provided with a light receiving portion that receives light and performs photoelectric conversion and a vertical charge transfer portion that transfers charges accumulated in each light receiving portion are arranged two-dimensionally and adjacent to each other. A solid-state imaging device, wherein a separation region for separating a light receiving portion of an imaging pixel is provided in a lattice shape, and the width of the separation region varies depending on the position of each separation portion.   The solid-state imaging device according to claim 1, wherein the width of the separation region becomes narrower from the center to the periphery of the imaging unit.   2. The solid-state imaging device according to claim 1, wherein the ratio of the width of the separation region is different between the vertical direction and the horizontal direction as it goes from the central part to the peripheral part in the imaging unit. In a silicon substrate, a plurality of imaging pixels provided with a light receiving unit that receives light and performs photoelectric conversion and a vertical charge transfer unit that transfers charges accumulated in each light receiving unit are arranged two-dimensionally and adjacent to each other. In the imaging unit in which the separation regions for separating the light receiving units of the imaging pixels are provided in a lattice shape, the width of the separation region differs according to the position of each separation unit,
Forming an inorganic film of silicon oxide or nitride on the surface of the silicon substrate;
Forming a lower layer resist on the inorganic film;
On the lower resist, forming an upper resist that is slower in reactive ion etching than the lower resist, and further patterning this,
Etching the lower layer resist by reactive ion etching using the pattern made of the upper layer resist as a mask;
A method of manufacturing a solid-state imaging device, including a step of performing ion implantation with a high implantation energy in a specific portion of the silicon substrate to form the isolation region.

Images