JP2007181187A - Antenna and manufacturing method thereof, semiconductor device including antenna and manufacturing method thereof, and radio communication system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an antenna which reduces resistance, improves yield and further improves reliability. <P>SOLUTION: An antenna includes a first substrate, a first pattern, a second substrate, a second pattern, and an anisotropic conductive material. The first substrate has an insulating surface. The first pattern is formed over the insulating surface (first insulating surface) of the first substrate, and made of a conductive material. The second substrate is provided so as to face the surface over which the first pattern of the first substrate is formed and has an insulating surface (second insulating surface). The second pattern is formed over the insulating surface (second insulating surface) facing the first substrate, of the second substrate, and made of a conductive material. The anisotropic conductive material electrically connects the first pattern and the second pattern. The whole region of the first pattern overlaps with the second pattern with the anisotropic conductive material interposed therebetween. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an antenna and a manufacturing method thereof. In addition, the present invention relates to a semiconductor device including an antenna and a semiconductor integrated circuit electrically connected to the antenna, in which data is input and output by wireless communication via the antenna, and a manufacturing method thereof. Furthermore, the present invention relates to a wireless communication system having the semiconductor device and a reader / writer for inputting and outputting data by wireless communication.

  Attention has been focused on an individual recognition technique in which an ID (individual identification number) is given to an individual object, thereby clarifying the history of the object, which is useful for production, management, and the like. Among them, an RFID using a semiconductor device that inputs and outputs data by wireless communication such as a wireless tag (also referred to as an IC tag, IC chip, RF (Radio Frequency) tag, RFID, RFID tag, electronic tag, or transponder) Radio Frequency Identification) technology has begun to be used. A semiconductor device that inputs and outputs data by wireless communication includes an antenna and a semiconductor integrated circuit electrically connected to the antenna.

The antenna can be formed on a film such as plastic by a screen printing method using a conductive paste. An antenna in which the surface of an antenna formed by a screen printing method is plated has been proposed (see Patent Document 1). In addition, a coiled antenna is formed on each of the plurality of substrates by a screen printing method, the coiled antennas of the plurality of substrates are arranged so as to overlap each other, and are electrically connected in series. In this way, a configuration of a coiled antenna having a large number of turns has been proposed (see Patent Document 2).
JP 2000-113147 A JP 2002-183696 A

  An antenna formed by a screen printing method is difficult to increase the film thickness, and it is difficult to reduce the resistance. It is also difficult to increase the yield. Note that the method of plating the antenna surface is costly because of the additional steps. There is also a limit to increasing the film thickness by plating. In a configuration in which coiled antennas on a plurality of substrates are arranged so as to overlap each other and are electrically connected in series, it is difficult to reduce the resistance value of the antenna. This is because a coiled antenna having a large number of windings can be obtained, but the configuration is not such that the cross-sectional area of the wiring constituting the antenna is increased. Further, when one of the plurality of coiled antennas is disconnected, the antenna does not function normally.

  As described above, it is difficult for the conventional antenna to have a low resistance and to increase the yield. Therefore, a conventional semiconductor device that uses the antenna to input and output data by wireless communication has had difficulty in increasing the communication distance, reducing the cost, and improving the reliability.

  In view of the above circumstances, it is an object to provide an antenna with low resistance and high yield and a manufacturing method thereof. It is another object of the present invention to provide a semiconductor device with a long communication distance and high reliability using the antenna and a manufacturing method thereof.

  The antenna of the present invention includes a first substrate, a first pattern, a second substrate, a second pattern, and an anisotropic conductive material. The first substrate has an insulating surface. The first pattern is formed on an insulating surface (hereinafter also referred to as a first insulating surface) of the first substrate, and is made of a conductive material. The second substrate is provided to face the surface of the first substrate on which the first pattern is formed, and has an insulating surface (hereinafter also referred to as a second insulating surface). The second pattern is formed on the insulating surface (second insulating surface) facing the first substrate in the second substrate, and is made of a conductive material. The anisotropic conductive material is provided between the first pattern and the second pattern, and electrically connects the first pattern and the second pattern. In the first pattern and the second pattern, when one of the first pattern and the second pattern is disconnected (including a case where a part is missing), the other and the portion where the anisotropic conductive material is disconnected Are arranged so as to be electrically connected. For example, the first pattern and the second pattern are electrically connected via an anisotropic conductive material at any two points other than an electrode for connecting to a semiconductor integrated circuit or the like. Further, for example, the first pattern and the second pattern have the same shape and are arranged to overlap each other. For example, all the regions on the first pattern overlap with the second pattern via the anisotropic conductive material. Note that all the regions on the second pattern may overlap the first pattern through an anisotropic conductive material. Furthermore, the anisotropic conductive material may be disposed so as to cover the entire first insulating surface or the entire second insulating surface.

  In addition, the present invention is not limited to an antenna, and can be applied to wiring having an arbitrary shape.

  The present invention may be a semiconductor device that includes the antenna configured as described above and a semiconductor integrated circuit electrically connected to the antenna, and that receives and outputs data by wireless communication via the antenna. Note that the semiconductor integrated circuit is electrically connected to the antenna through a contact hole that passes through the first substrate and reaches the first pattern, or a contact hole that passes through the second substrate and reaches the second pattern. May be.

  The present invention may be a wireless communication system having the semiconductor device and a reader / writer that inputs and outputs data to and from the semiconductor device.

  In the method for manufacturing an antenna of the present invention, a first pattern made of a conductive material is formed on an insulating surface (first insulating surface) of a first substrate. A second pattern made of a conductive material is formed on the insulating surface (second insulating surface) of the second substrate. An anisotropic conductive material is formed so as to cover the entire first pattern. The first substrate and the second pattern are electrically connected via the anisotropic conductive material, and all regions on the first pattern overlap the second pattern. A second substrate is attached. The second pattern has an insulating surface (second surface) that is symmetrical with the first pattern as viewed from a direction perpendicular to the insulating surface (first insulating surface) of the first substrate. May be formed on the insulating surface). That is, the second pattern is formed so that the first pattern viewed from the direction perpendicular to the first insulating surface and the second pattern viewed from the direction perpendicular to the second insulating surface are axisymmetric. May be. Furthermore, the anisotropic conductive material may be formed so as to cover the entire first pattern and the entire insulating surface of the first substrate.

  Further, the present invention is not limited to a method for manufacturing an antenna, and can be applied to a method for manufacturing a wiring having an arbitrary shape.

  In the method for manufacturing a semiconductor device of the present invention, a first pattern made of a conductive material is formed on an insulating surface (first insulating surface) of a first substrate. A second pattern made of a conductive material is formed on the insulating surface (second insulating surface) of the second substrate. An anisotropic conductive material is formed so as to cover the entire first pattern. The first substrate and the second pattern are electrically connected via the anisotropic conductive material, and all regions on the first pattern overlap the second pattern. A second substrate is attached. A semiconductor integrated circuit is provided so as to be electrically connected to the first pattern or the second pattern. The second pattern has an insulating surface (second surface) that is symmetrical with the first pattern as viewed from a direction perpendicular to the insulating surface (first insulating surface) of the first substrate. May be formed on the insulating surface). That is, the second pattern is formed so that the first pattern viewed from the direction perpendicular to the first insulating surface and the second pattern viewed from the direction perpendicular to the second insulating surface are axisymmetric. May be. Furthermore, the anisotropic conductive material may be formed so as to cover the entire first pattern and the entire insulating surface of the first substrate.

  In the method for manufacturing a semiconductor device of the present invention, a first pattern made of a conductive material is formed on an insulating surface (first insulating surface) of a first substrate. A second pattern made of a conductive material is formed on the insulating surface (second insulating surface) of the second substrate. A contact hole that penetrates the first substrate and reaches the first pattern, or a contact hole that penetrates the second substrate and reaches the second pattern is formed. An anisotropic conductive material is formed so as to cover the entire first pattern. The first substrate and the second pattern are electrically connected via the anisotropic conductive material, and all regions on the first pattern overlap the second pattern. A second substrate is attached. A semiconductor integrated circuit is provided so as to be electrically connected to the first pattern or the second pattern in the contact hole. The second pattern has an insulating surface (second surface) that is symmetrical with the first pattern as viewed from a direction perpendicular to the insulating surface (first insulating surface) of the first substrate. May be formed on the insulating surface). That is, the second pattern is formed so that the first pattern viewed from the direction perpendicular to the first insulating surface and the second pattern viewed from the direction perpendicular to the second insulating surface are axisymmetric. May be. Furthermore, the anisotropic conductive material may be formed so as to cover the entire first pattern and the entire insulating surface of the first substrate.

  In the method for manufacturing an antenna of the present invention and the method for manufacturing a semiconductor device of the present invention, the first pattern and the second pattern may be formed by a droplet discharge method or a printing method. The droplet discharge method refers to a method of forming a predetermined pattern by discharging droplets containing a predetermined composition from pores. The droplet discharge method is also called an inkjet method depending on the method. The printing method indicates a screen printing method or an offset printing method.

  In the antenna of the present invention, all the regions on the first pattern overlap with the second pattern through the anisotropic conductive material. Therefore, the antenna has a thickness that is substantially the sum of the thickness of the first pattern and the thickness of the second pattern. Thus, the thickness of the antenna can be substantially increased and the resistance of the antenna can be reduced. Even if the first pattern is disconnected, the disconnection can be electrically connected by the second pattern, so that the probability that the antenna is disconnected can be reduced. Therefore, the antenna yield can be improved.

  In addition, all the regions on the first pattern overlap with the second pattern through the anisotropic conductive material, and all the regions on the second pattern pass through the anisotropic conductive material. It can also be set as the structure which overlaps. In this configuration, patterns having the same shape overlap with each other through an anisotropic conductive material. Therefore, even if one of the first pattern and the second pattern is disconnected, the disconnection can be electrically connected by the other pattern, so that the probability that the antenna is disconnected can be further reduced. . Thus, the antenna yield can be further improved.

  Further, the anisotropic conductive material may be arranged to cover the entire first insulating surface or the entire second insulating surface. Thus, an antenna can be provided in a region surrounded by the first substrate, the second substrate, and the anisotropic conductive material. Therefore, since the antenna is not exposed to the outside, the antenna can be protected from an external impact. In addition, it is possible to prevent alteration such as corrosion of the antenna exposed to the outside air. Thus, deterioration of the antenna can be reduced and the reliability of the antenna can be increased.

  The antenna of the present invention has low resistance, high yield, and high reliability. Therefore, by applying the present invention to a semiconductor device that includes the antenna and a semiconductor integrated circuit electrically connected to the antenna and receives and outputs data by wireless communication via the antenna, The communication distance can be increased, the cost can be reduced, and the reliability can be further improved.

  The semiconductor integrated circuit is configured to be electrically connected to the antenna through a contact hole that passes through the first substrate and reaches the first pattern, or a contact hole that passes through the second substrate and reaches the second pattern. It can be. In this manner, the antenna and the semiconductor integrated circuit can be electrically connected while suppressing the exposure of the antenna to the outside. Therefore, the reliability of the semiconductor device can be further improved.

  The semiconductor device of the present invention can increase the communication distance, reduce the cost, and further improve the reliability. Therefore, the application range of the wireless communication system can be expanded by applying the present invention to a wireless communication system using the semiconductor device.

  In the method for manufacturing an antenna of the present invention, the first pattern and the second pattern are electrically connected through an anisotropic conductive material, and all the regions on the first pattern are connected to the second pattern. The first substrate and the second substrate are attached to overlap each other. Therefore, the manufactured antenna is substantially an antenna having a thickness obtained by adding up the thickness of the first pattern and the thickness of the second pattern. In this manner, an antenna with a small resistance can be manufactured by substantially increasing the thickness of the antenna. Even if the first pattern is disconnected, the disconnection can be electrically connected by the second pattern, so that the probability that the antenna is disconnected can be reduced. Therefore, the antenna yield can be improved.

  In addition, the second pattern is symmetrical with the first pattern when viewed from the direction perpendicular to the insulating surface (first insulating surface) of the first substrate. May be formed on the insulating surface). In this manner, an antenna having a configuration in which patterns having the same shape overlap with each other with an anisotropic conductive material can be formed. Therefore, even if one of the first pattern and the second pattern is disconnected, the disconnection can be electrically connected by the other pattern, so that the probability that the antenna is disconnected can be further reduced. . Thus, the antenna yield can be further improved.

  Furthermore, the anisotropic conductive material may be formed so as to cover the entire first pattern and the entire insulating surface of the first substrate. Thus, the antenna can be provided in a region surrounded by the first substrate, the second substrate, and the anisotropic conductive material. Therefore, since the antenna is not exposed to the outside, the antenna can be protected from an external impact. In addition, it is possible to prevent alteration such as corrosion of the antenna exposed to the outside air. Thus, deterioration of the antenna can be reduced and the reliability of the antenna can be increased.

  In particular, in an antenna formed by a droplet discharge method or a printing method, it is difficult to increase the film thickness to lower the resistance and increase the yield. In the method for manufacturing an antenna of the present invention, even when the first pattern and the second pattern are formed by a droplet discharge method or a printing method, the first pattern and the second pattern are used together as an antenna. The resistance of the antenna can be reduced, and the yield of the antenna can be improved.

  According to the method for manufacturing an antenna of the present invention, an antenna with low resistance can be manufactured, yield can be increased, and reliability can be increased. Therefore, by applying the present invention to a method for manufacturing a semiconductor device which is formed by electrically connecting a semiconductor integrated circuit to the antenna and in which data is input and output by wireless communication via the antenna, communication of the semiconductor device The distance can be increased, the cost can be reduced, and the reliability can be further increased.

  The semiconductor integrated circuit forms a contact hole that penetrates the first substrate and reaches the first pattern, or a contact hole that penetrates the second substrate and reaches the second pattern, and the first pattern is formed in the contact hole. Alternatively, it can be provided so as to be electrically connected to the second pattern. In this manner, the antenna and the semiconductor integrated circuit can be electrically connected while suppressing the exposure of the antenna to the outside. Therefore, the reliability of the semiconductor device can be further improved.

  Embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that modes and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments below. Note that in the structures of the present invention described below, the same reference numeral is used in different drawings. Further, in the present invention, being connected is synonymous with being electrically connected. Therefore, another element or the like may be disposed between them.

(Embodiment 1)
The configuration of the antenna of the present invention will be described. The configuration of the antenna is shown in FIG. FIG. 1A is a perspective view of an antenna. FIG. 1B is a cross-sectional view taken along a to a ′ in FIG. FIG. 1C is an enlarged view of a region 109 in FIG. Note that the same portions in FIGS. 1A to 1C are denoted by the same reference numerals. The antenna 100 includes a first substrate 101, a first pattern 102, a second substrate 103, a second pattern 104, and an anisotropic conductive material 105. The first substrate 101 has a first insulating surface 106. The first pattern is formed on the first insulating surface 106 and is made of a conductive material. The second substrate 103 is provided to face the surface of the first substrate 101 where the first pattern 102 is formed, and has a second insulating surface 107. The second pattern 104 is formed on the second insulating surface 107 and is made of a conductive material. The anisotropic conductive material 105 electrically connects the first pattern 102 and the second pattern 104. All regions on the first pattern 102 overlap with the second pattern 104 with the anisotropic conductive material 105 interposed therebetween. Further, when observed from a direction perpendicular to the first insulating surface 106 and the second insulating surface 107, all the regions on the second pattern overlap the first pattern through the anisotropic conductive material. The anisotropic conductive material 105 is disposed so as to cover the entire first insulating surface 106 and the entire second insulating surface 107.

  The conductive material constituting the first pattern 102 and the conductive material constituting the second pattern 104 may be the same or different. As a conductive material of the first pattern 102 or the second pattern 104, a material containing Ag, Au, Al, Cu, Zn, Sn, Ni, Cr, Fe, Co, or Ti can be used.

  The first substrate 101 and the second substrate 103 may have flexibility. The first substrate 101 and the second substrate 103 may be made of plastic. The first substrate 101 and the second substrate 103 may be made of the same material or different materials. The first substrate 101 and the second substrate 103 are made of polyethylene terephthalate, polyethersulfone, polyethylene naphthalate, polycarbonate, nylon, polyetheretherketone, polysulfone, polyetherimide, polyarylate, polybutylene terephthalate, or polyimide. It may be.

  The anisotropic conductive material 105 has conductivity in a direction perpendicular to the first insulating surface 106 and the second insulating surface 107, and has an insulating property in a parallel direction. As the anisotropic conductive material 105, a material obtained by thermally curing an anisotropic conductive paste (ACP: Anisotropic Conductive Paste) or a material obtained by thermally curing an anisotropic conductive film (ACF: Anisotropic Conductive Film) is used. it can. An anisotropic conductive paste has a structure in which particles having a conductive surface (hereinafter referred to as conductive particles) are dispersed in a layer called a binder layer whose main component is an adhesive. The anisotropic conductive film has a structure in which particles having a conductive surface (hereinafter referred to as conductive particles) are dispersed in a thermosetting or thermoplastic resin film. In FIG. 1, conductive particles 108 included in the anisotropic conductive material 105 are shown. Accordingly, the first substrate 101 and the second substrate 103 are bonded to each other at the same time as the conduction between the first pattern 102 and the second pattern 104 is ensured by using an anisotropic conductive paste or an anisotropic conductive film. can do.

  When an anisotropic conductive paste or an anisotropic conductive film is used as the anisotropic conductive material 105, the particle size of the conductive particles 108 in the anisotropic conductive material 105, the first pattern 102, and the second pattern The shape of the pattern 104 can be determined so as to satisfy a predetermined relationship. For example, consider a case where the first pattern 102 and the second pattern 104 are coiled. In order to prevent the first pattern 102 from being short-circuited, it is necessary to determine the particle size of the conductive particles 108 and the interval between the wirings of the first pattern 102. Further, it is necessary to determine the particle size of the conductive particles 108 and the interval between the wirings of the second pattern 104 so that the second pattern 104 is not short-circuited. The particle size of the conductive particles 108 and each pattern are configured so that the particle size of the conductive particles 108 is smaller than at least the wiring interval of the first pattern 102 and the wiring interval of the second pattern 102. It is necessary to determine the wiring interval.

  In FIG. 1, the first insulating surface 106 and the second insulating surface 107 have the same shape, but the present invention is not limited to this. One of the first insulating surface 106 and the second insulating surface 107 may be larger than the other. Although an example in which the anisotropic conductive material 105 is disposed so as to cover the entire first insulating surface 106 and the entire second insulating surface 107 is shown, the present invention is not limited thereto. The anisotropic conductive material 105 may be disposed so as to cover the entire first insulating surface 106 or the entire second insulating surface 107.

  Further, although FIG. 1 shows an example in which the first pattern 102 and the second pattern 104 are formed in a rectangular coil shape with three windings, the present invention is not limited to this. The first pattern 102 and the second pattern 104 can have various shapes. The first pattern 102 and the second pattern 104 can be coiled with one winding, or can be coiled with an arbitrary number of windings. Further, the first pattern 102 and the second pattern 104 may have a triangular coil shape, a circular coil shape, or a polygonal coil shape. Further, FIG. 1A shows a configuration in which all corners of the coiled first pattern 102 and the second pattern 104 are about 90 °, but the present invention is not limited to this. In the triangular coil shape, the square coil shape, or the polygonal coil shape, the corner may have a rounded shape or a chamfered shape. Further, the first pattern 102 and the second pattern 104 are not limited to a coil shape, and may be a linear shape. For example, the antenna 100 may be a dipole antenna by making each of the first pattern 102 and the second pattern 104 a pair of linear patterns.

  An example in which the antenna 100 is a dipole antenna is shown in FIG. In addition, the same part as FIG. 1 is shown using the same code | symbol, and description is abbreviate | omitted.

  In the antenna 100 of the present invention, all regions on the first pattern 102 overlap with the second pattern 104 with the anisotropic conductive material 105 interposed therebetween. Therefore, the antenna 100 is substantially an antenna having a thickness obtained by adding up the thickness of the first pattern 102 and the thickness of the second pattern 104. Thus, the thickness of the antenna 100 can be substantially increased and the resistance of the antenna 100 can be reduced.

  Further, all the regions on the first pattern 102 overlap with the second pattern 104 through the anisotropic conductive material 105, and all the regions on the second pattern 104 through the anisotropic conductive material. The first pattern 102 is overlapped. That is, the first pattern 102 and the second pattern 104 have the same shape, and overlap each other with the anisotropic conductive material 105 interposed therebetween. Therefore, even if one pattern of the first pattern 102 and the second pattern 104 is disconnected, the disconnection can be electrically connected by the other pattern, so that the probability that the entire antenna 100 is disconnected is reduced. be able to. Thus, the yield of the antenna 100 can be improved.

  The anisotropic conductive material 105 is formed so as to cover the entire first pattern 102 and the entire first insulating surface 106 of the first substrate 101. In this manner, the antenna 100 can be provided in a region surrounded by the first substrate 101, the second substrate 103, and the anisotropic conductive material 105. Since the antenna 100 is not exposed to the outside, the antenna 100 can be protected from an external impact. Further, it is possible to prevent the antenna 100 from being altered such as being corroded by exposure to the outside air. Thus, deterioration of the antenna 100 can be reduced and the reliability of the antenna can be increased.

  As described above, an antenna with low resistance, high yield, and high reliability can be obtained.

(Embodiment 2)
A method for manufacturing the antenna of the present invention will be described. FIG. 2 is used for the description. In addition, the same part as FIG. 1 is shown using the same code | symbol, and description is abbreviate | omitted.

  As shown in FIG. 2A, a first pattern 102 made of a conductive material is formed over the first insulating surface 106 of the first substrate 101. The first pattern 102 can be formed by a droplet discharge method or a printing method. Note that the first pattern 102 may be formed by etching a conductive film using photolithography or the like. Next, an anisotropic conductive material 105 is formed so as to cover the entire first pattern 102. In FIG. 2A, the conductive particles 108 in the anisotropic conductive material 105 are not shown. FIG. 2A illustrates an example in which the anisotropic conductive material 105 is formed so as to cover the entire first insulating surface 106. 2A. FIG. 2C shows a cross-sectional view of a to a ′ in FIG.

  As shown in FIG. 2B, a second pattern 104 made of a conductive material is formed over the second insulating surface 107 of the second substrate 103. 2B, a cross-sectional view of b to b ′ is shown in FIG. The second insulating surface 107 of the second substrate 103 is symmetric with the first pattern 102 when viewed from the direction perpendicular to the first insulating surface 106 of the first substrate 101. Form on top. That is, the lines c to c ′ in FIG. 2 are straight lines extending in a direction parallel to the first insulating surface 106, and the first pattern 102 and the second pattern 104 having the shape shown in FIG. Or symmetric with respect to the line c ′. The second pattern 104 can be formed by a droplet discharge method or a printing method. Note that the second pattern 104 may be formed by etching a conductive film using photolithography or the like.

  After that, the first substrate 101 and the second insulating surface 106 and the second insulating surface 107 face each other, and all the regions on the first pattern 102 overlap the second pattern 104. The substrate 103 is overlaid. Then, by thermocompression bonding, the first pattern 102 and the second pattern 104 are electrically connected through the anisotropic conductive material 105, and at the same time, the first substrate 101 and the second substrate 103 are attached. Combine. Thus, the antenna 100 as illustrated in FIG. 1A can be manufactured.

  In the method for manufacturing an antenna of the present invention, all regions on the first pattern 102 overlap with the second pattern 104 with the anisotropic conductive material 105 interposed therebetween. Therefore, the antenna 100 is substantially an antenna having a thickness obtained by adding up the thickness of the first pattern 102 and the thickness of the second pattern 104. Thus, the thickness of the antenna 100 can be substantially increased and the resistance of the antenna 100 can be reduced.

  The second pattern 104 is formed on the second insulating surface 107 so as to be line-symmetric with the first pattern 102 when viewed from the direction perpendicular to the first insulating surface 106. Therefore, the antenna 100 having a configuration in which patterns having the same shape overlap with each other with the anisotropic conductive material 105 is obtained. Therefore, even if one of the first pattern 102 and the second pattern 104 is disconnected, the disconnection can be electrically connected by the other pattern, so that the probability that the entire antenna 100 is disconnected is reduced. be able to. Thus, the yield of the antenna 100 can be improved.

  Further, the anisotropic conductive material 105 is formed so as to cover the entire first pattern 102 and the entire first insulating surface 106. In this manner, the antenna 100 can be provided in a region surrounded by the first substrate 101, the second substrate 103, and the anisotropic conductive material 105. Therefore, since the antenna 100 is not exposed to the outside, the antenna can be protected from an external impact. Further, it is possible to prevent the antenna 100 from being altered such as being corroded by exposure to the outside air. Thus, deterioration of the antenna 100 can be reduced and the reliability of the antenna 100 can be increased.

  In particular, in an antenna formed by a droplet discharge method or a printing method, it is difficult to increase the film thickness to lower the resistance and increase the yield. In the method for manufacturing an antenna of the present invention, even when the first pattern 102 and the second pattern 104 are formed by a droplet discharge method or a printing method, the antenna is formed by combining the first pattern 102 and the second pattern 104. Since it is used as 100, the resistance of the antenna 100 can be reduced, and the yield of the antenna can be improved.

  As described above, an antenna with low resistance, high yield, and high reliability can be obtained.

  This embodiment mode can be implemented by being freely combined with Embodiment Mode 1.

(Embodiment 3)
The structure of the semiconductor device of the present invention will be described. FIG. 3 is used for the description. 1 and 2 are denoted by the same reference numerals, and description thereof is omitted.

  FIG. 3A is a perspective view of the semiconductor device. 3B and 3C are cross-sectional views of a to a ′ in FIG. Note that the same portions in FIGS. 1A to 1C are denoted by the same reference numerals. The semiconductor device 300 includes an antenna 100 and a semiconductor integrated circuit 133 that is electrically connected to the antenna 100. The semiconductor device 300 transmits and receives wireless signals by the antenna 100, and inputs and outputs data.

  As shown in FIG. 3B, a pair of contact holes 130 penetrating the second substrate 103 and reaching the second pattern 104 is provided. In the configuration of FIG. 3B, the contact hole 130 does not penetrate the second pattern 104. An electrode 131 is provided in the contact hole 130 so as to be connected to the second pattern 104. The pair of electrodes 134 and the electrode 131 of the semiconductor integrated circuit 133 are electrically connected by the anisotropic conductive material 132 provided over the electrode 131. In FIG. 3, conductive particles 135 included in the anisotropic conductive material 132 are shown. Thus, one of the pair of electrodes 134 of the semiconductor integrated circuit 133 is electrically connected to one end of the antenna 100, and the other of the pair of electrodes 134 of the semiconductor integrated circuit 133 is electrically connected to the other end of the antenna 100. Note that the pair of electrodes 134 and the electrode 131 of the semiconductor integrated circuit 133 may be electrically connected by a conductive adhesive such as silver paste, copper paste, or carbon paste, or may be electrically connected by solder. It may be.

  Note that as shown in FIG. 3C, the pair of contact holes 130 may penetrate the second substrate 103 and penetrate the second pattern 104. Further, the pair of contact holes 130 may be formed so as to penetrate the second substrate 103 and remove a part of the second pattern 104.

  As shown in FIG. 3B, in the configuration in which the contact hole 130 is formed up to the second pattern 104 (configuration that does not penetrate the second pattern 104), the second portion is also formed in the portion where the contact hole 130 is formed. There is a pattern 104. Therefore, the first pattern 102 and the second pattern 104 can be more reliably electrically connected in the portion where the contact hole 130 is formed. On the other hand, as shown in FIG. 3C, the contact hole 130 penetrates the second pattern 104, whereby the adhesion between the second pattern 104 and the electrode 131 can be improved. Therefore, the electrode 131 and the second pattern 104 can be electrically connected more reliably. Note that FIG. 3 illustrates a structure in which the contact hole 130 is formed in the second substrate 103, but the present invention is not limited to this. The contact hole 130 may be configured to penetrate the first substrate 101 and reach the first pattern 102.

  Since the semiconductor device 300 of the present invention uses the antenna 100 with low resistance, high yield, and high reliability, the communication distance can be long, the cost can be reduced, and the reliability can be increased. Further, the semiconductor integrated circuit 133 is formed in the contact hole 130 that penetrates the first substrate 101 and reaches the first pattern 102, or the contact hole 130 that penetrates the second substrate 103 and reaches the second pattern 104. The electrode 131 is electrically connected to the antenna 100. In this manner, the antenna 100 and the semiconductor integrated circuit 133 can be electrically connected while suppressing the exposure of the antenna 100 to the outside. Therefore, the reliability of the semiconductor device 300 can be further improved.

  As described above, a semiconductor device having a long communication distance, low cost, and high reliability can be obtained.

  This embodiment mode can be implemented by being freely combined with Embodiment Mode 1 or Embodiment Mode 2.

(Embodiment 4)
A method for manufacturing a semiconductor device of the present invention will be described. 4 and 5 are used for the description. 1 to 3 are denoted by the same reference numerals, and description thereof is omitted.

  As shown in FIG. 4A, a first pattern 102 made of a conductive material is formed over the first insulating surface 106 of the first substrate 101. Further, an anisotropic conductive material 105 is formed so as to cover the entire first pattern 102. In FIG. 4A, the conductive particles 108 in the anisotropic conductive material 105 are not shown. 4A. FIG. 4C shows a cross-sectional view of a to a ′ in FIG.

  As shown in FIG. 4B, a second pattern 104 made of a conductive material is formed over the second insulating surface 107 of the second substrate 103. 4B, a cross-sectional view of b to b ′ is shown in FIG. The second insulating surface 107 of the second substrate 103 is symmetric with the first pattern 102 when viewed from the direction perpendicular to the first insulating surface 106 of the first substrate 101. Form on top. That is, the first pattern 102 and the second pattern 104 are symmetrical with respect to the lines c to c ′ in FIG. As shown in FIG. 4D, a pair of contact holes 130 that penetrate the second substrate 103 and reach the second pattern 104 is formed. An enlarged view of the peripheral portion 401 of the contact hole 130 is shown in FIG. In FIG. 4E, the contact hole 130 is formed so as to penetrate the second substrate 103 and reach the second pattern 104. However, as shown in FIG. 4F, the contact hole 130 may be formed so as to penetrate the second substrate 103 and penetrate the second pattern 104, or may penetrate the second substrate 103. Alternatively, a part of the second pattern 104 may be removed. The contact hole 130 may be mechanically formed using a cutter, a knife, or the like, or a laser may be used. When the contact hole 130 is formed so as to penetrate the second substrate 103 and the second pattern 104, a cutter, a knife, or the like can be used. When the contact hole 130 is formed so as to penetrate the second substrate 103 to the second pattern 104 or to penetrate the second substrate 103 and remove a part of the second pattern 104, a laser is used. Can be used.

  As shown in FIG. 5A, the first insulating surface 106 and the second insulating surface 107 face each other, and all regions on the first pattern 102 overlap the second pattern 104. The first substrate 101 and the second substrate 103 are overlapped.

  Next, as shown in FIG. 5B, the first substrate 102 and the second pattern 104 are electrically connected to each other through the anisotropic conductive material 105 by thermocompression bonding, and at the same time, the first substrate. 101 and the second substrate 103 are attached to each other. Next, a pair of electrodes 131 is provided so as to be connected to the second pattern 104 in the contact hole 130.

  Next, as illustrated in FIG. 5C, an anisotropic conductive material 132 is provided over the pair of electrodes 134 included in the semiconductor integrated circuit 133. Note that the anisotropic conductive material 132 may be provided over the electrode 131.

  Next, as illustrated in FIG. 5D, the pair of electrodes 134 and the electrode 131 of the semiconductor integrated circuit 133 are disposed so as to overlap with each other with an anisotropic conductive material 132 interposed therebetween.

  After that, as shown in FIG. 5E, the pair of electrodes 134 and the electrode 131 of the semiconductor integrated circuit 133 are electrically connected by thermocompression bonding. Thus, one of the pair of electrodes 134 of the semiconductor integrated circuit 133 is electrically connected to one end of the antenna 100, and the other of the pair of electrodes 134 of the semiconductor integrated circuit 133 is electrically connected to the other end of the antenna 100. Note that the pair of electrodes 134 and the electrode 131 of the semiconductor integrated circuit 133 may be electrically connected by a conductive adhesive such as silver paste, copper paste, or carbon paste, or may be electrically connected by solder. Good. Thus, the semiconductor device 300 of the present invention is completed.

  According to the method for manufacturing a semiconductor device of the present invention, the antenna 100 with low resistance, high yield, and high reliability can be obtained. Therefore, the communication distance of the semiconductor device can be increased, the cost can be reduced, and the reliability can be increased. . Further, the semiconductor integrated circuit 133 is electrically connected to the antenna 100 by an electrode 131 formed in the contact hole 130 that penetrates the second substrate 103 and reaches the second pattern 104. In this manner, the antenna 100 and the semiconductor integrated circuit 133 can be electrically connected while suppressing the exposure of the antenna 100 to the outside. Therefore, the reliability of the semiconductor device 300 can be further improved.

  As described above, a semiconductor device having a long communication distance, low cost, and high reliability can be obtained.

  This embodiment mode can be implemented freely combining with Embodiment Modes 1 to 3.

  An example of actually manufacturing the antenna of the present invention will be described. FIG. 6 is used for the description. 1 to 5 are denoted by the same reference numerals, and description thereof is omitted.

  As shown in FIG. 6A, a first pattern 102 made of a conductive material was formed over the first insulating surface 106 of the first substrate 101. A second pattern 104 made of a conductive material was formed over the second insulating surface 107 of the second substrate 103. The second insulating surface 107 of the second substrate 103 is symmetric with the first pattern 102 when viewed from the direction perpendicular to the first insulating surface 106 of the first substrate 101. Formed on top. That is, the shape is symmetric with respect to lines c to c ′ in FIG.

  As the first substrate 101 and the second substrate 103, films having a thickness of 50 μm made of polyethylene naphthalate were used. The first pattern 102 and the second pattern 104 were formed by a screen printing method. The first pattern 102 and the second pattern 104 have a rectangular coil shape of about 76 mm (outer circumference) × about 45 mm (outer circumference) (about 61 mm (inner circumference) × about 29 mm (inner circumference)). The wiring width was about 800 μm, the wiring interval was about 300 μm (interval other than the periphery of the contact hole for electrically connecting the semiconductor integrated circuit to the antenna), and the number of turns was 7. In the screen printing method, a paste containing metal particles is placed on a desired surface using a plate having openings having a desired pattern as a mask, and then a desired pattern is formed by performing thermal baking. In this example, the first pattern 102 was formed by a screen printing method using a paste containing Ag metal particles. At this time, AGEP201X manufactured by Sumitomo Electric Industries, Ltd. was used as a paste containing Ag metal particles. Further, the thermal firing was performed at 160 ° C. for 30 minutes.

  Next, as illustrated in FIG. 6B, an anisotropic conductive paste was formed as the anisotropic conductive material 105 so as to cover the entire first pattern 102 and the entire first insulating surface 106. . As an anisotropic conductive paste, 3373C manufactured by Three Bond Co., Ltd. was used.

  In this embodiment, the contact hole 130 for electrically connecting the semiconductor integrated circuit to the antenna is formed before the first substrate 101 and the second substrate 103 are stacked. 6B, an enlarged view of the peripheral portion 160 of the contact hole is shown in FIG. The contact hole 130 for electrically connecting the semiconductor integrated circuit to the antenna was formed so as to penetrate the second substrate 103 and also the second pattern 104. The contact hole 130 was mechanically opened using a cutter.

  In FIG. 6, in the contact hole peripheral portion 160, the interval between the wirings of the coil-shaped first pattern 102 and the second pattern 104 is narrow. This is because the distance between the pair of electrodes (corresponding to the electrode 131 in FIG. 5) of the antenna 100 is matched with the distance between the pair of electrodes (corresponding to the electrode 134 in FIG. 5) of the semiconductor integrated circuit. In the case where the pair of electrodes of the semiconductor integrated circuit and the pair of electrodes of the antenna 100 are electrically connected by an anisotropic conductive material, the positions of the electrodes need to be aligned in this way. Note that, in the contact hole peripheral portion 160, a wiring electrically connected to the pair of electrodes of the semiconductor integrated circuit is provided without narrowing the interval between the wirings of the coil-shaped first pattern 102 and the second pattern 104, The wiring may be routed to electrically connect the pair of electrodes of the semiconductor integrated circuit and the pair of electrodes of the antenna 100.

  After that, the first substrate 101 and the second insulating surface 106 and the second insulating surface 107 face each other, and all the regions on the first pattern 102 overlap the second pattern 104. The substrate 103 was overlaid. Then, a pressure of 160 MPa was applied for 20 seconds in a state where the anisotropic conductive paste reached 160 ° C. Thus, the first pattern 102 and the second pattern 104 were electrically connected through the anisotropic conductive material 105, and at the same time, the first substrate 101 and the second substrate 103 were bonded to each other.

  Through the above steps, the antenna 100 as shown in FIG. 6D was manufactured.

  The resistance of the manufactured antenna 100 was measured and found to be about 8.2Ω. On the other hand, the result of measuring the resistance of the first pattern 102 was about 21Ω, and the result of measuring the resistance of the second pattern 104 was about 17Ω. From the above results, the resistance of the antenna 100 could be reduced.

  Since the antenna 100 has a configuration in which patterns having the same shape overlap each other with the anisotropic conductive material 105 interposed therebetween, even if one of the first pattern 102 and the second pattern 104 is disconnected, the disconnection occurs. Can be electrically connected by the other pattern. Thus, the probability that the entire antenna 100 is disconnected can be further reduced, and the yield of the antenna 100 can be further improved.

  Since the anisotropic conductive material 105 is formed so as to cover the entire first pattern 102 and the entire first insulating surface 106, the anisotropic conductive material 105 is anisotropic to the first substrate 101 and the second substrate 103. The antenna 100 can be provided in a region surrounded by the conductive conductive material 105. Therefore, since the antenna 100 is not exposed to the outside, the antenna can be protected from an external impact. Further, it is possible to prevent the antenna 100 from being altered such as being corroded by exposure to the outside air. Thus, deterioration of the antenna 100 can be reduced and the reliability of the antenna 100 can be increased.

  Thus, an antenna having low resistance, high yield, and high reliability was obtained.

  This embodiment can be implemented by being freely combined with Embodiment Modes 1 to 4.

  An example of a specific structure of the semiconductor integrated circuit 133 included in the semiconductor device of the present invention and a manufacturing method thereof will be described. 7 and 9 are used for the description. 1 to 6 are denoted by the same reference numerals.

  The semiconductor integrated circuit 133 includes an element group 601 including a plurality of thin film transistors. In the figure, an N-channel transistor and a P-channel transistor are representatively shown as the element group 601. As the substrate 600, for example, a glass substrate such as barium borosilicate glass or alumino borosilicate glass, a quartz substrate, a ceramic substrate, or the like can be used. Alternatively, a semiconductor substrate having an insulating film formed on the surface thereof may be used. A flexible substrate made of a synthetic resin such as plastic may be used. The surface of the substrate may be planarized by polishing such as a CMP (Chemical Mechanical Polishing) method. Further, a glass substrate, a quartz substrate, or a substrate obtained by polishing and thinning a semiconductor substrate may be used. For example, in a single crystal silicon substrate having a surface perpendicular to the vicinity of the crystal axis <100> or <110> of single crystal silicon, the thickness of the substrate is more than 0.1 μm and not more than 20 μm, typically not less than 1 μm and not more than 5 μm. What was ground to the thickness of can be used.

  As the base layer 661 provided over the substrate 600, an insulating film such as silicon oxide, silicon nitride, or silicon nitride oxide can be used. The base layer 661 can prevent alkali metal or alkaline earth metal such as Na contained in the substrate 600 from diffusing into the semiconductor layer 662 and adversely affecting the characteristics of the thin film transistor. In FIG. 7, the base layer 661 has a single-layer structure, but it may be formed of two or more layers. Note that the base layer 661 is not necessarily provided when diffusion of impurities such as a quartz substrate does not cause any problem.

Note that the surface of the substrate 600 may be directly processed by high-density plasma. The high density plasma is generated by using a high frequency, for example 2.45 GHz. As the high density plasma, one having an electron density of 10 ¹¹ to 10 ¹³ / cm ³ , an electron temperature of 2 eV or less, and an ion energy of 5 eV or less is used. As described above, high-density plasma characterized by low electron temperature has low kinetic energy of active species, and thus can form a film with less plasma damage and fewer defects than conventional plasma treatment. Plasma can be generated using a high-frequency excitation plasma processing apparatus using a radial slot antenna. The distance from the antenna that generates a high frequency to the substrate 600 is 20 to 80 mm (preferably 20 to 60 mm).

A nitriding atmosphere such as nitrogen (N) and a rare gas (including at least one of He, Ne, Ar, Kr, and Xe) atmosphere, nitrogen, hydrogen (H), a rare gas atmosphere, or ammonia (NH ₃ ) In the rare gas atmosphere, the surface of the substrate 600 can be nitrided by performing the high-density plasma treatment. When glass, quartz, silicon wafer, or the like is used as the substrate 600, the nitride layer formed on the surface of the substrate 600 contains silicon nitride as a main component, so that it can be used as a blocking layer for impurities diffused from the substrate 600 side. can do. A silicon oxide film or a silicon oxynitride film may be formed over the nitride layer by a plasma CVD method to form the base layer 661.

  Further, by performing the same high-density plasma treatment on the surface of the base layer 661 made of silicon oxide, silicon oxynitride, or the like, the surface and the depth of 1 to 10 nm can be nitrided from the surface. This extremely thin silicon nitride layer is preferable because it functions as a blocking layer and is less affected by stress on the semiconductor layer 662 formed thereon.

  A semiconductor layer 662 is formed over the base layer 661. As the semiconductor layer 662, an island-shaped crystalline semiconductor film or an amorphous semiconductor film can be used. Further, an organic semiconductor film may be used. The crystalline semiconductor film can be obtained by crystallizing an amorphous semiconductor film. As a crystallization method, a laser crystallization method, a thermal crystallization method using RTA (Rapid Thermal Anneal) or a furnace annealing furnace, a thermal crystallization method using a metal element that promotes crystallization, or the like can be used. The semiconductor layer 662 includes a channel formation region 662a and a pair of impurity regions 662b to which an impurity element imparting a conductivity type is added. Note that although the structure including the low-concentration impurity region 662c to which the impurity element is added at a lower concentration than the impurity region 662b is shown between the channel formation region 662a and the pair of impurity regions 662b, the invention is not limited thereto. A structure in which the low concentration impurity region 662c is not provided may be employed. Alternatively, a structure may be employed in which silicide is formed on part of the upper surface of the pair of impurity regions 662b (particularly, in contact with the wiring 666) or over the entire surface.

  Note that the wiring formed at the same time as the semiconductor layer 662 is preferably led so that corners are rounded when viewed from a direction perpendicular to the top surface of the substrate 600. The wiring routing method is schematically shown in FIG. A wiring formed at the same time as the semiconductor layer is indicated by a wiring 3011. FIG. 9A shows a conventional wiring routing method. FIG. 9B shows a wiring routing method according to the present invention. The corner 1202a is round with respect to the conventional corner 1201a. By rounding the corner, it is possible to prevent dust and the like from remaining at the corner of the wiring. Thus, defects due to dust in the semiconductor device can be reduced and the yield can be increased.

  An impurity element imparting a conductivity type may be added to the channel formation region 662a of the thin film transistor. Thus, the threshold voltage of the thin film transistor can be controlled.

A first insulating layer 663 is formed over the semiconductor layer 662. The first insulating layer 663 can be formed using silicon oxide, silicon nitride, silicon nitride oxide, or the like by stacking a single layer or a plurality of films. In this case, the surface of the first insulating layer 663 may be densified by treatment with high-density plasma in an oxidizing atmosphere or a nitriding atmosphere, and oxidizing or nitriding treatment. As described above, the high-density plasma is generated by using a high frequency, for example, 2.45 GHz. As the high density plasma, one having an electron density of 10 ¹¹ to 10 ¹³ / cm ³ , an electron temperature of 2 eV or less, and an ion energy of 5 eV or less is used. Plasma can be generated using a high-frequency excitation plasma processing apparatus using a radial slot antenna. In the apparatus for generating high-density plasma, the distance from the antenna that generates high frequency to the substrate 600 is set to 20 to 80 mm (preferably 20 to 60 mm).

  Note that before the first insulating layer 663 is formed, the surface of the semiconductor layer 662 may be oxidized or nitrided by performing the above high-density plasma treatment. At this time, by performing treatment in an oxidizing atmosphere or a nitriding atmosphere at a temperature of the substrate 600 of 300 to 450 ° C., a favorable interface can be formed with the first insulating layer 663 deposited thereon.

The nitriding atmosphere may be a nitrogen (N) and rare gas (including at least one of He, Ne, Ar, Kr, and Xe) atmosphere, a nitrogen and hydrogen (H) and rare gas atmosphere, or ammonia (NH ₃ ) And a noble gas atmosphere. As the oxidizing atmosphere, an oxygen (O) and rare gas atmosphere, an oxygen and hydrogen (H) and rare gas atmosphere, or a dinitrogen monoxide (N ₂ O) and rare gas atmosphere can be used.

  A gate electrode 664 is formed over the first insulating layer 663. As the gate electrode 664, a kind of element selected from Ta, W, Ti, Mo, Al, Cu, Cr, and Nd, an alloy containing a plurality of the elements, or a compound of the elements can be used. In addition, a single layer or a laminated structure including these elements, alloys, and compounds can be used. In the figure, a gate electrode 664 having a two-layer structure is shown. Note that the gate electrode 664 and the wiring formed at the same time as the gate electrode 664 are preferably led so that corners are rounded when viewed from a direction perpendicular to the top surface of the substrate 600. The routing method can be the same as the method shown in FIG. A wiring formed at the same time as the gate electrode 664 and the gate electrode 664 is denoted by a wiring 3012. By rounding the corner portion like the corner portion 1202b with respect to the corner portion 1201b, dust or the like can be prevented from remaining in the corner portion of the wiring. Thus, defects due to dust in the semiconductor device can be reduced and the yield can be increased.

  The thin film transistor includes a semiconductor layer 662, a gate electrode 664, and a first insulating layer 663 that functions as a gate insulating film between the semiconductor layer 662 and the gate electrode 664. In this embodiment, the thin film transistor is shown as a top gate type transistor, but it may be a bottom gate type transistor having a gate electrode below the semiconductor layer, or a dual gate type having gate electrodes above and below the semiconductor layer. This transistor may be used.

  An insulating film (referred to as a sidewall 667a in FIG. 7) is provided so as to be in contact with the side surface of the gate electrode 664. After the sidewall 667a is formed, an impurity element imparting conductivity type is added to the semiconductor layer 662, so that the low concentration impurity region 662c can be formed in a self-aligning manner. Alternatively, a structure in which silicide is formed in the pair of impurity regions 662b may be formed in a self-aligned manner using the sidewalls 667a. Note that although the structure in which the sidewall 667a is provided is shown, the invention is not limited thereto, and the sidewall may not be provided.

A second insulating layer 667 is formed over the gate electrode 664 and the sidewall 667a. The second insulating layer 667 is preferably a barrier insulating film that blocks ionic impurities, such as a silicon nitride film. The second insulating layer 667 is formed using silicon nitride or silicon oxynitride. The second insulating layer 667 functions as a protective film that prevents contamination of the semiconductor layer 662. After the second insulating layer 667 is deposited, the second insulating layer 667 may be hydrogenated by introducing hydrogen gas and performing high-density plasma treatment as described above. Alternatively, the second insulating layer 667 may be nitrided and hydrogenated by introducing ammonia (NH ₃ ) gas. Alternatively, the second insulating layer 667 may be subjected to oxynitriding treatment and hydrogenation treatment by introducing oxygen, dinitrogen monoxide (N ₂ O) gas, or the like and hydrogen gas. By this method, the surface of the second insulating layer 667 can be densified by performing nitriding treatment, oxidation treatment, or oxynitridation treatment. Thus, the function of the second insulating layer 667 as a protective film can be enhanced. The hydrogen introduced into the second insulating layer 667 is then released by heat treatment at 400 to 450 ° C., so that the semiconductor layer 662 can be hydrogenated. Note that this hydrogenation treatment may be combined with a hydrogenation treatment using the first insulating layer 663.

  A third insulating layer 665 is formed over the second insulating layer 667. As the third insulating layer 665, a single layer or a stacked structure of an inorganic insulating film or an organic insulating film can be used. As the inorganic insulating film, a silicon oxide film formed by a CVD method, a silicon oxide film formed by an SOG (Spin On Glass) method, or the like can be used. As an organic insulating film, polyimide, polyamide, BCB (benzoic acid) is used. A film such as cyclobutene), acrylic or positive photosensitive organic resin, or negative photosensitive organic resin can be used.

  Alternatively, the third insulating layer 665 can be formed using a material having a skeleton structure formed of a bond of silicon (Si) and oxygen (O). As a substituent of this material, an organic group containing at least hydrogen (for example, an alkyl group or an aromatic hydrocarbon) is used. A fluoro group may be used as a substituent. Alternatively, an organic group containing at least hydrogen and a fluoro group may be used as a substituent.

  A wiring 666 is formed over the third insulating layer 665. As the wiring 666, one kind of element selected from Al, Ni, W, Mo, Ti, Pt, Cu, Ta, Au, and Mn or an alloy containing a plurality of such elements can be used. Further, a single layer or a laminated structure made of these elements and alloys can be used. In the figure, an example of a single layer structure is shown. Note that the wiring 666 is preferably led so that corners are rounded when viewed from a direction perpendicular to the top surface of the substrate 600. The routing method can be the same as the method shown in FIG. The wiring 666 is indicated by a wiring 3013. By rounding the corner portion like the corner portion 1202c with respect to the corner portion 1201c, dust or the like can be prevented from remaining at the corner portion of the wiring. Thus, defects due to dust in the semiconductor device can be reduced and the yield can be increased. The wiring 3013 is connected to the wiring 3011 through the contact hole 3014. In the structure illustrated in FIGS. 7A to 7B, the wiring 666 is a wiring connected to the source and drain of the thin film transistor.

  A fourth insulating layer 669 is formed over the wiring 666. As the fourth insulating layer 669, a single layer or a stacked structure of an inorganic insulating film or an organic insulating film can be used. As the inorganic insulating film, a silicon oxide film formed by a CVD method, a silicon oxide film formed by an SOG (Spin On Glass) method, or the like can be used. As an organic insulating film, polyimide, polyamide, BCB (benzoic acid) is used. A film such as cyclobutene), acrylic or positive photosensitive organic resin, or negative photosensitive organic resin can be used.

  Alternatively, the fourth insulating layer 669 can be formed using a material having a skeleton structure formed of a bond of silicon (Si) and oxygen (O). As a substituent of this material, an organic group containing at least hydrogen (for example, an alkyl group or an aromatic hydrocarbon) is used. A fluoro group may be used as a substituent. Alternatively, an organic group containing at least hydrogen and a fluoro group may be used as a substituent.

  An electrode 134 is formed over the fourth insulating layer 669. As the electrode 134, one kind of element selected from Al, Ni, W, Mo, Ti, Pt, Cu, Ta, Au, and Mn or an alloy containing a plurality of such elements can be used. Further, a single layer or a laminated structure made of these elements and alloys can be used. In the figure, an example of a single layer structure is shown.

  In the configuration shown in FIG. 7, the semiconductor integrated circuit 133 may be sealed by covering it with a film. The surface of the film may be coated with silicon dioxide (silica) powder. The coating can maintain waterproofness even in a high temperature and high humidity environment. That is, it can have a moisture resistance function. Further, the surface of the film may have an antistatic function. Further, the surface of the film may be coated with a material containing carbon as a main component (for example, diamond-like carbon). The coating increases the strength and can suppress deterioration and destruction of the semiconductor device. The film may be formed of a material obtained by mixing a base material (for example, resin) with silicon dioxide, a conductive material, or a material containing carbon as a main component. Further, an antistatic function can be imparted by applying a surfactant to the surface of the film or by kneading the surfactant directly into the film.

  Since the configuration for electrically connecting the semiconductor integrated circuit 133 and the antenna 100 is the same as the configuration described in the third and fourth embodiments, description thereof is omitted.

  Since the semiconductor device of the present invention having the above structure uses the antenna 100 having low resistance, high yield, and high reliability, the communication distance can be long, the cost can be reduced, and the reliability can be increased.

  This embodiment can be implemented by being freely combined with the above embodiment mode and Embodiment 1.

  An example of a specific structure of the semiconductor integrated circuit 133 included in the semiconductor device of the present invention and a manufacturing method thereof will be described with reference to a structure different from the structure shown in Embodiment 2. In the semiconductor device having the configuration shown in FIG. 7 in Example 2, the element group 601 formed on the substrate 600 was used as it was. However, the element group 601 formed on the substrate 600 may be peeled off from the substrate 600, and the element group 601 may be attached to a flexible substrate. In this embodiment, a method for separating the element group 601 from the substrate 600 and providing it on the flexible substrate will be described with reference to FIGS.

  As shown in FIG. 8A, an insulating layer 711, a separation layer 712, and an insulating layer 713 are formed over a substrate 600. As the substrate 600, for example, a glass substrate such as barium borosilicate glass or alumino borosilicate glass, a quartz substrate, a ceramic substrate, or the like can be used. Alternatively, a semiconductor substrate having an insulating film formed on the surface thereof may be used. A flexible substrate made of a synthetic resin such as plastic may be used. The surface of the substrate may be planarized by polishing such as CMP. As the insulating layers 711 and 713, a silicon oxide, a silicon nitride, a silicon oxide containing nitrogen, and a silicon nitride containing oxygen formed by a vapor deposition method (CVD method) or a sputtering method. Etc. can be used. As the peeling layer 712, an element selected from W, Mo, Ti, Ta, Nb, Ni, Co, Zr, Zn, Ru, Rh, Pd, Os, Ir, Si, or the like by sputtering or the like is used. A layer containing an alloy or a compound material as a main component is formed as a single layer or stacked layers. Note that the layer containing silicon may be amorphous, microcrystalline, or polycrystalline.

  In the case where the release layer 712 has a single-layer structure, preferably, W, Mo, a mixture of W and Mo, W oxide, W oxynitride, Mo oxide, Mo oxynitride, and a mixture of W and Mo A layer containing any one of the above oxides and an oxynitride of a mixture of W and Mo can be used.

In the case where the peeling layer 712 has a two-layer structure, preferably, a layer containing any of W, Mo, and a mixture of W and Mo is used as the first layer, and an oxide of W or W A layer containing any one of oxynitride, Mo oxide, Mo oxynitride, W and Mo mixture oxide, and W and Mo mixture oxynitride can be used. These oxides and oxynitrides can be formed by performing oxygen plasma treatment or N ₂ O plasma treatment on the surface of the first layer.

  Next, as illustrated in FIG. 8B, the semiconductor layer 662 is formed over the insulating layer 713 to form the element group 601. The method for forming the element group 601 is the same as the method described with reference to FIG. After the element group 601 is formed, an insulating layer 714 that covers the element group 601 is formed. As the insulating layer 714, an insulating resin such as an acrylic resin or a polyimide resin can be used. The insulating layer 714 corresponds to the fourth insulating layer 669. Although not shown in FIG. 8B, an opening is provided in the insulating layer 714 so that part of the wiring 666 is exposed in order to electrically connect the antenna 100 and the element group 601.

  Next, as illustrated in FIG. 8C, an opening 715 is formed so that at least part of the separation layer 712 is exposed. The opening 715 can be formed by irradiation with a laser beam. As the laser, a solid laser having a wavelength of 150 to 380 nm which is an ultraviolet region can be used.

  Next, as illustrated in FIG. 8D, a substrate 717 is attached to the insulating layer 714 with an adhesive layer 716.

  Next, as illustrated in FIG. 8E, the element group 601 is separated from the substrate 600. The method of peeling the element group 601 from the substrate 600 includes (A) a method of physically peeling by applying stress, (B) a method of removing the peeling layer with an etching agent, and (C) a part of the peeling layer using an etching agent. Any of the methods of removing the film and then physically peeling off may be used.

  In FIG. 8E, separation is performed at the interface between the separation layer 712 and the insulating layer 713; however, the present invention is not limited thereto, and separation may be performed at the interface between the separation layer 712 and the insulation layer 711. You may divide yourself into two.

  Next, as illustrated in FIG. 8F, the flexible substrate 701 is further bonded to the element group 601 with an adhesive. The flexible substrate 701 has flexibility, and for example, a plastic substrate such as polycarbonate, polyarylate, or polyether sulfone can be used. The peeled element group 601 may be attached to the flexible substrate 701 using a commercially available adhesive, for example, an epoxy resin adhesive.

  Next, as illustrated in FIG. 8G, after the element group 601 is attached to the flexible substrate 701, the substrate 717 is removed. For example, the element group 601 can be separated from the substrate 717 by performing heat treatment using a layer whose adhesive strength is reduced by heat treatment as the adhesive layer 716. In this manner, the element group 601 can be provided over the flexible substrate 701.

  Thus, by providing the element group 601 on the flexible substrate, a semiconductor device that is thin, light, and difficult to break even when dropped can be obtained. When an inexpensive flexible substrate is used, an inexpensive semiconductor integrated circuit 133 can be provided.

  Since the method for electrically connecting the semiconductor integrated circuit 133 and the antenna 100 is the same as the method described in the third and fourth embodiments, the description thereof is omitted.

  In the structure illustrated in FIG. 8G, the semiconductor integrated circuit 133 may be sealed with a film. The surface of the film may be coated with silicon dioxide (silica) powder. The coating can maintain waterproofness even in a high temperature and high humidity environment. That is, it can have a moisture resistance function. Further, the surface of the film may have an antistatic function. Further, the surface of the film may be coated with a material containing carbon as a main component (for example, diamond-like carbon). The coating increases the strength and can suppress deterioration and destruction of the semiconductor device. The film may be formed of a material obtained by mixing a base material (for example, resin) with silicon dioxide, a conductive material, or a material containing carbon as a main component. Further, an antistatic function can be provided by applying a surfactant to the surface of the film or by directly kneading the surfactant.

  Since the semiconductor device of the present invention uses the antenna 100 with low resistance, high yield, and high reliability, the communication distance can be long, the cost can be reduced, and the reliability can be increased.

  This embodiment can be implemented by being freely combined with the above embodiment mode, embodiment 1, and embodiment 2.

  An example of a specific structure of the semiconductor integrated circuit 133 included in the semiconductor device of the present invention and a manufacturing method thereof will be described with reference to structures different from those shown in Embodiments 2 and 3. FIG. 10 is used for the description. 1 to 8 are denoted by the same reference numerals. In Example 2 and Example 3, the structure in which the element group 601 is formed using thin film transistors is shown. In this embodiment, the element group 601 is formed using transistors (single crystal transistors) formed on a semiconductor substrate such as a silicon wafer.

  FIG. 10A illustrates an example in which the thin film transistor in the structure illustrated in FIG. 7A is replaced with a single crystal transistor. FIG. 10B illustrates an example in which the thin film transistor in the structure illustrated in FIG. 7B is replaced with a single crystal transistor.

  By adding an impurity element imparting conductivity to the semiconductor substrate 740, a channel formation region 662a, a pair of impurity regions 662b, and a low-concentration impurity region 662c to which the impurity element is added at a lower concentration than the impurity region 662b are formed. Form. In addition, the insulating layer 741 is provided to insulate a plurality of elements. Note that FIG. 10 illustrates the structure having the low-concentration impurity region 662c; however, the present invention is not limited to this, and a structure without the low-concentration impurity region 662c may be used. As the semiconductor substrate 740, for example, in a single crystal silicon substrate having a surface perpendicular to the vicinity of the crystal axis <100> or <110> of single crystal silicon, the thickness of the substrate is greater than 0.1 μm and less than or equal to 20 μm. In this case, a material polished to a thickness of 1 μm or more and 5 μm or less can be used.

  Since the semiconductor device of the present invention uses the antenna 100 with low resistance, high yield, and high reliability, the communication distance can be long, the cost can be reduced, and the reliability can be increased.

  This embodiment can be implemented by being freely combined with the above embodiment mode and Embodiments 1 to 3.

  In this embodiment, a semiconductor device (hereinafter, also referred to as RFID) in which data is input and output by wireless communication via the antenna using the antenna of the present invention will be described. A wireless communication system using RFID will be described.

  FIG. 13A illustrates a configuration of a wireless communication system including the RFID 3000 and a reader / writer (indicated as R / W 2201 in FIG. 13) that performs data communication with the RFID 3000 by wireless communication. The RFID 3000 includes an antenna 2202 and a circuit portion 2203 that inputs and outputs signals to and from the antenna 2202. The antenna 100 of the present invention can be used as the antenna 2202. The R / W 2201 includes an antenna 2206 and a circuit unit 2207 that inputs and outputs signals to and from the antenna 2206. The RFID 3000 and the R / W 2201 input and output data by transmitting and receiving a modulated carrier wave (also referred to as a radio signal) by the antenna 2202 and the antenna 2206. The circuit portion 2203 includes an analog portion 2204 and a digital portion 2205. The analog unit 2204 inputs and outputs signals with the antenna 2202. The digital unit 2205 inputs and outputs signals with the analog unit 2204.

  FIG. 13B illustrates the structure of the analog portion 2204 and the digital portion 2205. The analog unit 2204 includes a resonance capacitor 2501, a band filter 2502, a power supply circuit 2503, a demodulation circuit 2506, and a modulation circuit 2507. The resonance capacitor 2501 is provided so that the antenna 2202 can easily receive a signal having a predetermined frequency. The digital unit 2205 includes a code extraction circuit 2301, a code determination circuit 2302, a cyclic redundancy check circuit (indicated as CRC circuit 2303 in FIG. 13), a memory circuit 2305, and a control circuit 2304.

  A case where the RFID 3000 receives data will be described. Noise from the modulated carrier wave input from the antenna 2202 is removed by the bandpass filter 2502 and input to the power supply circuit 2503 and the demodulation circuit 2506. The power supply circuit 2503 includes a rectifier circuit and a storage capacitor. The modulated carrier wave input through the band-pass filter 2502 is rectified by a rectifier circuit and further smoothed by a storage capacitor. Thus, the power supply circuit 2503 generates a DC voltage. The DC voltage generated in the power supply circuit 2503 is supplied to each circuit in the circuit unit 2203 included in the RFID 3000 as a power supply voltage. Note that the power supply voltage output from the power supply circuit 2503 may be supplied to each circuit in the circuit portion 2203 through a constant voltage circuit (regulator). The modulated carrier wave input via the band filter 2502 is demodulated by the demodulation circuit 2506, and the demodulated signal is input to the digital unit 2205. A signal input from the analog unit 2204, that is, a signal obtained by demodulating the modulated carrier wave by the demodulation circuit 2506 is input to the code extraction circuit 2301, and a code included in the signal is extracted. The output of the code extraction circuit 2301 is input to the code determination circuit 2302, and the extracted code is analyzed. The analyzed code is input to the CRC circuit 2303, and arithmetic processing for identifying a transmission error is performed. In this way, the CRC circuit 2303 outputs to the control circuit 2304 whether there is an error in the received data. Note that a phase synchronization circuit that generates a clock having a predetermined frequency synchronized with a signal using the output of the demodulation circuit 2506 may be provided. As the phase locked loop, a phase locked loop circuit (Phase Locked Loop circuit: PLL circuit) can be used.

  Next, a case where the RFID 3000 transmits data will be described. The memory circuit 2305 outputs the stored unique identifier (UID) to the control circuit 2304 in response to the signal input from the code determination circuit 2302. The memory circuit includes a memory and a memory controller that controls reading of data from the memory. A mask ROM can be used as the memory. The CRC circuit 2303 calculates a CRC code corresponding to the transmission data and outputs the CRC code to the control circuit 2304. The control circuit 2304 adds a CRC code to the transmission data. The control circuit 2304 encodes data in which a CRC code is added to transmission data. Further, the control circuit 2304 converts the encoded information into a signal for modulating a carrier wave corresponding to a predetermined modulation method. The output of the control circuit 2304 is input to the modulation circuit 2507 of the analog unit 2204. The modulation circuit 2507 performs load modulation on the carrier wave in accordance with the input signal and outputs the carrier wave to the antenna 2202.

  This embodiment mode can be implemented freely combining with the embodiment mode and Embodiments 1 to 4.

  In this embodiment, a method for manufacturing a memory included in the semiconductor integrated circuit 133 of the semiconductor device of the present invention (corresponding to the memory included in the memory circuit 2305 in FIG. 13) will be described. An example using a mask ROM as a memory will be described.

  The mask ROM is formed of a plurality of transistors, and the transistors constituting the mask ROM are formed using photolithography. At that time, in the interlayer insulating film formed on the transistor, it is selected whether or not to open a contact hole for wiring connected to, for example, the drain region of the transistor. In this way, different data can be written. For example, data “1” can be written in the memory cell when it is opened, and data “0” can be written when it is not opened.

  In the step of exposing the photoresist, before or after the step of exposing through the reticle (photomask) using an exposure apparatus such as a stepper, the photoresist on the region where the contact hole is opened is irradiated with an electron beam or a laser. . Thereafter, development, etching, and stripping of the photoresist are performed as usual. By doing so, it is possible to create a pattern for opening the contact hole and a pattern for not opening the contact hole only by selecting the irradiation region of the electron beam or laser without exchanging the reticle (photomask). That is, by selecting an electron beam or laser irradiation region without changing a reticle (photomask), a mask ROM in which different data is written for each semiconductor device can be manufactured.

  By using such a mask ROM manufacturing method, a unique identifier (UID: Unique Identifier) can be set for each semiconductor device at the time of manufacture. Even when different UIDs are set, it is not necessary to change the reticle (photomask), so that a semiconductor device can be manufactured at lower cost.

  Note that the semiconductor integrated circuit 133 of the semiconductor device of the present invention may have a writeable memory or a rewritable memory instead of the mask ROM. Moreover, you may have both mask ROM and these memories.

  Since the semiconductor device of the present invention uses the antenna 100 with low resistance, high yield, and high reliability, the communication distance can be long, the cost can be reduced, and the reliability can be increased.

  This embodiment can be implemented by being freely combined with the above embodiment mode and Embodiments 1 to 5.

  In this embodiment, a carrier wave for wireless communication in a semiconductor device (RFID) in which data is input / output by wireless communication will be described.

  The frequency of the carrier wave is sub-millimeter wave of 300 GHz to 3 THz, millimeter wave of 30 GHz to less than 300 GHz, microwave of 3 GHz to less than 30 GHz, ultra high frequency of 300 MHz to less than 3 GHz, ultra high frequency of 30 MHz to less than 300 MHz, short wave Any frequency of 3 MHz to less than 30 MHz, a medium wave of 300 kHz to less than 3 MHz, a long wave of 30 kHz to less than 300 KHz, and a super long wave of 3 kHz to less than 30 KHz can be used. For example, a carrier wave having a frequency of 13.56 MHz may be used, or a carrier wave having a frequency of 2.45 GHz may be used.

  The shape of the antenna 100, that is, the shape of the first pattern 102 and the second pattern 104 can be changed according to the frequency of the carrier wave. In addition, the shape of the antenna 100, that is, the shape of the first pattern 102 and the second pattern 104 can be changed according to a transmission method of wireless communication. For example, when using an electromagnetic induction method, it can be a coil shape, and when using a microwave method, it can be a dipole shape.

  Since the semiconductor device of the present invention uses the antenna 100 with low resistance, high yield, and high reliability, the communication distance can be long, the cost can be reduced, and the reliability can be increased.

  This embodiment can be implemented by being freely combined with the above embodiment mode and Embodiments 1 to 6.

  In this embodiment, the use of the semiconductor device of the present invention will be described with reference to FIG. The semiconductor device 300 of the present invention includes an antenna 100, and data is input / output by wireless communication via the antenna 100. The semiconductor device 300 can be used by being provided, for example, on banknotes, coins, securities, bearer bonds, or certificates (such as a driver's license or a resident's card, see FIG. 11A). Moreover, it can also be provided and used for packaging containers (wrapping paper, a bottle, etc., refer FIG.11 (B)). It can also be used by being provided on a recording medium (see FIG. 11C) such as DVD software, CD, or video tape. It can also be provided and used in vehicles such as cars, motorcycles and bicycles (see FIG. 11D). It can also be used in personal items such as bags and glasses (see FIG. 11E), foods, clothing, daily necessities, electronic devices, and the like. Electronic devices refer to liquid crystal display devices, EL (electroluminescence) display devices, television devices (also simply referred to as televisions or television receivers), cellular phones, and the like.

  The semiconductor device 300 can be fixed to an article by being attached to the surface of the article or embedded in the article. For example, a book may be embedded in paper, and a package made of an organic resin may be embedded in the organic resin. Forgery can be prevented by providing the semiconductor device 300 for bills, coins, securities, bearer bonds, certificates, and the like. Further, by providing the semiconductor device 300 in packaging containers, recording media, personal items, foods, clothing, daily necessities, electronic devices, etc., it is possible to improve the efficiency of inspection systems and rental store systems. . In addition, forgery and theft can be prevented by providing the semiconductor device 300 in vehicles. Moreover, by embedding it in creatures such as animals, it is possible to easily identify individual creatures. For example, by burying the semiconductor device 300 in a living creature such as livestock, it is possible to easily identify the year of birth, sex, type, or the like.

  Since the semiconductor device 300 of the present invention uses the antenna 100 with low resistance, high yield, and high reliability, the communication distance can be long, the cost can be reduced, and the reliability can be increased. Therefore, the semiconductor device 300 can be provided and used for a wide variety of devices. .

  This embodiment can be implemented by being freely combined with the above embodiment mode and Embodiments 1 to 7.

  In this embodiment, one mode of a wireless communication system using the semiconductor device 300 of the present invention is described with reference to FIG. A terminal 9520 including the display portion 9521 is provided with an antenna and a reader / writer connected to the antenna. The article A 9532 is provided with the semiconductor device 300 of the present invention, and the article B 9522 is also provided with the semiconductor device 300 of the present invention. In FIG. 12A, an internal medicine is shown as an example of the article A or the article B. When the antenna of the terminal 9520 is placed over the semiconductor device 300 included in the article A 9532, information on the product such as the raw material and the place of origin of the article A 9532, the inspection result for each production process, the history of the distribution process, and the description of the product is displayed on the display unit 9521. The When the antenna of the terminal 9520 is held over the semiconductor device 300 included in the article B 9522, information about the product such as the raw material and the place of origin of the article B 9522, the inspection result for each production process, the history of the distribution process, and the description of the product is displayed on the display unit 9521. The

  An example of a business model using the system shown in FIG. The flowchart in FIG. 12B is used for the description. The terminal 9520 inputs allergy information (first step 4001). The allergy information is information on pharmaceuticals or components thereof that cause a predetermined person to cause an allergic reaction. As described above, the information on the internal medicine A that is the article A 9532 is acquired by the antenna provided in the terminal 9520 (second step 4002). The information on the internal medicine A includes information such as the components of the internal medicine A. The allergy information is compared with the acquired information such as the components of the internal medicine A to determine whether or not they match (third step 4003). If they match, it is determined that the predetermined person has a risk of causing an allergic reaction to the internal medicine A, and the user of the terminal 9520 is alerted (fourth step 4004). If they do not match, it is determined that the predetermined person is less likely to cause an allergic reaction to the internal medicine A, and the user of the terminal 9520 is notified of this fact (safe) (fifth step 4005). In the fourth step 4004 and the fifth step 4005, the method of notifying the user of the terminal 9520 of information may be a method of displaying on the display unit 9521 of the terminal 9520, or sounding an alarm of the terminal 9520 or the like. It may be a method.

  An example of another business model is shown in FIG. The terminal 9520 inputs information on a combination of ingredients that are dangerous if taken simultaneously or components of ingredients that are dangerous if taken simultaneously (hereinafter referred to as combination information) (first step 4101). As described above, information on the internal medicine A that is the article A 9532 is acquired by the antenna provided in the terminal 9520 (second step 4102). The information on the internal medicine A includes information such as the components of the internal medicine A. Next, as described above, information on the internal medicine B that is the article B 9522 is acquired by the antenna provided in the terminal 9520 (third step 4103). The information on the internal medicine B includes information such as components of the internal medicine B. Thus, information on a plurality of internal medicines is acquired. The combination information is compared with the acquired information on a plurality of internal medicines, and it is determined whether or not they match, that is, whether there is a combination of components of internal medicines that are dangerous when used simultaneously (fourth step 4104). If they match, the user of terminal 9520 is alerted (fifth step 4105). If they do not match, the user of the terminal 9520 is notified of this fact (safe) (sixth step 4106). In the fifth step 4105 and the sixth step 4106, the method of notifying the user of the terminal 9520 may be a method of displaying information on the display unit 9521 of the terminal 9520, or a method of sounding an alarm of the terminal or the like. It may be.

  The semiconductor device of the present invention can increase the communication distance, reduce the cost, and further improve the reliability. Therefore, the application range of the wireless communication system can be expanded by applying the present invention to a wireless communication system using the semiconductor device.

  This embodiment can be implemented by being freely combined with the above embodiment mode and Embodiments 1 to 8.

FIG. 3 illustrates a configuration of Embodiment 1; FIG. 6 illustrates a configuration of a second embodiment. FIG. 6 illustrates a configuration of a third embodiment. FIG. 6 illustrates a configuration of a fourth embodiment. FIG. 6 illustrates a configuration of a fourth embodiment. 1 is a diagram illustrating a configuration of a first embodiment. FIG. 6 is a diagram illustrating a configuration of a second embodiment. FIG. 6 is a diagram illustrating a configuration of a third embodiment. FIG. 6 is a diagram illustrating a configuration of a second embodiment. FIG. 6 is a diagram illustrating a configuration of a fourth embodiment. FIG. 10 is a diagram illustrating a configuration of an eighth embodiment. FIG. 10 is a diagram showing a configuration of Example 9. FIG. 10 is a diagram illustrating a configuration of a fifth embodiment. FIG. 3 illustrates a configuration of Embodiment 1;

Explanation of symbols

100 antenna 101 first substrate 102 first pattern 103 second substrate 104 second pattern 105 anisotropic conductive material 106 first insulating surface 107 second insulating surface 108 conductive particles 109 region 130 contact hole 131 Electrode 132 Anisotropic Conductive Material 133 Semiconductor Integrated Circuit 134 Electrode 135 Conductive Particle 160 Peripheral Part 300 Semiconductor Device 401 Peripheral Part 600 Substrate 601 Element Group 661 Underlayer 662 Semiconductor Layer 662a Channel Formation Region 662b Impurity Region 662c Low Concentration Impurity Region 663 First insulating layer 664 Gate electrode 665 Third insulating layer 666 Wiring 667 Second insulating layer 667a Side wall 669 Fourth insulating layer 701 Flexible substrate 711 Insulating layer 712 Release layer 713 Insulating layer 714 Insulating layer 715 Opening Part 716 Adhesive layer 717 Substrate 740 Semiconductor substrate 741 Insulating layer 1201a Corner 1201b Corner 1201c Corner 1202a Corner 1202b Corner 1202c Corner 2201 R / W
2202 Antenna 2203 Circuit unit 2204 Analog unit 2205 Digital unit 2206 Antenna 2207 Circuit unit 2501 Resonant capacitance 2502 Bandpass filter 2503 Power supply circuit 2506 Demodulation circuit 2507 Modulation circuit 2301 Code extraction circuit 2302 Code determination circuit 2303 CRC circuit 2304 Control circuit 2305 Memory circuit 3000 RFID
3011 wiring 3012 wiring 3013 wiring 3014 contact hole 4001 first step 4002 second step 4003 third step 4004 fourth step 4005 fifth step 4101 first step 4102 second step 4103 third step 4104 Fourth step 4105 Fifth step 4106 Sixth step 9521 Display unit 9520 Terminal 9532 Article A
9522 Article B

Claims (25)

A first substrate having a first insulating surface;
A first pattern made of a conductive material formed on the first insulating surface;
A second substrate having a second insulating surface provided opposite the first insulating surface;
A second pattern made of a conductive material formed on the second insulating surface;
An anisotropic conductive material provided between the first pattern and the second pattern and electrically connecting the first pattern and the second pattern;
When one of the first pattern and the second pattern is disconnected, the first pattern and the second pattern are electrically connected to the other and the disconnected portion of the anisotropic conductive material. An antenna characterized by being arranged to do so. A first substrate having a first insulating surface;
A first pattern made of a conductive material formed on the first insulating surface;
A second substrate having a second insulating surface provided opposite the first insulating surface;
A second pattern made of a conductive material formed on the second insulating surface;
An anisotropic conductive material provided between the first pattern and the second pattern and electrically connecting the first pattern and the second pattern;
The antenna according to claim 1, wherein the first pattern and the second pattern have the same shape and are overlapped with each other. A first substrate having a first insulating surface;
A first pattern made of a conductive material formed on the first insulating surface;
A second substrate having a second insulating surface provided opposite the first insulating surface;
A second pattern made of a conductive material formed on the second insulating surface;
An anisotropic conductive material provided between the first pattern and the second pattern and electrically connecting the first pattern and the second pattern;
The antenna according to claim 1, wherein all regions on the first pattern overlap with the second pattern through the anisotropic conductive material. A first substrate having a first insulating surface;
A first pattern made of a conductive material formed on the first insulating surface;
A second substrate having a second insulating surface provided opposite the first insulating surface;
A second pattern made of a conductive material formed on the second insulating surface;
An anisotropic conductive material provided between the first pattern and the second pattern and electrically connecting the first pattern and the second pattern;
All regions on the first pattern overlap with the second pattern via the anisotropic conductive material,
All the regions on the second pattern overlap with the first pattern through the anisotropic conductive material. A first substrate having a first insulating surface;
A first pattern made of a conductive material formed on the first insulating surface;
A second substrate having a second insulating surface provided opposite the first insulating surface;
A second pattern made of a conductive material formed on the second insulating surface;
An anisotropic conductive material provided between the first pattern and the second pattern and electrically connecting the first pattern and the second pattern;
All regions on the first pattern overlap with the second pattern via the anisotropic conductive material,
The antenna, wherein the first pattern and the second pattern have the same shape. In any one of Claims 1 thru | or 5,
The antenna, wherein the anisotropic conductive material is disposed so as to cover the entire first insulating surface or the entire second insulating surface. In any one of Claims 1 thru | or 6,
The antenna, wherein the first pattern and the second pattern are coiled. In any one of Claims 1 thru | or 6,
The antenna, wherein the first pattern and the second pattern are linear. In any one of Claims 1 thru | or 8,
The antenna is characterized in that the conductive material is a material containing Ag, Au, Al, Cu, Zn, Sn, Ni, Cr, Fe, Co, or Ti. In any one of Claims 1 thru | or 9,
The antenna, wherein the first substrate and the second substrate have flexibility. In claim 10,
The antenna, wherein the first substrate and the second substrate are made of plastic. In claim 10,
The first substrate and the second substrate are made of polyethylene terephthalate, polyethersulfone, polyethylene naphthalate, polycarbonate, nylon, polyetheretherketone, polysulfone, polyetherimide, polyarylate, polybutylene terephthalate, or polyimide. An antenna characterized by that. The antenna according to any one of claims 1 to 12, and
And a semiconductor integrated circuit electrically connected to the antenna, wherein data is input / output by wireless communication via the antenna. The antenna according to any one of claims 1 to 12, and
A semiconductor integrated circuit electrically connected to the antenna in a contact hole that passes through the first substrate and reaches the first pattern, or a contact hole that passes through the second substrate and reaches the second pattern A semiconductor device characterized in that data is input and output by wireless communication via the antenna. The semiconductor device according to claim 13 or 14, and
A wireless communication system comprising the semiconductor device and a reader / writer for inputting and outputting data. Forming a first pattern of a conductive material on the insulating surface of the first substrate;
Forming a second pattern of a conductive material on the insulating surface of the second substrate;
Forming an anisotropic conductive material so as to cover the entire first pattern;
The first pattern and the second pattern are electrically connected via the anisotropic conductive material, and all the regions on the first pattern overlap the second pattern. A method for manufacturing an antenna, wherein the first substrate and the second substrate are attached to each other. Forming a first pattern of a conductive material on the insulating surface of the first substrate;
Forming a second pattern made of a conductive material on the insulating surface of the second substrate so as to be line symmetric with the first pattern viewed from a direction perpendicular to the insulating surface of the first substrate;
Forming an anisotropic conductive material so as to cover the entire first pattern;
The first pattern and the second pattern are electrically connected via the anisotropic conductive material, and all the regions on the first pattern overlap the second pattern. A method for manufacturing an antenna, wherein the first substrate and the second substrate are attached to each other. In claim 16 or claim 17,
The method for manufacturing an antenna, wherein the anisotropic conductive material is formed so as to cover an entire insulating surface of the first substrate. In any one of Claims 16 thru | or 18,
The method for manufacturing an antenna, wherein the first pattern and the second pattern are formed by a droplet discharge method or a printing method. Forming a first pattern of a conductive material on the insulating surface of the first substrate;
Forming a second pattern of a conductive material on the insulating surface of the second substrate;
Forming an anisotropic conductive material so as to cover the entire first pattern;
The first pattern and the second pattern are electrically connected via the anisotropic conductive material, and all the regions on the first pattern overlap the second pattern. Bonding the first substrate and the second substrate,
A method for manufacturing a semiconductor device, comprising providing a semiconductor integrated circuit so as to be electrically connected to the first pattern or the second pattern. Forming a first pattern of a conductive material on the insulating surface of the first substrate;
Forming a second pattern made of a conductive material on the insulating surface of the second substrate so as to be line symmetric with the first pattern viewed from a direction perpendicular to the insulating surface of the first substrate;
Forming an anisotropic conductive material so as to cover the entire first pattern;
The first pattern and the second pattern are electrically connected via the anisotropic conductive material, and all the regions on the first pattern overlap the second pattern. Bonding the first substrate and the second substrate,
A method for manufacturing a semiconductor device, wherein a semiconductor integrated circuit is provided so as to be electrically connected to the first pattern or the second pattern. Forming a first pattern of a conductive material on the insulating surface of the first substrate;
Forming a second pattern of a conductive material on the insulating surface of the second substrate;
Forming a contact hole that penetrates the first substrate and reaches the first pattern, or a contact hole that penetrates the second substrate and reaches the second pattern;
Forming an anisotropic conductive material so as to cover the entire first pattern;
The first pattern and the second pattern are electrically connected via the anisotropic conductive material, and all the regions on the first pattern overlap the second pattern. Bonding the first substrate and the second substrate,
A method for manufacturing a semiconductor device, comprising: providing a semiconductor integrated circuit so as to be electrically connected to the first pattern or the second pattern in the contact hole. Forming a first pattern of a conductive material on the insulating surface of the first substrate;
Forming a second pattern made of a conductive material on the insulating surface of the second substrate so as to be line symmetric with the first pattern viewed from a direction perpendicular to the insulating surface of the first substrate;
Forming a contact hole that penetrates the first substrate and reaches the first pattern, or a contact hole that penetrates the second substrate and reaches the second pattern;
Forming an anisotropic conductive material so as to cover the entire first pattern;
The first pattern and the second pattern are electrically connected via the anisotropic conductive material, and all the regions on the first pattern overlap the second pattern. Bonding the first substrate and the second substrate,
A method for manufacturing a semiconductor device, comprising: providing a semiconductor integrated circuit so as to be electrically connected to the first pattern or the second pattern in the contact hole. 24. In any one of claims 20 to 23,
The method for manufacturing a semiconductor device, wherein the anisotropic conductive material is formed so as to cover an entire insulating surface of the first substrate. 25. In any one of claims 20 to 24,
The method for manufacturing a semiconductor device, wherein the first pattern and the second pattern are formed by a droplet discharge method or a printing method.