JP2007065455A - Liquid crystal display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a low-cost liquid crystal display device in which a liquid crystal display element has a simple structure. <P>SOLUTION: The liquid crystal display device has pixel electrodes which are arranged in a matrix, a common electrode which is opposed to the pixel electrodes, a liquid crystal layer which contains a memory type liquid crystal material sandwiched between the pixel electrodes and common electrode, and a switching means which controls the application and cutoff of a voltage to the pixel electrodes, and is characterized in that the state of liquid crystal is renewed in the order of erasure of an image, writing of an image, and display of the image by applying mutually different voltages to the common electrode according to the erasure period of the image, the writing period of the image, and the display period of the image. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a liquid crystal display device, and more particularly to an active matrix liquid crystal display device using a memory liquid crystal.

  The liquid crystal display device has features such as low power consumption, thinness, and light weight, and is suitably applied to portable devices such as a mobile phone and a portable personal computer. Since these devices operate with a built-in battery, it is required that the liquid crystal display device used for them be as power-saving as possible. Among liquid crystal display devices, a reflective liquid crystal display device has features such as low power consumption because it does not require a backlight and good visibility even in a bright environment, and is expected as a display device for a portable device. ing.

  At present, as a reflection type liquid crystal display device, a device using nematic liquid crystal represented by TN, STN or the like is generally used because it is easy to drive and has good responsiveness. However, since these liquid crystal display devices do not have a memory property, it is necessary to always apply a voltage to the liquid crystal during the display period, and power consumption for that is unavoidable.

  Recently, a liquid crystal display device using a liquid crystal having a memory property (hereinafter referred to as “memory liquid crystal”) has been proposed. This liquid crystal display device has a characteristic (memory property) that an image once written is displayed semipermanently after the application of an electric field is stopped. That is, power is consumed only when an image is rewritten, and power is not consumed in order to continue displaying the image. Therefore, as a display device for displaying still images or characters, it is expected as a display device with very low power consumption.

As memory liquid crystals, cholesteric liquid crystals, ferroelectric liquid crystals, and the like are known. Cholesteric liquid crystal is very good in terms of image quality and power consumption, but it has a problem in that driving is complicated and high voltage is required for driving for writing and erasing.
The cholesteric liquid crystal driving method includes a simple matrix driving and a simple matrix driving structure in which electrodes on both sides sandwiching the liquid crystal constituting each pixel are driven by vertical and horizontal conductive wires, respectively. An active matrix driving method in which an active element is attached to one is known. For example, Non-Patent Document 1 discloses a simple matrix driving method.

  However, in simple matrix driving, the voltage between the vertical and horizontal conductors is applied as it is to the liquid crystal of each pixel in the liquid crystal matrix, so in the cholesteric liquid crystal, the voltage is applied between the conductors for the time required for writing each pixel. It is necessary to continue. As described above, since the voltage is sequentially applied to each pixel for a predetermined time, the writing speed becomes slow.

On the other hand, in active matrix driving, a thin film transistor (TFT), which is a thin film transistor, is formed on a liquid crystal substrate, and a voltage is applied to each pixel through the TFT. Therefore, after the TFT is turned on and a voltage is applied, when the TFT is turned off, the pixel is in a floating state, and a voltage charged in the stray capacitance of the liquid crystal layer or a separately provided auxiliary capacitor is continuously applied to the liquid crystal layer. Therefore, the time for applying the voltage to the pixel via the TFT is sufficient to charge the stray capacitance of the liquid crystal layer or the stray capacitance and the auxiliary capacitance of the liquid crystal layer. Enables high-speed scanning. For example, Patent Document 1 discloses a technique for driving a cholesteric liquid crystal by active matrix driving.
JP-A-10-105085 SID '98 Hashimoto: Minolta (International Symposium Digest of Technical Paper volume 29, page 897, 1998)

In active matrix driving, a voltage is applied to a pixel through a thin film transistor (hereinafter referred to as TFT) formed on a substrate. A nematic liquid crystal or the like used for a general liquid crystal can drive a pixel with several volts. However, a very high voltage is required to drive the cholesteric liquid crystal. Conventionally, in order to drive a cholesteric liquid crystal, a source driving circuit having a high withstand voltage and capable of outputting a high voltage has been used. Such a source drive circuit having a high withstand voltage has drawbacks such as high noise and high cost. Further, when driving by outputting a high voltage using such a driver IC, a high breakdown voltage is required for the TFTs arranged in each pixel, resulting in high cost. Furthermore, since the leakage current (OFF current) of the TFT increases as the output of the source driving circuit increases, there is a problem that the display image is disturbed due to the leakage current when such a source driving circuit is used.

  In Patent Document 1, when erasing an image that requires the highest voltage, an image erasing voltage is applied to each pixel by increasing the potential at the other end of the auxiliary capacitor connected to the pixel.

  However, in Patent Document 1, there is no consideration for other periods, and there is a problem that when viewed relatively, a TFT having a low withstand voltage and a low maximum output current cannot be used. That is, with respect to Patent Document 1, a voltage necessary for a pixel is applied through a TFT when an image that requires a high voltage next after erasing an image is applied, so that the voltage corresponding to the image writing voltage is high. An output voltage source driving circuit and a high breakdown voltage TFT are required.

  The present invention has been made in view of the above-described problems, and a different voltage is applied to one of the electrodes on both sides sandwiching the liquid crystal layer according to each period of image erasing, image writing, and image display. It is an object of the present invention to provide a liquid crystal display device which can be driven even by a source drive circuit having a lower output voltage and a TFT having a lower withstand voltage by applying voltage, has a simple liquid crystal display element structure, and low cost.

(1)
Pixel electrodes arranged in a matrix;
A common electrode facing the pixel electrode;
A liquid crystal layer including a memory liquid crystal material sandwiched between the pixel electrode and the common electrode;
Switching means for controlling application and interruption of a voltage to the pixel electrode;
A liquid crystal display device comprising: a first voltage applying unit that applies different voltages to the common electrode according to an image erasing period, an image writing period, and an image display period.

(2)
The liquid crystal display device according to (1), wherein an auxiliary capacitor is connected between the pixel electrode and the common electrode.

(3)
In the erasing period of the image,
(1) or (2), wherein an absolute value of a difference between voltages applied to the pixel electrode and the common electrode is not less than a homeotropic voltage which is a threshold voltage at which the liquid crystal layer changes to a homeotropic state. ) Liquid crystal display device.

(4)
In the writing period of the image,
(1) to (3), wherein an absolute value of a difference between voltages applied to the pixel electrode and the common electrode is equal to or less than a focal conic voltage that is a threshold voltage at which the liquid crystal layer changes to a focal conic state. The liquid crystal display device according to any one of the above.

(5)
In the display period of the image,
Any one of (1) to (4), wherein an absolute value of a difference between voltages applied to the pixel electrode and the common electrode is equal to or less than a planar voltage at which the liquid crystal layer changes to a planar state. A liquid crystal display device according to 1.

(6)
Any one of (1) to (5), wherein the polarity of a voltage applied to the pixel electrode and the common electrode is opposite to that at the previous update when the state of the liquid crystal is updated. The liquid crystal display device described.

(7)
The liquid crystal display device according to (6), wherein a voltage having a polarity opposite to that at the previous voltage application is applied during an image erasing period and an image writing period.

(8)
Pixel electrodes arranged in a matrix;
A common electrode facing the pixel electrode;
A liquid crystal layer including a memory liquid crystal material sandwiched between the pixel electrode and the common electrode;
Switching means for controlling application and cutoff of voltage to the pixel electrode, and an auxiliary capacitor having one electrode connected to the pixel electrode,
The auxiliary electrode opposite to the electrode of the auxiliary capacitor has a second voltage applying unit that applies different voltages depending on an image erasing period, an image writing period, and an image display period. Liquid crystal display device.

(9)
In the erasing period of the image,
The absolute value of the difference between the voltage applied to the auxiliary electrode and the voltage applied to the pixel electrode is not less than a homeotropic voltage that is a threshold voltage at which the liquid crystal layer changes to a homeotropic state. The liquid crystal display device according to (8).

(10)
In the writing period of the image,
An absolute value of a difference between a voltage applied to the auxiliary electrode and a voltage applied to the pixel electrode is equal to or less than a focal conic voltage that is a threshold voltage at which the liquid crystal layer changes to a focal conic state. The liquid crystal display device according to (8) or (9).

(11)
In the display period of the image,
The absolute value of the difference between the voltage applied to the auxiliary electrode and the voltage applied to the pixel electrode is equal to or less than a planar voltage that is a threshold voltage at which the liquid crystal layer changes to a planar state (8). The liquid crystal display device according to any one of (10) to (10).

(12)
(8) to (11), wherein when the liquid crystal state is updated, the polarity of the voltage applied to the auxiliary electrode and the polarity of the voltage applied to the pixel electrode are opposite to those at the previous update. The liquid crystal display device according to any one of the above.

(13)
When the liquid crystal state is updated, a voltage having a polarity opposite to that at the previous update is applied to the auxiliary electrode and the pixel electrode during the image erasing period and the image writing period (12). The liquid crystal display device described.

(14)
The switching means is a thin film transistor;
Any one of (1) to (13), wherein an absolute value of a voltage applied between the input and output of the thin film transistor is equal to or less than a focal conic voltage that is a threshold voltage at which the liquid crystal layer changes to a focal conic state. 2. A liquid crystal display device according to item 1.

(15)
The maximum amplitude of the voltage applied to the pixel electrode is a voltage difference between a focal conic voltage that is a threshold voltage at which the liquid crystal layer changes to a focal conic state and a planar voltage that is a threshold voltage at which the liquid crystal layer changes to a planar state. The liquid crystal display device according to any one of (1) to (14), wherein the liquid crystal display device has an absolute value of.

  According to the present invention, a different voltage is applied to one of the electrodes on both sides sandwiching the liquid crystal layer or connected to one electrode during each period of image erasing, image writing, and image display. By applying to one electrode of the auxiliary capacity, the reference value of the applied voltage required for each period can be set to a value suitable for each period, resulting in a low withstand voltage and maximum output current. The TFT can be driven even with a small number of TFTs, and a liquid crystal display device having a simple structure and a low cost can be provided.

  Embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a configuration diagram of a basic liquid crystal cell 10, and FIG. 2 shows a change in reflectance when a voltage is applied to the liquid crystal cell 10.

  In FIG. 1, reference numerals 1 and 2 are glass substrates, 3 is a liquid crystal layer of cholesteric liquid crystal, 4 and 5 are transparent electrodes made of ITO, and 6 is a light absorption layer made of black paint or the like. The transparent electrodes 4 and 5 are connected to a power source 9 by conducting wires 7 and 8, respectively.

  FIG. 2 shows the reflectance of the liquid crystal cell 10 when measured from the observation surface (surface opposite to the light absorption layer 6) of the liquid crystal cell when a voltage is applied to the liquid crystal cell 10. In FIG. 2, the horizontal axis represents the voltage applied to the liquid crystal cell 10, and the vertical axis represents the reflectance of the liquid crystal after the voltage is removed. A solid line 11 indicates the reflectance of the liquid crystal cell 10 measured when the liquid crystal is stabilized after the voltage is applied to the liquid crystal cell 10 in the planar state and then removed. A broken line 12 indicates the reflectance of the liquid crystal cell 10 measured when a voltage is applied to the liquid crystal cell in the focal conic state and the liquid crystal is stabilized after removing the voltage. A broken line 12 has a voltage between V3 and V2 and V1 or more, and overlaps the solid line 11.

  The driving of the cholesteric liquid crystal will be described. A cholesteric liquid crystal exhibits three liquid crystal phases: a homeotropic (nematic) state, a planar state, and a focal conic state. The homeotropic state is a liquid crystal phase that is shown only when a voltage is applied to the liquid crystal. The major axis of liquid crystal molecules (hereinafter referred to as “liquid crystal axis”) is aligned with the direction of the electric field, and the liquid crystal layer becomes transparent. The planar state is a phase shown when the applied electric field is suddenly removed from a state where a voltage is applied to show a homeotropic state. (Referred to as the “helical axis”) is perpendicular to the substrate. At this time, when light is incident from a direction parallel to the helical axis, light having a wavelength represented by λ = n · p is selectively reflected, and light having a shorter wavelength is transmitted. Here, λ is a wavelength, n is an average refractive index of liquid crystal molecules, and p is a distance (spiral pitch) at which the liquid crystal molecules are twisted 360 °. When an appropriate voltage is applied to the liquid crystal layer in the planar state, the liquid crystal layer exhibits a state in which the spiral axis is oriented in a direction parallel to the substrate, that is, a focal conic state. At this time, the light incident from the direction perpendicular to the helical axis, that is, the direction perpendicular to the substrate, is transmitted without reflecting or scattering light whose wavelength is close to the helical pitch p, but light shorter than that is scattered.

  Therefore, by setting the selective reflection wavelength in the visible light region and providing the light absorption layer on the side opposite to the observation side of the element, it is possible to display the selective reflection color in the planar state and to display black in the focal conic state. In addition, by setting the selective reflection wavelength in the infrared light region and providing a light absorption layer on the side opposite to the observation side of the element, light in the infrared light region is reflected in the planar state but the wavelength in the visible light region. Because of this transmission of light, it is possible to display black, and in the focal conic state, white can be displayed by scattering of visible light.

  Cholesteric liquid crystal has hysteresis characteristics, and even when the same voltage is applied as described above, the cholesteric liquid crystal becomes different depending on the state before voltage application. Therefore, when writing to a liquid crystal having hysteresis characteristics such as a cholesteric liquid crystal, it is necessary to initialize it to a certain state once.

First, the solid line 11 will be described. In the solid line 11, the liquid crystal before the voltage application is the planar state, the reflectance indicates the R _P. A pulse voltage having a width of, for example, 5 ms is applied to the liquid crystal cell 10 from the power source 9. If the applied voltage is V4 or less, the reflectance of the liquid crystal cell 10 after applying the pulse voltage hardly changes. This voltage is called a planar voltage.

  When the voltage is between V4 and V3, the reflectivity decreases as the voltage increases. In this range, the liquid crystal layer 3 is in a state in which a planar state and a focal conic state are mixed, and most of the liquid crystal layer 3 is at the voltage V3. It becomes a focal conic state. The voltage V3 is called a focal conic voltage.

  When the voltage is in the range of V3 to V2, the reflectance hardly changes. In the voltage range from V2 to V1, the reflectance increases as the voltage increases. In this range, the liquid crystal layer 3 has both a planar state and a focal conic state.

  At the voltage V1, most of the liquid crystal layer 3 is in a planar state. Above the voltage V1, the reflectivity does not change even if the voltage is increased. In this range, the liquid crystal layer is in a homeotropic state when a voltage is applied, and the voltage V1 is referred to as a homeotropic voltage. Using this characteristic, when a voltage of V1 or higher is applied to the liquid crystal layer 3 to initialize the liquid crystal layer 3 into a planar layer, a voltage of V4 to V2 or a voltage of V2 to V1 is applied to the liquid crystal layer 3. An image having an arbitrary density can be displayed on the liquid crystal layer 3.

Next, the broken line 12 will be described. In the broken line 12, the liquid crystal before voltage application is in a focal conic state, and the reflectance indicates R _F. A pulse voltage having a width of, for example, 5 ms is applied to the liquid crystal cell 10 from the power source 9. If the applied voltage is V5 or less, the reflectance of the liquid crystal cell 10 after applying the pulse voltage hardly changes. The liquid crystal layer 3 remains in the focal conic state. In the voltage range from V5 to V1, the reflectance increases as the voltage increases. In this range, the liquid crystal layer 3 has both a planar state and a focal conic state. At the voltage V1, most of the liquid crystal layer 3 is in a planar state. Above the voltage V1, the reflectivity does not change even if the voltage is increased. In this range, the liquid crystal layer is in a homeotropic state with a voltage applied. Utilizing this characteristic, a voltage from V3 to V2 is applied to the liquid crystal layer 3 to initialize the liquid crystal layer to a focal conic state, and then a voltage from V5 to V1 is applied to the liquid crystal layer 3 to obtain an arbitrary density. An image can be displayed on the liquid crystal layer 3.

  Hereinafter, in the embodiment of the present invention, the characteristics of the cholesteric liquid crystal will be described as V1 = 40V, V2 = 30V, V3 = 20V, V4 = 10V, and V5 = 35V.

(First embodiment)
FIG. 3 is a diagram showing the configuration of the liquid crystal display device according to the first embodiment of the present invention. In the figure, for the sake of simplicity, the configuration of a liquid crystal display device having pixels of 3 rows × 3 columns is shown, but the present invention is not limited to this number of pixels. In FIG. 3, reference numeral 21 denotes a TFT (switching means) that controls application and interruption of a voltage to the pixel electrode 22, and the pixel electrode 22 sandwiches a liquid crystal layer 24 between the common electrode 23. Reference numeral 25 denotes an auxiliary capacitor, and an electrode closer to the TFT 21 is constituted by a part of the pixel electrode 22, and an auxiliary electrode 31, which is the other electrode, is connected to the common electrode 23, and when the TFT 21 is cut off, It operates so as to hold the voltage applied to the pixel electrode 22. The TFT 21, the pixel electrode 22, the common electrode 23, the liquid crystal layer 24 and the auxiliary capacitor 25 constitute one pixel. Reference numeral 26 denotes a gate line, which connects the gates of the TFTs 21 of the pixels arranged in the row direction to each other and is connected to the gate drive circuit 28. Reference numeral 27 denotes a source line that connects the sources of the TFTs 21 of the pixels arranged in the column direction to each other and is connected to the source driving circuit 29. Gate lines G1, G2, and G3 are connected to the gate driving circuit 28. By outputting voltages to these gate lines, the TFT 21 is controlled to be turned on / off, and a row to which a voltage is applied is selected. Source lines S1, S2, and S3 are connected to the source drive circuit 29, and a voltage to be applied to the pixel electrodes 22 in the selected row is output to these source lines. Reference numeral 30 denotes a common electrode power source, which applies a necessary voltage to the common electrode 23 and the auxiliary electrode 31 that is one electrode of the auxiliary capacitor 25 connected to the common electrode 23. The common electrode power supply 30 is a first voltage application unit of the present embodiment.

  In the embodiment of the present invention, the characteristics of the TFT 21 will be described assuming that the gate voltage at which the TFT 21 is turned on is 70V and the gate voltage at which the TFT 21 is turned off is −20V.

  FIG. 4 is a graph showing a change in voltage of each part during the erasing period, writing period, and display operation of the liquid crystal display device of the present embodiment. The operation of the liquid crystal display device will be described with reference to FIG.

  4, G1, G2, and G3 are voltages of the gate lines G1, G2, and G3, S1, S2, and S3 are voltages of the source lines S1, S2, and S3, respectively, and the common electrode is connected to the common electrode 23 and the common electrode 23. The voltage of the connected auxiliary electrode 25 is shown. Since the auxiliary electrode 25 has the same voltage as the common electrode 23, only the voltage of the common electrode 23 will be described below.

  Timings T1, T3, and T4 are rising timings of the voltage of the gate line G1, timing T1 is the start time of the erase period, timing T3 is the start time of the writing period, and timing T4 is the start time of the display operation. Timing T2 is the end timing of the erase period.

  (Erase Period) In FIG. 4, first, at timing T1, a voltage of, for example, 70V is output from the gate drive circuit 28 to the gate lines G1, G2, G3, the TFT 21 is turned on, and the voltages of the source lines S1, S2, S3 are Applied to the electrode 22. Thereafter, a voltage of −20 V is output from the gate drive circuit 28, and the TFT 21 is turned off. At the same time as the voltage of 70V is output to the gate line, the common electrode power supply 30 outputs the voltage Vcl, and the voltage of the common electrode 23 becomes Vcl. On the other hand, the source drive circuit 29 outputs the voltage Vsh, and the voltage of the pixel electrode 22 connected to the source lines S1, S2, S3 becomes Vsh. In the present embodiment, Vcl is set to −40V and Vsh is set to 5V so that the absolute value of the difference between the voltage Vcl of the common electrode 23 and the voltage Vsh of the pixel electrode 22 is larger than the homeotropic voltage V1. . That is, since Vsh−Vcl = 45V, the V1 voltage of the cholesteric liquid crystal of this embodiment is 40V or higher, and the liquid crystal layer 24 is in a homeotropic state.

  The period during which 70V is output to the gate lines G1, G2, and G3 and the TFT 21 is turned on may be sufficient to charge the liquid crystal layer 24 and the auxiliary capacitor 25 through the TFT 21, for example, several tens of ms. It is enough. As a result, a voltage of 45 V is applied to the liquid crystal layer 24, and the liquid crystal layer 24 enters a homeotropic state. In FIG. 4, this voltage is maintained for several tens of milliseconds, and the liquid crystal layer is sufficiently kept in a homeotropic state.

  Thereafter, at timing T2, the common electrode power supply 30 and the source drive circuit 29 set the output voltage to 0V. At this time, the gate lines G1, G2, and G3 are 70 V, and the TFT 21 remains on.

  As a result, the liquid crystal layer 24 is suddenly changed from the state where the voltage of 45 V is applied to the state where the applied voltage is zero, and thus the liquid crystal layer 24 is changed from the homeotropic state to the planar state and initialized. At this time, the liquid crystal layer 24 does not instantaneously enter the planar state, but changes to the planar state after taking a planar state once called a transient planar having a double spiral pitch. It takes about 1 ms to change from the homeotropic state to the planar state. Therefore, the writing operation may be started 1 ms after the applied voltage of the liquid crystal layer becomes 0 V, but in this embodiment, the writing operation is started after 100 ms.

  (Writing period) At the timing T3, the voltage of the gate line G1 is set to 70 V and writing is started. At this time, the output voltage of the common electrode power supply 30 changes from 0 V to Vch. In this embodiment, Vch = 15V.

  After T3, the voltage of S1 becomes 70V in sequence for the gate lines G1, G2, and G3. While the TFT 21 in the corresponding row is turned on, Vs (1,1), Vs (2,1), Vs (3 , 1). Vs (x, y) means a voltage applied to the pixel electrode 22 in the x row and the y column, for example, Vs (1, 1) is a voltage applied to the pixel electrode 22 in the first row and the first column. .

  On the other hand, the voltage Vlcd (x, y) applied to the liquid crystal layer 24 in the x row and the y column at this time is a potential difference between the voltage Vch of the common electrode 23 and Vs (x, y) of the pixel electrode 22. That is, Equation 1 is obtained.

Vlcd (x, y) = Vch−Vs (x, y).
The absolute value of Vlcd (x, y) is output in the voltage range of approximately V4 to V3 described with reference to FIG. 2 according to the writing density to each pixel pixel. In this embodiment, since V4 = 10V and V3 = 20V, the range is about 10V.

In the example of FIG. 4, in the case of the pixel in the first row and the first column, if Vs (1,1) = 5V, Vch = 15V.
Vlcd (1,1) = Vch−Vs (1,1) = 15−5 = 10V
That is, 10V is applied to the liquid crystal layer 24 of the corresponding pixel. Similarly, in the case of the pixel in the first row and the third column, if Vch = 15V and Vs (1,3) = − 5V, Vlcd (1,3) = 20V is applied to the liquid crystal layer 24 of the corresponding pixel. .

  The period during which 70 V is applied to the gate line G1 and the TFT 21 is turned on may be sufficient to charge the liquid crystal layer 24 and the auxiliary capacitor 25 through the TFT 21, and is set to 30 μs, for example, in the present embodiment. Thereafter, −20 V is output to the gate line G1, and the TFT 21 is turned off.

  In this way, the voltage applied to the liquid crystal layer 24 is held until the timing T4 when the gate line G1 becomes 70 V next, and the liquid crystal layer 24 changes a part of the liquid crystal molecules to the focal conic state, and the applied voltage. The density corresponding to is written. The period from the timing T3 to T4 is the time during which the applied voltage is held at both ends of the liquid crystal layer 24, and several hundred ms are required to change the liquid crystal to a desired state.

  As for the voltages of the gate lines G1, G2, and G3 in the writing period, the pulse voltage of 70V is output in the order of G1, G2, and G3, the gate lines G1, G2, and G3 are scanned, and the pixels in the row to which the 70V pulse is applied. Is written.

  (Display Operation) A pulse voltage of 70V is sequentially applied to the gate lines G1, G2, G3 from the timing T4 several hundred ms after the timing T3, and the TFTs 21 connected to the gate lines G1, G2, G3 are sequentially turned on. At this time, a voltage of 0 V is applied to the source lines S1, S2, S3 and the common electrode, and the applied voltage of the liquid crystal layer 24 is sequentially 0 V. For the period of the pulse voltage of 70 V, it is sufficient that the voltage of the liquid crystal layer 24 and the auxiliary capacitor 25 is discharged through the TFT 21. In this embodiment, for example, 30 μs is set. In this way, the voltage applied to the liquid crystal 24 is set to 0 V, and the liquid crystal display device enters a display operation.

  This is the end of the description of the single operation of erasing, writing, and display. Next, the operation when the display is updated next time will be described. Since the liquid crystal layer 24 deteriorates when a voltage having the same polarity is applied for a long time, when the display is updated, a voltage having a reverse polarity is applied to the liquid crystal layer 24 to prevent the deterioration.

  FIG. 5 is a graph showing changes in voltages of respective parts of the erasing period, the writing period, and the display period of the liquid crystal display device of the present embodiment when the next display is updated. In FIG. 5, the output voltage of the common electrode power supply 30 and the source drive circuit 29 is basically the same as the operation described in FIG. 4 except that it has the opposite polarity to the voltage in FIG. 4. Is omitted.

  (Erase Period) In FIG. 5, at timing T1, a voltage of 70V is output to the gate line, and at the same time, the common electrode power supply 30 outputs Vcl = + 40V having a polarity opposite to that in FIG. + 40V. On the other hand, the source drive circuit 29 outputs a reverse polarity voltage Vsh = −5 V, and the voltage of the pixel electrode 22 connected to the source lines S1, S2, S3 becomes Vsh.

  In the present embodiment, Vcl = + 40 V and Vsh are set to −5 V so that the absolute value of the difference between the voltage Vcl of the common electrode 23 and the voltage Vsh of the pixel electrode 22 is larger than the homeotropic voltage V1. . That is, Vsh−Vcl = −45 V having a polarity opposite to that in FIG. 4 is applied to the liquid crystal layer 24.

  Thereafter, at timing T2, the common electrode power supply 30 and the source drive circuit 29 set the output voltage to 0V. At this time, the gate lines G1, G2, and G3 are 70 V, and the TFT 21 remains on.

  (Writing period) At the timing T3, the voltage of the gate line G1 is set to 70 V and writing is started. At this time, the output voltage of the common electrode power supply 30 changes from 0 V to Vch. The voltage of Vch is Vch = −15 V having the opposite polarity to the case of FIG.

Further, the voltage Vs (x, y) applied to the pixel electrode 22 in the x row and the y column is given a voltage having a reverse polarity to that in the case of FIG. For example, assuming that the same image as that shown in FIG.
Therefore,
Vlcd (1,1) = Vch−Vs (1,1) = − 15 − (− 5) = − 10V
That is, −10 V is applied to the liquid crystal layer 24 of the corresponding pixel. Similarly, in the case of the pixel in the first row and the third column, if Vch = −15V and Vs (1,3) = 5V, Vlcd (1,3) = − 20V is applied to the liquid crystal layer 24 of the corresponding pixel. Join.

  Thereafter, −20 V is output to the gate line G1, and the TFT 21 is turned off.

  (Display Operation) The display operation is the same as that shown in FIG.

  The example in FIG. 5 is not limited to updating the display, and may be operated as in the example in FIG. 5 at the first display. In this way, the polarity of the voltage applied to the liquid crystal layer 24 is inverted by reversing the polarity of the output voltage of the common electrode power supply 30 and the source drive circuit 29 every time the display is updated, thereby extending the life of the liquid crystal layer 24. Can be long.

  As described above, since the predetermined voltage is supplied from the common electrode power supply 30 in the writing period, the absolute value of the voltage output from the source drive circuit 29 in the writing period can be lowered. In the present embodiment, the absolute value of the voltage amplitude output from the source drive circuit 29 is 10V, and can be set to a voltage much lower than 20V of the focal conic voltage V3. Therefore, a low-cost TFT having a low withstand voltage and a small maximum output current can be used for the TFT 2.

  In the present embodiment, the example of the liquid crystal display device in which the auxiliary capacitor 25 is connected between the pixel electrode 22 and the common electrode 23 has been described, but the presence or absence of the auxiliary capacitor 25 is determined by the voltage applied to the liquid crystal layer 24. Therefore, even in a liquid crystal display device without the auxiliary capacitor 25, the same operation can be performed to operate the liquid crystal display device.

(Second Embodiment)
FIG. 6 is a diagram showing a configuration of a liquid crystal display device according to the second embodiment of the present invention. As in FIG. 3, the configuration of a liquid crystal display device having pixels of 3 rows × 3 columns is shown for the sake of simplicity, but the present invention is not limited to this number of pixels. Components having the same functions as those of the liquid crystal display device described with reference to FIG. 3 are denoted by the same reference numerals, and description thereof is omitted.

  In FIG. 6, an auxiliary electrode 31 that is the other electrode of the auxiliary capacitor 25 is connected to an auxiliary electrode power supply 32 for each line, and is configured so that a voltage different from that of the common electrode 23 can be applied from the auxiliary electrode power supply 32. 3 is different from FIG. The auxiliary electrode power supply 32 is the second voltage application means of this embodiment.

  The auxiliary capacitors 25 of the pixels connected to the gate lines G1, G2, and G3 are wired in common by auxiliary electrode lines H1, H2, and H3. The auxiliary electrode power supply 32 is wired in common so that a predetermined voltage is supplied to each of the auxiliary electrode lines H1, H2, and H3.

  FIG. 7 is a graph showing a change in voltage of each part of the liquid crystal display device according to the second embodiment of the present invention.

  In FIG. 7, in addition to the same parts as in FIG. 4, H1, H2, and H3 indicate changes in the voltages of the auxiliary electrode lines H1, H2, and H3, respectively. The operation of the liquid crystal display device according to the second embodiment will be described with reference to FIG.

  In this embodiment, the erase period and the rewrite operation are different from those in the first embodiment. In the first embodiment, during the erasing period, the output voltage of the common electrode power supply 30 is applied to the common electrode 23, while the output voltage of the source drive circuit 29 is applied to the pixel electrode 22, whereby a predetermined voltage is applied to the liquid crystal layer 24. Although a voltage is applied, in this embodiment, the output voltage of the common electrode power supply 30 remains 0V. Therefore, if the common electrode is grounded and fixed to OV, the common electrode power supply 30 is not particularly required.

  The way of viewing the graph of FIG. 7 is the same as that of FIG. In the erasing period, the voltages of H1, H2, and H3 are Vhh at timings T1 and T2. The voltage of the common electrode remains 0V. When the voltage Vhh is applied to the auxiliary electrode 23 in this way, the voltage Vlcd1 given by Equation 2 is applied to all the pixel electrodes 22.

  The capacitance of the auxiliary capacitor 25 is Cs, and the capacitance of the liquid crystal layer 24 is Clc.

Vlcd1 = Cs × Vhh / (Clc + Cs) (2)
Here, when Vhh = 100 V and Clc = Cs, Vlcd is 50 V, which is equal to or higher than the V1 voltage 40 V of the cholesteric liquid crystal of this embodiment, and the liquid crystal layer 24 is in a homeotropic state.

  Next, the writing period starting from T3 will be described.

  At timing T3, the voltage of the gate line G1 is set to 70V, and the write operation is started. At this time, the voltage of the common electrode and H1 are 0V. On the other hand, the voltage Vs (1, 1) is applied to the voltage of the source line S1 output from the source drive circuit 29, that is, the first row and first column pixel electrodes 22 connected to the source line S1. Similarly, the voltage Vs (1,2) is applied to the first and second column pixel electrodes 22 connected to the source line S2, and the voltage Vs (1,2) is applied to the first and third column pixel electrodes 22 connected to the source line S3. The voltage Vs (1, 3) is applied. In the voltage Vs (x, y), x and y mean voltages applied to the pixel electrodes 22 in the x-th row and the y-th column.

  Since the TFT 21 is on while Cs and Clc are sufficiently charged, Cs and Clc are charged with a charge corresponding to the voltage Vsc. At the timing of T3a after the voltage of the gate line G1 becomes −20V and the TFT 21 is completely turned off, the voltage Vhm is output from the auxiliary electrode power source 32 and H1 becomes Vhm.

  At this time, the voltage Vlcd (x, y) of the pixel electrode 22 in the x-th row and the y-th column is given by Equation 3.

Vlcd (x, y) = Vs (x, y) + Cs × Vhm / (Clc + Cs) Equation 3
Here, for example, if Vs (1,1) = 5V, Vhm = 30V, and Clc = Cs, Vlcd (1,1) becomes 20V. When Vs (1,2) = 0V, Vhm = 30V, and Clc = Cs, Vlcd (1,2) becomes 15V.

  As in the first embodiment, Vs (x, y) is an absolute value of Vlcd (x, y) calculated by Expression 2 in a voltage range of approximately V4 to V3 corresponding to the writing density to the pixel. It is set to be.

  Similarly, the write operation is sequentially performed for the second and third rows.

  The period from the timing T3 to T4 is the time during which the applied voltage is held at both ends of the liquid crystal layer 24, and several hundred ms are required to change the liquid crystal to a desired state. The operation after T4 is the same as that in the first embodiment, and a description thereof will be omitted.

  As for the operation when the next display is updated next time, a reverse polarity voltage is applied to the liquid crystal layer 24 every time the display is updated as in the first embodiment. That is, Vs (x, y), Vhh, and Vhm may be reversed in polarity.

  As in the first embodiment, for example, if Vs (1,1) = − 5V, Vhm = −30V, and Clc = Cs, Vlcd (1,1) becomes −20V from Equation 2 and a reverse polarity voltage is given. It is done.

  Thus, by inverting the polarity of the voltage applied to the liquid crystal layer 24, the deterioration of the liquid crystal layer 24 can be prevented.

  As described above, according to the present embodiment, different voltages are applied to one of the electrodes on both sides of the liquid crystal layer depending on the period of image erasing, image writing, and image display. Since a source driving circuit having a lower output voltage and a TFT having a lower withstand voltage can be driven than in the prior art, the structure of the liquid crystal display element is simplified and a liquid crystal display device can be provided at a lower cost.

It is a figure which shows the structure of a liquid crystal cell for demonstrating operation | movement of a cholesteric liquid crystal. It is a figure which shows the change of a reflectance when a voltage is applied to a liquid crystal cell for demonstrating operation | movement of a cholesteric liquid crystal. It is a figure which shows the structure of the liquid crystal display device which concerns on the 1st Embodiment of this invention. It is a graph which shows the change of the voltage of each part of the liquid crystal display device which concerns on the 1st Embodiment of this invention. It is a graph which shows the change of the voltage of each part of the liquid crystal display device which concerns on the 1st Embodiment of this invention. It is a figure which shows the structure of the liquid crystal display device which concerns on the 2nd Embodiment of this invention. It is a graph which shows the change of the voltage of each part of the liquid crystal display device which concerns on the 2nd Embodiment of this invention.

Explanation of symbols

1, 2 Glass substrate 3 Cholesteric liquid crystal layer 4, 5 Transparent electrode 6 Light absorption layer 7, 8 Conductor 9 Power supply 21 TFT
22 pixel electrode 23 common electrode 24 liquid crystal layer 25 auxiliary capacitor 26 gate line 27 source line 28 gate drive circuit 29 source drive circuit 30 common electrode power supply 31 auxiliary electrode 32 auxiliary electrode power supply

Claims (15)

Pixel electrodes arranged in a matrix;
A common electrode facing the pixel electrode;
A liquid crystal layer including a memory liquid crystal material sandwiched between the pixel electrode and the common electrode;
Switching means for controlling application and interruption of a voltage to the pixel electrode;
A liquid crystal display device comprising: a first voltage applying unit that applies different voltages to the common electrode according to an image erasing period, an image writing period, and an image display period. The liquid crystal display device according to claim 1, wherein an auxiliary capacitor is connected between the pixel electrode and the common electrode. In the erasing period of the image,
The absolute value of a difference between voltages applied to the pixel electrode and the common electrode is equal to or higher than a homeotropic voltage that is a threshold voltage at which the liquid crystal layer changes to a homeotropic state. The liquid crystal display device described. In the writing period of the image,
4. The absolute value of a difference between voltages applied to the pixel electrode and the common electrode is equal to or less than a focal conic voltage that is a threshold voltage at which the liquid crystal layer changes to a focal conic state. The liquid crystal display device according to any one of the above. In the display period of the image,
5. The absolute value of a difference between voltages applied to the pixel electrode and the common electrode is equal to or less than a planar voltage at which the liquid crystal layer changes to a planar state. 6. Liquid crystal display device. The polarity of the voltage applied to the pixel electrode and the common electrode when updating the state of the liquid crystal is opposite to that at the time of the previous update. Liquid crystal display device. 7. The liquid crystal display device according to claim 6, wherein a voltage having a polarity opposite to that at the previous voltage application is applied during an image erasing period and an image writing period. Pixel electrodes arranged in a matrix;
A common electrode facing the pixel electrode;
A liquid crystal layer including a memory liquid crystal material sandwiched between the pixel electrode and the common electrode;
Switching means for controlling application and cutoff of voltage to the pixel electrode, and an auxiliary capacitor having one electrode connected to the pixel electrode,
The auxiliary electrode opposite to the electrode of the auxiliary capacitor has a second voltage applying unit that applies different voltages depending on an image erasing period, an image writing period, and an image display period. Liquid crystal display device. In the erasing period of the image,
The absolute value of the difference between the voltage applied to the auxiliary electrode and the voltage applied to the pixel electrode is not less than a homeotropic voltage that is a threshold voltage at which the liquid crystal layer changes to a homeotropic state. The liquid crystal display device according to claim 8. In the writing period of the image,
An absolute value of a difference between a voltage applied to the auxiliary electrode and a voltage applied to the pixel electrode is equal to or less than a focal conic voltage that is a threshold voltage at which the liquid crystal layer changes to a focal conic state. The liquid crystal display device according to claim 8 or 9. In the display period of the image,
The absolute value of the difference between the voltage applied to the auxiliary electrode and the voltage applied to the pixel electrode is equal to or less than a planar voltage that is a threshold voltage at which the liquid crystal layer changes to a planar state. The liquid crystal display device according to any one of 8 to 10. 12. The voltage applied to the auxiliary electrode and the polarity of the voltage applied to the pixel electrode when updating the state of the liquid crystal are opposite to those at the previous update. 2. A liquid crystal display device according to item 1. 13. When the liquid crystal state is updated, a voltage having a polarity opposite to that at the previous update is applied to the auxiliary electrode and the pixel electrode during an image erasing period and an image writing period. The liquid crystal display device described. The switching means is a thin film transistor;
14. The absolute value of the voltage applied between the input and output of the thin film transistor is equal to or less than a focal conic voltage that is a threshold voltage at which the liquid crystal layer changes to a focal conic state. The liquid crystal display device according to item. The maximum amplitude of the voltage applied to the pixel electrode is a voltage difference between a focal conic voltage that is a threshold voltage at which the liquid crystal layer changes to a focal conic state and a planar voltage that is a threshold voltage at which the liquid crystal layer changes to a planar state. The liquid crystal display device according to claim 1, wherein the liquid crystal display device is equal to or less than an absolute value of the liquid crystal display device.

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