JP2007059588A - Method of manufacturing wiring board, and wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a wiring board wherein an electrode terminal of electronic component and a solder bump are successfully bonded and thereby these elements can be connected stably with each other, and to provide the wiring board. <P>SOLUTION: The method comprises the steps of covering an insulating substrate 1 and an element connecting pad 3 with a first solder resist layer 4a including a first aperture 10a for exposing the central region of the upper surface of the element connecting pad 3, forming a solder bump 5 projected in its top area from the first solder resist layer 4a on the element connecting pad 3 exposed in the first aperture 10a, forming a flattened top surface 5a by pressing the top area, and covering the first solder resist layer 4a with a second solder resist layer 4b including a second aperture 10b for exposing the top surface 5a. The wiring board includes the top surface where the solder bump is flattened to the position lower than the upper surface of the solder resist layer. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a method of manufacturing a wiring board used for mounting electronic components such as semiconductor elements and the wiring board.

  In recent years, organic material-based multilayer wiring boards have been widely used as wiring boards used for mounting electronic components such as semiconductor elements. Organic material-based multilayer wiring boards are laminated with organic insulating materials such as insulating plates in which a glass fiber substrate is impregnated with a thermosetting resin and insulating layers in which an inorganic insulating filler is dispersed in a thermosetting resin. A wiring conductor made of a conductive material such as a copper foil or a copper plating layer is disposed inside and on the surface of the insulating substrate, and electrically connected to an electrode terminal of an electronic component such as a semiconductor element on the upper surface of the insulating substrate. An element connection pad for connection is formed.

  Further, a solder resist layer having an opening for exposing the central portion of the upper surface of the element connection pad is deposited on the insulating substrate and the element connection pad, and the element connection pad exposed in the opening of the solder resist layer A solder bump for electrically connecting the electrode terminal of the electronic component and the element connection pad is formed on the top.

  Then, the electronic component is placed on the upper surface of the wiring board so that each electrode terminal is in contact with the corresponding solder bump, and these are heated by a heating device such as an electric furnace to melt the solder bump, The electronic component is mounted on the wiring board by connecting the solder bump and the electrode terminal of the electronic component.

  Such a wiring board is manufactured as follows, for example. That is, first, a plurality of circular element connection pads are formed on the upper surface of an insulating substrate having a plurality of wiring conductors inside and / or on the surface, and the upper surfaces of the element connection pads are formed on the insulating substrate and the element connection pads. A solder resist layer having an opening exposing the central portion is deposited. Next, a solder paste composed of flux and solder powder is printed on the element connection pads by a conventionally known screen printing method, and this is heated to melt the solder powder in the solder paste, and then the molten solder is cooled. It is manufactured by solidifying and forming solder bumps on the element connection pads. At this time, the surface of the solder bump becomes spherical due to the surface tension of the molten solder.

  Here, if the surface of the solder bump formed on the element connection pad remains spherical, the contact between the electrode terminal of the electronic component and the solder bump becomes unstable, and the electrode terminal of the electronic component and the solder bump It becomes difficult to connect. Therefore, the top of the solder bump is flattened by pressing to form a solder bump having a flat top surface.

  Recently, in a semiconductor device housing package that mounts semiconductor devices such as ICs and LSIs that have been highly integrated, and in a wiring board that is applied to a hybrid integrated circuit device in which various electronic components are mounted, electronic component connection There is a demand for miniaturization and high density arrangement of element connection pads. For example, the diameter of the element connection pads exposed from the opening of the solder resist layer is 70 μm or less and the arrangement interval (interval between pad centers) is 120 μm or less. Has begun to appear.

  4A to 4C are schematic explanatory views showing a conventional method for forming a solder bump having a flat top surface formed on miniaturized and high-density arrayed element connection pads. First, as shown in FIG. 4A, a solder resist having an element connection pad 30 formed on the upper surface and miniaturized and densely arranged, and having an opening 41 exposing the central part of the element connection pad 30. A wiring substrate 100 to which the layer 40 is applied is prepared.

  Next, a solder paste containing solder powder is printed on the element connection pads 30 of the wiring board 100. Here, in order to prevent the solder paste from being short-circuited between the adjacent element connection pads 30, the amount of solder paste to be printed must be reduced. As a result, as shown in FIG. The height of the solder bump 50 formed on the connection pad 30 is low. Such a solder bump 50 is in a state where its top portion slightly protrudes from the upper surface of the solder resist layer 40.

  Here, as described above, the top of the solder bump 50 is flattened by pressing. In general, a method of flatly crushing the top portion with a flat plate pressing jig is used for pressing, but even if the top portion of the solder bump 50 slightly protruding from the upper surface of the solder resist layer 40 is flattened by pressing, As shown in FIG. 4C, only a flat top surface 50a having a small area can be obtained. For this reason, the electrode terminal of an electronic component and this solder bump 50 cannot contact favorably, but there exists a problem that both connection becomes unstable.

  In Patent Document 1, a recess formed on the surface of a wiring board is filled with a first solder paste and solidified, and the space of the recess on the first solder paste shrunk by the solidification has a predetermined melting point. And a method of mounting a semiconductor device (electronic component) including a step of filling with a second solder paste having the following. According to this document, it is described that the solder shape of the connecting portion can be formed from a spherical shape to a highly reliable drum shape.

However, when connecting the electronic component and the wiring board, it is necessary to adjust the reflow temperature to the melting point temperature of the second solder paste, and the liquefied second solder paste is used as an adhesive for mounting. Yes. For this reason, even if the wiring board described in Patent Document 1 is used, a wiring board having excellent connection reliability is not always obtained.
JP-A-7-273146

  The present invention has been completed in view of such conventional problems, and an object of the present invention is to satisfactorily contact the electrode terminals of the electronic component and the solder bumps, thereby stably connecting the two. An object of the present invention is to provide a method for manufacturing a wiring board and a wiring board that can be used.

As a result of intensive studies to solve the above problems, the present inventor has found a solution means having the following configuration, and has completed the present invention.
(1) a step of preparing an insulating substrate having a wiring conductor on the inside and at least one of its surfaces and having an element connection pad on the upper surface; and a central portion of the upper surface of the element connection pad on the insulating substrate and the element connection pad A step of depositing a first solder resist layer having a first opening exposing the top, and a top portion of the first solder resist layer on the element connection pad exposed in the first opening. A step of forming a protruding solder bump, a step of forming a solder bump having a flattened top surface by pressing the top portion of the solder bump, and the top surface on the first solder resist layer. And a step of depositing a second solder resist layer having a second opening to be exposed.

(2) An insulating substrate having a wiring conductor on at least one of the inside and the surface thereof, an element connection pad formed on the insulating substrate, and the center of the upper surface of the element connection pad on the insulating substrate and the element connection pad A wiring board comprising: a solder resist layer deposited so as to have an opening exposing a portion; and a solder bump formed on the element connection pad exposed in the opening, The bump has a top surface flattened at a position lower than the upper surface of the solder resist layer.
(3) The solder resist layer includes a first solder resist layer having an upper surface lower than the flattened top surface, and a second solder resist layer laminated on the first solder resist layer. The wiring board as set forth in (2), wherein

  According to the above (1), even if the height of the solder bump formed on the element connection pad is low, it is possible to form a solder bump having a flattened top surface with a sufficient area. A flat surface with a sufficient area can be secured on the top surface of the solder bump, and as a result, the electrode terminal of the electronic component and the solder bump can be in good contact with each other, thereby stably connecting the two. A wiring board that can be provided can be provided. In addition, a solder resist layer having a sufficient thickness can be formed.

  According to the above (2) and (3), the solder bump formed on the element connection pad exposed in the opening of the solder resist layer has the top surface flattened at a position lower than the upper surface of the solder resist layer. Therefore, when the electrode terminal of the electronic component is brought into contact with the solder bump, the electrode terminal of the electronic component and the solder bump having a flat top surface can be satisfactorily brought into contact, and the electrode terminal of the electronic component Can be easily positioned in the opening that is a recess, whereby the electrode terminal of the electronic component and the solder bump can be stably connected.

<Manufacturing method of wiring board>
Hereinafter, an embodiment of a method for manufacturing a wiring board according to the present invention will be described in detail with reference to the drawings. FIG. 1 is a schematic cross-sectional view showing a wiring board according to the present embodiment and electronic components connected to the wiring board. As shown in the figure, this wiring board includes an insulating substrate 1 in which wiring conductors 2 are disposed from the upper surface to the lower surface, an element connection pad 3 disposed on the upper surface of the insulating substrate 1, and the element connection pad. 3 and a protective solder resist layer 4 is displayed on the outermost surface thereof, mainly for mounting an electronic component 20 such as a semiconductor element. A wiring board according to the present embodiment (hereinafter also simply referred to as a wiring board) is configured.

  The insulating substrate 1 is made of, for example, an epoxy resin or an epoxy resin on the upper and lower surfaces of an insulating plate 1a made of an electrically insulating material obtained by impregnating a glass fabric in which glass fibers are woven vertically and horizontally with a thermosetting resin such as epoxy resin or bismaleimide triazine resin. A plurality of insulating layers 1b each made of an electrically insulating material in which an inorganic insulating filler such as silicon oxide powder is dispersed in a thermosetting resin such as a bismaleimide triazine resin are laminated. A wiring conductor 2 made of a conductive material such as foil or copper plating is disposed.

  The insulating plate 1a is a substantially rectangular flat plate having a thickness of about 0.3 to 1.5 mm and having a plurality of through holes 6 having a diameter of about 0.1 to 1.0 mm from the upper surface to the lower surface. A wiring conductor 2 is attached to the inner surface of the through hole 6. Each through hole 6 is filled with an embedded resin 7 made of a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin, and the wiring conductor 2 is covered on the upper and lower end surfaces of the embedded resin 7. It is worn.

  The insulating plate 1a functions as a core member of the wiring board. After a sheet in which a glass fabric is impregnated with an uncured thermosetting resin is prepared and the thermosetting resin is thermoset, the insulating plate 1a is formed between the upper and lower surfaces. The through-hole 6 is formed by drilling.

  Further, the wiring conductors 2 on the upper and lower surfaces of the insulating plate 1a are obtained by pasting a copper foil having a thickness of about 3 to 50 μm on the upper and lower surfaces of the sheet for the insulating plate 1a in advance and etching the copper foil. It is formed. The wiring conductor 2 on the inner surface of the through hole 6 and the end surface of the embedded resin 7 is coated with a copper plating layer having a thickness of about 3 to 50 μm on the inner surface of the through hole 6 and the end surface of the embedded resin 7 by electroless plating and electrolytic plating. Is formed.

  Further, the embedded resin 7 filled in the through hole 6 of the insulating plate 1a is filled with an uncured paste-like thermosetting resin into the through hole 6 to which the copper plating layer is applied by screen printing. After the thermosetting, the upper and lower end surfaces are polished flat.

  The insulating layer 1b laminated on the upper and lower surfaces of the insulating plate 1a has a thickness of about 20 to 60 μm, and a plurality of via holes 8 having a diameter of about 30 to 100 μm are formed between the upper and lower surfaces of each insulating layer 1b. A wiring conductor 2 made of copper plating is deposited on the surface of each insulating layer 1b and the via hole 8. These insulating layers 1b are for forming insulating intervals for wiring the wiring conductors 2 with high density. Then, by electrically connecting the wiring conductor 2 on the upper layer side and the wiring conductor 2 on the lower layer side of the insulating layer 1b through the wiring conductor 2 in the via hole 8, a high-density wiring can be formed in three dimensions. Yes.

  The insulating layer 1b is formed by attaching an uncured thermosetting resin film having a thickness of about 20 to 60 μm to the upper and lower surfaces of the insulating plate 1a on which the wiring conductor 2 is formed, and thermally curing the film and via-hole processing by laser processing. 8 is perforated and the next insulating layer 1b is sequentially laminated thereon in the same manner. The wiring conductor 2 deposited in the surface of each insulating layer 1b and in the via hole 8 is made of copper having a thickness of about 5 to 50 μm in the surface of each insulating layer 1b and in the via hole 8 every time each insulating layer 1b is formed. It is formed by depositing the plating on a predetermined pattern by a pattern forming method such as a known semi-additive method or subtractive method.

  Further, the wiring conductor 2 formed between the upper and lower surfaces of the insulating substrate 1 functions as a conductive path for connecting each electrode terminal 21 of the electronic component 20 to the wiring conductor of the external electric circuit board. A part of the wiring conductor 2 on the upper surface is connected to the element connection pad 3 that is electrically connected to each electrode terminal 21 of the electronic component 20 via the solder bump 5. Further, a part of the wiring conductor 2 exposed on the lower surface of the insulating substrate 1 is connected to the external connection pad 9 that is electrically connected to the wiring conductor or the like of the external electric circuit board.

  The element connection pad 3 and the external connection pad 9 are substantially circular patterns made of a conductor layer connected to the wiring conductor 2, and the outer peripheral portion thereof is covered with a solder resist layer 4 with a width of about 15 to 35 μm. The exposed diameter is about 50 to 200 μm for the element connection pad 3 and about 0.5 to 2.5 mm for the external connection pad 9. Thus, by covering the outer periphery of the element connection pads 3 and the external connection pads 9 with the solder resist layer 4, the electrical insulation reliability between the element connection pads 3 and the external connection pads 9 is increased, The adhesion strength of the element connection pads 3 and the external connection pads 9 to the insulating substrate 1 can be increased.

  On the outermost insulating layer 1b, a solder resist layer 4 having openings 10 and 11 exposing the central portions of the element connection pads 3 and the external connection pads 9 is deposited. The solder resist layer 4 is, for example, an insulating material in which about 30 to 70% by mass of an inorganic powder filler such as silica or talc is dispersed in an acrylic-modified epoxy resin having solder resistance (which does not cause deformation or cracking at the melting point of the solder). The electrical insulation reliability between the element connection pads 3 and the external connection pads 9 is increased, and the adhesion strength of the element connection pads 3 and the external connection pads 9 to the insulating substrate 1 is increased. Eggplant.

  In addition, solder bumps 5 are connected to the element connection pads 3. The solder bump 5 is made of a low melting point solder such as tin 63-lead 37 eutectic solder, tin 96.5-silver 3.5 eutectic solder, tin 96-silver 3.5-copper 0.5 non-eutectic solder. It functions as a connecting material that electrically and mechanically connects the element connection pad 3 and the electrode terminal 21 of the electronic component 20. Then, the electronic component 20 is placed on the insulating substrate 1 so that each electrode terminal 21 of the electronic component 20 is in contact with the corresponding solder bump 5, and these are heated by a heating device such as an electric furnace to be solder bumps. The solder bumps 5 are connected to the electrode terminals 21 of the electronic component 20 by cooling and solidifying after melting 5.

  Here, the solder bump has a top surface whose top is pressed and flattened. In the method of the present invention, the solder resist layer 4 is composed of the first and second solder resist layers 4a and 4b. Since the solder bumps having a flattened top surface are formed using these solder resist layers 4a and 4b, a sufficient area can be obtained even when the height of the solder bumps formed on the element connection pads 3 is low. A solder bump 5 having a flattened top surface can be formed. Such solder bumps 5 can be formed, for example, as shown in FIG.

  2A to 2E are enlarged cross-sectional views of main parts showing a method for forming a solder bump having a flattened top surface according to the present embodiment. 2A to 2E, only a part of the insulating layer 1b is shown in the insulating substrate 1 shown in FIG.

  First, as shown in FIG. 2A, an insulating substrate 1 having a wiring conductor 2 on at least one of the inside and the surface and having an element connection pad 3 formed on the upper surface is prepared. As described above, the insulating substrate 1 is formed on the upper and lower surfaces of a plate-like insulating plate 1a formed by impregnating a glass fabric in which glass fibers are woven vertically and horizontally with a thermosetting resin such as epoxy resin or bismaleimide triazine resin. A plurality of insulating layers 1b made of a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin are laminated, and a wiring conductor 2 made of a copper foil or a copper plating film is formed from the upper surface to the lower surface. . The pad 3 is formed as a part of the wiring conductor 2 in a circular pattern by a semi-additive method, for example.

  Next, as shown in FIG. 2B, the thickness having the first opening 10 a that exposes the center of the upper surface of the element connection pad 3 on the insulating substrate 1 and the element connection pad 3 is about 5 to 15 μm. The first solder resist layer 4a is applied. The first solder resist layer 4a is formed by depositing a photosensitive resin layer for the first solder resist layer 4a on the insulating substrate 1 and the element connection pad 3 and then applying the first opening portion by photolithography. It is formed by exposure and development so as to have 10a, and finally UV curing and heat curing.

  The photosensitive resin layer for the first solder resist layer 4a is formed by applying a photosensitive resin paste on the insulating substrate 1 and the element connection pad 3 by a screen printing method or the like, or drying the photosensitive resin layer. It adheres by sticking on 1 and the element connection pad 3. FIG.

  Next, as shown in FIG. 2C, a hemispherical solder bump whose top portion protrudes from the upper surface of the first solder resist layer 4a on the element connection pad 3 exposed in the first opening 10a. 5 is formed. Such a solder bump 5 is obtained by printing a solder paste containing solder and flux on the element connection pad 3 exposed in the first opening 10a by screen printing or the like and then heating it. It is formed by melting the solder, making it hemispherical with the surface tension of the solder, and then solidifying by cooling.

  At this time, since the thickness of the first solder resist layer 4a is as thin as about 5 to 15 μm, even if the amount of the solder paste printed on the element connection pad 3 is small, the top portion is the first solder resist layer 4a. A hemispherical solder bump 5 protruding from the upper surface with a sufficient height can be formed. As solder in the solder paste, tin 63-lead 37 eutectic solder, tin 96.5-silver 3.5 eutectic solder, tin 96-silver 3.5-copper 0.5 non-eutectic solder, etc. A spherical solder having a particle diameter of about 3 to 25 μm and made of a low melting point solder is preferably used.

  Next, as shown in FIG. 2D, the top of the hemispherical solder bump 5 protruding from the upper surface of the first solder resist layer 4a is pressed, and the solder bump 5 having a flattened top surface 5a. Form. In order to press the top of the solder bump 5, a flat press jig made of a hard material such as stainless steel or ceramics is pressed onto the solder bump 5 using hydraulic pressure or air pressure, and the solder bump is pressed by the press jig. A method of flatly crushing the top of 5 is adopted. At this time, since the top of the solder bump 5 protrudes from the upper surface of the first solder resist layer 4a with a sufficient height, a flat top surface 5a having a large area can be formed by pressing.

  Next, as shown in FIG. 2E, a second solder having a second opening 10b for exposing the flattened top surface 5a of the solder bump 5 on the first solder resist layer 4a. The resist layer 4b is deposited to a thickness such that the upper surface thereof is higher than the top surface 5a of the solder bump 5. In this way, the second solder resist layer 4b is applied to a thickness such that the upper surface of the second solder resist layer 4b is higher than the top surface 5a of the solder bump 5, so that the inside of the second opening 10b is within the top surface 5a of the solder bump 5. The electrode terminal 21 of the electronic component 20 can be easily positioned in the recess.

  Moreover, since the top surface of the solder bump 5 exposed in the second opening 10b is flattened by pressing and has a sufficient area, the electrode terminals 21 and the solder bumps 5 of the electronic component 20 are satisfactorily connected. It can be made to contact. Furthermore, the thickness of the solder resist layer 4 can be made sufficient by the second solder resist layer 4b, and by the solder resist layer 4 composed of the first solder resist layer 4a and the second solder resist layer 4b, The electrical insulation reliability between the element connection pads 3 can be improved, and the adhesion strength of the element connection pads 3 can be increased.

<Wiring board>
Next, the wiring board according to the present invention will be described in detail with reference to the drawings. FIG. 3 is an enlarged cross-sectional view showing a main part of the wiring board according to the present invention. In FIG. 3, the same or equivalent parts as those in FIGS. 1 and 2 described above are denoted by the same reference numerals and description thereof is omitted.

  As shown in FIG. 3, the solder bump 5 in the wiring board of the present invention has a top surface 5 a that is flattened at a position lower than the upper surface of the solder resist layer 4. As described above, since the solder bump 5 has the flattened top surface 5 a at a position lower than the upper surface of the solder resist layer 4, the electrode terminal 21 of the electronic component 20 is brought into contact with the solder bump 5. The electrode terminal 21 of the electronic component 20 and the solder bump 5 having the flat top surface 5a can be satisfactorily brought into contact with each other, and the electrode terminal 21 of the electronic component 20 is placed in the opening 10 which is a recess. Positioning can be performed easily, whereby the electrode terminal 21 of the electronic component 20 and the solder bump 5 can be stably connected.

  Specifically, the top surface of the solder bump 5 is set so that the height H from the top surface 5a of the solder bump 5 shown in FIG. 3 to the top surface of the solder resist layer 4 is about 2 to 20 μm, preferably about 5 to 15 μm. 5a should be lower than the upper surface of the solder resist layer 4. Thereby, the electrode terminal 21 of the electronic component 20 can be positioned very well in the opening 10 which is a recess.

  In the wiring board of the present invention, in order to configure the pressed top surface 5a of the solder bump 5 to be at a position lower than the upper surface of the solder resist layer 4, the upper surface side of the solder resist layer 4 is formed with the upper surface of the solder resist layer 4 being solder bumps. The first solder resist layer 4a having a thickness lower than that of the top surface 5a of 5 and the second solder resist layer 4b having a thickness higher than that of the top surface 5a of the solder bump 5 and laminated thereon. It is good to do.

  And as above-mentioned, after forming the 1st soldering resist layer 4a which has the 1st opening part 10a on the insulating substrate 1 and the element connection pad 3, on the element connection pad 3 exposed from the 1st opening part 10a The solder bumps 5 are welded to each other, and the top of the solder bumps 5 is pressed to form a flat top surface 5a. Thereafter, the second solder resist layer 4b having the second opening 10b is soldered on the upper surface. The bump 5 is formed to a thickness that is higher than the top surface of the bump 5.

Thereby, even if the height of the solder bump 5 is low, the solder bump 5 having a flat top surface 5a having a sufficient area can be formed, and the first solder resist layer 4a and the second solder resist layer 4a can be formed. A sufficient thickness as the solder resist layer 4 can be ensured by the solder resist layer 4b, and the electrical insulation reliability between the element connection pads 3 and the adhesion strength of the element connection pads 3 can be increased.
Since the configuration other than that described above is the same as the method of the present invention described above, description thereof will be omitted.

  In the embodiment according to the method of the present invention described above, the second solder resist layer 4b is coated on the first solder resist layer 4a so that the upper surface thereof is higher than the top surface 5a of the solder bump 5. However, the method of the present invention is not limited to this. For example, the second solder resist layer 4b is formed on the first solder resist layer 4a, and the top surface of the solder bump 5 is formed on the upper surface. You may adhere to the thickness which becomes the same height as the surface 5a, or the thickness which becomes low. Even with such a configuration, the solder bump 5 having a flattened top surface with a sufficient area can be formed.

It is a schematic sectional drawing which shows the wiring board in one Embodiment of the manufacturing method of the wiring board concerning this invention, and the electronic component connected to this wiring board. (A)-(e) is a principal part expanded sectional view which shows the formation method of the solder bump which has the planarized top surface concerning this embodiment. It is a principal part expanded sectional view which shows the principal part of the wiring board concerning this invention. (A)-(c) is a schematic explanatory drawing which shows the formation method of the conventional solder bump which has the flat top surface formed on an element connection pad.

Explanation of symbols

1: Insulating substrate 2: Wiring conductor 3: Element connection pad 4: Solder resist layer 4a: First solder resist layer 4b: Second solder resist layer 5: Solder bump 5a: Top surface 10 of solder bump 5: Solder resist Layer 10 opening 10a: first opening 10b: second opening

Claims (3)

Preparing an insulating substrate having a wiring conductor on at least one of the inside and the surface and having an element connection pad formed on the upper surface;
Depositing a first solder resist layer having a first opening on the insulating substrate and on the element connection pad to expose a central portion of the upper surface of the element connection pad;
Forming solder bumps whose tops protrude from the first solder resist layer on the element connection pads exposed in the first opening;
Forming a solder bump having a flattened top surface by pressing the top of the solder bump;
Depositing a second solder resist layer having a second opening that exposes the top surface on the first solder resist layer. An insulating substrate having a wiring conductor on at least one of the inside and the surface;
An element connection pad formed on the insulating substrate;
A solder resist layer deposited on the insulating substrate and on the element connection pad so as to have an opening that exposes a central portion of the upper surface of the element connection pad;
A wiring board comprising solder bumps formed on the element connection pads exposed in the openings,
The wiring board according to claim 1, wherein the solder bump has a flattened top surface at a position lower than an upper surface of the solder resist layer. The solder resist layer is composed of a first solder resist layer having an upper surface lower than the flattened top surface, and a second solder resist layer laminated on the first solder resist layer. The wiring board according to claim 2.

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