JP2006253666A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve reliability at the contact of copper wiring and a connection plug thereon. <P>SOLUTION: A cap metal nitride layer 35 is provided on a cap metal 34 comprising CoWP. The thicknesses of the cap metal 34 and the cap nitride layer 35 are set to be, for example, 1 nm-100 nm. The ratio of the thicknesses of the cap metal 34 and the cap metal nitride layer 35 is set to be, for example, 0.1-1. In addition, an SiOCN layer 16 where the surface of a SiOC film 14a is nitrided is formed on the SiOC film 14a. The SiOCN layer 16 is a layer comprising a region on the surface of which nitrogen is segregated, and the thickness is set to be, for example, 1 nm-100 nm. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a structure and a manufacturing method of a semiconductor device, and more particularly to a copper wiring having a metal cap film on the surface.

  In recent years, copper has been widely used as a wiring material due to a demand for high-speed semiconductor devices. Copper has a low resistance and a low capacity as compared with conventionally used aluminum wiring, and is excellent in electromigration and stress migration resistance. On the other hand, copper has the property of being easily oxidized in an atmosphere containing oxygen even at a low temperature of 150 ° C. For this reason, in the process of forming the copper wiring, a technique of covering the copper surface with an antioxidant film is generally used. As the antioxidant film, a silicon nitride film or a silicon carbide film that can be formed by chemical vapor deposition without using oxygen is used.

  However, all of these antioxidant films have a high relative dielectric constant (the relative dielectric constant of the silicon nitride film is 8 and the relative dielectric constant of the silicon carbide film is 5), resulting in an increase in parasitic capacitance between the wirings. .

  As a measure for solving such a problem, a technique of selectively providing a cap metal film on the surface of a copper wiring by electroless plating is known. For example, a CoWP layer is selectively formed on the surface of a copper wiring, and a copper surface that is easily oxidized is covered and protected with CoWP, and then an insulating film such as silicon oxide grown in an oxidizing atmosphere is formed. Has been proposed.

  However, this technique has the following problems. That is, when cleaning treatment is performed with hydrofluoric acid or the like for the purpose of removing copper and cobalt atoms remaining on the surface of the inter-wiring insulating film, the CoWP layer is etched and damaged, and in an extreme case, the CoWP layer disappears. There was a thing. This is because CoWP is eroded by a cleaning liquid such as hydrofluoric acid. Although CoWP is harder to oxidize than copper, oxidation occurs when exposed to a chemical vapor deposition atmosphere that forms silicon oxide, and cobalt oxide is formed, leading to an increase in via connection resistance. there were.

  Therefore, as in Patent Document 1, a technique for coating the CoWP layer with a cobalt silicide layer having oxidation resistance and hydrofluoric acid resistance has been proposed. In this technique, as shown in FIG. 6, a lower layer copper interconnect 2, an upper layer copper interconnect 3, and a copper via 4 are formed in an inter-wiring interlayer film 1, and further, a lower layer copper interconnect 2 and an upper layer copper interconnect 3. A metal cap film 5 and a silicide layer 6 of the metal cap film are formed on the upper surface of the metal cap film. Here, the silicide layer 6 of the metal cap film is formed by exposing to a silane gas after forming the metal cap film 5.

JP 2002-43315 A

However, due to the formation of the cobalt silicide layer, when the surface of the insulating film (such as SiO ₂ ) between the wirings is exposed to silane gas, the surface becomes electrically active due to adhesion of Si atoms due to decomposition of silane, There is a concern that leaks will increase. Further, since there is no etching stop layer, a via hole for forming the copper via 4 reaches the side surface of the lower layer copper wiring 2 in the misalignment portion at the time of via etching, which causes a filling defect.

According to the present invention, a semiconductor substrate;
An insulating film having a recess provided on the semiconductor substrate;
A metal film containing copper embedded in the recess;
A metal cap film covering the top of the metal film;
With
A semiconductor device characterized in that at least an upper part of the metal cap film is nitrided;
Is provided.

Also according to the invention,
Forming an insulating film on the semiconductor substrate;
Selectively removing the insulating film to form a recess;
Forming a metal film containing copper inside the recess;
Forming a metal cap film on the surface of the metal film;
Nitriding the surface of the metal cap film and the surface of the insulating film;
A method of manufacturing a semiconductor device, comprising:
Is provided.

  According to the present invention, since the upper part of the metal cap film has a nitrided structure, the reliability of the contact location between the metal film containing copper and the metal film formed thereon is improved.

  FIG. 1A is a cross-sectional view showing a wiring structure in the present embodiment. On the insulating film 106 on the silicon substrate (not shown), the SiCN film 12, the SiOC film 14a, the SiOCN layer 16 formed by nitriding the surface of the SiOC film 14a, the silicon oxide film 18, the SiCN film 20, and the SiOC The film 14b is laminated in this order. A first copper wiring 22a and a second copper wiring 22b are formed in the SiOC film 14a and the SiOC film 14b, respectively. The “SiOC film” is a film containing Si, O, C, and H, and is formed by a plasma CVD method or the like using an organic silicon source gas. In this embodiment, a porous (porous) SiOC film is used.

  The first copper wiring 22a is composed of a tantalum-based barrier metal film 24a and a copper film 26a, respectively. In the silicon oxide film 18, a connection plug 28 connected to the upper surface of the first copper wiring 22 a is formed. The connection plug 28 includes a tantalum-based barrier metal film 30 and a copper film 32. A second copper wiring 22b connected to the upper surface of the connection hole is formed in the SiOC film 14b. The second copper wiring 22b is composed of a tantalum-based barrier metal film 24b and a copper film 26b.

  The first copper wiring 22a, the connection plug 28, and the second copper wiring 22b have substantially the same width, and constitute a borderless wiring.

A cap metal 34 is formed on the upper surface of the first copper wiring 22a. As a constituent material of the cap metal 34,
Cobalt-containing metals such as Co, CoWP, CoWB, CoB, CoP;
Nickel-containing metals such as Ni, NiMoP, NiMoB, NiWP, NiWB, NiReP, NiReB, NiB, NiP;
Silver-containing metals such as Ag and AgCu;
Etc.

  The cap metal 34 is provided so that the upper surface thereof is higher than the upper surface of the SiOC film 14a.

  A cap metal nitride layer 35 is formed on the cap metal 34. For example, when the cap metal 34 is made of CoWP, the cap metal nitride layer 35 is CoWPN.

The film thickness of the cap metal 34 and the cap metal nitride layer 35 is, for example, 1 nm to 100 nm, preferably 10 to 50 nm. In this way, the stress migration resistance can be reliably improved. The ratio of the thickness of the cap metal nitride layer 35 to the thickness of the cap metal 34 can be set to 0.1 to 1, for example. By doing so, a stable via contact can be realized.
In this embodiment,
Cap metal 34: 5nm
Cap metal nitride layer 35: 5 nm
And
As an effect obtained by nitriding the surface of the cap metal 34, in addition to the above, an improvement in the stability of the electrical characteristics of the wiring can be mentioned. For example, when the cap metal 34 is CoWP, the thermal stability of the CoWP film is improved by surface nitridation. Thereby, compared with the case where it is not nitrided, the increase in resistance due to Co diffusion into Cu is suppressed.

A SiOCN layer 16 formed by nitriding the surface of the SiOC film 14a is formed on the SiOC film 14a. The SiOCN layer 16 is nitrided simultaneously with the surface of the cap metal 34. The SiOCN layer 16 is a layer composed of a region containing nitrogen on the surface, and the thickness thereof is, for example, 1 nm to 100 nm, preferably 2 to 50 nm. In the conventional technique in which silane treatment is performed, since silicon is deposited on the surface of the SiOC film 14a, it is difficult to form a nitrogen-containing layer (SiOCN layer 16) having a uniform thickness as in this embodiment. In the present embodiment, such a layer is stably formed by nitriding the surface of the clean SiOC film 14a.
In this embodiment, as shown in FIG. 1A, the cap metal nitride layer 35 is formed so as to cover the upper surface and the side surface of the cap metal 34, but as shown in FIG. The cap metal nitride layer 35 may be formed so as to be laminated on the upper surface of the cap metal 34.

  Hereinafter, the manufacturing method of the wiring structure 1 in this embodiment shown in FIG. 1 will be described with reference to FIGS.

  FIG. 2A shows a state in which wiring grooves are formed in the SiCN film 12 and the SiOC film 14a. The wiring trench is formed by forming a SiCN film 12 and a SiOC film 14a, then providing a resist film (not shown) patterned in a predetermined shape thereon, and etching the SiCN film 12 and the SiOC film 14a stepwise. Form.

Next, a tantalum-based barrier metal film 24a in which Ta and TaN are laminated in this order is formed on the entire surface of the substrate by sputtering (FIG. 2B).
Subsequently, as shown in FIG. 2C, a copper film 26a is formed on the tantalum-based barrier metal film 24a and annealed.

  Next, unnecessary copper film 26a and tantalum-based barrier metal film 24a formed outside the wiring trench are removed by chemical mechanical polishing (CMP), and the copper film 26a and the like are removed only inside the wiring trench. A first copper wiring 22a is formed so as to remain (FIG. 2D).

  Subsequently, as shown in FIG. 2E, a cap metal 34 is formed on the surface of the first copper wiring 22a. The cap metal 34 can be formed by an electroless plating method or the like. As a catalyst used in electroless plating, for example, palladium can be used. Further, it can be deposited on the copper surface by electroless plating using dimethylamine borane (DMAB) or the like as a reducing agent without using a palladium catalyst. The constituent material of the cap metal 34 is as described above, and examples include cobalt-containing metals such as CoWP, nickel-containing metals such as NiWP, and silver-containing metals such as AgCu.

Surface nitriding treatment is performed on the structure manufactured as described above. Thereby, the cap metal nitride layer 35 and the SiOCN layer 16 are formed as shown in FIG. Examples of the surface nitriding treatment include plasma treatment such as NH ₃ plasma treatment, N ₂ —H ₂ plasma treatment, N ₂ plasma treatment, NH ₃ heat treatment (thermal nitridation), N ₂ ion implantation, and the like. In this embodiment, ammonia plasma treatment is used.

  Thereafter, as shown in FIG. 3A, a silicon oxide film 18 is formed on the cap metal nitride layer 35 and the SiOCN layer 16 (FIG. 3A).

  Subsequently, the silicon oxide film 18 is selectively etched to form a connection hole 40 reaching the upper surface of the cap metal nitride layer 35 (FIG. 3B).

  Thereafter, a tantalum-based barrier metal film 30 and a copper film 32 are formed in this order so as to fill the inside of the connection hole 40 (FIG. 3C). The copper film 32 is formed by the same plating method as the copper film 26a of the first copper wiring 22a. Thereafter, planarization by CMP is performed to form connection plugs 28 (FIG. 3D).

  Thereafter, a copper wiring structure shown in FIG. 1 is formed by forming the copper wiring 22b on the connection plug 28 by the same process as described above. A cap metal and a cap metal nitride layer can be formed on the copper wiring 22b as well as the copper wiring 22a.

  Thereafter, by repeating the above-described steps, a semiconductor device having a multilayer wiring structure of three or more layers can be formed.

The semiconductor device according to this embodiment has the following effects.
First, since the semiconductor device according to the present embodiment has a structure in which the upper portion of the cap metal 34 is covered with the cap metal nitride layer 35, the oxidation resistance of the contact portion between the copper wiring and the upper via and copper Diffusion barrier properties are improved. The cap metal 34 is provided so that the upper surface of the cap metal is higher than the upper surface of the SiOC film 14a by removing the surface of the insulating film between the wires in order to reduce the leakage current between the wires. However, this structure makes it possible to stably contact the via plug, and from this point, there is an effect that the stability of the contact resistance is improved.

  Second, since the semiconductor device according to the present embodiment includes the SiOCN layer 16 that functions as an etching stop layer, a gap at the time of via etching due to misalignment is less likely to occur, and a copper embedding failure in the gap is less likely to occur. Become. For this reason, it is possible to prevent manufacturing failure and reliability deterioration due to the gap. Since the SiOCN layer 16 is a layer obtained by nitriding the surface of the SiOC film 14a, the increase in the dielectric constant of the inter-wiring insulating film is suppressed as compared with the conventional case where a nitride film is provided as a diffusion prevention film. This contributes to the reduction of crosstalk between wirings.

  Third, since the surface of the SiOC film 14a is nitrided to form the SiOCN layer 16, the surface of the insulating film between the wirings is inactivated with nitrogen, and leakage current can be reduced. Unlike the case of performing cap metal silane treatment as described in the section of the prior art, it is not necessary to expose the surface of the inter-wiring insulating film to silane gas, and Si atoms generated by decomposition of silane adhere to the surface of the inter-wiring insulating film. There will be no leakage. In the present embodiment, the SiOC film 14a is made of a porous material. For this reason, when the nitriding plasma treatment is performed, plasma enters the film and nitriding is promoted, so that the SiOCN layer 16 having a desired thickness can be stably formed.

  As mentioned above, although embodiment of this invention was described with reference to drawings, these are the illustrations of this invention, Various structures other than the above are also employable.

For example, in the above-described embodiment, the upper portion of the cap metal 34 is covered with the cap metal nitride layer 35, but the entire cap metal 34 may be nitrided into a nitride layer by nitriding. In the present embodiment, the upper surface of the cap metal is provided so as to be higher than the upper surface of the SiOC film 14a. However, the upper surface of the cap metal may be lower than the upper surface of the SiOC film 14a.
Further, in the present embodiment, an example in which the cap metal 34 is selectively formed only on the surface of the first copper wiring 22a has been shown, but the cap metal 34 extends to a portion other than the surface of the first copper wiring 22a. It is good also as a form which extends and covers a part of surface of the SiOC film | membrane 14a.

In the present embodiment, the inter-wiring insulating film (film formed in the region from the level of the lower surface of the copper wiring 22a to the level of the upper surface) is configured by the porous SiOC film 14a, but is configured by another material. You can also. Here, the surface of the insulating film is preferably made of a water repellent insulating material. In this way, current leakage between wirings can be more effectively reduced. Examples of the water repellent insulating material include SiOC, fluorine-containing polymer, polyallyl ether (PAE), porous SiOC, and porous PAE.
The inter-wiring insulating film may have a two-layer structure as shown in FIG. The inter-wiring insulating film of the copper wiring 22a shown in FIG. 4 has a structure in which a porous SiOC film 14a and a dense (non-porous) SiOC film 50a provided thereon are laminated. By doing this, while reducing the dielectric constant of the inter-wiring insulating film, the mechanical strength of the inter-wiring insulating film surface can be improved, and the CMP resistance and the like can be improved.

  In this embodiment, although the example which used copper as a wiring material was shown, you may use another metal material. For example, a copper alloy containing a different element such as silver or aluminum may be used.

  In addition, although the inter-wiring insulating film is a CVD-SiOC film in the present embodiment, a coating film such as MSQ (methylsilsesquioxane) or an organic film such as an aromatic hydrocarbon compound may be used.

In the present embodiment, the wiring structure formed by the single damascene process is taken as an example, but the present invention can also be applied to a wiring structure formed by the dual damascene process.
Further, as shown in FIG. 7, the cap metal 34 and the cap metal nitride layer 35 may be embedded in the wiring groove.
The present invention can be applied to a wiring structure in which copper is embedded in a recess. In the above-described embodiment, an example of a structure in which copper is embedded in the wiring groove has been described. However, the present invention can also be applied to a structure in which copper is embedded in a hole (hole).

  FIG. 5 is a diagram illustrating the structure of the semiconductor device according to the present embodiment. In the inter-wiring interlayer film 1, a lower layer copper wiring 2, an upper layer copper wiring 3, and a copper via 4 are formed. A metal cap film 5 and a nitride layer 7 of the metal cap film are formed on the upper surfaces of the lower layer copper wiring 2 and the upper layer copper wiring 3. A nitride layer 8 of an inter-wiring interlayer film is formed at the boundary of each layer of the inter-wiring interlayer film 1.

  In this example, CoWP was used as the metal cap film. The film thickness of the metal cap film was 100 nm, and the film thickness of the nitride layer 8 of the inter-wiring interlayer film was 50 nm. As a method for forming the nitride layer 7 of the metal cap film and the nitride layer 8 of the inter-wiring interlayer film, NH3 plasma treatment was used.

  According to the present embodiment, by forming the nitride layer 7 of the metal cap film on the metal cap film 5, the oxidation resistance and the copper diffusion barrier property of the metal cap film 5 can be improved. Further, when the nitride layer 7 of the metal cap film is formed, it is not necessary to expose to the silane gas, and therefore there is no concern that leakage increases due to the electrical activation of the CoWP layer surface due to the attachment of Si atoms due to decomposition of silane. .

  Further, by forming the nitride layer 8 of the inter-wiring interlayer film, the surface of the insulating film between the wirings is inactivated with nitrogen, so that leakage current can be reduced.

  Further, the inter-wiring interlayer nitride layer 8 itself functions as an etching stop layer, so that a gap at the time of via etching due to misalignment is less likely to occur, and copper embedding failure in the gap is less likely to occur. Thereby, it is possible to prevent manufacturing failure and reliability deterioration due to the gap. In the prior art in which the surface of the metal cap is not nitrided, the via hole of the copper via 4 reaches the side surface of the lower layer copper wiring 2 in the misalignment portion of the via etching, which causes a filling defect (FIG. 6). ). On the other hand, in the wiring structure of this embodiment, the nitride layer 8 functions as an etching stop layer, so that the via hole of the copper via 4 does not reach the side surface of the lower layer copper wiring 2 (FIG. 5), and the reliability of the contact Can be improved.

It is sectional drawing of the wiring structure which concerns on embodiment. It is process drawing which shows the manufacturing method of the wiring structure shown in FIG. It is process drawing which shows the manufacturing method of the wiring structure shown in FIG. It is process drawing which shows the manufacturing method of the wiring structure shown in FIG. It is sectional drawing of the wiring structure which concerns on an Example. It is sectional drawing of the conventional wiring structure. It is sectional drawing of the wiring structure which concerns on embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Inter-wiring interlayer film 2 Lower layer copper wiring 3 Upper layer copper wiring 4 Copper via 5 Metal cap film 6 Silicide layer 7 of metal cap film Nitride layer 8 of metal cap film Nitride layer 12 of inter-layer interlayer film SiCN film 14a SiOC film 14b SiOC Film 16 SiOCN layer 18 Silicon oxide film 20 SiCN film 22a First copper wiring 22b Second copper wiring 24a Tantalum-based barrier metal film 24b Tantalum-based barrier metal film 26a Copper film 26b Copper film 28 Connection plug 30 Tantalum-based barrier metal film 32 Copper film 34 Cap metal 35 Cap metal nitride layer 40 Connection hole 50a Dense structure (non-porous) SiOC film 50b Dense structure (non-porous) SiOC film

Claims (14)

A semiconductor substrate;
An insulating film having a recess provided on the semiconductor substrate;
A metal film containing copper embedded in the recess;
A metal cap film covering the top of the metal film;
With
A semiconductor device, wherein at least an upper part of the metal cap film is nitrided. The semiconductor device according to claim 1,
The semiconductor device, wherein the recess is a groove. The semiconductor device according to claim 1,
The semiconductor device, wherein the recess is a hole. The semiconductor device according to claim 1,
A semiconductor device, wherein at least an upper portion of the insulating film is nitrided. The semiconductor device according to claim 1,
The semiconductor device according to claim 1, wherein the metal cap film is provided so that an upper surface thereof is higher than an upper surface of the insulating film. 2. The semiconductor device according to claim 1, wherein a surface of the insulating film is made of a water repellent insulating material. The semiconductor device according to claim 1,
The semiconductor device, wherein the insulating film is a SiOC film, and a SiOCN layer is provided on a surface of the insulating film. The semiconductor device according to claim 7,
A semiconductor device, wherein the SiOC film is made of a porous material. The semiconductor device according to claim 1,
A semiconductor device, wherein the insulating film is made of a porous material. The semiconductor device according to claim 1,
The insulating film has a laminated structure including a first insulating film and a second insulating film having an upper surface of the same level as the upper surface of the metal film provided thereon,
The semiconductor device, wherein the first insulating film is a porous film, and the second insulating film is a dense film. The semiconductor device according to claim 1,
The metal film constitutes a metal wiring,
2. A semiconductor device comprising: a conductive plug for electrically connecting the metal film and another metal film provided on the metal film on the metal film. The semiconductor device according to claim 11,
The width of the said conductive plug and the width | variety of the said metal film are substantially the same, The semiconductor device characterized by the above-mentioned. Forming an insulating film on the semiconductor substrate;
Selectively removing the insulating film to form a recess;
Forming a metal film containing copper inside the recess;
Forming a metal cap film on the surface of the metal film;
Nitriding the surface of the metal cap film and the surface of the insulating film;
A method for manufacturing a semiconductor device, comprising: A method for manufacturing a semiconductor device according to claim 13, comprising:
A method of manufacturing a semiconductor device, wherein the surface of the metal cap film and the surface of the insulating film are nitrided by exposing the metal cap film and the insulating film to a nitrogen-containing plasma.

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