JP2006101149A - Laminated branching filter - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a laminated branching filter capable of improving attenuation characteristics. <P>SOLUTION: First and second capacity elements as elements of a low-pass filter circuit and a high-pass filter circuit constituting the laminated branching filter are composed of first and second ground electrodes arranged on a first plane, first and 2nd flat electrodes which are arranged on a second plane and electrostatically coupled to the first and second flat electrodes, third and fourth ground electrodes which are arranged on a third plane and electrostatically coupled to the first and second flat electrodes. The first and second ground electrodes and third and fourth ground electrodes are separated, so signals are prevented from being mixed between the first and second capacity elements and then between the low-pass filter circuit and high-pass filter circuit to improve attenuation characteristics of the laminated branching filter. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a stacked duplexer used as a circuit component of a wireless device such as a mobile phone or a wireless LAN.

A duplexer having a high-pass filter and a low-pass filter is used to separate signals of a plurality of frequencies used for wireless communication or the like. The duplexer can be used as a diplexer that allows the transmission of two signals by a single antenna.
In the multilayer duplexer, the high-pass filter circuit is disposed on the shield electrode, and the low-pass filter circuit unit is disposed above the high-pass filter circuit unit, thereby reducing the mounting area and reducing external influences. The technique which aims at is disclosed (refer patent document 1).
JP 2002-43883 A

The duplexer is required to pass a signal in a desired frequency range (pass band) and attenuate a signal of other frequency.
However, it is difficult to always improve the attenuation characteristics of signals other than the passband. For example, the attenuation characteristics of the harmonics (for example, second harmonic, third harmonic) of the signal in the passband are reduced. It is possible to do.
In view of the above, an object of the present invention is to provide a stacked duplexer capable of improving the attenuation characteristics.

  In order to achieve the above object, a stacked duplexer according to the present invention is disposed on a first plane, and is disposed on a first plane, a second ground electrode that is grounded, and a second plane. And the first and second plate electrodes that are electrostatically coupled to the first and second plate electrodes, respectively, and disposed on a third plane, and the first and second plate electrodes respectively. A third low-pass filter circuit that is electrostatically coupled and grounded, and a low-pass filter circuit having a first capacitive element composed of the first plate electrode, and the second A high-pass filter circuit partially including a second capacitive element composed of a flat plate electrode, a first terminal to which the low-pass filter circuit and the high-pass filter circuit are connected, and the first and second flat plate electrodes Second and third terminals electrically connected to each; Characterized by comprising.

  First and second ground electrodes disposed on the first plane and first and second electrodes disposed on the second plane and electrostatically coupled to the first and second plate electrodes, respectively. A low-pass filter that constitutes a stacked duplexer from a plate electrode and third and fourth ground electrodes that are arranged on the third plane and are electrostatically coupled to the first and second plate electrodes, respectively. First and second capacitive elements that are elements of the circuit and the high-pass filter circuit are configured. Since the first and second ground electrodes and the third and fourth ground electrodes are separated from each other, signal mixing between the first and second capacitive elements, and therefore, between the low-pass filter circuit and the high-pass filter circuit is prevented. This prevents the original characteristics of each filter circuit. As a result, the attenuation characteristics of the stacked duplexer can be improved.

  According to the present invention, it is possible to provide a stacked duplexer capable of improving attenuation characteristics.

(First embodiment)
FIG. 1 is a diagram showing a circuit configuration of a stacked duplexer 10 according to the first embodiment of the present invention.
As shown in FIG. 1, the laminated duplexer 10 includes an antenna terminal T1, a low frequency side terminal T2, a high frequency side terminal T3, and a low pass filter LPF and a high pass filter HPF connected to them.
The low-pass filter LPF includes capacitors (capacitors: capacitance elements) C1 and C2, and an inductor (inductance element) L1. The high pass filter HPF includes capacitors C3 to C7 and inductors L2 and L3. The inductor L2, capacitors C2, C5, and C7 are grounded via a ground terminal (also referred to as “ground terminal”) G for grounding.

The antenna terminal T1 is electrically connected to the antenna and outputs signals of first and second frequencies (for example, 2.4 GHz and 5.0 GHz).
The low-frequency side terminal T2 and the high-frequency side terminal T3 are electrically connected to, for example, first and second transmitters, respectively, and signals of the first and second frequencies (for example, 2.4 GHz, 5.425 GHz). Is entered.
The first and second signals input to the low-frequency side terminal T2 and the high-frequency side terminal T3 pass through the low-pass filter LPF and the high-pass filter HPF and are output from the antenna terminal T1. Since the first and second signals respectively pass through the low-pass filter LPF and the high-pass filter HPF, mixing of signals into the high-frequency side terminal T3 and the low-frequency side terminal T2 is prevented.

  Conversely, when the first and second signals are input from the antenna terminal T1, these signals are output separately from the low frequency side terminal T2 and the high frequency side terminal T3. That is, a signal having a lower first frequency (for example, 2.4 GHz) is output to the low frequency side terminal T2 by the low pass filter LPF. Further, the high-pass filter HPF outputs a signal having a higher second frequency (for example, 5.425 GHz) to the high frequency side terminal T3.

FIG. 2 is a diagram illustrating an appearance of the stacked duplexer 10 according to the first embodiment of the present invention.
The stacked duplexer 10 is configured by superimposing substrates 11 to 25. As the substrates 11 to 25, for example, a 2012 (2.0 mm × 1.25 mm) type substrate made of glass ceramic (dielectric constant εr = 7.9, tan δ = 4.8 × 10 ⁻³ ) is used, and thick film printing is performed. Thus, an electrode pattern printed with a silver paste or the like is formed. The laminated duplexer 10 is configured by laminating these substrates 11 to 25 to a height of about 0.95 mm.
The substrates 11 to 25 may be made of a ceramic material other than glass ceramic.

Notches 31 to 36 serving as predetermined terminals are formed on the sides of the substrates 11 to 25. The cutout portions 31 to 36 coincide with each other in the stacking direction of the substrates 11 to 25 at the time of stacking and constitute a groove portion extending in the stacking direction. By printing the silver paste in the groove, it functions as the antenna terminal T1, the low frequency side terminal T2, the high frequency side terminal T3, and the ground terminal G.
The notches 31 to 33 correspond to the antenna terminal T1, the low frequency side terminal T2, and the high frequency side terminal T3, respectively, and the notches 34 to 36 correspond to the ground terminal G. A ground terminal G is disposed between the antenna terminal T1, the low frequency side terminal T2, and the high frequency side terminal T3. This is because the antenna terminal T1, the low frequency side terminal T2, and the high frequency side terminal T3 are shielded from each other to prevent signal interference (mixing).

FIG. 3 is an exploded perspective view showing a state in which the substrates 11 to 25 constituting the stacked duplexer 10 are separated.
In the stacked duplexer 10, the substrates 11 to 18 function as a low-pass filter LPF, and the substrates 11 to 13 and 18 to 24 function as a high-pass filter HPF. That is, the low-pass filter LPF and the high-pass filter HPF are arranged above and below, and the substrates 11 to 13 and 18 are common substrates used in common by the low-pass filter LPF and the high-pass filter HPF.

  The substrate 11 has land patterns (patterns of mounting electrodes) 101a to 101f (not shown) on the lower surface. The land patterns 101a to 101c correspond to the antenna terminal T1, the low frequency side terminal T2, the high frequency side terminal T3, and the land patterns 101d to 101f correspond to the ground terminal G, respectively.

The substrate 11 has electrode patterns of plate electrodes 112a and 112b for grounding (grounding) and connecting portions 113a, 113b, 114, and 115 on the upper surface. The flat plate electrode 112a is connected to the ground terminal G through the connecting portions 113a and 114, and is electrostatically coupled to the flat plate electrode 121 to be described later and shields the flat plate electrode 121 from the outside. We are trying to stabilize. The flat plate electrode 112b is connected to the ground terminal G through the connecting portions 113b and 115, and is electrostatically coupled to the flat plate electrode 122 described later and shields the flat plate electrode 122 from the outside. We are trying to stabilize.
The plate electrodes 112a and 112b are arranged in parallel with each other with a gap of 0.1 ± 0.05 μm, and it can be considered that one plate electrode is divided. Although the plate electrodes 112a and 112b are electrically connected via the ground terminal G, the electrical coupling between the plate electrodes 112a and 112b is weak as compared with the case where the plate electrodes 112a and 112b are configured by one plate electrode. For this reason, the attenuation characteristic of the laminated duplexer 10 can be improved. Details of this will be described later.

The substrate 12 has electrode patterns of plate electrodes 121 and 122 and connecting portions 123 and 124 for the capacitors C2 and C7.
The plate electrode 121 is disposed corresponding to the plate electrode 112a, is electrostatically coupled to the plate electrode 112a and a later-described plate electrode 131a, and functions as a capacitor C2. The plate electrode 121 is electrically connected to the low frequency side terminal T <b> 2 by the connection portion 123.
The flat plate electrode 122 is disposed corresponding to the flat plate electrode 112b, and is electrostatically coupled to the flat plate electrode 112b and a flat plate electrode 131b described later, and functions as a capacitor C7. The plate electrode 122 is electrically connected to the high frequency side terminal T3 by the connection portion 124.

  The substrate 13 has electrode patterns of ground plate electrodes 131a and 131b and connecting portions 132a, 132b, 133, and 134 on the upper surface. The flat plate electrode 131a is connected to the ground terminal G through the connecting portions 132a and 133, and is electrostatically coupled to the flat plate electrode 121 and shields the flat plate electrode 121 from the outside, thereby stabilizing the operation of the multilayer duplexer 10. We are trying to make it. The plate electrode 131b is connected to the ground terminal G through the connecting portions 132b and 134, and is electrostatically coupled to the plate electrode 122 and shields the plate electrode 122 from the outside, thereby stabilizing the operation of the multilayer duplexer 10. We are trying to make it.

  The plate electrodes 131a and 131b are arranged in parallel with each other with a gap of 0.1 ± 0.05 μm, and it can be considered that one plate electrode is divided. Although the plate electrodes 131a and 131b are electrically connected via the ground terminal G, the electrical coupling between them is weak as compared with the case of being constituted by one plate electrode. For this reason, the attenuation characteristic of the laminated duplexer 10 can be improved. Details of this will be described later.

An inductor L1 is disposed on the substrates 14-16. Lines 141, 151, and 161 described later constitute the inductor L1. The reason why the inductor L1 is arranged separately on the three substrates 14 to 16 is to prevent an increase in the substrate area and, consequently, the size of the multilayer duplexer 10.
The substrate 14 has an electrode pattern of a line 141 for the inductor L1 and connection portions 142 and 143. The line 141 is electrically connected to the low frequency side terminal T2 and a via (interlayer connection wiring) 154 described later by connecting portions 142 and 143 provided at both ends.
The substrate 15 has a line 151 for the inductor L1 and electrode patterns of the connecting portions 152 and 153. The connecting portion 152 is provided with a via 154. The line 151 is electrically connected to the line 141 via a connection portion 152 and a via 154 provided at one end. Further, the line 151 is electrically connected to a via 164 described later by a connection portion 153 provided at the other end.
The substrate 16 has an electrode pattern of a line 161 for the inductor L1 and connection portions 162 and 163. The connection portion 162 is provided with a via 164. The line 161 is electrically connected to the line 151 via a connection part 162 and a via 164 provided at one end. In addition, the line 161 is electrically connected to a via 183 (described later) by a connection portion 163 provided at the other end.

The substrate 17 has an electrode pattern of a plate electrode 171 and a connection portion 172 for the capacitor C1. Further, a via 183 described later penetrates the substrate 17 up and down. The plate electrode 171 is electrostatically coupled to a plate electrode 181 described later to constitute a capacitor C1. The plate electrode 171 is electrically connected to the low frequency side terminal T <b> 2 by the connection portion 172.
The substrate 18 has the electrode patterns of the plate electrodes 181 and the connecting portions 182 for both the capacitors C1 and C3. A via 183 is disposed in the plate electrode 181. The plate electrode 181 is electrostatically coupled to the plate electrode 171 and is electrically connected to the line 161 through the via 183.

  The substrate 19 has electrode patterns of a plate electrode 191 for both the capacitors C3 and C4, a plate electrode 192 for the capacitor C6, and connection portions 193 and 194. The plate electrode 191 is electrostatically coupled to the plate electrode 181 to form a capacitor C3 and electrostatically coupled to a plate electrode 201 described later to form a capacitor C4. The connection portion 193 electrically connects to a via 237 described later. Connected. The plate electrode 192 is electrostatically coupled to a plate electrode 202 described later to form a capacitor C6, and is electrically connected to the high frequency side terminal T3 by the connection portion 194.

  The substrate 20 has the electrode patterns of the plate electrodes 201 for both the capacitors C4, C5, and C6 and the connection portion 202. Further, vias 237 described later penetrate the substrate 20 up and down. The plate electrode 201 is electrostatically coupled to the plate electrodes 191 and 192 to form capacitors C4 and C6, and is electrically connected to a via 224 described later by the connection unit 202. The plate electrode 201 is electrostatically coupled to a later-described plate electrode 211 to form a capacitor C5.

  The substrate 21 has an electrode pattern of a plate electrode 211 and a connection part 212 for the capacitor C5. Vias 237 and 224 described later penetrate the substrate 21 vertically. The plate electrode 211 is electrostatically coupled to the plate electrode 201 to form a capacitor C5, and is electrically connected to the ground terminal G through the connection portion 212.

  The substrate 22 has an electrode pattern of a line 221 for the inductor L3 and connecting portions 222 and 223. The connection portion 222 is provided with a via 224. A via 237 penetrates the substrate 22 up and down. The line 221 is electrically connected to the flat plate electrode 201 via a connection part 222 and a via 224 provided at one end. In addition, the line 221 is electrically connected to a via 238 described later by a connection portion 223 provided at the other end.

  The substrate 23 has electrode patterns of lines 231 and 232 for the inductors L2 and L3 and connection portions 233 to 236. Vias 237 and 238 are provided in the connection portions 233 and 235, respectively. The line 231 is electrically connected to the plate electrode 191 through a connection portion 233 and a via 237 provided at one end. Further, the line 231 is electrically connected to a via 244 described later by a connection portion 234 provided at the other end. The line 232 is electrically connected to the line 221 through a connection portion 235 and a via 238 provided at one end. As a result, the lines 221 and 232 function as the inductor L3 as a whole. Further, the line 232 is electrically connected to the high frequency side terminal T3 by a connecting portion 236 provided at the other end.

The substrate 24 has an electrode pattern of a line 241 for the inductor L2, and connection portions 242 and 243. The connecting portion 242 is provided with a via 244. The line 241 is electrically connected to the line 231 through a connection portion 242 and a via 244 provided at one end. As a result, the lines 231 and 241 function as the inductor L2 as a whole. Further, the line 241 is electrically connected to the ground terminal G through a connection portion 243 provided at the other end.
The substrate 25 does not have a special pattern and is mainly for protecting the substrate 24.

  The plate electrodes 121 and 122 of the substrate 12 are sandwiched between the plate electrodes 112a and 131a and the plate electrodes 112b and 131b of the substrates 11 and 13 that are electrically connected to the ground terminal G. As a result, the plate electrodes 121 and 122 are arranged between the substrate 12 and the plate electrodes 112a and 112b, the first capacitors C21 and C71, and between the substrate 13 and the plate electrodes 131a and 131b, the second capacitors C22 and C72. Form. The first and second capacitors are connected in parallel to function as capacitors C2 and C7 as a whole (C2 = C21 + C22, C7 = C71 + C72).

  Here, since the plate electrodes 112a and 112b and the plate electrodes 131a and 131b are separated by a gap, signal interference between the capacitors C2 and C7, and thus between the low pass filter LPF and the high pass filter HPF is reduced. The attenuation characteristics of the stacked duplexer 10 are improved.

(Modification)
FIG. 4 is an exploded perspective view showing a state in which the substrates 11 to 13 and 14a to 24a and 25 constituting the modified multilayer duplexer 10a are separated. The substrates 14 a to 24 a have electrode patterns corresponding to the substrates 14 to 24 of the stacked duplexer 10, and the arrangement order is reversed. Since the arrangement of the multilayer duplexer 10 and the substrate is different, instead of the vias 154, 164, 183, 224, 237, 238, and 244 of the multilayer duplexer 10, the multilayer duplexer 10 a 155, 165, 195, 203, 225, 239.
Also in this modified example, since the flat plate electrodes 112a and 112b and the flat plate electrodes 131a and 131b are separated by a gap, interference between the capacitors C2 and C7 is reduced, and the attenuation characteristic of the multilayer duplexer 10 is improved. To do.

(Comparative example)
FIG. 5 is an exploded perspective view showing a state in which the substrates 11x, 12, 13x, and 14 to 25 constituting the laminated duplexer 10x as the comparative example 1 are separated. Flat plate electrodes 112 and 131 are disposed on the substrates 11x and 13x. That is, the plate electrodes 112 a and 112 b and the plate electrodes 131 a and 131 b of the multilayer duplexer 10 are integrally configured as the plate electrodes 112 and 131. Further, as Comparative Example 2, a laminated duplexer 10x1 in which only the substrate 13 among the substrates 11 and 13 of the laminated duplexer 10 is the substrate 13x, and as the Comparative Example 3, the substrate 11 of the laminated duplexer 10 is used. , 13 may be a multilayer duplexer 10x2 in which only the substrate 11 is the substrate 11x.
In the multilayer demultiplexers 10x, 10x1, 10x2 according to the comparative examples 1 to 3, the attenuation characteristics may be insufficient as compared with the multilayer duplexer 10 as a result of interference between the capacitors C2 and C7. There is sex.

(Characteristics of laminated duplexer)
The results of the simulation of the characteristics of the stacked duplexers 10, 10a, 10x, 10x1, 10x2 will be described.
6 and 7 are graphs showing the frequency characteristics of the transmittance T, the reflectance R, and the degree of separation, respectively, of the multilayer duplexer 10 according to the embodiment of the present invention. The horizontal axis in FIG. 6 corresponds to the frequency f [GHz] of the high-frequency signal, and the vertical axis corresponds to the transmittance T [dB] and the reflectance R [dB]. The horizontal axis in FIG. 7 corresponds to the frequency f [GHz] of the high-frequency signal, and the vertical axis corresponds to the degree of separation I [dB].

  The transmittance T is a ratio (T = W3 / W1) between the signal intensity W1 of the high frequency signal at the antenna terminal T1 and the signal intensity W3 output from the high frequency side terminal T3 when a signal is input from the antenna terminal T1. The reflectance R is the ratio of the signal intensity W3 of the high frequency signal at the high frequency side terminal T3 when the signal is input from the high frequency side terminal T3 and the signal intensity W31 reflected and returned to the high frequency side terminal T3 (R = W31 / W3). ). The degree of separation I is the ratio of the signal strength W3 of the high frequency signal at the high frequency side terminal T3 and the signal strength W2 output from the low frequency side terminal T2 when the signal is input from the high frequency side terminal T3 (I = W2 / W3). It is.

8 and 9 are graphs showing the frequency characteristics of the transmittance T, the reflectance R, and the degree of separation, respectively, of the stacked duplexer 10a according to the modification of the present invention.
10 and 11 are graphs showing the frequency characteristics of the transmittance T, the reflectance R, and the degree of separation, respectively, of the stacked duplexer 10x according to Comparative Example 1 of the present invention.
12 and 13 are graphs showing the frequency characteristics of transmittance T, reflectance R, and degree of separation, respectively, of the multilayer duplexer 10x1 according to the comparative example 2 of the present invention. In Comparative Example 1, only the substrate 11 is changed to the substrate 11x.
14 and 15 are graphs showing the frequency characteristics of the transmittance T, the reflectance R, and the degree of separation, respectively, of the stacked duplexer 10x2 according to Comparative Example 3 of the present invention. In the comparative example 2, only the substrate 13 is changed to the substrate 13x.

6 to 15, the multilayer duplexers 10 and 10 a according to the embodiment of the present invention have a reflectance in the frequency range of 15 to 18 GHz as compared with the multilayer duplexers 10 x, 10 × 1, and 10 × 2 according to the comparative example. It can be seen that R and the degree of separation I are suppressed.
Although the comparative example shows a tendency to increase with the frequency at a frequency of 15 GHz or more, the embodiment tends to decrease with increasing frequency. From a numerical point of view, in the comparative example, it exceeds −20 dB at a frequency near 15 GHz and exceeds −15 dB at a frequency 18 GHz, whereas in the embodiment, it exceeds −20 dB at a frequency near 15 GHz to 18 GHz. Not.

The frequency range of 15 to 18 GHz corresponds to the third harmonic region of 4.9 to 5.95 GHz which is the original pass frequency band of the high pass filter HPF.
When the stacked duplexer 10 is used as a duplexer, a low-frequency transmitter and a high-frequency transmitter are connected to the low-wave side terminal T2 and the high-frequency terminal T3, respectively. Then, a signal from the high frequency transmitter is input from the high frequency side terminal T3 and output to the antenna terminal T1. The signal output from the high-frequency transmitter may include a second harmonic signal and a third harmonic signal in addition to the original frequency signal. If the degree of separation I is not sufficiently small, the harmonic signal input from the high frequency side terminal T3 at this time is output from the low frequency side terminal T2 and can flow into the low frequency side transmitter to inhibit its operation. There is sex. In the stacked duplexers 10 and 10a, the degree of separation in the frequency range of 15 to 18 GHz is sufficiently small, and mixing of such signals hardly causes a problem.

  In addition, the signal flowing from the antenna terminal T1 by the stacked duplexer 10 may include signals of various frequencies. A signal input from the antenna terminal T1 is separated into a signal of a desired frequency band by a high-pass filter HPF. If the transmittance T outside the desired frequency band is not sufficiently small, a signal outside the desired frequency band is high-frequency. There is a possibility of being output to the side terminal T3. In the laminated duplexers 10 and 10a, the transmittance in the frequency range of 15 to 18 GHz is sufficiently small, and mixing of such signals hardly causes a problem.

Such mixing of signals must be considered for the pass frequency band (2.3 to 2.5 GHz) on the low-pass filter LPF side, but the design of the stacked duplexer 10 in the low frequency band is as follows. It is easier than the high frequency band. As a result, a frequency band higher in frequency than the pass frequency band of the high-pass filter HPF, particularly a region of the third harmonic thereof tends to remain as a difficult problem in the design of the multilayer duplexer 10.
As shown in the embodiment of the present invention, the plate electrode 112 and the plate electrode 131 on the substrates 11 and 13 are separated into the electrodes 112a and 112b and the electrodes 131a and 131b, respectively. It is possible to improve the characteristics (transmittance T, degree of separation I) in the third harmonic region of the signal.

Next, the results of measuring the characteristics of the actually produced stacked duplexer are shown.
FIGS. 16 and 17 are graphs showing the frequency characteristics of the transmittance T of the multilayer duplexer 10 according to the embodiment of the present invention and the multilayer duplexer 10x according to the modification.
As shown in FIGS. 16 and 17, the transmittance T at a frequency of about 15 to 18 GHz or higher is smaller in the multilayer duplexer 10 than in the multilayer duplexer 10x. Numerically, in the comparative example, it exceeds −20 dB at a frequency near 16 GHz, whereas in the example, it does not exceed −20 dB at a frequency near 15 GHz to 18 GHz.

  As described above, the laminated duplexer 10 according to the present invention divides both the ground electrodes 112 and 131 sandwiching the electrodes 121 and 122 up and down, so that a frequency band of 15 GHz or higher (a third harmonic wave) is obtained. The attenuation characteristics in the area) are improved. This characteristic is not significantly affected by the arrangement of the substrates 14 to 24 other than the substrates 11 to 13.

It is a figure showing the circuit structure of the lamination type duplexer which concerns on this invention. It is a figure showing the external appearance of the lamination type duplexer which concerns on one Embodiment of this invention. It is a disassembled perspective view showing the state which isolate | separated the multilayer board | substrate which comprises the laminated splitter which concerns on one Embodiment of this invention. It is a disassembled perspective view showing the state which isolate | separated the multilayer substrate which comprises the laminated | stacked duplexer which concerns on the modification of this invention. It is a disassembled perspective view showing the state which isolate | separated the multilayer substrate which comprises the laminated | stacked duplexer which is a comparative example of this invention. It is a graph showing the simulation result of the frequency characteristic of the transmittance | permeability and the reflectance of the laminated duplexer which concerns on one Embodiment of this invention. It is a graph showing the simulation result of the frequency characteristic of the isolation | separation degree of the laminated splitter which concerns on one Embodiment of this invention. It is the graph showing the simulation result of the frequency characteristic of the transmittance | permeability and the reflectance of the laminated duplexer which concerns on the modification of this invention. It is a graph showing the simulation result of the frequency characteristic of the isolation | separation degree of the laminated splitter which concerns on the modification of this invention. It is a graph showing the simulation result of the frequency characteristic of the transmittance | permeability and the reflectance of the laminated duplexer which concerns on the comparative example 1 of this invention. It is the graph showing the simulation result of the frequency characteristic of the isolation | separation degree of the laminated | stacked duplexer which concerns on the comparative example 1 of this invention. It is the graph showing the simulation result of the frequency characteristic of the transmittance | permeability and the reflectance of the laminated duplexer which concerns on the comparative example 2 of this invention. It is a graph showing the simulation result of the frequency characteristic of the isolation | separation degree of the laminated splitter which concerns on the comparative example 2 of this invention. It is the graph showing the simulation result of the frequency characteristic of the transmittance | permeability and reflectance of the laminated | stacked duplexer which concerns on the comparative example 3 of this invention. It is the graph showing the simulation result of the frequency characteristic of the isolation | separation degree of the laminated | stacked duplexer which concerns on the comparative example 3 of this invention. It is a graph showing the measurement result of the frequency characteristic of the transmittance | permeability of the lamination type | mold duplexer which concerns on one Embodiment of this invention. It is the graph showing the measurement result of the frequency characteristic of the transmittance | permeability of the lamination type | mold duplexer which concerns on the comparative example of this invention.

Explanation of symbols

10 laminated duplexer LPF low pass filter HPF high pass filter T1 antenna terminal T2 low frequency side terminal T3 high frequency side terminal G ground terminals L1 to L3 inductors C1 to C7 capacitors

Claims (4)

First and second ground electrodes disposed on the first plane and grounded respectively;
First and second flat plate electrodes disposed on a second plane and electrostatically coupled to the first and second flat plate electrodes, respectively,
A third and a fourth ground electrode disposed on a third plane, electrostatically coupled to each of the first and second plate electrodes, and grounded;
A low-pass filter circuit having in part a first capacitive element composed of the first plate electrode;
A high-pass filter circuit having in part a second capacitive element composed of the second plate electrode;
A first terminal to which the low-pass filter circuit and the high-pass filter circuit are connected;
Second and third terminals electrically connected to each of the first and second plate electrodes;
A laminated duplexer comprising: The stacked duplexer according to claim 1, wherein gaps are disposed between the first and second ground electrodes and between the third and fourth ground electrodes. The multilayer duplexer according to claim 1, wherein the low-pass filter circuit includes a second capacitive element and an inductance element connected in parallel between the first and second terminals. The high-pass filter circuit includes a third capacitance element having one end connected to the first terminal, and a first inductance having one end connected to the other end of the third capacitance element and the other end grounded. A fifth capacitive element having one end connected to the other end of the third capacitive element, a fifth capacitive element having one end connected to the other end of the fourth capacitive element and the other end grounded; The multilayer element according to claim 1, further comprising: a capacitive element; a sixth capacitive element that connects the other end of the fourth capacitive element and the third terminal in parallel; and a second inductance element. Type duplexer.

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