JP2006060077A - Semiconductor device, connection structure thereof, and packaging method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device by which wiring is formed with less restraint in a circuit board to which the device is connected, and high integration and high reliability are attained; and to provide a connection structure comprising the semiconductor device and the circuit board connected to the device. <P>SOLUTION: The semiconductor device includes a semiconductor chip (1); and substrates (2a, 2b, 2c, 2d) which support the semiconductor chip, in which interconnection electrodes of the semiconductor chip are formed at lower face sides, and which include step shape projected portions. The step shape projected portions of the substrates decrease gradually in projection amount toward outer peripheries of the substrates. The connection structure includes such a semiconductor device and the wiring board having wiring pads on surfaces of recesses which hold the projects and are formed in the shape of step, in which the pads are connected to the interconnection electrodes formed at the projects. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a semiconductor device, a connection structure between the semiconductor device and a circuit board, and a mounting method for connecting the circuit board and the semiconductor device, and more particularly to a surface-mount type semiconductor device and one using the same.

  2. Description of the Related Art In recent years, high integration in semiconductor devices has progressed, and chip scale packages (Chip Scale Package (hereinafter abbreviated as CSP)) having almost the same size as semiconductor chips and surface mounts having a connection portion on the entire specific surface. Semiconductor devices are becoming mainstream. The demand for high integration and miniaturization is increasing, and there is a demand for more compact products and higher integration on the circuit board side.

  To explain this situation in more detail, the electrode structure of a surface-mount type semiconductor device is such that electrodes are formed in a matrix on almost the entire bottom surface of the substrate, and solder balls are attached to these electrodes to form connection electrodes. Ball grid array (hereinafter abbreviated as BGA) and pin grid array (hereinafter abbreviated as PGA) in which connection pins are provided in a matrix on almost the entire bottom surface of the substrate.

  When mounting a surface-mount type semiconductor device having such a structure on a circuit board, when connecting to the connection terminal near the center of the package and drawing the wiring toward the outside of the circuit board, a large number of connection terminals The wiring pattern had to be devised so as to provide wiring while avoiding the above. In designing this wiring, as the number of terminals increases, there are more restrictions on the wiring rules and the like, which complicates the wiring and becomes a factor that hinders high integration.

  Further, in an environment where high-speed operation is required, there are severe restrictions on the wiring length and the like, which is also a factor that hinders high integration.

  As one of means for solving these problems, a method of multilayering a circuit board and opening a through hole and making it conductive so as to conduct between the layers has become common. The use of such a multilayer substrate makes it possible to avoid restrictions due to wiring routing rules.

  However, in actual products, there are many through holes at various locations on the circuit board, and if any misalignment of the holes occurs when creating the circuit board, the reliability of conduction is reduced or the wire breaks. There is a problem that occurs.

  In the case of a BGA type semiconductor device, since the connection terminal portion is solder, if a through hole in the circuit board is formed immediately below the connection terminal, it flows into the through hole when the solder of the connection terminal melts, causing disconnection. there is a possibility. For this reason, there is a problem that the positions of the through hole and the connection terminal portion must be shifted.

  In order to avoid these problems, the solder height is increased stepwise from the peripheral part to the center part of the semiconductor device, and the mounting board is raised from the peripheral part to the central part corresponding to the solder height. A method of reducing the number of through holes by increasing the number of stages so that the position is lowered has been proposed (see Patent Documents 1 and 2).

However, when such a method is adopted, since solder balls having different heights are used in the same semiconductor element, there is a problem that it is difficult to control the amount of solder and cost is increased. Further, during mounting, there is a difficulty in mounting due to a difference in reflow conditions due to a difference in solder size between the central portion and the peripheral portion. In addition, when mounting on the circuit board, the collapse of the solder ball due to its own weight is greater in the center, so the possibility of a short circuit is also increased. There is a problem of being disturbed.
JP 2000-312075 A JP-A-9-246684

  Accordingly, an object of the present invention is to provide a semiconductor device that enables wiring formation with less restrictions on a circuit board to be connected, and can be highly integrated and highly reliable.

  Another object of the present invention is to provide a highly reliable connection structure between a highly integrated semiconductor device and a circuit board that does not restrict wiring formation.

  Still another object of the present invention is to provide a mounting method capable of connecting a highly integrated semiconductor device to a circuit board with high reliability.

  According to one aspect of the semiconductor device of the present invention, the semiconductor device includes a semiconductor chip, and a substrate that supports the semiconductor chip, the connection electrode of the semiconductor chip is formed on a lower surface side, and has a stepped protruding portion. The protruding amount of the stepped protrusions of the substrate decreases in a stepwise manner toward the outer periphery of the substrate.

  According to the semiconductor device connection structure of the present invention, a semiconductor chip, a substrate that supports the semiconductor chip, the connection electrode of the semiconductor chip is formed on the lower surface side, and has a stepped protruding portion; A stepwise protruding portion that decreases in a stepwise manner toward the outer periphery of the substrate; and a semiconductor device formed such that the protruding amount decreases in a stepwise manner toward the outer periphery of the substrate. A wiring pad that has a step-like concave portion that accommodates the stepped portion of the substrate corresponding to the stepped shape and is connected to the connection electrode formed on the surface of the concave portion And a wiring board having the above.

  According to the semiconductor device of the present invention, it is possible to provide a semiconductor device capable of forming wiring with less restrictions on a circuit board to be connected, and capable of high integration and high reliability.

  According to the connection structure of a semiconductor device according to the present invention, it is possible to provide a highly reliable connection structure between a highly integrated semiconductor device and a circuit board that does not restrict wiring formation.

  According to the mounting method of a semiconductor device according to the present invention, it is possible to provide a mounting method capable of performing highly reliable connection of a highly integrated semiconductor device to a circuit board.

  Hereinafter, some of the embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a perspective view showing an appearance of an embodiment of a semiconductor device according to the present invention, and FIG. 2 is a cross-sectional view through the center thereof. It should be noted that the dimensional relationships in the following drawings are not expressed accurately but are exaggerated.

  The semiconductor chip 1 is fixed on a substrate 2, and the substrate 2 includes four layers represented by 2a, 2b, 2c, and 2d, respectively, from the uppermost first layer to the lowermost fourth layer. It has a layer structure. In this embodiment, each layer is square and has a similar planar shape, and their centers coincide. And the part located in the center becomes the protrusion part which protruded most downward, and the protrusion amount of each layer is reducing in steps as it goes to an outer peripheral part from here. In addition, regarding the position of this protrusion part, it exists in the planar positional relationship in which a lower layer is contained in the range of an upper layer, and the protrusion amount of each layer should just be the relationship which reduces as it goes to the outer peripheral side, ie, the upper layer side. For example, the centers of the layers are not necessarily coincident.

  As shown in FIG. 2, a connection electrode 3a is formed on the periphery of the lower surface of the first layer 2a, and a solder ball 43a is formed on the lower surface thereof. Similarly, the connection electrode 3b and the solder ball 3b are disposed on the lower surface periphery of the second layer 2b, the connection electrode 3c and the solder ball 4c are disposed on the lower surface periphery of the third layer 2c, and the connection electrode is disposed on the lower surface of the fourth layer 2d. 3d and solder balls 4d are formed.

  FIG. 2 shows the positional relationship between the laminated substrates 2a to 2d, the connection electrodes 3a to 3d, and the solder balls 4a to 4d, and connection is made around the upper layer side substrate due to the difference in the size of the upper and lower layer laminated substrates. It can be seen that electrodes and solder balls can be provided. In this figure, one side of this semiconductor device is, for example, 15 mm, and the thickness of one stacked stage is, for example, 0.5 mm.

  FIG. 3 is an explanatory diagram showing a pattern in which the semiconductor device shown in FIGS. 1 and 2 is mounted on a circuit board. The semiconductor device used here is exactly the same as that described in FIGS.

  The lower side of FIG. 3 shows the second to fourth layer portions of the circuit board on which the upper semiconductor device is mounted. Therefore, the first-layer circuit board portion exists one step higher outside the illustrated structure. Further, for this circuit board, the substrate material is shown as transparent so as to show the three-dimensional structure and wiring of the board at the same time.

  The circuit board has a recess corresponding to the protruding shape of the protruding portion of the semiconductor device. That is, in the circuit board shown here, the uppermost layer is the second layer 11b, and the connection pad 12b formed at the position where the solder ball 4b of the second layer of the semiconductor device abuts is connected to this connection pad. It has wiring 13b.

  A rectangular recess 14b is formed in the central portion of the second layer 11b, and the peripheral portion of the third layer 11c is exposed therein, and further, a recess 14c is formed in the central portion thereof. The surface of the lowermost fourth layer 11d is exposed. The third layer 11c is provided with connection pads 12c corresponding to the solder balls 4c and wirings 13c connected thereto. Similarly, the fourth layer 11d is connected to the connection pads 12d corresponding to the solder balls 4d and connected thereto. An interconnected wiring 13d is provided.

  In this case, since there is a margin in the wiring of each layer, a simple route can be secured in an arbitrary direction without being restricted by a wiring rule such as a wiring length.

  Also, by adopting such a circuit board structure, it is possible to realize wiring drawing from the connection pads without using through holes, so that the yield of the circuit board can be improved, the degree of integration can be improved, A highly reliable mounting structure of a semiconductor device on a circuit board can be obtained.

  Furthermore, the solder balls need only be formed in the same size, the melting conditions during mounting are constant, and the solder balls provided in different layers have a greater distance between the solder balls and may cause a short circuit during melting. Connection reliability is also high.

  In addition, the multilayer structure increases the distance between the external connection terminal and the multilayer, particularly in the central portion of the semiconductor device, so that the occurrence of electrical signal interference can be reduced.

  FIG. 4 shows an example of the relationship between the connection pads or solder balls in each layer and the wiring, and shows the state seen from the back side in a transparent manner assuming that the substrate material is transparent.

  According to this figure, it is shown that the wirings 13a to 13d provided on the laminated substrates 11a to 11d are connected to the solder balls 4a to 4d of the semiconductor device.

  As described above, according to this embodiment, a stepped recess corresponding to each layer of the protruding portion is provided in the semiconductor device having the protruding portion formed so that the protruding amount decreases stepwise toward the outer periphery of the substrate. By mounting on a circuit board that has a wiring board, through holes are not required on the circuit board side, and wiring without restrictions on wiring rules is possible. Therefore, high integration and high reliability of semiconductor devices and their connection structures can be achieved. Can be planned.

  FIG. 5 is a sectional view showing another embodiment of the connection structure according to the present invention.

  FIG. 5 shows a state in which a semiconductor device and a circuit board that are substantially the same as those shown in FIG. 3 are combined. The difference from FIG. 3 is that the topmost layer 2d of the semiconductor device shown in FIG. Further, another layer of the substrate 2e is added to a part of this part, and a solder ball 4e formed in this part is provided. Corresponding to such a semiconductor substrate, the substrate also has one wiring layer and has a five-layer wiring structure.

  That is, referring to FIG. 6 in which the same display as in FIG. 4 is performed, it can be seen that the solder ball 4e is connected to the wiring 13e formed on the sixth layer of the substrate. Also in this case, the wiring 13e can be formed in a straight line from the center of the circuit board without restriction of other pads or wiring rules.

  In the semiconductor device mounting structure described with reference to FIGS. 3 to 6, the protruding portion of the semiconductor device corresponds to the concave portion of the circuit board corresponding thereto, and the connection electrodes and solder balls of the semiconductor device match the corresponding connection pads on the circuit board. The solder balls are melted in a heating atmosphere to fix the connection electrodes and the connection pads. At this time, an appropriate holding jig can be used so that the semiconductor device does not float.

  FIG. 7 is a sectional view showing another embodiment of the connection structure according to the present invention.

  Although this connection structure is similar to the embodiment shown in FIG. 5, in FIG. 5, the first layer substrate 2a of the semiconductor device is embedded in the recess of the uppermost layer 11a of the circuit substrate. In the embodiment shown in FIG. 7, the first layer substrate 2a of the semiconductor device is larger than the case of FIG. 5, and its peripheral portion is placed on the first layer 11a of the circuit substrate.

  Further, the peripheral portion of the first layer substrate 2 a of the semiconductor device is fastened to the peripheral portion of the first layer 11 a of the circuit substrate by screws 5. For this reason, screw holes are formed on the circuit board side, and the semiconductor device can be firmly fixed to the circuit board by tightening the screws 5.

  In this connection structure, the connection may be performed by melting the solder while the screw 5 is tightened, but the semiconductor device may be detachable by the screw 5 without melting the solder at the connection portion. By being detachable as described above, it is possible to efficiently cope with the evaluation of the prototype, the layout change of the external connection terminals accompanying the product specification change, and the like.

  In FIG. 7, an elastic pad 14 for elastic connection is provided on the wiring 13e of the circuit board 11f. The elastic connection pad may have a structure using a spring or the like, or may use an elastic material such as conductive silicone rubber.

  Such an elastic connection pad can be connected with high reliability even in a place where the connection state cannot be confirmed at the center as in the case of FIG.

It is a perspective view which shows the external appearance of one Example of the semiconductor device concerning this invention. It is sectional drawing of the semiconductor device shown in FIG. It is a perspective view which shows a mode that the semiconductor device shown in FIG. 1 is mounted in the circuit board engaged with this. It is a figure which shows perspectively an example of the relationship between the connection pad or solder ball in each layer, and wiring from the back surface. It is sectional drawing which shows other embodiment of the connection structure concerning this invention. It is a figure which shows perspectively an example of the relationship between the connection pad or solder ball in each layer, and wiring from the back surface. It is sectional drawing which shows other embodiment of the connection structure concerning this invention.

Explanation of symbols

1 Semiconductor element,
2a, 2b, 2c, 2d, 2e semiconductor device substrate,
3a, 3b, 3c, 3d Connection electrodes 4a, 4b, 4c, 4d Solder balls 11a, 11b, 11c, 11d, 11e, 11f Circuit board layers 12a, 12b, 12c, 12d Connection pads 13a, 13b, 13c, 13d Wiring 14 Elastic pad

Claims (5)

A semiconductor chip;
The semiconductor chip is supported, and the connection electrode of the semiconductor chip is formed on the lower surface side, and includes a substrate having a stepped protruding portion,
The semiconductor device according to claim 1, wherein the protruding amount of the stepped protruding portion of the substrate decreases stepwise toward the outer periphery of the substrate.   2. The semiconductor device according to claim 1, wherein an innermost protruding portion provided on the substrate and a protruding portion around which the protruding amount decreases in a stepwise manner have a similar rectangular shape.   The semiconductor device according to claim 1, wherein solder balls are formed on the connection electrodes. A semiconductor chip and a substrate supporting the semiconductor chip, the connection electrode of the semiconductor chip being formed on the lower surface side, and a substrate having a stepped protruding portion, the stepped protruding portion of the substrate on the outer periphery A semiconductor device formed so that the protruding amount decreases stepwise as it goes,
A wiring board having a recess formed in a step shape for accommodating the protruding portion formed in the step shape of the substrate, and having a wiring pad connected to a connection electrode formed in the protruding portion on the surface thereof;
Semiconductor device connection structure comprising:   The semiconductor device connection structure according to claim 4, wherein the substrate and the wiring substrate are fastened by screws.

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