JP2005221659A - Current source circuit and display device using the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a device capable of assuring the good accuracy of a current, realizing high sharpness and regulating display luminance while maintaining chromaticity when a current driving type display device integrated with current DACs and current sources necessary for the same by polycrystalline silicon thin-film transistors. <P>SOLUTION: The display device is provided with a master current source circuit (100), a plurality of current copier circuits (101) for copying the master current, an addition type current source (103) for outputting the copied current alone or adding and outputting the same, the plurality of the current DACs (104) for adding and outputting the currents copied according to the inputted digital data by copying the output current of the current source circuit and a pixel circuit (105) for copying the output currents of the current DAC cells and supplying the same to light emitting elements. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a display device including a current-driven element such as an organic EL element, and in particular, in a semiconductor device that outputs a current used in the display device, a current source circuit that supplies a current serving as a reference of an output current, The present invention also relates to a semiconductor device including a current source circuit.

  Organic EL (Electro-Luminescence) display devices use organic EL elements that are self-luminous and have a fast light emission response, so they are thin, lightweight, have a wide viewing angle, and have high video display performance. ing. As schematically shown in FIG. 9, in a passive matrix (PM) type organic EL display device, each pixel includes only an organic EL element 91 and a wiring, and in an active matrix (AM) type organic EL display device, each pixel is provided. And an organic EL element 91 and a pixel circuit 92 for supplying current to the organic EL element. In FIG. 9, 93 is a vertical scanning driver circuit that drives the gate lines of the display unit 90, and 94 is a horizontal scanning voltage / current driver circuit that drives the data lines of the display unit 90.

  The organic EL display device performs horizontal scanning for selecting the organic EL element 91 or the pixel circuit 92 on each line in accordance with a signal from the horizontal scanning circuit 94. Appropriately corresponding to the gradation signal from each output of the drive circuit for the organic EL display device to each organic EL element or each pixel circuit on the selected line from each output of the drive circuit for the organic EL display device during the line selection period Voltage and current are supplied. The supplied voltage and current determine the current flowing through the organic EL element, the light emission luminance of the organic EL element is controlled, and an image is displayed.

  Therefore, the light emission luminance of the organic EL element is determined by the current value supplied to the organic EL element or the applied voltage value. The light emission luminance and the supply current in the organic EL element have a linear relationship, and the light emission luminance and the applied voltage have a non-linear relationship. Moreover, in the current organic EL element, the deterioration of the element appears as the light emission time elapses, and the luminance with respect to the applied voltage decreases as the light emission time elapses. On the other hand, since the time change of the luminance with respect to the supply current is smaller than the voltage, the driving method for supplying the current to the organic EL element can maintain higher display quality.

  A device that performs display by arranging a plurality of elements that respond to current in this way is called a “current-driven display device”.

  In an active matrix organic EL display device, in order to suppress deterioration in display quality, even when the current characteristics of the drive transistor that supplies current to the organic EL elements in the pixel circuit vary between pixels, the active transistor is supplied from the drive transistor. It is important that the current does not vary.

  FIG. 10 is a diagram illustrating a configuration of a voltage write current drive type pixel circuit. The pixel circuit 1001 includes a drive transistor 1002 made of a P-channel TFT (thin film transistor) with a source connected to a power source and a drain connected to the organic EL element 1003, and a capacitor C connected between the gate and the source of the drive transistor 1002. The switch SW is connected between the data line and the gate of the driving transistor 1002 and is turned on / off by the control line. A voltage is supplied from the external driving circuit to the pixel circuit 1001 through the data line. In the pixel circuit 1001, when the characteristics of the drive transistor 1002 vary from pixel to pixel, the current supplied to the organic EL element 1003 varies from pixel to pixel. At this time, since the light emission luminance of the organic EL element 1003 also varies, there is a problem that display unevenness appears and display quality deteriorates.

  On the other hand, FIG. 11 is a diagram showing a configuration of a current write current drive type pixel circuit. Referring to FIG. 11, a pixel circuit 1101 has a source connected to a power supply, a capacitor C connected between the source and the gate, a drain connected to the organic EL element 1103 via a switch SW2-1, and a P-channel TFT (thin film transistor). ), A switch SW1-2 connected between the gate and drain of the drive transistor 1102, a switch SW1-1 connected between the data line and the drain of the drive transistor 1102, and a switch SW2-1. A switch SW1-3 connected between the connection point of the organic EL element 1103 and the power source 3 is provided. The switches SW1-1 and SW1-2 are on / off controlled by the value of the control line 1, and the switches SW2-1 and SW1 -3 is on / off controlled by the value of the control line 2. A current is supplied from the external drive circuit to the pixel circuit 1101 through the data line. In this pixel circuit 1101, the drive transistor 1102 stores the current supplied from the data line in a state where the gate and drain are short-circuited by the control line 1 (switches SW1-1 and SW1-2 are in a conductive state), and the control line 2 makes the switch SW2-1 conductive (switches SW1-1, SW1-2, SW1-3 are non-conductive), and the stored current flows through the organic EL element 1103. By using this circuit, current is stored in one transistor (drive transistor) 1102 and current is output, so that variation in supply current to the organic EL element due to transistor variation can be suppressed, and display is performed. Quality can be improved.

  FIG. 12 is a diagram illustrating a configuration of a data driver that outputs the current and can correspond to the pixel circuit illustrated in FIG. 11 (see Non-Patent Document 1 described later). This data driver also employs a circuit called a “current copier circuit”, as in FIG. Referring to FIG. 12, in the current storage state, the data driver sets the second reference current source in a state where the switches SW1-2 and SW1-1 are made conductive and the gate and drain of the output transistor (Tr) are short-circuited. By flowing the reference current from 1202 to the output transistor (output Tr), the gate voltage of the output transistor is stored in a voltage corresponding to the reference current. In the current output state, the switches SW1-2 and SW1-1 are made non-conductive, the short circuit between the gate and the drain of the output transistor (Tr) is eliminated, and the gate holds the voltage, thereby making the switch SW2-1 conductive. As a result, a current having the same magnitude as the reference current is output. And, by connecting in parallel the current copier circuit provided for each output of a plurality of different reference currents every two times, by determining the conduction / non-conduction of the output of each current copier circuit by the display digital data, A current based on a combination of reference currents can be output as an output current of the driver circuit. With this configuration, a current output type digital-to-analog converter (also referred to as “current DAC”) is configured. For example, if the current ratios are three types of reference currents i0 to i2 that are different every two times, eight types (including zero current) of currents can be output as a combination of the reference currents. That is, a conversion circuit 1201 from a digital signal (display digital data) to an analog signal is configured.

  As a current source circuit that supplies a plurality of reference currents having an appropriate current ratio, Patent Document 1 described below discloses a configuration shown in FIG. This current source circuit has a configuration for generating a plurality of reference currents for the driver circuit, the input voltage Vin is input to the non-inverting input terminal, the output terminal is connected to the gate of the N-channel transistor Tr1, and the inverting input An OP amplifier (operational amplifier) 1301 having a terminal connected to the source of the transistor Tr1 and a resistor Rc (referred to as a “current setting resistor”) connected between the source of the transistor Tr1 and the ground, converts the input voltage Vin into a current. Output V-I conversion circuit, a P-channel transistor (also referred to as “mirror transistor”) Tr2 having a source connected to a power supply and a gate and drain connected, a source commonly connected to the power supply, and a gate connected to a transistor A current mirror comprising transistors Tr3, Tr4 and Tr5 connected in common with the gate of Tr2 It is configured to include a road.

  It operates so that a current I (= Vin / Rc), which is a value obtained by dividing the input voltage Vin applied to the non-inverting input terminal of the OP amplifier 1301 by the resistance value of the resistor Rc, flows through the transistors Tr1 and Tr2 and the resistor Rc line. .

  In the current mirror circuit, since the gate-source voltages of the transistors Tr2 and Tr3 to 5 are equal, the current source transistors Tr3 to Tr5 pass a current determined by the ratio of the current capability to the transistor Tr2 and the current flowing through the transistor Tr2. . Therefore, by making the L (gate length) size of the three current source transistors Tr3 to Tr5 common to the transistor Tr2 and setting the W (gate width) size to, for example, 1 time, 2 times, and 4 times, The source transistors Tr3 to Tr5 can output currents that are 1 time, 2 times, and 4 times the current flowing in the mirror transistor Tr2 determined by the voltage input of the VI conversion circuit and the resistor Rc.

JP 2000-293245 A (FIG. 3) EuroDisplay 2002 Proceeding P279-281 IEEE ELECTRONICS LETTERS 8th December 1988 vol.24 No.25, 1560-1562

  In the conventional technique described with reference to FIG. 13, the output of the current source circuit can be determined by the ratio of the current drive capabilities of the transistor Tr2 and the current source transistors Tr3 to Tr5. However, in this conventional technique, even if the ratio of the current drive capability is set by changing the gate width W size, the current drive capability may not be as expected (design value) due to process causes. In this case, the current source transistor outputs a current deviated from the set current ratio, and the accuracy of the output current of the driver circuit generated based on this current is lowered. For example, when a current source circuit is configured with a transistor having a large variation in current characteristics such as a low temperature poly-crystalline silicon thin film transistor (also referred to as “LTPS TFT”), the accuracy is greatly reduced. Become.

  In particular, in the case of a low-temperature polycrystalline silicon thin film transistor, a grain boundary exists in the channel portion, and the position and the number thereof vary depending on individual TFTs, which causes variation in electric conductivity and variation in mobility of TFTs. In addition, defects between the gate oxide film and the polycrystalline silicon and defects generated along the grain boundaries inside the polycrystalline silicon vary in the same manner, thereby varying the threshold voltage of the TFT.

  As a result, according to our experiments, when a current mirror circuit is formed with a low-temperature polycrystalline silicon thin film transistor, the current mirror is configured even if the gate width W and the gate length L of the transistors constituting the current mirror are made the same. It has been found that the output current varies in the range of a fraction to several times the input current due to variations in the transistors to be used.

In the circuit configuration shown in FIG. 13, the drain currents of the transistors Tr3, Tr4, and Tr5 are Io1, Io2, and Io3.
Io1: Io2: Io3 = 1: 2: 4
Thus, even when a circuit is created by adjusting the channel width of a transistor, when a low-temperature polycrystalline silicon thin film transistor integrated circuit is created and measured, for example, the variation in current value is ± 50% of the design. As a result, for example, Io1: Io2: Io3 = 1: 1.5: 6
It becomes.

  For this reason, the output characteristics of the current obtained by the current DAC configured to add the currents are miserable as shown in FIG.

  Further, even when the drain current ratio Io1: Io2: Io3 of the transistors Tr3, Tr4, Tr5 can be adjusted to a certain ratio by a certain current I, the current I flowing through the transistor Tr2 in the input stage of the current mirror circuit is changed. By doing so, when trying to change the overall luminance of the EL display, the ratio of Io1: Io2: Io3 cannot be maintained, that is, the ratio changes depending on the current I. . For example, at a certain current value I, Io1 and Io2 are expressed by the following equations, respectively.

Here, μ is the carrier mobility, C _OX is the oxide film (gate insulating film) capacitance, W is the gate width, L is the gate length, Vgs is the gate-source voltage, and Vth is the threshold voltage.

Here, when the current I is adjusted so that the output current Io1 of the transistor Tr3 is twice the original current value, the overdrive voltage of the transistor Tr3, that is, (Vgs−Vth ₃ ) is √2 times. Thus, the gate-source voltage Vgs changes. Thus, even if the gate-source voltage Vgs changes, the overdrive voltage of the transistor Tr4 does not always become √2. Overdrive voltage of the transistor Tr4 (Vgs-Vth ₄₎ becomes √2 times, the output current Io1 of the transistor Tr3 becomes twice the original value, the threshold voltage Vth of the threshold voltage Vth ₃ of the transistor Tr3 is a transistor Tr4 ₄ , that is, only when Vth ₃ = Vth ₄ .

  As described above, when the current ratio of the reference current source such as the drain currents Io1 to Io3 of the transistors Tr3, Tr4, and Tr5 fluctuates, the current DAC adds the current value of the reference current source corresponding to the digital input data, Since the gradation current is generated, the relationship (input / output characteristics) between the digital input and the gradation current is destroyed.

  Therefore, the main object of the present invention is to generate a plurality of currents having a current ratio set with high accuracy even when a transistor having a large current characteristic variation such as a polycrystalline silicon thin film transistor is used. It is to provide a current source circuit.

  Another object of the present invention is to provide a circuit that can be realized by a polycrystalline silicon thin film transistor, whereby a peripheral circuit including a current generation circuit can be mounted on a substrate on which a display portion is formed, and the display device can be miniaturized. It is to realize cost reduction and price reduction.

  Still another object of the present invention is to provide an apparatus and an adjustment method capable of easily performing chromaticity adjustment and luminance adjustment of a display device.

  In order to achieve the above object, the invention disclosed in the present application is generally configured as follows. The reference numerals in parentheses below are given for reference only and should not be construed as limiting the present invention.

  A current source circuit according to one aspect of the present invention includes a reference current source circuit (100) and a plurality of current copier circuits (101) connected in parallel to a current output terminal of the reference current source circuit (100). ) And control means for controlling the current copier circuit, and a current source circuit (103) configured to output an output current of the current copier circuit individually or by addition.

  Furthermore, in the current source circuit according to the present invention, the plurality of current copier circuits are composed of two or more groups, and at least one of the remaining groups is output during a period in which one group outputs current. The group may be configured to copy the output current of the reference current source circuit.

  In addition, a display device according to another aspect of the present invention is configured to be driven by the above-described current source circuit (103), and is parallel to the reference current source circuit (100) and the current output terminal of the reference current source circuit. A current source circuit (103) including a plurality of current copier circuits (101) connected to the control circuit and a control means for controlling the current copier circuit, and outputting the output current of the current copier circuit individually or by addition. Is provided. The plurality of current copier circuits of the current source circuit (103) are composed of two or more groups, and at least one of the remaining groups is the reference current during a period in which one group outputs a current. A plurality of current DACs including a current copier circuit configured to copy the output current of the source circuit, copy the output current of the current source circuit, add the copied current according to the input digital data, and output the result. 104) and a pixel circuit (105) that copies the output current of the current DAC cell and supplies it to the light emitting element.

  A current-driven display device according to another aspect of the present invention includes a plurality of reference current source circuits (FIG. 2), and means (106 to 108) for individually adjusting the current values of the respective reference current source circuits. And means (109) for collectively adjusting the current values of the plurality of reference current source circuits while maintaining the ratio of the current values to each other, and an output node of these reference current source circuits includes a plurality of current copier circuits. It is set as the structure connected to.

  According to the present invention, since a highly accurate current can be supplied to the load, a high-quality display is possible.

  One reason is as follows. That is, in the present invention, a current source circuit (103) includes a reference current source circuit (100), a plurality of current copier circuits (101) connected in parallel to a current output terminal of the reference current source circuit, Control means for controlling the current copier circuit, and a configuration for outputting a plurality of types of currents in a configuration that outputs the current copier circuit output current alone or by adding, so that current copy means and output means are provided. All are current copier circuits. In this case, matching between elements, which is necessary in the case of a current mirror, is unnecessary, and a highly accurate current can be generated even when there is a large variation between elements.

  Another reason is that in the present invention, the current copying means between the reference current source circuit (100) and the display element as the final load is a current copier circuit. This is because the required matching between elements is unnecessary.

  As yet another reason, the current source circuit (103) according to the present invention is composed of cells including a plurality of current copiers, and the plurality of cells are composed of two groups, and one group outputs a current. This is because, by operating the other group so as to copy the current during the period, it takes a sufficiently long time to copy the current and the current accuracy is improved.

  Further, the current copier type current DAC (104) group that copies and outputs the output current from the current source circuit (103) of the present invention is similarly composed of a plurality of current copier circuits, and one group is configured to supply current. This is because, during the output period, the other group is operated so as to copy the current, so that the time for copying the current is sufficiently long and the current accuracy is improved.

  The second effect of the present invention is that the overall luminance can be changed while maintaining the luminance ratio of RGB. That is, the brightness of the display device can be changed without changing the white chromaticity.

  The reason for this is that in the present invention, a plurality of (RGB) reference current sources (FIG. 2) that can be individually adjusted are provided as reference current sources. This is because the plurality of reference current sources are provided with means (109) for collectively adjusting the current values without changing the current ratio.

  In order to describe the present invention in more detail, the best mode for carrying out the invention will be described with reference to the accompanying drawings.

  FIG. 1 is a diagram illustrating a configuration of an embodiment of the present invention, and is a diagram illustrating a current path of an organic EL display. FIG. 1 shows a circuit related to an R current path as a representative of three current paths of R (red), G (green), and B (blue). Referring to FIG. 1, this circuit includes a single parent current source circuit (reference current source) 100, a plurality of child current source circuit cells 101, a plurality of current DACs 104 including a plurality of grandchild current source circuits, and a great grandchild. And a plurality of pixel cells 105 including a current source circuit. Among these, the child current source circuit cell, the grandchild current source circuit cell, and the great grandchild current source circuit cell are configured to include a current copier circuit or a circuit to which this is applied. For a general description of the current copier circuit, refer to the description of Non-Patent Document 2, for example. Briefly, it is as follows.

  The child current source circuit cell 32 shown in FIG. 3 is an example of a current copier circuit. Referring to FIG. 3, the current copier circuit includes a P-channel TFT (M1) having a source terminal connected to a voltage source (VDD), one terminal connected to a fixed potential, and the other terminal connected to the gate terminal of M1. The connected capacitor (C1), the first switch (SW1) for controlling short circuit / opening between the gate terminal and the drain terminal of the P-channel TFT (M1), the drain terminal of the P-channel TFT (M1), and the parent A second switch (SW2) for controlling a short circuit between the power source line for transmitting the current of the current source circuit 31, and a drain terminal and an output terminal (On, where n is an integer) of the P-channel TFT (M1) And a third switch (SW3) for controlling the short circuit. The first to third switches (SW1 to SW3) are configured to be turned on (short-circuited) and turned off (opened) in response to a control signal supplied from the outside of the child current source circuit cell 32.

  When performing an operation of copying current, each switch is set to the state shown in Table 1.

  When the current (I) to be copied is drawn through the node (IIN), the current (I) flows through the source-drain of the so-called diode-connected TFT (M1) in which the gate terminal and the drain terminal are connected. At this time, the potential of the node (N) that forms the connection point between the capacitor C and the gate of the TFT (M1) is the current (I) according to the drain current-gate voltage (ID-VG) characteristics of the TFT (M1). It settles to the voltage value corresponding to the gate voltage VG to flow. Here, by turning off (opening) the switch SW1, a gate-to-source voltage VGS for allowing the TFT (M1) to pass the current I to the capacitor C1 is held.

  When performing a current output operation, each switch is set to the state shown in Table 2.

  Since the gate-source voltage VGS for allowing the TFT (M1) to pass the current I is held in the capacitor C1, the TFT (M1) acts as a constant current source element, and the node (On, where n is By connecting the load to an integer), the load is supplied with the same current (I) as the current value drawn by the parent current source circuit.

  Thus, unlike the current mirror circuit, the current copier circuit does not have a problem in matching accuracy between a plurality of transistors. Therefore, even when there are many variations of transistors as in a polycrystalline silicon TFT circuit, an output current can be generated with high accuracy.

  Referring to FIG. 1 again, the organic EL display will be described. The child current source circuit cell (101) is composed of the above-described current copier circuit and is connected to the scanning circuit 1 and corresponds to the output of the scanning circuit 1. Only the child current source circuit cell selected in this way copies the current output from the parent current source circuit (reference current source).

  As an example, in the case of configuring a 3-bit gradation display device for each color, seven child current source circuits are used, and the outputs of the child current source circuit cells are one, two parallel, or four parallel. To output a current having a ratio of 1: 2: 4 to a current bus line composed of three wires.

  With only seven child current source circuit cells, the current copy operation and the current output operation cannot be performed simultaneously. This is because the current copier circuit cannot originally copy and output the current at the same time.

  Therefore, in the present embodiment, preferably, two sets of seven child current source circuit cells are provided, and one set performs a current output operation while the other set performs a current copy operation. Yes. In FIG. 1, two child current source circuit cells are overlapped and shown as one set. Of course, you may comprise in 2 or more sets as needed.

  In this way, the addition type current source circuit 103 that outputs a current having a current ratio of 1: 2: 4 is configured by using a plurality of child current source circuit cells.

  The current DAC including the three current copier circuits is connected to the scanning circuit 2, and only the current copier circuit included in the selected one current DAC corresponds to the output of the scanning circuit 2. The current output from the circuit 103 is copied. Even in these current copiers, the current copy operation and the current output operation cannot be performed simultaneously. Therefore, in this embodiment, two sets of current DACs are provided, and one set performs current output operation while the other set performs a current copy. In FIG. 1, the configuration of the current DAC is shown by superposing two current DACs.

  Further, the current DAC is configured to add and output currents by parallelizing the outputs of a plurality of current copier circuits based on data input from a data register (not shown).

  The current output from the current DAC is supplied to the data bus line through a demultiplexer (not shown) as necessary.

  A plurality of pixel cells including a great-grandchild current source circuit including a current copier circuit are connected to the data bus line.

  The pixel cells are also connected to the gate lines, and the pixel cells in the row selected by the voltage signal applied to the gate lines copy current. The output of the great-grand current source is connected to an EL element formed in each pixel.

  Although the present invention has been described in the form of a combination with the data driver described in Non-Patent Document 1, the configuration of the data driver is not limited to this configuration. For example, the present invention can also be applied to a data driver that supplies current generated by a current source circuit to a current load element.

Next, the reference current source circuit will be described. FIG. 2 is a circuit that generates reference currents I _R , I _G , and I _B for three current paths of R (red), G (green), and B (blue).

An OP amplifier 111 having a voltage input to a non-inverting input terminal, and a transistor 114 having a gate connected to the output terminal of the OP amplifier 111 and a source connected to the ground via a variable resistor 106, connection point between the variable resistor 106 is connected to the inverting input terminal of the OP amp 111, the reference current I _R from the drain of the transistor 111 is output. The respective current values I _R , I _G , I _B are given below.

I _R = V _T × (1 / VR1)
I _G = V _T × (1 / VR2)
I _B = V _T × (1 / VR3)

As can be seen from the above equation, by adjusting the voltage V _T , the current value can be changed while maintaining the current ratio of I _R : I _G : I _B. Further, by adjusting the VR1, VR2, _VR3, it is possible to independently adjust the _{I R, I G, I B} .

  When the current value of the reference current source circuit is adjusted in this way, the current value changes from the addition type current source circuit 103 to the great-grand current source current flowing through the EL element.

Therefore, the resistors VR1, VR2, VR3 are used to adjust the white chromaticity of the organic EL display, while the voltage V _T is convenient for adjusting the luminance.

  In particular, for a display used for a portable device, efforts are made to frequently adjust the brightness and extend the driving time of the battery according to the usage status of the device.

By adjusting the voltage V _T , the luminance is changed according to the usage situation. On the other hand, the resistance values VR1, VR2, and VR3 may be adjusted when the device is shipped from the factory.

  The inventor of the present application succeeded in integrating the circuits shown in FIGS. 1 and 2 except for the variable resistors (VR1 to VR3) on the glass substrate using the low-temperature polysilicon TFT.

  On the other hand, when the transistor is not limited to the low-temperature polysilicon TFT, the transistor in FIG. 2 may be configured as a bipolar type in addition to the MOS type.

  The effects of the embodiment of the present invention will be described.

  According to the above-described embodiment of the present invention, the reference current generated by the reference current source circuit is transmitted to the EL element by repeatedly copying and outputting the current in the current copier circuit. For this reason, the current flowing through the EL element does not depend on the matching accuracy of the transistors constituting the circuit. As a result, a good image can be obtained even when a circuit is formed by an element having a large variation in transistor characteristics, such as a low-temperature polysilicon TFT. Further, in the organic EL display using the embodiment of the present invention, the chromaticity can be adjusted by the resistance values of VR1, VR2, and VR3, and the luminance can be adjusted by the voltage value of VT. it can.

  By combining these, it is possible to realize an organic EL display with simple, small, and high image quality at a low price by adjusting the image quality.

  In the above embodiment, the low-temperature polycrystalline silicon TFT integrated circuit formed on the glass substrate and the organic EL element have been described as examples. However, the present invention is not limited to such a configuration. For example, a combination of an integrated circuit formed on a crystalline silicon substrate and an EL element can achieve the same effects as described above.

  In the present invention, the light emitting element (display element) is not limited to an EL element.

  Further, the circuit described as the embodiment of the present invention is not necessarily formed on the same substrate as the display element substrate, and the display element is represented by a-Si TFT LCD (liquid crystal display device) or the like. The drive circuit IC may be mounted on the substrate.

  Further, the display element is not limited to the light emitting type, and for example, the display device may be manufactured by applying the present invention to a material whose light reflectance and transmittance change depending on a current value.

  Hereinafter, the present invention will be further described with reference to specific examples.

  FIG. 3 is a diagram showing the configuration of an embodiment of the present invention. FIG. 3 shows a configuration of an addition type current source circuit composed of a plurality of current copier circuits. The child current source circuit cell 32 including the current copier circuit includes a P-channel TFT (M1) having a source terminal connected to a voltage source (VDD), one terminal connected to a fixed potential, and the other terminal being a gate of M1. A capacitor (C1) connected to the terminal, a switch (SW1) for controlling conduction (short circuit) / non-conduction (open) between the gate terminal and the drain terminal of M1, a drain terminal of M1, and the parent current source circuit 31 A switch (SW2) that controls conduction / non-conduction between the power supply line that transmits current and conduction / non-conduction between the drain terminal of the TFT (M1) and the output terminal (On; n is an integer). And a switch (SW3). The switches SW <b> 1 to SW <b> 3 are configured to be turned on (short-circuited) and turned off (opened) according to the value of a control signal supplied from the outside of the child current source circuit cell 32.

  The operation of the child current source circuit cell 32 is roughly performed by two operations: a current copy operation and a copied current output operation. Note that since the copy operation cannot be performed simultaneously with a plurality of child current source circuit cells 32, the copy operation is performed with only one child current source circuit cell 32.

  Table 3 shows the states of the switches SW1, SW2, and SW3 (on (short-circuited) / off (opened)) when performing a current copy operation in the circuit configuration shown in FIG.

  When the current (I) to be copied is drawn through the node (IIN), the current (I) flows through the source-drain of the diode-connected TFT (M1). At this time, the potential of the node (N) According to the drain current-gate voltage characteristic (ID-VG characteristic) of (M1), the voltage value corresponding to the gate voltage VG through which the current (I) flows is settled.

  Here, by turning off (opening) the switch SW1, the gate-source voltage VGS for allowing the TFT (M1) to flow the current I is held in the capacitor C1.

  Table 4 shows the states (on (short-circuited) and off (opened)) of the switches SW1, SW2, and SW3 in the circuit shown in FIG.

  Since the gate-source voltage VGS for allowing the TFT (M1) to pass the current I is held in the capacitor C1, the TFT (M1) acts as a constant current source element, and the node (On, where n is an integer) ) Is connected to the load, the current (I) that is the same as the current value drawn by the parent current source circuit is supplied to the load.

  Next, a configuration for realizing an addition type current source circuit using a plurality of the child current source circuit cells 32 will be described. As an example, a current source that outputs I, a current that is twice that of I, and a current that is four times that of I will be described. Each node “IIN” of the 14 child current source circuit cells (A 1 to A 14) is connected to the parent current source circuit (reference current source) 31.

  The nodes S1 to S14 of the 14 child current source circuit cells (A1 to A14) are connected to a control circuit constituted by a scanning circuit and a decoder circuit (not shown).

  The nodes OE1 to OE14 of the 14 child current source circuit cells (A1 to A14) are connected to a control line (not shown).

  The nodes O1 to O14 of the 14 child current source circuit cells (A1 to A14) are connected as shown in FIG. That is, the node O1 and the node O2 are connected to a node that outputs a current I, the nodes O3 to O6 are connected to a node that outputs a current twice as large as I, and the nodes O7 to O14 are four times as large as I. Is connected to a node that outputs a current of.

  The operation of the 14 child current source circuit cells (A1 to A14) is easy to understand when the index is divided into an odd group A and an even group B.

  This is because the child current source circuit cells belonging to the other group can copy the parent current during the period in which the child current source circuit cells belonging to one group output current. It is.

  FIG. 4 is a timing chart for explaining the operation of the configuration shown in FIG. The operation of the embodiment of the present invention shown in FIG. 3 will be described with reference to FIG.

  When a high level is given to the control signal “A / B”, the child current source circuit cells belonging to the A group sequentially copy currents according to the output of the control circuit.

  The waveforms shown in S1, S3, S5,..., S13 in FIG. 4 are waveforms given to S1, S3, S5,..., S13 of the child current source circuit cells by a control circuit (not shown). When a high level is applied to Sn (n = 1, 3, 5,..., 13), the switches SW1 and SW2 shown in the child current source circuit cell are short-circuited, and the current I flows to the capacitor C1. A voltage corresponding to the necessary gate-source voltage VGS of the TFT (M1) is charged or discharged.

  On the other hand, a low level signal is given to the nodes (S2, S4, S6,..., S14) of the child current source circuit cells belonging to the group B from a control circuit (not shown). For this reason, since the current generated in the parent current source circuit flows to one child current source circuit cell selected according to the output of the control circuit, the selected child current source circuit cell The current value generated by the source circuit can be accurately copied.

  In the configuration shown in FIG. 3, the switches SW1 and SW2 are controlled to be turned on / off by the same control signal. However, the current can be copied with higher accuracy when the switch SW2 is turned off after the switch SW1 is turned off.

  The reason is that when the switch SW2 is turned off first, electric charge is supplied to the capacitor C1 through the diode-connected TFT (M1), and the potential of the node N1 rises. Therefore, preferably, a delay circuit is inserted before (previous stage) the switch SW2.

  On the other hand, paying attention to the child current source circuit cells belonging to the group B, a high level signal is given to the control terminals OE2, OE4,... OE14 from a control circuit (not shown). S2, S4, S6,..., S14 are always given a low level.

  Accordingly, a certain potential is applied to the gate terminal of the TFT (M1) included in each child current source circuit cell by the capacitor C1, and the child current source circuit cell operates as a constant current source circuit. .

  Subsequently, when a low level is applied to the control signal A / B, the operations of the A group and the B group are switched. That is, the child current source circuit cells belonging to the group B sequentially copy current in accordance with the output of the control circuit (not shown).

  The waveforms shown in S2, S4, S6,..., S14 in FIG. 4 are the waveforms given to S2, S4, S6,..., S14 of the child current source circuit cells, and Sn (n = 2, 4, 6). ,..., 14) are given a high level, the switches SW1 and SW2 in the child current source circuit cell are short-circuited, and the gate of the TFT (M1) necessary for passing the current I to the capacitor C1 A voltage corresponding to the source-to-source voltage VGS is charged or discharged.

  On the other hand, a low level signal is given to the nodes (S1, S3, S5,..., S13) of the child current source circuit cells belonging to the A group from a control circuit (not shown).

  For this reason, the current generated by the parent current source flows through one child current source circuit cell selected according to the output of the control circuit. One selected child current source circuit cell can accurately copy the current value generated by the parent current source.

  On the other hand, paying attention to the child current source circuit cells belonging to the A group, a high level signal is given to the control terminals OE1, OE3,... OE13 from a decoder circuit (not shown). The S1, S3, S5,..., S13 nodes are always given a low level.

  Therefore, a certain potential is given to the gate terminal of the TFT (M1) included in each child current source circuit cell by the capacitor C1, and the TFT operates as a constant current source circuit for passing the current I.

  Here, since the output nodes O1 and O2 of the child current source circuit cells A1 and A2 are connected to the wiring J shown in FIG. 3 and the switch SW3 included in the capacitor C2 is off, the wiring J includes A current I from the child current source circuit cell A1 flows.

  Further, the output nodes O3, O4, O5, and O6 of the four child current source circuit cells A3, A4, A5, and A6 are connected to the wiring K.

  Since the switch SW3 included in the capacitors C4 and C6 is off, the current I is output only from the child current source circuit cells A3 and A5. Therefore, a current twice as large as I flows through the wiring K.

  Further, output nodes O7, O8, O9,..., O14 of the eight child current source circuit cells A7, A8, A9,.

  Since the switch SW3 included in An (n is an even number) is OFF, the current I is output from each of the child current source circuit cells A7, A9, A11, and A13. Therefore, a current four times as large as I flows through the wiring L.

  As described above, by using the control signal A / B and switching the operations of the A group and the B group, the circuit shown in FIG. 3 continuously has I, 2 × I, 4 × I. It functions as a current source circuit for generating the current. And it can be used for the organic EL display using this. The period of the control signal A / B may be, for example, a two-frame period of the organic EL display (the functions of the A group and the B group are switched for each frame).

  The current source circuit of this embodiment shown in FIG. 3 and the drive circuit shown in FIG. 12 are combined, and by inputting 3-bit display digital data, a current of 8 levels (0 to 7 gradations) is obtained. An organic EL display device capable of realizing output and capable of displaying eight gradations can be realized.

  Of course, the gradation of the organic EL display device is not limited to eight gradation display. By increasing the number of child current source circuit cells, a multi-gradation display device having 8 gradations or more can be realized. For example, by providing 63 child current source circuit cells per group of the A group and the B group, 64 gradation display can be realized, and by providing 255 child current source circuit cells, 256 gradations are provided. A display device capable of display can be realized.

  FIG. 5 is a diagram showing an example of input / output characteristics (correspondence between digital input and output current) of the current DAC of the present invention. FIG. 5 shows an example of a current flowing through the organic EL element when the current I is set to 10 nA and a 64-gradation display is realized.

  As described above, as a method of copying current, a current copier is used without using a current mirror circuit that requires matching between transistors, and a plurality of high-precision polycrystalline silicon TFTs can be obtained even with a large transistor variation. It became possible to create a current source.

  In the embodiment of the present invention, an organic EL display in which the reference current source and the current DAC are integrally formed on the display substrate can be realized. A small and low-cost device can be realized by integrally forming the display substrate.

  FIG. 5 shows, as a comparative example, input / output characteristics when a current source and a current DAC with 64-gradation output are created by a conventional method. The current source output is ideally 10 nA (nanoampere), 20 nA, 40 nA, 80 nA, 160 nA, and 320 nA.

  Here, the current value varies by 50% with respect to the design value due to variations in the transistors. That is, they are 10 nA, 30 nA, 20 nA, 120 nA, 80 nA, and 480 nA.

  As described above, when the current of the current source varies, a phenomenon occurs in which the output current decreases even though the current DAC varies and the input digital value increases. This causes inversion and greatly deteriorates the image quality.

  As described above, the organic EL display according to the present invention has a configuration in which a current for driving an EL element is copied and generated using a current copier circuit. The current copier circuit needs to be operated by dividing the time between current copy and output, but by operating according to the present invention, both the copy time and the output time can be operated with sufficient time. it can. Moreover, although the value of the current was as small as several nA, it could be operated.

  This is due to the configuration of the present invention, and in other configurations, sufficient copy time cannot be obtained, so it is assumed that the accuracy according to the present invention is not.

  Next, a method for adjusting an organic EL display according to an embodiment of the present invention will be described.

First, an adjustment method at the time of factory shipment will be described with reference to FIG. First, 2 V, which is a typical voltage, is applied to the voltage V _T described with reference to FIG. 2 (step S10).

  Then, green data is input to the display as the first color to display green (step S11).

  Next, the variable resistor VR2 (see FIG. 2) is adjusted and adjusted to a desired luminance in a state where only green is displayed (steps S12 and S13).

  Next, the first color and the second color, in this case, green and red data are input, yellow is displayed, and the displayed chromaticity is shown in FIG. The variable resistor VR1 is adjusted so as to coincide with the k point (steps S14, S15, S16).

  Next, green, red, and blue data are input, white is displayed, and the variable resistor VR3 is set so that the displayed chromaticity matches the point D shown in FIG. 6 while referring to the chromaticity meter. Adjust (Steps S17, 18, 19).

  By adjusting according to this procedure, the white chromaticity and the luminance at that time can be set.

  This adjustment method does not require craftsmanship regarding the color tone, and the adjustment is completed at one time without readjusting the variable resistance value once adjusted.

  When the luminance and chromaticity values due to manufacturing variations are small, the adjustment may be made only with the resistance value of the variable resistor VR, which has been obtained in advance by the adjustment method described above.

  Alternatively, the variable resistors VR1 to VR3 (FIG. 2) may be replaced with fixed resistors.

  In the above-described embodiment, an example of adjusting in the order of the variable resistors VR2, VR1, and VR3 is shown, but the adjustment may be performed in a different order.

  Next, a method for the user to adjust the brightness after shipment from the factory will be described.

FIG. 8 shows a configuration of an information device 81 including an organic EL display such as a mobile phone. By inputting a certain command, the screen brightness adjustment mode of the organic EL display 82 is entered. As shown in FIG. 8, on the organic EL display screen of the information device, “1: about 2: normal 3: bright” is displayed as the brightness level, and one of these is selected. The brightness level input by the user is given as the voltage V _{T in} FIG. 2 through the DA converter as shown in FIG. FIG. 7 is a diagram showing a system configuration of the information terminal, which includes a display 71, a CPU 73, a memory 72, and a key jog dial 74 that forms an input operation unit.

By increasing the voltage value of the voltage V _{T in} FIG. 2, the luminance of the organic EL display can be adjusted without changing the chromaticity. When the luminance satisfies the user, this voltage value V _T is set. Hold and exit brightness adjustment mode.

Further, there is no input from the user, if the information device is in the standby state, decreasing the brightness by reducing the voltage V _T of FIG. 2, on the other hand, when there is an input from the user, the voltage of FIG. 2 by increasing the V _T, it may be increased visibility in the high luminance.

By performing such control, power consumption can be controlled, and the continuous use time when the battery is driven can be extended. The trigger for controlling the voltage V _T is not limited to whether or not the device is in a standby state, and may be adjusted according to, for example, the brightness of the environment.

  Although the present invention has been described with reference to the above embodiment, the present invention is not limited to the configuration of the above embodiment, and various modifications that can be made by those skilled in the art within the scope of the present invention. Of course, including modifications.

It is a figure which shows the structure of the current drive type display apparatus of one Example of this invention. It is a figure which shows the structure of the parent current source circuit of the current drive type display apparatus of one Example of this invention. It is a figure which shows the structure of the addition type current source circuit of the current drive type display apparatus of one Example of this invention. It is a timing chart which shows operation | movement of the addition type current source circuit of one Example of this invention. It is a figure which shows the value of the electric current which flows into the display element of the current drive type display apparatus of one Example of this invention, and the value of a comparative example. FIG. 5 is an xy chromaticity diagram for explaining the image quality adjustment method of the present invention. It is a figure which shows the system configuration | structure of the information terminal of this invention. It is a figure which shows an example of the display screen of the information terminal of this invention. It is a figure which shows schematic structure of the conventional organic EL display apparatus. It is a figure which shows the circuit structure of the conventional voltage writing type | mold pixel. It is a figure which shows the circuit structure of the conventional electric current writing type | mold pixel. It is a figure which shows the circuit structure of the conventional current output data driver. It is a figure which shows the circuit structure of the conventional reference current source circuit. It is a figure which shows the output current of the electric current DAC using the conventional reference current source circuit. 5 is a flowchart for explaining an image quality adjustment method according to the embodiment of the present invention.

Explanation of symbols

31 parent current source circuit 32 child current source circuit cell 71 display 72 memory 73 CPU
74 Key jog dial 81 Information terminal 82 Display 90 Display unit 91 Organic EL element 92 Pixel circuit 93 Vertical scanning driver circuit 94 Horizontal scanning driver circuit 100 Parent current source circuit (parent current source)
101 Child Current Source Circuit Cell 103 Addition Type Current Source Circuit 104 Current DAC
105 pixel cell 106 to 108 variable resistor 109 adjustment terminal 110 data driver 111, 112, 113 OP amplifier 114 to 116 transistor 1001, 1101 pixel circuit 1002, 1102 drive transistor 1003, 1103 organic EL element 1201 digital analog conversion circuit 1202 second Reference current source 1301 OP amplifier

Claims (21)

A reference current source circuit that outputs a reference current from a current output terminal;
A plurality of current copier circuits each having an input terminal connected in common to the current output terminal of the reference current source circuit, copying the reference current based on a control signal, and outputting the copied current from the output terminal;
A control circuit for outputting the control signal for controlling operations of the plurality of current copier circuits;
Including
A current source circuit, wherein one of output currents from the plurality of current copier circuits is output alone, or a current obtained by adding a plurality of output currents is output.   The current copier circuit, based on a control signal, copies the reference current of the reference current source circuit as a control terminal voltage to a capacitor having one end connected to a control terminal of a transistor at the time of current copy. 2. The current source circuit according to claim 1, wherein a control terminal voltage of the capacitor is applied to a control terminal of the transistor, and a current having a current value corresponding to the copied current is output from the output terminal.   The plurality of current copier circuits are grouped into at least two groups, and a current copier circuit belonging to at least one of the other groups is output during a period when the current copier circuit belonging to one group outputs a current. The current source circuit according to claim 1, wherein the current source circuit is configured to copy an output current of the reference current source circuit. In a current driven display device that receives an input signal and drives a display element in accordance with the input signal,
A reference current source circuit that outputs a reference current from a current output terminal;
A plurality of current copier circuits each having an input terminal connected in common to the current output terminal of the reference current source circuit, copying the reference current based on a control signal, and outputting the copied current from the output terminal;
A control circuit for outputting the control signal for controlling operations of the plurality of current copier circuits;
Including
A current-driven display device comprising: a current source circuit that outputs an output current of one of the plurality of current copier circuits independently or outputs a current obtained by adding a plurality of output currents.   The current copier circuit, based on a control signal, copies the reference current of the reference current source circuit as a control terminal voltage to a capacitor having one end connected to a control terminal of a transistor at the time of current copy. 5. The current driven display device according to claim 4, wherein a control terminal voltage of the capacitor is applied to a control terminal of the transistor, and a current having a current value corresponding to the copied current is output from the output terminal. .   The plurality of current copier circuits are grouped into at least two groups, and a current copier circuit belonging to at least one of the other groups is output during a period when the current copier circuit belonging to one group outputs a current. The current drive type display device according to claim 4, wherein the output current of the reference current source circuit is copied. A plurality of the current source circuits;
Means for adjusting current values of individual reference current source circuits included in the plurality of current source circuits;
Means for adjusting a current value while maintaining a ratio of currents of the plurality of reference current source circuits;
The current drive type display device according to claim 4, further comprising:   5. The current drive type display device according to claim 4, wherein the transistor constituting the current source circuit is a polycrystalline silicon thin film transistor formed on an insulating substrate.   The current-driven display device according to claim 4, wherein the display element is an organic EL (Electro Luminescence). In the current drive type display device according to any one of claims 4 to 9,
At least a part of the display area is displayed, and the current of the reference current source circuit is adjusted according to the luminance or chromaticity of a part of the display area.   An information terminal comprising the current-driven display device according to any one of claims 4 to 10. An addition-type current source circuit, a plurality of drive circuits, and a display unit;
The addition type current source circuit includes:
A reference current source circuit that outputs a reference current from a current output terminal;
An input terminal is connected in common to the current output terminal of the reference current source circuit, and each is connected to the reference current of the reference current source circuit and one end to the control terminal of the transistor during current copying based on a control signal A plurality of current copier circuits that output the current copied to the capacitor from the output terminal of the transistor at the time of current output.
A first control circuit that outputs the control signal for controlling operations of the plurality of current copier circuits;
A current source circuit that outputs one of the output currents of the plurality of current copier circuits, or a current obtained by adding a plurality of output currents,
Each of the plurality of drive circuits is
It includes a plurality of current copier circuits that input the output current from the addition type current source circuit, copy the input current, add the copied current according to the input digital data, and output it. The data line is driven by current according to the digital data
The display section is arranged in an array at intersections of the plurality of data lines and the plurality of gate lines, and is turned on / off by the gate lines, and output to the data lines from the corresponding driving circuits. A display device, comprising: a plurality of pixel cells that copy the supplied current and supply the current to a corresponding display element.   The current copier circuit, based on a control signal, copies the reference current of the reference current source circuit as a control terminal voltage to a capacitor having one end connected to a control terminal of a transistor at the time of current copying, and at the time of current output, 13. The display device according to claim 12, wherein a control terminal voltage of the capacitor is applied to a control terminal of the transistor, and a current having a current value corresponding to the copied current is output from the output terminal.   The plurality of current copier circuits are grouped into at least two groups, and a current copier circuit belonging to at least one of the other groups is output during a period when the current copier circuit belonging to one group outputs a current. The display device according to claim 12, wherein the display device is configured to copy an output current of the reference current source circuit. The drive circuit is provided for each output of a plurality of different reference currents. Each of the current copier circuits is based on a control signal, and at the time of current copying, the reference current of the reference current source circuit is connected to a transistor at one end. When the current is output, the control terminal voltage of the capacitor is applied to the control terminal of the transistor, and the current value corresponding to the copied current from the output terminal is copied to the capacitor connected to the control terminal. It has multiple current copier circuits that output current,
A current output type digital analog that outputs a current generated based on the combination of the reference currents as an output current by controlling conduction / non-conduction of the output of each current copier circuit according to the input digital data. The display device according to claim 12, further comprising a conversion circuit.   In the drive circuit, the plurality of current copier circuits are grouped into at least two groups, and one group performs an operation of copying current while one group outputs current. The display device according to claim 12, further comprising a control unit. As the reference current source circuit,
An amplification circuit that inputs a predetermined voltage from an input terminal and outputs the predetermined voltage from an output terminal;
The first terminal is connected to the second power source via the variable resistor, the second terminal functioning as a control terminal is connected to the output terminal of the amplifier circuit, and a transistor for outputting current from the third terminal is provided. The display device according to claim 12, comprising a plurality of reference current sources.   The display device according to claim 17, wherein a common voltage is supplied to the amplifier circuits of the plurality of reference current sources. The current copier circuit includes a transistor having a first terminal connected to a first power supply, a second terminal functioning as a control terminal, and a third terminal;
A capacitance connected between a fixed potential and the second terminal of the transistor;
A first switch connected between the second terminal and the third terminal of the transistor;
A second switch connected between the third terminal of the transistor and the input terminal;
A third switch connected between the third terminal of the transistor and the output terminal;
With
4. The current source circuit according to claim 1, wherein the first to third switches are on / off controlled in accordance with a corresponding control signal. 5. The current copier circuit includes a transistor having a first terminal connected to a first power supply, a second terminal functioning as a control terminal, and a third terminal;
A capacitance connected between a fixed potential and the second terminal of the transistor;
A first switch connected between the second terminal and the third terminal of the transistor;
A second switch connected between the third terminal of the transistor and the input terminal;
A third switch connected between the third terminal of the transistor and the output terminal;
The current drive type display device according to claim 4, wherein the first to third switches are on / off controlled in accordance with a corresponding control signal. The current copier circuit includes a transistor having a first terminal connected to a first power supply, a second terminal functioning as a control terminal, and a third terminal;
A capacitance connected between a fixed potential and the second terminal of the transistor;
A first switch connected between the second terminal and the third terminal of the transistor;
A second switch connected between the third terminal of the transistor and the input terminal;
A third switch connected between the third terminal of the transistor and the output terminal;
The display device according to claim 12, wherein the first to third switches are on / off controlled in accordance with a corresponding control signal.

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