JP2005217113A - Semiconductor device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device capable of reducing the number of steps of forming a bump by forming the bump consistently in a wafer step. <P>SOLUTION: A wiring pattern 5 is formed on the surface of a semiconductor substrate 5, and a metal layer of about 10 to 40 μm is formed on the upper layer of the wiring pattern. After a resist 8 having a specific pattern is formed on an upper layer of this metal layer, etching is implemented. Subsequently, after the resist is removed, and a passivation film 7 covering the wiring pattern and the metal layer is formed, etching of an insulating layer is implemented so as to expose the surface of the metal layer. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof. More specifically, the present invention relates to a semiconductor device and a manufacturing method thereof that can reduce man-hours by forming metal bumps consistently in a wafer process.

  For example, a liquid crystal driver IC is mounted using a TAB (tape automated bonding) structure in which conductor leads repeatedly formed on a tape-shaped film and corresponding portions of chip bonding pads are overlapped and bonded by appropriate means for wiring. Most of them have a COB (chip on board) structure in which a chip is directly mounted on a daughter board such as a mother board body or module board of an electronic device without assembling the chip into a package. When these TAB structure and COB structure are adopted, it is necessary to form metal bumps.

Hereinafter, a conventional semiconductor device in which the above-described metal bumps are formed and a manufacturing method thereof will be described with reference to the drawings.
FIG. 4 is a schematic cross-sectional view for explaining a conventional semiconductor device. In the semiconductor device 101 shown here, a wiring pattern 105 including a copper wiring layer 103 and an insulating interlayer film 104 is formed on the surface of a semiconductor substrate 102. A bonding pad 106 made of aluminum is formed on the upper layer of the wiring pattern, and is made of a silicon nitride layer and a silicon oxide layer or a silicon oxynitride layer and a silicon oxide layer in order to stabilize the surface characteristics of the semiconductor chip. A passivation film 107 is formed. In this passivation film, an opening 108 is formed so that the surface of the bonding pad is exposed, and the first barrier metal layer 109 is formed by sputtering titanium tungsten on the passivation film. A second barrier metal layer 110 made of copper or gold is formed as an upper layer, and a bump 111 made of gold is formed on the bonding pad via the first barrier metal layer and the second barrier metal layer. (For example, refer to Patent Document 1).

  Here, when manufacturing the conventional semiconductor device as described above, first, as shown in FIG. 5A, the copper wiring layer 103 and the insulating interlayer film 104 are formed on the surface of the semiconductor substrate 102. Then, a copper wiring layer is formed on the copper wiring layer and the insulating interlayer film as shown in FIG. 5B, and the extra copper wiring layer of about several μm is removed using a CMP (Chemical Mechanical Polishing) apparatus. Thereby, as shown in FIG. 5C, the wiring pattern 105 is formed on the surface of the semiconductor substrate.

  Next, after a bonding pad 106 made of aluminum is formed on the wiring pattern, as shown in FIG. 5D, a silicon nitride layer and a silicon oxide layer or a silicon oxynitride layer and a silicon oxide layer are formed on the bonding pad. A passivation film 107 is formed.

Subsequently, as shown in FIG. 5E, a passivation film opening is formed in the bonding pad connection region by lithography and etching.
In addition, the process from FIG. 5A to FIG. 5E is generally called a wafer process.

  Next, after sputtering of titanium tungsten, sputtering of copper or gold is performed to form a first barrier metal layer 109 on the passivation film as shown in FIG. A second barrier metal layer 110 is formed on the upper barrier metal layer. Hereinafter, both the first barrier metal layer and the second barrier metal layer are collectively referred to as a barrier metal layer.

Subsequently, as shown in FIG. 6G, a resist 112 is applied to the upper layer of the barrier metal layer so as to have a film thickness larger than the height of the bump formed in a later process, and the lithography technique is used to apply the resist 112 shown in FIG. ), An opening 113 is formed in the resist.
The reason why the resist is applied so that the film thickness becomes larger than the height of the bump formed in a later step is to make the finish of the side surface of the bump straight.

  Next, electrolytic plating is performed using the barrier metal layer as a cathode, and bumps 111 made of gold having a thickness of about 10 to 40 μm are formed on the upper layer of the barrier metal layer as shown in FIG.

Thereafter, as shown in FIG. 6 (j), the resist is dissolved and removed, and further, the barrier metal layer in the non-bump-formed region is removed, whereby the semiconductor device as shown in FIG. 4 can be obtained.
In addition, the process from FIG.6 (f)-FIG.6 (j) is generally called the bump process.

  The reason why the bonding pads are formed on the wiring pattern is that it is assumed that the semiconductor substrate is connected by wire bonding. That is, conventionally, in the wafer process, bonding pads are formed on all the semiconductor substrates in order to form a semiconductor substrate that can handle both bump connection and wire bonding. Bonding pads are formed.

JP-A-9-199505

  However, in the semiconductor device manufacturing method described above, when forming bumps, the copper wiring layer formed on the entire surface of the wiring pattern in the wafer process is temporarily removed, and a barrier metal layer is formed again in the bump process, which requires a large number of steps. The cost is high.

  The present invention was devised in view of the above points, and provides a semiconductor device capable of reducing the number of steps until bump formation by consistently forming bumps in a wafer process, and a method for manufacturing the same. It is intended.

  In order to achieve the above object, a semiconductor device of the present invention includes a semiconductor substrate, a wiring layer formed on the surface of the semiconductor substrate, metal bumps formed on the wiring layer, the wiring layer, and the metal. An insulating layer is provided to cover the side surface of the bump.

  Here, since the metal bumps are formed on the wiring layer, that is, the metal bumps are formed on the wiring layer without using the bonding pads, the bonding pad forming step can be omitted. .

  In order to achieve the above object, a method of manufacturing a semiconductor device according to the present invention includes a step of forming a wiring layer on the surface of a semiconductor substrate, and a metal layer having a predetermined thickness is formed on the wiring layer. A step of forming a mask layer having a predetermined mask pattern on an upper layer of the metal layer, a step of transferring the mask pattern to the metal layer, and after removing the mask layer, the wiring layer and the metal A step of forming an insulating layer covering the layer, and a step of removing the insulating layer so that the surface of the metal layer is exposed.

Here, a wiring layer is formed by forming a metal layer having a predetermined thickness on the upper layer of the wiring layer, forming a mask layer having a predetermined mask pattern on the upper layer of the metal layer, and then transferring the mask pattern to the metal layer. Metal bumps can be formed thereon.
The predetermined film thickness means a film thickness that can obtain a desired metal bump.

  In addition, after forming the insulating layer covering the wiring layer and the metal layer, the insulating layer is removed so that the surface of the metal layer is exposed, thereby forming the insulating layer covering the side surfaces of the wiring layer and the metal bump. be able to.

  The method for manufacturing a semiconductor device according to the present invention includes a step of forming a wiring layer on the surface of the semiconductor substrate, a step of forming a metal layer on the upper layer of the wiring layer, and a predetermined mask pattern on the upper layer of the metal layer. A step of forming a mask layer, a step of forming a metal bump layer in an opening of the mask layer, and after removing the mask layer, removing the metal layer in a region where the metal bump layer is not formed, A step of forming an insulating layer covering the wiring layer and the metal bump layer; and a step of removing the insulating layer so that the surface of the metal bump layer is exposed.

  Here, a metal layer is formed over the wiring layer, a mask layer having a predetermined mask pattern is formed over the metal layer, a metal bump layer is formed in the opening of the mask layer, and the non-metal bump layer is formed. By removing the metal layer in the formation region, metal bumps can be formed on the wiring layer.

  When the metal bump layer is formed by electrolytic plating, it is not necessary to newly form a barrier metal layer as an energization layer by energizing the metal layer formed above the wiring layer.

  In the above-described semiconductor device of the present invention, the bonding pad forming step and the barrier metal layer forming step can be omitted, so that the tact time can be shortened. Further, since the bonding pad and the barrier metal layer are not required, the material cost can be reduced.

  Also, since the side surface of the metal bump is covered with an insulating layer, the rust prevention effect of the metal bump can be increased. Even if the metal bump is formed of a material that is easily corroded, such as Cu, High reliability can be obtained.

  In the method of manufacturing a semiconductor device to which the present invention is applied, the bonding pad forming step and the barrier metal layer forming step can be omitted, so that the number of steps until bump formation can be reduced and the tact time can be shortened. Further, since the bonding pad and the barrier metal layer are not required, the material cost can be reduced.

  Furthermore, since an expensive CMP apparatus is unnecessary and a passivation film patterning step is not required, the manufacturing cost of the semiconductor device can be greatly reduced.

Hereinafter, embodiments of the present invention will be described with reference to the drawings to facilitate understanding of the present invention.
FIG. 1 is a schematic cross-sectional view for explaining an example of a semiconductor device to which the present invention is applied. The semiconductor device 1 shown here includes a copper wiring layer 3 and an insulating interlayer film 4 on the surface of a semiconductor substrate 2. A wiring pattern 5 is formed, and a bump 6 made of copper having a thickness of about 10 to 40 μm is formed on the wiring pattern. A passivation film 7 made of a silicon nitride layer and a silicon oxide layer or a silicon oxynitride layer and a silicon oxide layer is formed so as to cover the wiring pattern and the side surfaces of the bumps.

  Here, in the above, a semiconductor device in which bumps made of copper are formed on a copper wiring is taken as an example. However, Al or other metal material having a low resistance value may be used as the wiring layer. A bump made of solder, or a bump made of a plurality of materials having a two-layer structure of a layer made of copper and a layer made of solder, for example, may be formed thereon.

  Hereinafter, a method for manufacturing the above-described semiconductor device will be described. That is, an example of a method for manufacturing a semiconductor device to which the present invention is applied will be described.

  In an example of a method for manufacturing a semiconductor device to which the present invention is applied, first, as in the conventional method for manufacturing a semiconductor device, a copper wiring layer 3 and an insulating interlayer film 4 are formed on the surface of a semiconductor substrate 2, and A copper wiring layer is formed on the copper wiring layer and the insulating interlayer film.

Here, when the copper wiring layer is formed on the copper wiring layer and the insulating interlayer film, as shown in FIG. 2A, the thickness is 10 on the upper layer of the wiring pattern 5 composed of the copper wiring layer and the insulating interlayer film. A copper wiring layer of about 40 μm is formed.
In the following, for convenience of explanation, a copper wiring layer of about 10 to 40 μm formed on the upper layer of the wiring pattern is expressed as a bump forming layer.

  Next, as shown in FIG. 2B, a resist 8 is applied on the upper layer of the bump forming layer, and the resist remains only in the bump forming region as shown in FIG. 2C by the lithography technique and the etching technique. Next, resist patterning is performed.

  Subsequently, wet etching, dry etching, or the like is performed with the resist remaining only in the upper bump formation region of the bump formation layer, and as shown in FIG. 2D, the bump formation layer other than the bump formation region is removed. A bump 6 made of copper is formed.

  Next, after the resist is dissolved and removed as shown in FIG. 2E, a passivation film comprising a silicon nitride layer and a silicon oxide layer or a silicon oxynitride layer and a silicon oxide layer as shown in FIG. 7 is formed on the entire surface.

  Thereafter, the passivation film formed on the bumps is removed by a method such as polishing to ensure the conduction of the bumps, whereby the semiconductor device as shown in FIG. 1 can be obtained.

  The semiconductor device described above can also be manufactured by the following method. That is, another example of a method for manufacturing a semiconductor device to which the present invention is applied will be described.

  In another example of the semiconductor device manufacturing method to which the present invention is applied, first, as in the conventional semiconductor device manufacturing method described above, the copper wiring layer 3 and the insulating interlayer film 4 are formed on the surface of the semiconductor substrate 2, Further, a copper wiring layer is formed on the copper wiring layer and the insulating interlayer film.

Here, when the copper wiring layer is formed on the copper wiring layer and the insulating interlayer film, as shown in FIG. 3A, the thickness of the upper layer of the wiring pattern 5 composed of the copper wiring layer and the insulating interlayer film is several. A copper wiring layer of about μm is formed. In the above-described conventional method for manufacturing a semiconductor device, although not intentionally, a copper wiring layer of about several μm is formed on the upper layer of the wiring pattern, and the steps up to here are no different from the conventional method. .
In the following, for convenience of explanation, a copper wiring layer of about several μm formed on the upper layer of the wiring pattern is expressed as a current-carrying layer.

  Next, as shown in FIG. 3B, a resist 8 is applied to the upper layer of the conductive layer so as to have a film thickness larger than the height of the bump to be formed in a later process, and the bump is formed by the lithography technique and the etching technique. The resist is patterned so that only the region is opened.

  Subsequently, electrolytic plating is performed using the current-carrying layer as a cathode, and bumps 6 made of copper having a thickness of about 10 to 40 μm are formed on the current-carrying layer as shown in FIG.

  Here, in this manufacturing method, bumps made of copper are formed on the current-carrying layer by performing electrolytic plating, but the bumps are not necessarily formed by the electrolytic plating method. For example, solder bumps are formed by the printing method. It may be formed.

  For example, when forming bumps having a two-layer structure such as a copper layer and a solder layer, or a copper layer and a tin and silver layer, the copper layer may be electroplated or printed. After forming by the method, a layer made of solder or a layer made of tin and silver is formed by an electrolytic plating method or a printing method.

  Next, as shown in FIG. 3D, the resist is dissolved and removed. As shown in FIG. 3E, the conductive layer other than the bump formation region is removed, and then as shown in FIG. Then, a passivation film 7 composed of a silicon nitride layer and a silicon oxide layer or a silicon oxynitride layer and a silicon oxide layer is formed on the entire surface.

  Thereafter, the passivation film formed on the bumps is removed by a method such as polishing to ensure the conduction of the bumps, whereby the semiconductor device as shown in FIG. 1 can be obtained.

In the semiconductor device to which the present invention described above is applied, since the bonding pad made of aluminum formed in the conventional semiconductor device is not formed, the step of forming the bonding pad can be omitted and the manufacturing cost can be reduced. Can be achieved.
Similarly, since the barrier metal layer made of titanium tungsten or the like formed in the conventional semiconductor device is not formed, the step of forming the barrier metal layer such as sputtering can be omitted and the manufacturing cost can be reduced. Reduction can be achieved.

  Further, in the semiconductor device to which the present invention is applied, the side surface portion of the bump made of copper is covered with a passivation film, so that the rust preventive effect of the bump compared with the conventional semiconductor device in which the side surface portion of the bump is exposed Improvement can be expected.

  Also, in the method of manufacturing a semiconductor device to which the present invention is applied, a bump forming layer and a conductive layer are formed on the upper layer of the wiring pattern, and the bump is formed by etching the bump forming layer or by electrolytic plating using the conductive layer as a cathode. In addition, the number of steps until bump formation can be reduced as compared with the conventional method for manufacturing a semiconductor device.

  Further, since it is not necessary to remove the copper wiring layer of about several μm formed on the upper layer of the wiring pattern, which has been performed by the conventional semiconductor device manufacturing method, an expensive CMP apparatus is not required, and the conventional semiconductor Since the passivation film patterning step performed in the device manufacturing method is not required, a significant cost reduction is realized.

It is typical sectional drawing for demonstrating an example of the semiconductor device to which this invention is applied. It is typical sectional drawing (1) for demonstrating an example of the manufacturing method of the semiconductor device to which this invention is applied. It is typical sectional drawing (1) for demonstrating another example of the manufacturing method of the semiconductor device to which this invention is applied. It is typical sectional drawing for demonstrating the conventional semiconductor device. It is typical sectional drawing (1) for demonstrating the manufacturing method of the conventional semiconductor device. It is typical sectional drawing (2) for demonstrating the manufacturing method of the conventional semiconductor device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Semiconductor substrate 3 Copper wiring layer 4 Insulating interlayer film 5 Wiring pattern 6 Bump 7 Passivation film 8 Resist

Claims (4)

A semiconductor substrate;
A wiring layer formed on the surface of the semiconductor substrate;
Metal bumps formed on the wiring layer;
A semiconductor device comprising: an insulating layer that covers side surfaces of the wiring layer and the metal bump. Forming a wiring layer on the surface of the semiconductor substrate;
Forming a metal layer having a predetermined thickness on the wiring layer;
Forming a mask layer having a predetermined mask pattern on the metal layer;
Transferring the mask pattern to the metal layer;
Forming an insulating layer covering the wiring layer and the metal layer after removing the mask layer;
A method of manufacturing a semiconductor device, comprising: removing the insulating layer so that a surface of the metal layer is exposed. Forming a wiring layer on the surface of the semiconductor substrate;
Forming a metal layer on top of the wiring layer;
Forming a mask layer having a predetermined mask pattern on the metal layer;
Forming a metal bump layer in the opening of the mask layer;
Removing the mask layer, removing the metal layer in the non-forming region of the metal bump layer, and forming an insulating layer covering the wiring layer and the metal bump layer;
A method for manufacturing a semiconductor device, comprising: removing the insulating layer so that a surface of the metal bump layer is exposed. The method of manufacturing a semiconductor device according to claim 3, wherein the metal bump layer is formed by an electroplating method by energizing the metal layer.

Images