JP2005115591A - Electronic circuit operation analysis method and device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve setting of an initial value for securing global convergence and increasing circuit analysis processing efficiency. <P>SOLUTION: A CPU 102 reads net list information from a net list information storage part 106, constructs a circuit equation including a nonlinear function according to a correction node solution method, sets the initial value of a branch voltage of a transistor constructing an auxiliary equation in an active area for the transistor, sets a coefficient of a term included in the auxiliary equation so that the initial value becomes a unique solution of the auxiliary equation, finds the initial value of the branch voltage for a part excepting the transistor by solving the auxiliary equation to obtain an initial value of the auxiliary equation, constructs a homotopy equation by using the circuit equation and the auxiliary equation, and find a solution to the circuit equation by tracking a solution curve of the homotopy equation. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to an electronic circuit operation analysis method for performing an operation analysis of an electronic circuit using a homotopy method and an electronic circuit operation analysis apparatus using the same.

  Conventionally, in circuit design for large scale integrated circuits (LSIs), circuit analysis (circuit simulation) processing, that is, processing for solving a nonlinear equation describing an electronic circuit with an electronic circuit operation analysis device configured by a computer has been the main work. It has become one of the.

  In general, circuit analysis means solving a circuit equation, but execution of the circuit analysis involves making a circuit equation (formulation) and numerically solving the circuit formula (solution method). It can be divided into two processes. As a formulation method, there are a modified nodal solution method, a tableau method, and the like. As a solution method, a Newton method, a homotopy method, and the like are known.

  Conventionally, circuit simulators called SPICE that perform circuit analysis using the Newton-Raphson method have been adopted at circuit design sites around the world, but the Newton-Raphson method can always be analyzed well (referred to as global convergence). ) Because it is not a numerical analysis technique, there is a problem that a solution is not necessarily obtained (called non-convergence). Such a non-convergence problem is a bottleneck in LSI design.

  In order to solve this problem, a numerical analysis technique called a homotopy method has been studied as a numerical analysis technique capable of global convergence (see Patent Document 1 and Non-Patent Document 1).

  The homotopy method is one of the numerical analysis techniques for nonlinear equations, and is a very powerful method that guarantees global convergence. The principle is that the initial solution (initial value) starts from an auxiliary equation that is easy to solve, continuously transforms to the original equation to be solved, and finally reaches the solution of the original equation to be solved. is there. In the homotopy method, various methods are known depending on the configuration of the homotopy function, but the method using the Newton fixed point homotopy method is said to be relatively efficient (see Non-Patent Document 2).

  In the homotopy method, if the initial value can be selected to a point closer to the true solution, it can be expected that the calculation efficiency will be greatly improved. However, in order to guarantee the global convergence by the homotopy method, a strict limit is imposed on the area that can be taken as the initial value (see Non-Patent Document 3).

  Therefore, in general, in the homotopy method, the initial value starts from 0 (origin) that is unrelated to the true solution in order to guarantee global convergence (see Non-Patent Document 2). Therefore, even if global convergence is guaranteed, there is a problem that the labor of calculation required for the analysis processing until reaching the true solution becomes very large.

The research of the electronic circuit operation analysis method using the homotopy method is roughly divided into three: (i) a homotopy function constituting the homotopy, (ii) setting of an initial value, and (iii) tracking of a solution curve. Of these, (ii), except for Non-Patent Document 3, has not been studied so far, and new studies have been conducted from the theoretical viewpoint in recent research, and new possibilities for initial value setting have been made. Was suggested (see Non-Patent Document 4).
JP-A-7-141416 CB Garcia and WI Zanwill, "Pathways to Solutions, Fixed Points, and Equilibria," Prentice-Hall, 1981. Y. Inoue, S. Kusanobu, K. Yamamura and T. Takahashi, "Newton-fixed-point homotopy method for finding DC operating-points of nonlinear circuits," Proc, 2001 Int. Tech. Conf. Circuits / Syst., Computer & Commun., Vol.I, pp.370-373, July 2001. T. Ohtsuki, T. Fujisawa and S. Kumagai, "Existence theorems and a solution algorithm for piecewise-linear resistor networks," SIAM J. Math. Anal., Vol.8, no.1, pp.69-99, Feb .1977. Y. Inoue and S. Kusanobu, "Theorems on the uniqueness of an initial solution for homotopy methods," Proc, 2002 Int. Symp. Nonlinear and its Applications, Xi'an, PRC, pp. 343-346, OCt. 2003.

  However, Non-Patent Document 4 does not disclose or suggest any specific algorithm.

  In the electronic circuit operation analysis method for analyzing the operation of an electronic circuit using the homotopy method, it is possible to guarantee the global convergence and improve the circuit analysis processing efficiency by devising the initial value setting. The challenge is to make it.

  According to the present invention, the construction step of constructing a circuit equation including a nonlinear function based on the netlist information representing the characteristics of each electronic component constituting the electronic circuit and its connection relation, and the auxiliary equation is continuously deformed and the circuit An electronic circuit operation analysis method for analyzing the operation of the electronic circuit, wherein the construction step includes a circuit equation construction step for constructing a circuit equation based on the netlist information, The step includes setting an initial value of a branch voltage of a transistor constituting the auxiliary equation in an active region of the transistor, and a term included in the auxiliary equation so that the initial value of the branch voltage becomes a unique solution of the auxiliary equation. The solution of the branch voltage component other than the transistor is obtained by solving the auxiliary equation using the initial value of the branch voltage. The initial value setting step for obtaining the initial value of the homotopy method, the homotopy construction step for constructing the homotopy equation using the circuit equation and the auxiliary equation, and the solution of the circuit equation by tracing the solution curve of the homotopy equation An electronic circuit operation analysis method is provided, including a desired tracking step.

  In the circuit equation construction step in the construction step, a circuit equation is constructed based on the netlist information. In the solving step, in the initial value setting step, the initial value of the branch voltage of the transistor constituting the auxiliary equation is set in the active region of the transistor, and the initial value of the branch voltage is a unique solution of the auxiliary equation. An initial value of the auxiliary equation is obtained by setting a coefficient of a term included in the auxiliary equation and obtaining a solution of a branch voltage component other than the transistor by solving the auxiliary equation using the initial value of the branch voltage. In the homotopy construction step, the homotopy equation is constructed using the circuit equation and the auxiliary equation, and in the tracking step, the solution of the circuit equation is obtained by tracing the solution curve of the homotopy equation.

  Here, in the initial value setting step, a voltage source having an initial value of the branch voltage of the transistor is connected in parallel to the transistor to set the active region of the transistor, and the branch voltage of a portion other than the transistor Thus, the branch voltage of the transistor and the branch voltage of the portion other than the transistor may be set as the initial values of the auxiliary equation.

  The transistor may include at least one of a bipolar transistor and a field effect transistor.

The homotopy equation may include at least a function f (x) constituting the circuit equation and a fixed point homotopy term.

The circuit equation may be constructed by a modified nodal solution.

  The active region of the transistor means the following operation region and its vicinity. That is, in the case of a bipolar transistor, it refers to a region where the emitter base junction is forward biased and the collector base junction is substantially non-forward biased. In the case of a field effect transistor (eg, an n-channel transistor), it refers to a region where the gate source voltage is equal to or higher than the threshold value Vt and the gate drain voltage is lower than Vt.

  According to the present invention, in an electronic circuit analysis method using the homotopy method, a point closer to the true solution can be selected as an initial value, so that global convergence is ensured and circuit analysis processing efficiency is improved. It becomes possible to make it.

  Hereinafter, an electronic circuit operation analysis method according to an embodiment of the present invention will be described with reference to the drawings. In this embodiment, the operation analysis of the electronic circuit is performed using the Newton fixed point homotopy method.

  FIG. 1 is a block diagram of an electronic circuit operation analysis apparatus used in an electronic circuit operation analysis method according to an embodiment of the present invention, and the electronic circuit operation analysis apparatus is configured by a computer 100.

  In FIG. 1, a semiconductor integrated circuit design apparatus constituted by a computer 100 includes an input device 101 constituted by a keyboard, a mouse, etc. and constituting input means, a central processing unit (CPU) 102 constituting electronic circuit operation analysis means, a display A display device 103 constituting means, a main storage device 104 constituted by a semiconductor memory, and an external storage device 105 constituted by a magnetic disk are provided.

  The external storage device 105 includes a netlist information storage unit 106 that stores in advance netlist information that represents the characteristics of each electronic component that constitutes the electronic circuit to be analyzed and its connection relationship.

  The external storage device 105 also stores a program for electronic circuit operation analysis processing executed by the CPU 102. The main storage device 104 and the external storage device 105 constitute storage means.

  FIG. 2 is a flowchart showing an electronic circuit operation analysis method according to the present embodiment. The computer 100 expands an electronic circuit operation analysis processing program stored in advance in the external storage device 105 in the main storage device 104, and The process performed by executing a program is shown.

  FIG. 3 is an explanatory diagram for explaining the electronic circuit operation analysis method according to the present embodiment.

  Hereinafter, the processing content of the electronic circuit operation analysis method according to the present embodiment will be described with reference to FIGS.

  First, the outline of the present embodiment will be described with reference to FIGS. 1 and 2.

  When a user (for example, a semiconductor integrated circuit designer) operates the input device 101, the computer 100 reads netlist information stored in advance in the netlist information storage unit 106 of the external storage device 105 into the main storage device 104. .

  Next, the computer 100 executes a construction process for constructing a circuit equation including a nonlinear function based on the netlist information representing the characteristics of each electronic component constituting the electronic circuit to be analyzed and the connection relationship thereof. In the construction step, the original circuit equation f (x) = 0 to be solved is constructed by the modified nodal solution method based on the netlist information in the initial circuit equation construction step included in the construction step (step S201). . In the present embodiment, since the electronic circuit to be analyzed includes a nonlinear element, for example, a bipolar transistor, the circuit equation includes a nonlinear function.

  Next, the computer 100 executes a solution finding process for solving the circuit scheme using the auxiliary equation (steps S202 to S207).

Specifically, first, the auxiliary function f ⁰ (x) is configured using the function f (x) configuring the circuit equation, and the auxiliary equation f ⁰ (x) = 0 is configured (step S202). Step S202 constitutes an auxiliary equation construction process.

Next, the initial value of the branch voltage of the transistor constituting the auxiliary equation is set to a predetermined value in the active region of the transistor, and the term included in the auxiliary equation so that the initial value becomes a unique solution of the auxiliary equation The solution vector component of the branch voltage of the part other than the transistor is obtained by solving the auxiliary equation, thereby obtaining the initial value x ⁰ of the homotopy method, that is, the branch voltage of the transistor and the part other than the transistor setting the initial value ^{x 0} of the branch voltage (step S203). Step S203 constitutes an initial value setting step.

  Next, the homotopy function h (x, t) = 0 is constructed by using the circuit equation and the auxiliary equation using the initial value, and the homotopy equation h (x, t) = 0 is constructed (step S204). Step S204 constitutes a homotopy construction step.

Next, as a starting point ^{t = 0, x = x 0} , the solution curves of the homotopy equation track aims to t = 1 (step S205).

  When t = 1 is reached (step S206), it means that the solution has been successfully found, and the solution of the circuit equation f (x) = 0 is saved and output (for example, stored in the external storage device 105). Alternatively, the data is displayed on the display device 103 by being output to the display device 103, or is output from the computer 100 to an external device), and the processing is ended (step S207). In this way, analysis of the DC operating point of the electronic circuit to be analyzed (for example, the collector voltage and collector current value of each transistor included in the electronic circuit) is performed, or the small signal AC equivalent circuit at the DC operating point is analyzed. The operation analysis of various electronic circuits such as the calculation of the parameters is performed.

  On the other hand, in step S206, if t = 1 is returned without reaching t = 1, it means that the solution has failed, and in this case, the process is terminated. However, in this method, since the uniqueness of the initial solution is satisfied as described above, in principle, it does not return to t = 0. Steps S205 to S207 constitute a tracking step for obtaining a solution of the circuit equation by tracing the solution curve of the homotopy equation.

  As described above, the electronic circuit operation analysis method according to the present embodiment is configured to construct a circuit equation including a non-linear function based on the netlist information indicating the characteristics of each electronic component constituting the electronic circuit and the connection relationship thereof. And an electronic circuit operation analysis method for analyzing the operation of the electronic circuit, the construction step stored in the netlist information storage unit 106. A circuit equation constructing step (step S201) for constructing a circuit equation based on the netlist information, wherein the solving step sets an initial value of a branch voltage of a transistor constituting the auxiliary equation in an active region of the transistor; A coefficient of a term included in the auxiliary equation is set so that an initial value of the branch voltage is a unique solution of the auxiliary equation, and An initial value setting step (step S203) for obtaining an initial value of the homotopy method by obtaining a solution of a branch voltage component other than the transistor by solving the auxiliary equation using an initial value; and the circuit equation and the initial value A homotopy construction step (step S204) for constructing a homotopy equation using the auxiliary equation used, and a tracking step (steps S205 to S207) for finding a solution of the circuit equation by tracing a solution curve of the homotopy equation. It is configured as follows.

  In this way, a point closer to the true solution, specifically, the initial value of the circuit equation to be solved is selected in order to select the initial value of the branch voltage of the transistor constituting the auxiliary equation as a predetermined value in the active region of the transistor. Can be set to a point closer to the true solution, and it is possible to guarantee the global convergence and to improve the efficiency of the circuit analysis processing.

  Next, each process in FIG. 2 will be described in detail.

  First, in the initial circuit equation construction step in step S201, the following circuit equation is constructed as a nonlinear circuit equation to be solved.

f (x) = 0, f (·); R ⁿ → R ⁿ
In a practical modified nodal solution, it is known that f is expressed as follows.

f _g (v, i) = D _g g (D _g ^T v) + D _E i + J
f _E (v) = D _E ^T v−E
Here, f = (f _g , f _E ) ^T , f _g : R ⁿ → R ^N , f _E : R ^N → R ^M , x = (v, i) ^T ∈R ⁿ , n = N + M. The variable vector V∈R ^N is node voltages, i∈R ^M represents a branch current flowing in the branch of the independent voltage source. Further, g: ^{R K} → ^{R K} is a continuous function of the voltage controlled current source (VCCS) type, E∈R ^M is the voltage vector of the independent voltage source, the J∈R ^N is a current vector of the node current source. Furthermore, D _g is an N × M irreducible connection matrix for the branches of g, and D _E is an N × M irreducible connection matrix for the branches of the independent voltage source. The bipolar transistor circuit, branches of the transistors constituting the branch g _g q: branch voltages of ^{_{R 2 → R 2 v q =}} (v e, v c) T and the branch current _{i q = (i e, i} c) T Is expressed using the Ebers-Moll model as follows.

ここで、α_ｆ，α_γ，ｍ_ｅ，ｎ_ｅ，ｍ_ｃ，ｎ_ｃはモデルパラメータである。

_{Here, α f, α γ, m} e, n e, m c, n c is the model parameters.

In general, the homotopy method, first, a supplementary equations ^f 0 (x) = 0 with a known solution ^{x 0.} Then, in order to continuously transform the auxiliary function f ⁰ (x) to f (x), a homotopy parameter tε [0,1] is introduced, and the homotopy function h (x, t) = tf (x) + (1-t) f ⁰ (x) is constructed. Next, the solution curve of the homotopy equation h (x, t) = 0, h: R ^{n + 1} → R ⁿ is traced starting from the known solution (x ⁰ , 0) at t = 0, and the t = 1 hyperplane ( When x ^* , 1) is reached, x ^{* at} that time becomes the solution of the original circuit equation f (x) = 0 to be solved.

In the present embodiment, the following auxiliary function f ⁰ (x) is constructed in the auxiliary equation construction step of step S202.

f ⁰ (x) = f (x) −f (x ⁰ ) + A (x−x ⁰ )
Here, A is an n × n matrix represented by diag (D _g G _FP D _g ^T , −R _FP 1 _M ). Further, G _FP ∈R ^{K × K} represents a quasi-positive conductance diagonal matrix, R _FP represents a positive scalar value (positive resistance), and 1 _M represents an M × M unit matrix.

In this case, an equivalent circuit around the transistor in the auxiliary equation is expressed as a composite transistor in FIG. Here, the composite transistor refers to a transistor regarded as one transistor whose terminal voltage and current are V _E , V _C , I _E , and I _C. In FIG. 3, G _E conductance connected between the emitter and base of the transistor Q, G _C is a conductance connected between the collector and base of the transistor Q, respectively, conductance contained in G _FP in the matrix A Represents.

Next, in the initial value setting step in step S203, an initial value x0 of the auxiliary equation f ⁰ (x) = ⁰ is set.

In this case, the initial value v _q ⁰ of the branch voltage v _q of all the transistors constituting the auxiliary equation is set to a predetermined value in the active region of each transistor (for example, in the case of a pnp transistor, the emitter-base voltage v _e = 0.7v, collector-base voltage v _c = 0v, and in the case of an npn transistor, the emitter-base voltage v _e = −0.7v and the collector-base voltage v _c = 0v). The coefficient G _FP of the term included in the auxiliary equation is set so that the initial value of the voltage becomes a unique solution of the auxiliary equation, and the initial value of the branch voltage of the part other than the transistor is obtained by solving the auxiliary equation. it allows to set the branch voltages and branch voltage portion other than the transistor of the transistor as the initial value x ^0.

In this case, in the composite transistor of FIG. 3, if the conductances G _E and G _C are set to a value equal to or larger than the initial value v _q ⁰ and a predetermined value according to the characteristics of the transistor, the branch g satisfies the narrow passivity. Therefore, if the coefficient G _FP of the term included in the auxiliary equation is set to a predetermined value or more, the initial value becomes a unique solution of the auxiliary equation. Therefore, the coefficient G _FP of a term (fixed point homotopy term described later) included in the auxiliary equation is set to a predetermined value so that the initial value becomes a unique solution of the auxiliary equation, that is, the conductance G _{E of} FIG. sets G _C to a predetermined value or more value determined by the characteristics of the transistors.

As a method of setting the initial value v _q ⁰ of the branch voltage v _q of all the transistors constituting the auxiliary equation to a predetermined value in the active region of each transistor, the value of the initial value of the branch voltage of each transistor is set as follows. The voltage source can be equivalently connected in parallel to each transistor (connected between the emitter and base of the transistor, and connected between the collector and base), so that the active region of the transistor can be set.

Next, a homotopy function h (x, t) is constructed in the homotopy construction step of step S204. The homotopy function h (x, t) constructed at this time is h (x, t) = f (x) − (1−t) f (x ⁰ ) + (1−t) A (x−x ⁰ ). It is. As described above, in this embodiment, the homotopy function includes at least the term of the function f (x) constituting the circuit equation and (1-t) A (x−x ⁰ ) (referred to as a fixed point homotopy term). A homotopy function is used.

Next, the tracking process of step S205 to S207, as a starting point ^{t = 0, x = x 0} , a solution is obtained the solution curve of the homotopy equation to track the aim of t = 1, the resulting solution Save or output etc.

  As described above, in the present embodiment, the initial value is set to a predetermined value close to the true solution and the solution curve of the homotopy equation is traced, so the point close to the true solution is the starting point. It is possible to improve the analysis processing efficiency from the initial value to the arrival of the true solution. Further, by increasing the conductance value in the composite transistor, it becomes possible to guarantee the global convergence of the homotopy method.

Electronic circuit behavior analysis using not only electronic circuit behavior analysis method using Newton fixed point homotopy method, but also homotopy function using homotopy function including at least the term of function f (x) constituting circuit equation and fixed point homotopy term It is also applicable to the method. Furthermore, the fixed point homotopy term is applicable not only to a linear function such as A (x−x ⁰ ) but also to a nonlinear function generally in the form of f _A (x) −f _A (x ⁰ ). .

  Further, although the modified nodal solution method has been described as an example of the circuit equation formulation method, the present invention can also be applied to other formulation methods.

  Further, even when the electronic circuit to be analyzed includes an electrolytic effect transistor, the circuit operation can be analyzed by the same method as in the case of the bipolar transistor.

It is a block diagram of the electronic circuit operation | movement analysis apparatus used for embodiment of this invention. It is a flowchart for demonstrating the process of embodiment of this invention. It is an equivalent circuit diagram for demonstrating the process of embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 ... Computer 101 ... Input device 102 which comprises input means 102 ... CPU which comprises electronic circuit operation | movement analysis means
DESCRIPTION OF SYMBOLS 103 ... Display apparatus 104 which comprises a display means ... Main storage device 105 which comprises a storage means ... External storage device 106 which comprises a storage means ... Net list information storage part

Claims (6)

A construction step of constructing a circuit equation including a nonlinear function based on netlist information representing the characteristics of each electronic component constituting the electronic circuit and its connection relationship; and a solution step of solving the circuit method by continuously deforming the auxiliary equation; In an electronic circuit operation analysis method for analyzing the operation of the electronic circuit,
The construction step includes a circuit equation construction step of constructing a circuit equation based on the netlist information,
The solving step includes setting an initial value of a branch voltage of a transistor constituting the auxiliary equation in an active region of the transistor and including the initial value of the branch voltage in the auxiliary equation so that the initial value becomes a unique solution of the auxiliary equation. An initial value setting step of obtaining an initial value of the homotopy method by obtaining a solution of a branch voltage component other than the transistor by solving the auxiliary equation using the initial value of the branch voltage, An electronic circuit operation comprising: a homotopy construction step of constructing a homotopy equation using the circuit equation and the auxiliary equation; and a tracking step of obtaining a solution of the circuit equation by tracking a solution curve of the homotopy equation analysis method.   In the initial value setting step, a voltage source having an initial value of the branch voltage of the transistor is connected in parallel to the transistor to set the active region of the transistor to obtain a branch voltage of a portion other than the transistor. 2. The electronic circuit operation analysis method according to claim 1, wherein the branch voltage of the transistor and the branch voltage of a portion other than the transistor are set as initial values.   The electronic circuit operation analysis method according to claim 1, wherein the transistor includes at least one of a bipolar transistor and a field effect transistor.   The electronic circuit operation analysis method according to any one of claims 1 to 3, wherein the homotopy equation includes at least a function f (x) constituting the circuit equation and a fixed point homotopy term.   The electronic circuit operation analysis method according to claim 1, wherein the circuit equation is constructed by a modified nodal solution. Netlist information storage means for storing netlist information representing the characteristics of each electronic component constituting the electronic circuit and its connection relationship; construction means for constructing a circuit equation including a nonlinear function based on the netlist information; and auxiliary An electronic circuit operation analysis apparatus for analyzing the operation of the electronic circuit, comprising solving means for solving the circuit system by continuously deforming an equation,
The construction means comprises circuit equation construction means for constructing a circuit equation based on the netlist information,
The solving means sets an initial value of a branch voltage of a transistor constituting the auxiliary equation in an active region of the transistor, and includes the initial value of the branch voltage in the auxiliary equation so that the initial value becomes a unique solution of the auxiliary equation. An initial value setting means for obtaining an initial value of the homotopy method by obtaining a solution of a branch voltage component other than the transistor by solving the auxiliary equation using the initial value of the branch voltage, Electronic circuit operation comprising: homotopy construction means for constructing a homotopy equation using the circuit equation and the auxiliary equation; and tracking means for obtaining a solution of the circuit equation by tracking a solution curve of the homotopy equation Analysis device.

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