JP2005175020A - Wiring board, electronic circuit element and its manufacturing method, and display - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board which has strong adhesion having an integrated circuit chip by increasing the adhesion in the interface between an adhesive used for packaging the integrated circuit chip and the wiring board, and to provide an electronic circuit element and a display. <P>SOLUTION: In a region of a base film 4, where an NCP 9 used for packaging the integrated circuit chip 1 at packaging of the chip 1 is located, through-holes 40 extended through the base film 4 are formed. By attaching a cover lay 6 with an adhesive to the rear face of the base film 4, in such a way as to cover the through-holes 40, the through-holes 40 are filled with an adhesive 6b used in the cover layer 6 with adhesive. The adhesive 6b, filling the through-holes 40 and the NCP 9, are adhere strongly to each other, at the packaging of the integrated circuit chip 1. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a wiring board used for mounting an integrated circuit chip, an electronic circuit element on which the integrated circuit chip is mounted on the wiring board, a manufacturing method thereof, and a display device using the electronic circuit element. More specifically, a wiring board used for flip chip mounting for mounting an integrated circuit chip by connecting bumps of the integrated circuit chip to connection terminals of the wiring board, and an integrated circuit chip on the wiring board by flip chip mounting The present invention relates to an electronic circuit element on which is mounted, a manufacturing method thereof, and a display device.

  Along with the downsizing and thinning of electronic devices, the wiring board has been made into a film. At the same time, in order to cope with the higher density of electronic devices, development of mounting technology for mounting integrated circuit chips and chip electronic components on a film substrate obtained by forming a wiring substrate into a film is in progress.

  FIG. 5 is a cross-sectional view showing a schematic configuration around an integrated circuit chip in a general electronic circuit element in which the integrated circuit chip is mounted on a film substrate.

  The electronic circuit element 107 has a configuration in which the integrated circuit chip 101 is mounted on a wiring substrate 120 which is a film substrate. The wiring board 120 has a configuration in which the first wiring pattern 130 is provided on the surface of the base film 104 made of polyimide, and the second wiring pattern 131 is provided on the back surface. The first wiring pattern 30 has a connection terminal (bump connection terminal) 132 for connecting to the bump 102 of the integrated circuit chip 101 at a part thereof. Also, a solder resist 105 is provided so as to cover the first wiring pattern 130, and an adhesive cover lay 6 provided with an adhesive layer 106 b is attached to one side of the cover lay 6 a so as to cover the second wiring pattern 131. It is attached. Such a film substrate is called FPC (Flexible Printed Circuit), and is used in many electronic devices such as computer peripheral devices.

  Here, a method for mounting the integrated circuit chip 101 on the FPC (wiring board 120) having the above-described configuration, in other words, a method for manufacturing the electronic circuit element 107 will be described.

  First, as a mounting method described above, a mounting method using an anisotropic conductive film (ACF) which is currently mainstream (for example, see Non-Patent Document 1) will be described below with reference to FIG. To do.

  As shown in FIG. 5, the ACF 108 has a metal film-coated plastic fine particle (hereinafter referred to as “conductive particle”) 108a in which plastic beads are plated with Ni, Au or the like in an adhesive 108b such as a film-like epoxy resin. It is dispersed.

  First, the ACF 108 is disposed on the wiring board 120 so as to cover the connection terminal 132. Then, after the connection terminals 132 and the bumps 102 are aligned, the integrated circuit chip 101 is heated and pressed at 180 to 210 ° C. with a tool (not shown). As a result, the conductive particles 108a included in the ACF 108 are pressed between the bumps 102 and the connection terminals 132, and the bumps 102 of the integrated circuit chip 101 and the connection terminals 132 on the wiring board are electrically connected. Is done. At the same time, the adhesive 108b of the ACF 108 is thermally cured, and the bumps 102 and the connection terminals 132 are fixed.

  The method of mounting the integrated circuit chip on the wiring board by connecting the bumps of the integrated circuit chip and the connection terminals of the wiring board in this manner is generally called flip chip mounting.

  Next, as the mounting method, a mounting method using NCP (Non Conductive Paste) that has been developed recently (for example, see Patent Document 1) will be described below with reference to FIG.

  FIG. 6 is a cross-sectional view showing a schematic configuration around the integrated circuit chip 101 in the electronic circuit element 107 in which the integrated circuit chip 101 is mounted on the FPC (wiring board 120) using light or thermosetting resin as the NCP 109. The electronic circuit element 107 shown in FIG. 6 has the same configuration as the electronic circuit element 107 shown in FIG. 5 except that the NCP 109 is used instead of the ACF 108.

  The main difference between NCP109 and ACF108 is that, firstly, ACF108 includes conductive particles 108a, whereas NCP109 does not include conductive particles, and secondly, the state before the integrated circuit chip is mounted, The NCP109 is in the form of a paste while it is in the form of a film.

  When the integrated circuit chip 101 is mounted on the wiring board 120 using the NCP 109, first, the NCP 109 is applied to the wiring board 120 so as to cover the connection terminals 132. Subsequently, after the connection terminals 132 and the bumps 102 are aligned, the integrated circuit chip 101 is heated and pressurized with a tool (not shown). As a result, the bumps 102 are connected to the connection terminals 132 and the integrated circuit chip 101 is mounted on the wiring board 120 as shown in FIG.

  In general, an adhesive mainly composed of an epoxy resin is used for NCP109. Since the adhesive made of an epoxy resin is cured by heating at 200 to 350 ° C., the bump 102 and the connection terminal 132 are pressed by a force that cures and shrinks the NCP 109. Thereby, the bump 102 and the connection terminal 132 are electrically connected.

  As described above, an organic adhesive made of a synthetic resin such as a thermosetting resin or a photocurable resin is usually used for mounting the integrated circuit chip on the wiring board. On the other hand, as represented by multimedia in recent years, not only integrated circuit chips but also chip electronic components are provided on a wiring board in accordance with the demand for higher functionality, more functionality, and smaller size of electronic devices. Increasing cases are mounted, and solder connection is mainly used for mounting such chip electronic components. Solder connection is performed as follows.

First, cream solder is applied on solder connection terminals provided on the wiring board. Thereafter, the chip electronic component is mounted on the wiring board so that the electrode formed on the chip electronic component is placed on the solder. And reflow heating is performed at about 220-240 degreeC, and a solder is fuse | melted. Thereby, the electrode of a chip electronic component and the connection terminal with which the wiring board was equipped are electrically connected.
Japanese Patent Publication No.2-7180 (Publication date: February 15, 1990) JP 11-186294 A (publication date: July 9, 1999) Kasuga Ikuo, “Surface-mounting pocket book, ultra-small package CSP packaging technology,” Nikkan Kogyo Shimbun Publishing, July 30, 1999, p. 96-97

  As described above, when an integrated circuit chip and a chip electronic component are mounted on the same wiring board, the integrated circuit chip is often mounted first because of fear of contamination by solder. This is because, if the chip electronic component is first mounted by solder connection, the solder piece may be scattered in the connection part for mounting the integrated circuit chip, and the integrated circuit chip is attached to the connection part with the solder piece attached. This is because there is a risk that the integrated circuit chip may be leaked or corroded. For this reason, the connection between the wiring board and the integrated circuit chip must be able to withstand reflow heating during mounting of the chip electronic component. That is, it is necessary to improve the heat resistance of ACF and NCP in order to connect the wiring board and the integrated circuit chip with high reliability even after reflow heating.

  Furthermore, in recent years, the solder used for solder connection is shifting from the conventional lead-containing solder to lead-free solder for the purpose of suppressing environmental load. The reflow heating temperature of lead-free solder needs to be about 20 ° C higher than that of lead-containing solder, and the connection between the wiring board and the integrated circuit chip cannot withstand this temperature, resulting in poor connection. Has occurred. For this reason, in order to perform solder connection using lead-free solder, the ACF and NCP that maintain the connection between the wiring board and the integrated circuit chip are improved corresponding to lead-free solder, that is, reflow heating of lead-free solder. Improvements must be made to withstand the temperature.

  However, when the heat resistance of ACF or NCP is improved, the adhesive strength between ACF or NCP and the wiring board or integrated circuit chip is reduced. Thus, there is a trade-off between improved heat resistance and improved adhesive strength. In many cases. Therefore, even if the connection between the wiring board and the integrated circuit chip during reflow heating of lead-free solder can be maintained by improving the heat resistance of ACF or NCP, depending on the subsequent use environment, the ACF or NCP and the wiring board In some cases, the integrated circuit chip peels off the wiring substrate at the interface with the ACF or NCP and the interface between the integrated circuit chip and a connection failure occurs.

  For this reason, in addition to improving the heat resistance of ACF and NCP, it is desired to improve the adhesion between the wiring board and the integrated circuit chip. That is, by improving the heat resistance of an adhesive such as ACF or NCP, it is possible to make a reliable connection even after reflow. The problem is how to firmly bond the adhesive to the wiring board. In particular, peeling between the wiring board and the integrated circuit chip occurs very often at the interface between the adhesive and the wiring board rather than at the interface between the adhesive such as ACF and NCP and the integrated circuit chip. For this reason, strengthening the adhesive strength of both at the interface between the adhesive and the wiring board is very effective in preventing poor connection due to the peeling.

  In addition, the current mainstream wiring board (FPC) is a copper-clad base film obtained by applying a polyimide precursor solution to a roughened copper foil and imidizing it, using an etching resistant film as a mask. Many are produced by a so-called casting method in which a copper wiring pattern is formed on a base film made of polyimide by etching from the copper foil side.

  In the casting method, in order to improve the adhesion between the copper foil and the base film formed on the copper foil, the copper foil surface is provided with irregularities by a roughening treatment. Since the unevenness on the surface of the copper foil is transferred to the base film, the region where the copper foil on the surface of the base film is removed by etching is in a state where the unevenness is formed. The unevenness on the surface of the base film contributes to the adhesion at the interface between the base film and an adhesive such as ACF or NCP.

  However, recently, a film-like polyimide is used as a base film, and a metal seed film is thinly formed thereon by a method such as sputtering or vapor deposition by applying a catalyst thereon, and a film from which a wiring pattern forming portion has been removed. A wiring board (FPC) using a so-called additive method, in which a copper wiring pattern is formed on a base film made of polyimide by performing electrolytic copper plating and depositing copper on a portion not covered with the film. However, it is increasing instead of the wiring board (FPC) using the above casting method.

  In the additive method, since the surface of the base film is flat, the adhesive force between the base film and the adhesive is weaker than that of the casting method having unevenness on the surface of the base film. However, in the additive method, there is no narrowing in the wiring width direction by etching, and in order to form a high-definition pitch wiring pattern, it is advantageous that the unevenness of the copper foil / polyimide interface is small. It is thought that the ratio of increases further.

  For this reason, the adhesive force between the integrated circuit chip and the wiring substrate, that is, the adhesive force between the adhesive such as the ACF and NCP and the wiring substrate, regardless of whether or not the chip electronic component is mounted, that is, whether or not the solder connection is present. In order to prevent the connection failure due to the peeling in the flip chip mounting using the adhesive such as ACF or NCP for mounting the integrated circuit chip, it is an important issue.

  Therefore, regardless of whether or not the chip electronic component is mounted, the adhesive force between the wiring board and the adhesive such as ACF or NCP used for flip chip mounting of the integrated circuit chip is strengthened, and connection failure due to the peeling is prevented. It is highly desired.

  Further, as a problem different from the above problem, when mounting an integrated circuit chip and a chip electronic component on the same wiring board (FPC) as described above, in a reflow heating process for solder connection of the chip electronic component, In some cases, a so-called popcorn phenomenon occurs in which the chip mounting portion of the wiring board swells downward due to evaporation of moisture and solvent contained in an adhesive such as ACF and NCP, which increases the vapor pressure.

  As a method for solving the popcorn phenomenon, various studies have been made in the field of semiconductor packages in which an integrated circuit chip is die-bonded to a plastic substrate and sealed with a sealing resin (see, for example, Patent Document 2). ).

  For example, in Patent Document 2, in a plastic BGA package in which solder balls are bonded to connection terminals of a circuit board by a reflow soldering method when a semiconductor chip is mounted on a circuit board, the entire package is reflowed in a reflow soldering process. Vapor generated inside the package because it is heated in the furnace is surely discharged to the outside, and popcorn phenomenon caused by moisture in the package, debonding of the bonding surface between the sealing resin and the plastic substrate and chip bonding surface. A method for preventing lamination is described.

  FIG. 7 is a cross-sectional view schematically showing a schematic configuration of a main part in the semiconductor package described in Patent Document 2.

  As shown in FIG. 7, in the semiconductor package described in Patent Document 2, wiring patterns and connection terminals (not shown) are formed on both surfaces of an insulating plastic substrate 50 by copper foil or plating. A large number of solder balls 53 are formed as connection electrodes on the lower surface of the plastic substrate 50, and the exposed surface other than the solder balls 53 is covered with a solder resist film 55b.

  Further, one or a plurality of vent holes 56 penetrating in the vertical direction are formed in the semiconductor chip 11 mounting region of the plastic substrate 50, and wiring excluding connection terminal portions is formed on the upper surface of the plastic substrate 50. A solder resist film 55a is provided so as to cover the pattern region, and a solder resist film (solder resist film 55c) is also formed in the semiconductor chip 11 mounting region so as to cover the upper end surface of the vent hole 56. Yes. These solder resist films 55a, 55b and 55c are obtained by printing, applying or sticking a liquid or dry film-like photosensitive solder resist on both surfaces of the plastic substrate 50, and then UV-curing exposed portions using a mask. It is formed by removing unnecessary parts.

  The semiconductor chip 11 is die-bonded from above the solder resist film 55c with an adhesive 51 such as an Ag paste, and an electrode (not shown) disposed on the semiconductor chip 11 and an upper surface of the plastic substrate 50 are attached. After being electrically connected to the arranged connection terminals by a bonding wire 54 such as a gold wire, the bonding wires 54 are sealed together by transfer molding of a sealing resin 52 such as an epoxy resin.

  According to Patent Document 2, the upper end surface of the vent hole 56 is covered with the hardened solder resist film 55c that covers the mounting region of the semiconductor chip 11 on the plastic substrate 50, whereby the semiconductor chip 11 At the time of die bonding, the adhesive 51 such as Ag paste used for mounting the semiconductor chip 11 is prevented from flowing into the vent hole 56, and the air permeability of the vent hole 56 is ensured.

  However, when the configuration of Patent Document 2 is applied to the flip-chip mounting described above, the solder resist film (solder resist films 55a, 55b, 55c) has a film thickness that covers the wiring pattern. In general, the height of the bump is about 10 to 20 μm for the plating bump, and a solder resist film is formed. In this case, since it is difficult to control the coating so that the film thickness is uniform, as shown in Patent Document 2, a solder resist film is formed between the wiring board and the integrated circuit chip. Often, bumps of integrated circuit chips do not reach the connection terminals of the wiring board. In particular, when a polyimide film of about 3 to 8 μm is coated on the wiring pattern of the integrated circuit chip for the purpose of protecting the wiring of the integrated circuit chip from the cullet, etc., the bump and the connection terminal should be further connected. Becomes difficult. In particular, the lower the bump height of the integrated circuit chip is, the more advantageous for cost reduction and the miniaturization of the apparatus. In recent years, the bump height of the integrated circuit chip tends to be formed as low as possible. For this reason, it is difficult to apply the configuration of Patent Document 2 to flip chip mounting, particularly to recent flip chip mounting.

  Therefore, it is conceivable to use another resin that can easily control the film thickness instead of the solder resist, but as a result of intensive studies by the inventors of the present application, for example, another resin was used instead of the solder resist. However, it is not easy to make the film thickness uniform enough to be applicable to flip chip mounting and to flatten the surface of the integrated circuit chip mounting region because of problems in coating. It is difficult to apply this configuration to flip chip mounting.

  When flip chip mounting is performed, unlike the case of using bonding wires, when the cured resin film as described above is formed on the lower surface of the integrated circuit chip, the cured resin film abuts on the integrated circuit chip, so that the bump and the connection are connected. There is a possibility that the connection with the terminal may be hindered, or even if the connection can be made, a connection failure may be caused. As described above, in recent years, the bump height of an integrated circuit chip tends to be formed as low as possible, and the degree of unevenness due to variations in the film thickness of the curable resin film can be suppressed and applied to flip chip mounting. Further, it is not easy to flatten the surface of the integrated circuit chip mounting region.

  The present invention has been made in view of the above-described problems, and an object of the present invention is to reinforce the adhesive force between an adhesive used for mounting an integrated circuit chip and a wiring board. An object of the present invention is to provide a wiring board, an electronic circuit element, and a display device that have high adhesion to the board. A further object of the present invention is to provide a method for producing an electronic circuit element having the above-mentioned adhesive strength using the above-mentioned wiring board. A further object of the present invention is to provide a wiring board, an integrated circuit element and a method for producing the same, which are excellent in the adhesive force and can prevent the so-called popcorn phenomenon from occurring when reflow heating is required. It is to provide a display device.

  In order to solve the above problems, the wiring board of the present invention is for electrically connecting the insulating substrate, the wiring pattern formed on the insulating substrate, and the wiring pattern and the bump of the integrated circuit chip. A wiring board for mounting an integrated circuit in which the integrated circuit chip is flip-chip mounted with a connection material (A) for connecting the integrated circuit chip and the insulating substrate, A through hole penetrating the insulating substrate is provided in a region where the connecting material (A) is disposed when the integrated circuit chip is mounted, and the adhesive property of the connecting material (A) to the insulating substrate is provided in the through hole. The material (B) having higher adhesion to the connection material (A) is filled to a position substantially the same as or lower than the surface of the insulating substrate.

  In addition to the above configuration, the wiring board of the present invention is characterized in that the insulating substrate is made of polyimide.

  In addition to the above configuration, the wiring board of the present invention covers the surface of the insulating substrate opposite to the integrated circuit chip mounting surface with an adhesive (C) so as to cover the through hole. A ray is provided, and an adhesive (C) is filled as the material (B) in the through hole.

  In addition to the above configuration, the wiring board of the present invention is provided with a layer made of a solder resist so as to cover the through hole on the surface of the insulating substrate opposite to the integrated circuit chip mounting surface. In addition, the solder resist is filled as the material (B) in the through hole.

  In addition to the above structure, the wiring board of the present invention is characterized in that the material (B) is a material that transmits water vapor.

  In addition to the above configuration, the wiring board of the present invention is characterized in that the material (B) is in a state before being completely cured.

  Furthermore, in order to solve the above-described problems, the electronic circuit element of the present invention has an integrated circuit chip mounted on a wiring board with the connection material (A), and the connection material (A) and the material (B). Are bonded to each other at a position substantially the same as or lower than the surface of the insulating substrate.

  The display device of the present invention is characterized by having the above-described electronic circuit element of the present invention in order to solve the above problems.

  Furthermore, the electronic circuit element manufacturing method of the present invention includes an insulating substrate, a wiring pattern formed on the insulating substrate, and a connection for electrically connecting the wiring pattern and the bump of the integrated circuit chip. A method of manufacturing an electronic circuit element, wherein the integrated circuit chip is flip-chip mounted on a wiring board for mounting an integrated circuit having terminals with a connection material (A) for connecting the integrated circuit chip and an insulating substrate. A step of providing a through-hole penetrating the insulating substrate in a region of the insulating substrate where the connection material (A) is disposed when the integrated circuit chip is mounted; and the wiring on the insulating substrate. A step of providing a pattern and a connection terminal, and a material (B) having higher adhesion to the connection material (A) than the adhesion of the connection material (A) to the insulating substrate in the through-hole. The step of filling up to a position substantially equal to or lower than the substrate surface, the step of curing the material (B), the connection terminals and the bumps of the integrated circuit chip are aligned, and the connection material (A ), The step of mounting the integrated circuit chip on the insulating substrate, and the connection material (A) is cured, so that the integrated circuit chip and the insulating substrate are bonded by the connection material (A). And connecting the connection material (A) and the material (B) to each other.

  Furthermore, the electronic circuit element manufacturing method of the present invention includes an insulating substrate, a wiring pattern formed on the insulating substrate, and a connection for electrically connecting the wiring pattern and the bump of the integrated circuit chip. A method of manufacturing an electronic circuit element, wherein the integrated circuit chip is flip-chip mounted on a wiring board for mounting an integrated circuit having terminals with a connection material (A) for connecting the integrated circuit chip and an insulating substrate. A step of providing a through-hole penetrating the insulating substrate in a region of the insulating substrate where the connection material (A) is disposed when the integrated circuit chip is mounted; and the wiring on the insulating substrate. A step of providing a pattern and a connection terminal, and a material (B) having higher adhesion to the connection material (A) than the adhesion of the connection material (A) to the insulating substrate in the through-hole. A step of filling to a position substantially equal to or lower than the surface of the substrate, a step of curing the material (B) so that the material (B) is not completely cured, the connection terminal and the integrated circuit chip And mounting the integrated circuit chip on the insulating substrate via the connection material (A) in a state before the material (B) is completely cured, The connection material (A) and the material (B) are cured to connect the integrated circuit chip and the insulating substrate with the connection material (A), and the connection material (A) and the material (B). And a step of bonding them together.

  As described above, the wiring board of the present invention used for flip-chip mounting of an integrated circuit chip has the insulating property in the insulating substrate in the region where the connection material (A) is disposed when the integrated circuit chip is mounted. A structure having a through-hole penetrating the substrate, and adhesion of the connection material (A) to an insulating substrate, for example, adhesion of the connection material (A) to an insulating substrate made of polyimide, in the through-hole. The material (B) having a higher adhesiveness with the connection material (A) is filled to a position substantially the same as or lower than the surface of the insulating substrate, so that when the integrated circuit chip is mounted, In the region where the through hole exists, the connection material (A) and the material (B) can be firmly bonded to each other. Therefore, according to the above configuration, when the integrated circuit chip is mounted, the connection strength between the connection material (A) and the wiring board can be increased, and the integrated circuit chip can be firmly bonded to the wiring board. Can do.

  Further, according to the present invention, the material (B) is filled to a position that is substantially the same as or lower than the surface of the insulating substrate, so that the material (B) can be used when the integrated circuit chip is mounted. There is no contact with the integrated circuit chip, and the flip-chip mounting (bump connection) of the integrated circuit chip is not hindered by the material (B). Further, according to the present invention, the material (B) is filled to a position that is substantially the same as or lower than the surface of the insulating substrate, so that it is suitable for mounting an integrated circuit chip having a low bump height. Can be used for Therefore, according to the above configuration, the integrated circuit is compared with a case where a solder resist film (a layer made of a solder resist) is formed between the integrated circuit chip and the wiring board when the integrated circuit chip is mounted. The device including the integrated circuit chip can be downsized without increasing the mounting height of the chip.

  Furthermore, since the material (B) is pre-filled in the through hole before the integrated circuit chip is mounted, the wiring board of the present invention is bonded as the material (B) even if the curing speed is low. It becomes possible to use a material with high properties. Therefore, the degree of freedom in selecting the material (B) can be increased, and a material having higher adhesion to the insulating substrate can be selected as the material (B). In addition, since the wiring board of the present invention is pre-filled with the material (B) in the through hole before the integrated circuit chip is mounted, the insulating substrate is removed from the through hole when the integrated circuit chip is mounted. There is also an effect that the connection material (A) can be prevented from flowing out to the back surface.

  As described above, the present invention provides a mounting region in which an integrated circuit chip is mounted by connecting bumps of the integrated circuit chip to connection terminals formed on a part of a wiring pattern formed on an insulating substrate. It is particularly suitable for the provided wiring board and electronic circuit element.

  In addition, as described above, the wiring board according to the present invention further covers the surface of the insulating substrate opposite to the integrated circuit chip mounting surface via an adhesive (C) so as to cover the through hole. When the coverlay is attached to the back surface of the wiring board, the adhesive used for attaching the coverlay soaks into and fills the through-hole. There is no need to fill the material (B), and the manufacturing process can be simplified.

  The connection material (A) generally used for flip-chip mounting of an integrated circuit chip is an adhesive used when a coverlay is provided on the back surface of an insulating substrate used for a wiring substrate for mounting an integrated circuit chip, For example, the adhesiveness of the coverlay with adhesive is excellent, and the adhesiveness is extremely higher than the adhesiveness between the connection material (A) and the insulating substrate.

  As described above, the wiring board of the present invention is further provided with a layer (solder resist film) made of a solder resist so as to cover the through hole on the surface of the insulating substrate opposite to the integrated circuit chip mounting surface. Therefore, when the layer made of the solder resist is provided on the back surface of the wiring board, the solder resist soaks into and fills the through hole. Therefore, it is necessary to newly fill the material (B) into the through hole. There is also an effect that the manufacturing process can be simplified.

  The connection material (A) generally used for flip-chip mounting of an integrated circuit chip is used to protect a solder resist used for a wiring board for mounting an integrated circuit chip, that is, a wiring pattern on the wiring board. It has excellent adhesiveness with the solder resist, and the adhesiveness is extremely higher than the adhesiveness between the connection material (A) and the insulating substrate.

  In the wiring board of the present invention, as described above, since the material (B) is a material that allows water vapor to pass through, an integrated circuit chip is mounted on the wiring board using an adhesive, and then the chip is mounted on the wiring board. Even when the water contained in the connection material (A) is evaporated by reflow heating and the vapor pressure is increased as in the case of mounting an electronic component, the water vapor can be discharged from the through hole to the outside. Therefore, it is possible to prevent a so-called popcorn phenomenon derived from the vapor pressure, and to prevent peeling between the wiring board and the integrated circuit chip.

  As described above, the electronic circuit element of the present invention is in a state before the material (B) is completely cured. Therefore, in the contact interface (connection interface) between the material (B) and the connection material (A). The connection material (A) and the material (B) are bonded to the wiring board at the contact interface between the material (B) and the connection material (A) by, for example, chemical bonding or local mixing. The integrated circuit chip can be more firmly bonded.

  In this case, a cover lay is provided on the surface of the insulating substrate opposite to the integrated circuit chip mounting surface through the adhesive (C) as described above so as to cover the through hole. Or a layer made of a solder resist is provided, and the adhesive (C) or the solder resist is filled as the material (B) in the through hole, so that when the integrated circuit chip is mounted, that is, When the connection material (A) is cured, the connection material (A) and the material (B) provided in the through hole and on the back surface of the insulating substrate are integrally cured and molded in a comb shape. The For this reason, since the adhesive strength between the connection material (A) and the wiring board can be further increased, the integrated circuit chip is peeled off from the wiring board when the wiring board is used for mounting the integrated circuit chip. There is an effect that it can be prevented more reliably.

  As described above, in the electronic circuit element of the present invention, an integrated circuit chip is mounted on the wiring board with the connection material (A), and the connection material (A) and the material (B) Since they are bonded to each other at a position substantially the same as or lower than the surface of the insulating substrate, the adhesive force between the integrated circuit chip and the wiring substrate is high, and peeling between the integrated circuit chip and the wiring substrate can be prevented. . Therefore, it is possible to provide an electronic circuit element having no connection failure.

  As described above, since the display device of the present invention has the electronic circuit element described above, the adhesive force between the integrated circuit chip and the wiring board is high, and peeling between the integrated circuit chip and the wiring board can be prevented. . Therefore, there is an effect that the incidence of defective products of the display device can be reduced.

  Further, as described above, an integrated circuit including an insulating substrate, a wiring pattern formed on the insulating substrate, and a connection terminal for electrically connecting the wiring pattern and a bump of the integrated circuit chip. The method of manufacturing an electronic circuit element according to the present invention, wherein the integrated circuit chip is flip-chip mounted on a wiring board for circuit mounting with a connecting material (A) for connecting the integrated circuit chip and the insulating substrate. A step of providing a through-hole penetrating the insulating substrate in a region of the substrate where the connection material (A) is disposed when the integrated circuit chip is mounted; and the wiring pattern and the connection terminal on the insulating substrate. In the through hole, a material (B) whose adhesion to the connection material (A) is higher than the adhesion of the connection material (A) to the insulating substrate is substantially the same as the surface of the insulating substrate. Same Or a step of filling to a lower position, a step of curing the material (B), aligning the connection terminals and bumps of the integrated circuit chip, and via the connection material (A) The step of mounting the integrated circuit chip on the insulating substrate and the connection material (A) are cured to connect the integrated circuit chip and the insulating substrate with the connection material (A). Due to the organic coupling between the connection material (A) and the material (B), the connection material (A) and the material (in the region where the through hole is present when the integrated circuit chip is mounted) B) can be firmly bonded to each other.

  Similarly, for mounting an integrated circuit comprising an insulating substrate, a wiring pattern formed on the insulating substrate, and a connection terminal for electrically connecting the wiring pattern and a bump of the integrated circuit chip. A method of manufacturing an electronic circuit element of the present invention in which the integrated circuit chip is flip-chip mounted on a wiring board with a connecting material (A) for connecting the integrated circuit chip and the insulating substrate. A step of providing a through-hole penetrating the insulating substrate in a region where the connection material (A) is disposed when the integrated circuit chip is mounted; a step of providing the wiring pattern and the connection terminal on the insulating substrate; In the through-hole, a material (B) whose adhesion to the connection material (A) is higher than the adhesion of the connection material (A) to the insulating substrate is substantially the same as or equivalent to the surface of the insulating substrate. Aligning the step of filling to a lower position, the step of curing the material (B) so that the material (B) is not completely cured, and the bumps of the connection terminals and the integrated circuit chip. In the state before the material (B) is completely cured, the step of mounting the integrated circuit chip on the insulating substrate via the connection material (A), the connection material (A) and the material ( B) is cured to connect the integrated circuit chip and the insulating substrate with the connection material (A) and to bond the connection material (A) and the material (B) to each other. Due to the effective coupling, when the integrated circuit chip is mounted, the connection material (A) and the material (B) can be firmly bonded to each other in the region where the through hole exists.

  Therefore, according to each of the above methods, the adhesive strength between the connection material (A) and the wiring board can be increased when the integrated circuit chip is mounted (that is, when the connection material (A) is cured). The integrated circuit chip can be firmly bonded to the wiring board.

  Further, according to each of the above methods, the material (B) is filled up to a position substantially the same as or lower than the surface of the insulating substrate, so that the material (B) can be used when the integrated circuit chip is mounted. There is no contact with the integrated circuit chip, and the flip-chip mounting (bump connection) of the integrated circuit chip is not hindered by the material (B). Further, according to each of the above methods, the material (B) is filled up to a position substantially the same as or lower than the surface of the insulating substrate, so that it is possible to mount an integrated circuit chip having a low bump height. It can be preferably used. Therefore, according to each of the above methods, the integrated circuit chip is integrated as compared with the case where a solder resist film (a layer made of a solder resist) is formed between the integrated circuit chip and the wiring board when the integrated circuit chip is mounted. The mounting height of the circuit chip is not increased, and the device including the integrated circuit chip can be downsized.

  Further, according to each of the above methods, the material (B) is filled in the through holes in advance before mounting the integrated circuit chip, so that the material (B) can be bonded even if the curing speed is low. It becomes possible to use a material with high properties. Therefore, the degree of freedom in selecting the material (B) can be increased, and a material having higher adhesion to the insulating substrate can be selected as the material (B). Further, according to each of the above methods, since the material (B) is pre-filled in the through hole before the integrated circuit chip is mounted, the insulating property is isolated from the through hole when the integrated circuit chip is mounted. There is also an effect that the connection material (A) can be prevented from flowing out to the back surface of the substrate.

  Further, according to the latter method, when the integrated circuit chip is mounted, since the material (B) is in a state before being completely cured, the contact between the material (B) and the connection material (A). At the interface (connection interface), the connection material (A) and the material (B) are bonded to each other by, for example, chemical bonding or local mixing to increase the bonding strength between the connection material (A) and the wiring board. Therefore, the integrated circuit chip can be more firmly bonded to the wiring board.

[Embodiment 1]
A wiring board according to an embodiment of the present invention, an electronic circuit element using the wiring board, and a display device will be described with reference to FIGS.

  In the following embodiments, a liquid crystal display device, in particular, an active matrix liquid crystal display device using TFTs will be described as an example of the display device according to the present invention. However, the present invention is not limited to this. Is not to be done.

FIG. 3 is a plan view showing a schematic configuration of the liquid crystal display device according to the present embodiment.
As shown in FIG. 3, the liquid crystal display device 100 according to the present embodiment includes a liquid crystal panel 10 and an electronic circuit element 7 connected to an end of the liquid crystal panel 10, and the liquid crystal panel 10 and the electronic circuit element. 7 are connected to each other by a connecting material such as an anisotropic conductive film (ACF).

  The liquid crystal panel 10 includes an element substrate, a counter substrate disposed opposite to the element substrate, and a liquid crystal layer (none of which is shown) interposed between the two substrates.

  The element substrate includes a plurality of gate wirings extending in parallel to each other on an insulating substrate, a plurality of source wirings extending in parallel to each other and perpendicular to the gate wiring, and the gate wiring and the source And a switching element such as a TFT provided at each intersection with the wiring, and a pixel electrode (none of which is shown) is provided so as to correspond to each switching element.

  The counter substrate has a configuration in which a common electrode and a color filter layer (both not shown) are provided on an insulating substrate. The common electrode is provided on the insulating substrate so as to cover almost the entire display area of the display device. The liquid crystal layer is made of a nematic liquid crystal material having electro-optical characteristics.

  In the liquid crystal panel 10, one pixel is formed for each pixel electrode. In each pixel, when a gate signal is transmitted from the gate wiring and the TFT is turned on, a predetermined source signal is transmitted from the source wiring and a charge is written into the pixel electrode. As a result, the voltage applied to the liquid crystal capacitor formed between the pixel electrode and the common electrode is controlled, and the light transmittance is adjusted by changing the alignment state of the liquid crystal molecules in the liquid crystal layer. Display is performed.

  On the other hand, the electronic circuit element 7 has a configuration in which an integrated circuit chip 1 and a chip electronic component 21 are mounted on a wiring board 20 as required, as shown in FIG.

  Hereinafter, the configuration of the electronic circuit element 7 and the wiring board 20 will be described in more detail with reference to FIGS.

  FIG. 1 is a cross-sectional view showing a schematic configuration in the vicinity of an integrated circuit chip 1 mounting region in an electronic circuit element 7 according to the present embodiment. 2 shows a schematic configuration of the electronic circuit element shown in FIG. 1 when viewed from the side opposite to the mounting surface side of the integrated circuit chip 1, that is, from the back side of the wiring board. It is a bottom view of an electronic circuit element.

  As shown in FIG. 1, the electronic circuit element 7 according to the present embodiment includes a wiring board 20 and an integrated circuit chip 1, and the integrated circuit chip 1 is formed on one surface of the wiring board 20, for example, It has the structure mounted using NCP9 (connection material (A)). In the present embodiment, the integrated circuit chip 1 includes bumps 2 that are bump-shaped bonding bump electrodes, and is mounted on the wiring substrate 20 in a bare chip by a COF (Chip On Film) method. The NCP 9 is fluidized when the wiring board 20 and the integrated circuit chip 1 are heated and pressurized, so that the NCP layer 9a provided between the wiring board 20 and the integrated circuit chip 1 becomes the wiring board 20. It hardens | cures in the state which protruded to the outer side of the said integrated circuit chip 1 from the clearance gap between IC and the integrated circuit chip 1. FIG. For this reason, fillets (fins) 9 b are formed around the integrated circuit chip 1 so as to extend outside the integrated circuit chip 1.

  A chip electronic component 21 (see FIG. 3) is further provided on the wiring board 20 as necessary. The chip electronic component 21 refers to an electronic component around the liquid crystal panel 10 such as a resistor or a ceramic capacitor.

  The wiring substrate 20 according to this embodiment includes an insulating base film (insulating substrate) 4, a first wiring pattern 30, a second wiring pattern 31, a solder resist film 5a, and a cover lay 6 with an adhesive. I have.

  The base film 4 is a flexible film mainly made of polyimide. In the present embodiment, specifically, the base film 4 having a thickness of 25 μm is used. The first wiring pattern 30 is provided on the surface of the base film 4 where the integrated circuit chip 1 is mounted, that is, the surface on which the integrated circuit chip 1 is mounted (hereinafter referred to as the surface), and a control board (not shown). And the liquid crystal panel 10. The first wiring pattern is connected to the integrated circuit chip 1 in a part of the first wiring pattern 30, specifically, in a chip mounting region for mounting the integrated circuit chip 1 in the first wiring pattern. As a terminal portion for this purpose, a connection terminal 32 subjected to Au plating is formed.

  The solder resist film 5 a is preferably an insulating resin film made of an epoxy resin, and is formed so as to cover the first wiring pattern 30.

  On the other hand, the second wiring pattern 31 is provided on the surface of the base film 4 opposite to the surface on which the integrated circuit chip 1 is mounted (hereinafter referred to as the back surface), and is electrically connected to the first wiring pattern 30. The second wiring pattern 31 is formed, for example, for the purpose of preventing the first wiring pattern 30 from intersecting on the surface of the base film 4 or arranging the wiring patterns at a high density. And electrically connected.

  The cover lay 6 with adhesive has a configuration in which an insulating adhesive 6b is provided on one surface of the cover lay 6a, and the cover lay 6a connects the second wiring pattern 31 via the adhesive 6b. It is pasted to cover it. In the present embodiment, the cover lay 6 with adhesive is pasted in a range including the chip mounting area.

  Further, as shown in FIGS. 1 and 2, through holes 40 (40a and 40b) penetrating from the front surface to the back surface of the base film 4 are formed in and near the chip mounting region of the base film 4 in the wiring board 20. Is provided. In the through hole 40, the adhesive 6 b (material (B), adhesive (C)) of the coverlay 6 with an adhesive adhered to the back surface of the base film 4 oozes out into the through hole 40. It is filled by. That is, in the present embodiment, the adhesive 6b filled in the through hole 40 is an adhesive used for sticking (lamination) of the coverlay 6a, and the adhesive 6b is thermosetting. An organic adhesive made of a synthetic resin such as a resin or a photocurable resin is used.

  Thus, the adhesive 6b of the coverlay 6 with an adhesive adhered to the back surface of the base film 4 oozes out into the through hole 40 by, for example, capillary action, and thus the adhesive 6b into the through hole 40. Is filled up to a height (position) substantially equal to or lower than the surface of the base film 4. For this reason, according to the present embodiment, when the integrated circuit chip 1 is mounted, the adhesive 6b does not come into contact with the integrated circuit chip 1, and the integrated circuit chip 1 is flip-chip mounted by the adhesive 6b. There is no hindrance.

  In the present embodiment, the adhesive 6b may be filled in the through hole 40 so that the adhesive 6b does not contact the integrated circuit chip 1 when the integrated circuit chip 1 is mounted. The upper edge or upper end surface of the adhesive 6b forms substantially the same plane as the surface of the base film 4, or the upper edge or upper end surface of the adhesive 6b is at a position lower than the surface of the base film 4. What is necessary is just to be filled so that it may be located.

  Therefore, in the present embodiment, the fact that the adhesive 6b is filled to the same height as the surface of the base film 4 means that the upper end surface of the adhesive 6b filled in the through hole 40 is the base film. The adhesive filled in the through-hole 40 as shown in FIG. 1, for example, due to the surface tension of the adhesive 6b filled in the through-hole 40 as well as the case where the surface is substantially flush with the four surfaces. The upper edge of 6b has the same or almost the same height as the surface of the base film 4, and slightly protrudes from the surface of the base film 4 so that the upper end surface of the adhesive 6b does not contact the integrated circuit chip 1. In some cases, or depending on the type of the adhesive 6b, the upper edge of the adhesive 6b filled in the through hole 40 is at the same or almost the same height as the surface of the base film 4, The upper end face of 6b comprises a case or the like is recessed slightly than the base film 4 surface.

  In this embodiment, since the cover lay 6 with an adhesive is pasted on the base film 4 and then pressure and heat are applied by a press to completely fix the cover lay 6a with the adhesive 6b, the through hole The adhesive 6b of the coverlay 6 filled in 40 is already cured when the integrated circuit chip 1 is mounted. The NCP9 adheres well to the adhesive 6b of the coverlay 6 with adhesive after curing, and the adhesiveness is extremely higher than the adhesiveness between the NCP9 and the base film 4. Therefore, in the electronic circuit element 7 according to the present embodiment, the NCP 9 (NCP layer 9a and fillet 9b) used for mounting the integrated circuit chip 1 and the adhesive 6b filled in the through hole 40 are In the region where the through hole 40 is present, they are firmly bonded to each other.

  That is, in the present embodiment, the through hole 40 is a region where the NCP 9 that is an adhesive material (adhesive material (A)) used for mounting the integrated circuit chip 1 when the integrated circuit chip 1 is mounted is present. Is provided. That is, in the present embodiment, the vicinity of the chip mounting area indicates an area where the fillet 9b around the integrated circuit chip 1 exists. Hereinafter, the connection region between the wiring substrate 20 and the integrated circuit chip 1, that is, the chip mounting region and the vicinity thereof will be simply referred to as a connection region.

  In the electronic circuit element 7 according to the present embodiment, the NCP layer 9a is formed by a through hole 40a formed in a region covered with the integrated circuit chip 1 when the integrated circuit chip 1 is mounted on the base film 4. Joined to the adhesive 6b of the cover lay 6 with adhesive filled in the through hole 40a, the fillet 9b is a through hole provided in the vicinity of the chip mounting region so as to surround the periphery of the integrated circuit chip 1 The hole 40b is joined to the adhesive 6b of the cover lay 6 with adhesive filled in the through hole 40b.

  Next, a method for manufacturing the wiring board 20 will be described below with reference to FIG. 1 by taking a casting method and an additive method as examples.

  First, a method of producing the wiring substrate 20 in which the first wiring pattern 30, the second wiring pattern 31, and the through hole 40 are formed from a copper / polyimide / copper laminated substrate by a casting method will be described.

  First, after roughening the surface of the copper foil, a polyimide precursor solution is applied onto the copper foil. Thereafter, the polyimide precursor solution is imidized to produce a copper-clad base film in which a copper foil for wiring pattern formation is laminated on a copper / polyimide laminated substrate, that is, a base film 4 made of polyimide. . Next, another copper foil is laminated from the polyimide side of the copper / polyimide laminated substrate to produce a copper / polyimide / copper laminated substrate.

  Subsequently, conduction between the copper foils on both sides of the obtained copper / polyimide / copper laminated substrate, that is, conduction between the first wiring pattern 30 and the second wiring pattern 31 obtained by patterning the copper foil is obtained. Therefore, a hole (through hole) is provided so as to penetrate the laminated substrate with a drill, a punch press, a laser, or the like.

  Next, copper plating is performed on the entire copper foil on both sides of the multilayer substrate. Since copper plating is also applied to the inside of the through hole, the copper foils on both sides of the laminated substrate are electrically connected.

  In the present embodiment, for the purpose of strengthening the adhesive force between the integrated circuit chip 1 and the wiring substrate 20, in the through hole forming step, in addition to the through hole for conduction, a through hole by a drill is connected to the connection region, That is, it is formed in the chip mounting area and its vicinity. However, at this stage, the through hole for enhancing the adhesive force, that is, the through hole 40 is also plated with copper.

  Subsequently, a photosensitive film, which is an etching resistant material, is pasted on the copper foil on both sides of the laminated substrate, and only the wiring pattern formation scheduled region (hereinafter referred to as a wiring pattern forming portion) is exposed and developed. . Thereby, it is set as the state by which the etching-resistant photosensitive film was laminated | stacked only on the wiring pattern formation part. Thereafter, an etching solution is sprayed from both sides of the laminated substrate, and the copper foil other than the wiring pattern forming portion is removed by etching. At this time, the copper plating applied to the through-hole 40 for reinforcing the adhesive force is also removed at the same time.

  Thereafter, the photosensitive film on the laminated substrate is removed with a chemical such as an organic solvent to expose the wiring pattern, whereby the first wiring pattern 30 and the second wiring pattern 31 are formed on the base film 4. A substrate is obtained. Thereafter, a solder resist film 5 a is formed so as to cover a part of the first wiring pattern 30, specifically, the first wiring pattern 30 excluding the connection region in the first wiring pattern 30. At this time, a portion of the first wiring pattern 30 that is not covered with the solder resist film 5a is used as the connection terminal 32, and the surface of the connection terminal 32 is plated with gold.

  Thereafter, a cover lay 6 with an adhesive is attached to the back side of the base film 4 so as to cover the second wiring pattern 31. At this time, the uncured adhesive 6b of the cover lay 6 with adhesive penetrates and fills the through holes 40. Thereafter, in order to completely fix the coverlay 6a with the adhesive 6b, pressure and heat are applied by a press to cure the adhesive 6b. Thereby, the wiring board 20 according to the present embodiment is completed.

  Next, as another example of the manufacturing method of the wiring board 20 according to the present embodiment, a method of manufacturing the first wiring pattern 30 by the additive method and the second wiring pattern 31 by the casting method will be described.

  First, a copper / polyimide laminated substrate is prepared by applying a polyimide precursor solution to a copper foil whose surface has been roughened and imidizing it. Up to this point, it is the same as the casting method. Next, when the first wiring pattern is formed on the copper / polyimide laminated substrate in an additive manner, first, a laser is irradiated from the polyimide side to evaporate only the polyimide at the location where the through hole is formed. At this time, no through hole is formed in the copper foil. Subsequently, a catalyst is applied to the surface of the polyimide, and a seed film made of metal is formed only on the polyimide side by electroless plating or sputter deposition. Next, a photosensitive film is affixed on both surfaces of the laminated substrate. Then, the polyimide side exposes a region other than the wiring pattern forming portion, and then develops to remove the photosensitive film only in the wiring pattern forming portion. Thereby, on the polyimide side, a film made of the cured photosensitive film is formed only in a region other than the wiring pattern forming portion. On the other hand, by exposing the entire surface of the copper foil, a film made of the cured photosensitive film is formed on the entire surface. After that, when electrolytic plating is performed on the laminated substrate, copper is deposited only on the portion not covered with the film. Therefore, when the film is removed after the electrolytic plating, the first wiring pattern 30 is formed on the polyimide side. A laminated substrate of copper / polyimide / copper can be produced. However, at this stage, since the seed film is formed on the entire polyimide surface on the side (front surface) on which the first wiring pattern 30 is formed, it is necessary to remove the seed film later.

  Next, the second wiring pattern 31 is formed on the other copper foil side (back surface) by a casting method. First, a photosensitive film is formed on both surfaces of the copper / polyimide / copper laminated substrate. Thereafter, on the copper foil side (back surface), only the second wiring pattern 31 forming portion is exposed and then developed to remove the photosensitive film other than the second wiring pattern 31 forming portion on the back surface of the laminated substrate. . On the other hand, the side (front side) on which the first wiring pattern is formed exposes the entire surface thereof to form an etching resistant film made of the cured photosensitive film on the entire surface. Thereafter, when the laminated substrate is immersed in an etching solution, a portion of the copper foil that is not covered with the film, that is, a portion of the copper foil other than the portion that becomes the second wiring pattern 31 on the copper foil side is removed by etching. Thereby, the second wiring pattern 31 is formed. Further, after removing the film formed on both surfaces of the multilayer substrate, soft etching is performed to remove the seed film on the surface of the multilayer substrate. Thereby, the first wiring pattern 30 covered with the film is exposed.

  Further, similarly to the example described above, the solder resist film 5a is formed so as to cover the first wiring pattern 30 on the surface side of the base film 4, and the solder resist film 5a of the first wiring pattern 30 is covered. The connection terminals 32 are formed by applying gold plating to the unexposed portions. Then, by setting the cover lay 6 with adhesive on the back side of the base film 4 and applying pressure and heat with a press machine to cure the adhesive 6b used in the cover lay 6 with adhesive, The wiring board 20 according to the present embodiment is completed.

  According to the additive method, it is possible to reduce the thinning of the wiring pattern due to etching in the width direction, and thus it is possible to manufacture the wiring board 20 corresponding to a higher definition pattern. Therefore, in the above-described wiring substrate 20 in which the first wiring pattern 30 (surface) is manufactured by the additive method, the first wiring pattern 30 side formed by the additive method corresponds to a higher definition pattern.

  The manufacturing method of the wiring board 20 of the present invention is not limited to the above two methods, and other various manufacturing methods currently employed can be applied. In addition, the first wiring pattern 30 may be formed after the second wiring pattern 31 is formed first, the first wiring pattern 30 is formed by a casting method, and the second wiring pattern 31 (back surface) is formed by an additive method. It may be formed.

  Next, a method for mounting the integrated circuit chip 1 using the NCP 9 on the wiring board 20 according to the present embodiment, that is, a method for manufacturing the electronic circuit element 7 according to the present embodiment will be described below with reference to FIG. Explained.

  In the following description, as an example of flip chip mounting according to the present invention, as described above, the integrated circuit chip 1 is connected to the wiring substrate 20 by the bumps 2 that are protruding bonding bump electrodes using the COF method. However, the present invention is not limited to this example.

  First, paste-form NCP9 is applied on the wiring board 20 so as to cover the connection terminals 32. Subsequently, after the connection terminals 32 and the bumps 2 are aligned and mounted, the integrated circuit chip 1 is heated and pressurized with a tool (not shown).

  NCP9 is an adhesive mainly composed of an epoxy resin, and is cured by heating at 200 to 350 ° C. The bumps 2 of the integrated circuit chip 1 and the connection terminals 32 provided on the wiring substrate 20 are pressed by a force that contracts as the NCP 9 is cured. Thereby, the bump 2 and the connection terminal 32 are electrically connected.

  Further, since the viscosity of NCP9 is drastically lowered by heating, the fluidized NCP9 wets the base film 4. As a result, the NCP 9 is bonded to the cured adhesive 6b of the cover lay 6 with the adhesive, which is filled in the through holes 40 provided in the base film 4.

  The adhesive force at the interface between the NCP 9 and the wiring board 20 is the adhesive force between the NCP 9 and the base film 4 in the region where the through hole 40 is not provided. In the present embodiment, the adhesive force between the polyimide that is the material of the base film 4 In the region where the through hole 40 is provided, this is due to the adhesive force between the NCP 9 and the adhesive filled in the through hole 40. Since NCP9 exhibits higher adhesion to the adhesive of the coverlay 6 with adhesive than the base film 4, the NCP9 and the adhesive 6b of the coverlay 6 with adhesive are strong at the adhesive interface between them. It is glued to. For this reason, in the region where the through hole 40 exists, the NCP 9 and the adhesive 6b are firmly bonded to each other.

  Further, the base film 4 of the wiring board 20 shown in FIG. 1 is provided with not only the through hole 40a but also the through hole 40b. For this reason, the adhesive 6b filled in the through hole 40b and the fillet 9b of the NCP 9 are bonded to each other, so that the integrated circuit chip 1 and the wiring board 20 can be more reliably prevented from peeling off. In particular, the through hole 40b provided in the region where the fillet 9b is formed (hereinafter referred to as the fillet region) suppresses the separation of the NCP 9 and the base film 4 in the fillet region, and does not proceed to the chip mounting region. It is very effective in doing so.

  In the base film 4 of the wiring substrate 20, the adhesive force between the NCP 9 and the adhesive becomes stronger as the total area occupied by the through holes 40 is larger. However, if the ratio of the total area of the through holes 40 to the base film 4 is increased too much, the area of the base film 4, particularly the area of the base film 4 occupying the connection region, is reduced, and the strength of the base film 4 is reduced The base film 4 may be easily damaged. For this reason, the ratio of the total area of the through-holes 40 in the connection region is preferably in the range of 10% to 50%, and more preferably in the range of 20% to 40%. preferable.

  In addition, since any portion of the chip mounting area is peeled off, connection failure occurs, and therefore, a large number of small through holes 40 are uniformly formed in the chip mounting area of the wiring board 20, preferably the entire connection area. It is preferable to do. Thereby, the adhesive force between the wiring board 20 and the integrated circuit chip 1 can be uniformly increased over the entire chip mounting region, preferably over the entire connection region.

  As described above, in general, peeling between the integrated circuit chip 1 and the wiring substrate 20 is more likely to occur at the interface between the NCP 9 and the base film 4 than at the interface between the NCP 9 and the integrated circuit chip 1. Too many. Therefore, as described above, by strengthening the adhesive force at the interface between the NCP 9 and the wiring board 20 with the adhesive 6b filled in the through holes 40a formed in the chip mounting region of the wiring board 20, the wiring board 20 Connection failure due to peeling of the integrated circuit chip 1 can be prevented. Moreover, the adhesive force between the wiring board 20 and the fillet 9b is reinforced by the adhesive 6b filled in the through hole 40b formed in the region where the fillet 9b is formed like the wiring board 20 shown in FIG. Further, peeling of the interface between the NCP 9 and the wiring board 20 can be prevented more reliably.

  Next, a method of mounting the chip electronic component 21 on the wiring board 20 will be described below with reference to FIG. In the following description, the case where the chip electronic component 21 is mounted on the wiring board 20 by solder connection will be described as an example, but the present invention is not limited to this.

  As described above, the chip electronic component 21 is preferably mounted after the integrated circuit chip 1 is mounted on the wiring board 20.

  First, cream solder is applied to a connection terminal (not shown) for mounting the chip electronic component 21 provided on the wiring board 20 by a printing method or a dispenser method. Cream solder is a cream-like mixture composed of solder powder, solvent and flux.

  Next, after positioning the wiring board 20 and the chip electronic component 21 and mounting the electronic component 21 on the wiring board 20, the wiring board on which the chip electronic component 21 is mounted in a reflow furnace at about 230 ° C. to 260 ° C. Add 20 and heat. Thereby, cream solder is melted (reflow heating process). Thereafter, the chip solder 21 and the wiring board 20 are electrically connected by curing the cream solder. In this way, the electronic circuit element 7 according to the present embodiment can be manufactured.

  The electronic circuit element 7 thus obtained is further connected to the liquid crystal panel 10 by, for example, ACF, whereby the liquid crystal display device 100 according to the present embodiment shown in FIG. 3 is manufactured.

  As described above, ACF is, for example, conductive particles (metal film-coated plastic fine particles) obtained by plating plastic beads with Ni, Au or the like dispersed in an adhesive such as a film-like epoxy resin. After the circuit element 7 and the liquid crystal panel 10 are aligned, for example, the connecting portion between the electronic circuit element 7 and the liquid crystal panel 10 is heated at a predetermined temperature, specifically, for example, 180 to 210 ° C. with a tool (not shown). When the pressure is applied, the conductive particles contained in the ACF are pressed by the connecting portion between them, and the electronic circuit element 7 and the liquid crystal panel 10 are electrically connected and at the same time used for the ACF. The adhesive is thermally cured and fixed in a state where both are connected.

  As described above, the electronic circuit element 7 according to this embodiment includes the NCP 9 (that is, the NCP 9 used for mounting the integrated circuit chip 1 when the integrated circuit chip 1 is mounted). A through hole 40 penetrating the base film 4 is provided in a region where the adhesive used for mounting the integrated circuit chip 1 is present, and the cover lay 6 with adhesive is formed in the through hole 40. The adhesive 6b is filled up to a position substantially the same as or lower than the surface of the insulating substrate, so that when the integrated circuit chip 1 is mounted on the base film 4, that is, the wiring substrate 20, the adhesion is performed. The adhesive 6b does not come into contact with the integrated circuit chip 1, and the adhesive 6b filled in the through hole 40 and the NC used for mounting the integrated circuit chip 1 are used. 9 and are firmly joined together.

  Therefore, according to the present embodiment, the adhesive force between the integrated circuit chip 1 and the wiring board 20 is high, the peeling between the integrated circuit chip 1 and the wiring board 20 can be prevented, and an electronic circuit element having no poor connection is obtained. 7 and a display device (for example, the liquid crystal display device 100) can be provided. Moreover, according to this Embodiment, the wiring board 20 which can provide the said electronic circuit element 7 can be provided.

  Although the film thickness immediately after the application of NCP9 is about 1 mm to 2 mm, the viscosity of NCP9 decreases due to the temperature rise at the time of pressure bonding. Therefore, after the integrated circuit chip 1 is mounted, NCP9 does not disturb the bump connection. The chip 1 and the base film 4 are filled without a gap. Thereby, the bump 2 of the integrated circuit chip 1 and the connection terminal 32 of the wiring board 20 are electrically connected.

  Further, according to the present embodiment, since the adhesive 6a is filled in the through hole 40, the NCP 9 flows out from the through hole 40 to the opposite side of the integrated circuit chip mounting surface, and the wiring board It is not attracted to the stage holding 20.

  In the present embodiment, the adhesive 6b of the coverlay 6 with the adhesive is particularly a material having an insulating property and having a higher adhesion to the NCP9 than the adhesion of the NCP9 to the base film 4. Although not limited thereto, in order to further improve the adhesion with the NCP9, the NCP9, that is, an adhesive material (adhesive) used for mounting the integrated circuit chip 1 reacts with each other to react with the NCP9. It is more preferable that the material be bonded together. Specifically, for example, a material such as an epoxy resin can be used as the adhesive filled in the through hole 40, that is, the adhesive 6b used for the cover lay 6 with adhesive.

  In the present embodiment, the cover lay 6 with an adhesive is provided so as to cover the second wiring pattern 31 and the region where the through hole 40 is provided. You may provide so that the whole back surface of the film 4 may be covered.

  In the present embodiment, the adhesive 6b is pre-cured when the integrated circuit chip 1 is mounted. However, the adhesive 6b is completely cured when the integrated circuit chip 1 is mounted. You may have no state. That is, according to the present embodiment, the coverlay 6 is adhered to the back surface of the base film 4 with the adhesive 6b and the adhesive 6b is filled in the through-hole 40, and then heated or pressurized or irradiated with light. Thus, the adhesive 6b may be cured so as not to be completely cured.

  In this case, before the contact interface between the adhesive 6b and the NCP 9 is completely cured, the bumps 2 of the integrated circuit chip 1 and the connection terminals 32 provided on the base film 4 are aligned and the NCP 9 is aligned. The integrated circuit chip 1 is mounted on the base film 4 via, and then the NCP 9 and the adhesive 6b are completely cured by heating and pressurizing or irradiating light again, and the integrated circuit chip 1 and The base film 4 may be connected by the NCP9, and the NCP9 and the adhesive 6b may be bonded to each other.

  Thus, by mounting the integrated circuit chip 1 in a state where the contact interface (connection interface) with the NCP 9 in the adhesive 6b is in an uncured or semi-cured state, particularly in an uncured state, the NCP 9 and the adhesive 6b In the contact interface (connection interface), that is, the contact interface (connection interface) between the connection material (A) and the material (B), the connection material (A) and the material (B) are, for example, a chemical bond or The integrated circuit chip can be more firmly bonded to the wiring board at the contact interface, for example, by locally mixing.

  Further, when the contact area between the adhesive 6b of the cover lay 6 with adhesive and the NCP 9 is small in the through hole 40 of the wiring board 20 and there is a possibility that sufficient adhesive force cannot be obtained, for example, an adhesive After the cover lay 6 is installed on the wiring board 20, a material (material (B)) in which the adhesiveness of the NCP 9 is higher than that of the base film 4 in the through-hole 40 from the integrated circuit chip 1 mounting surface side. For example, by adding an adhesive such as the adhesive 6b, as described above, the uncured adhesive 6b and the NCP 9 can be bonded to each other and cured. At this time, the kind of the adhesive (material (B)) to be added is not particularly limited, and an adhesive other than the adhesive 6b may be used. When an adhesive other than the adhesive 6b is used, it is preferable to use an adhesive that exhibits high adhesiveness with both the adhesive 6b and the NCP9. In this case, as the adhesive other than the adhesive 6b, the NCP9, that is, the same adhesive as the adhesive (adhesive material (A)) used for mounting the integrated circuit chip 1, or the adhesive 6b And an adhesive that reacts with NCP9, respectively.

  In the present embodiment, the adhesive 6b of the cover lay 6 with adhesive attached to the back surface of the base film 4 is soaked into the through hole 40, but the present invention is limited to this. Not the same adhesive as the adhesive 6b of the coverlay 6 with adhesive, or an adhesive that firmly adheres to both the adhesive 6b and NCP9 of the coverlay 6 with adhesive as described above, specifically Is an adhesive having higher adhesiveness than the adhesive between the NCP 9 and the base film 4 with respect to both the adhesive 6b and the NCP 9 of the cover lay 6 with the adhesive, for example, utilizing capillary action. Then, after filling the through hole 40 in advance, the coverlay 6 with adhesive may be attached or the integrated circuit chip 1 may be mounted. That is, in the present invention, the material (B) (adhesive) filled in the through hole 40 is different from the adhesive (NCP9 in the present embodiment) used for mounting the integrated circuit chip 1. It is not necessary to be an agent, and the same adhesive may be used. In this case, the cover lay 6 with adhesive is provided so as to cover only the second wiring pattern 31, and the integrated circuit chip 1 is mounted on the back surface of the wiring substrate 20 so as to cover the through hole 40. It is good also as a structure which arrange | positions the adhesive agent same as the adhesive agent used for this, and covers it with sealing materials, for example, protective films, such as a coverlay (cover film), as needed. As described above, the integrated circuit chip 1 is fixed by the adhesive layer provided in a comb-teeth shape through the through hole 40 penetrating the base film 4, and in particular, for mounting the integrated circuit chip 1. The adhesive force at the interface between the adhesive used and the wiring substrate 20 (base film 4) can be increased, and the integrated circuit chip 1 can be prevented from being peeled off from the wiring substrate 20.

  Moreover, as said NCP9, it is preferable to use the material which shows high adhesiveness with respect to both the base film 4 of the wiring board 20, and the adhesive agent 6b of the coverlay 6 with an adhesive agent. As NCP9, for example, an adhesive mainly composed of an epoxy resin can be used, but is not limited thereto.

  Usually, an adhesive (connecting material (A)) used for mounting the integrated circuit chip 1 such as the NCP9 needs to be quickly dried. Such an adhesive is generally used by mixing a plurality of types of adhesives, and is usually used as the above-mentioned adhesive so as to be cured in about several seconds, specifically, for example, about 3 seconds. In all materials to be mixed (adhesive), materials having quick drying properties are used. However, it is generally known that such a material (adhesive) having quick drying properties is inferior in adhesion to the base film 4 as described above.

  However, according to the present embodiment, prior to the mounting of the integrated circuit chip 1, the adhesive (material (B)) such as the adhesive 6b is filled in the through hole 40 in advance. As the adhesive (material (B)) filled in the through hole 40, an adhesive different from the adhesive (connecting material (A)) used for mounting the integrated circuit chip 1, such as the NCP9, is used. And increase the degree of freedom of selection. Therefore, for example, as the material (B), an adhesive made of a material having high adhesiveness to the base film 4 or NCP9 or a material used for the connection material (A) (even if the curing rate is low) Even if a part of the adhesive) has a low curing rate as described above, an adhesive or the like that is changed to a material having higher adhesiveness (adhesive strength) can be used.

  Note that, according to the present embodiment, the material (B) is completely cured prior to the mounting of the integrated circuit chip 1 or previously cured to such an extent that it is not completely cured. As described above, even when a material having a curing rate slower than the curing rate of NCP9 is used, after the integrated circuit chip 1 is mounted, that is, at the end of curing of the NCP9, the material (B) is completely cured. can do.

  However, the curing end time of the material (B) and the curing end time of NCP9 do not necessarily coincide with each other. For example, the material (B) is cured in advance so that the material (B) is completely cured within the normal curing time of the NCP9. Even if not, when the NCP9 is cured, the material (B) may be completely cured by applying heat and pressure for a time longer than the curing time of the NCP9, or by performing light irradiation. Absent.

  That is, in this Embodiment, the hardening state of the material (B) in the said through-hole 40 is not specifically limited. That is, the material (B) in the through hole 40 does not necessarily need to be cured, and may be in an uncured state. For example, when the cover lay 6 with an adhesive is provided on the back side of the base film 4, the cover lay 6 a is not easily peeled off from the base film 4 by performing light irradiation from the back side of the base film 4. By curing the adhesive 6b between the base film 4 and the cover lay 6a, the material (B) filled in the through-hole 40 is uncured or most of the material is uncured. The circuit chip 1 may be mounted.

  However, when a photo-curing resin (adhesive) is used for the NCP9, that is, the adhesive (connection material (A)) used for mounting the integrated circuit chip 1 in terms of curing conditions, the material (B ) Also preferably uses a photo-curable resin (adhesive), and when a thermosetting resin (adhesive) is used for the NCP9, the material (B) also has a thermosetting resin (adhesive). It is desirable to use an agent.

  In general, a long-curing adhesive that cures over time (specifically, curing over several hours, for example, 1 to 2 hours) is longer than an adhesive having quick drying properties. Wide range of selection and strong adhesive strength. For this reason, even if it fills in the through-hole 40 similarly, the adhesive strength of an adhesive agent and the base film 4 becomes stronger than the quick-drying adhesive agent of the long-curing type adhesive agent. Further, when an adhesive other than NCP9 is used as the adhesive, the same can be said for NCP9 as well as the base film 4.

  Here, the adhesiveness of the adhesive (material (B)), that is, the adhesive strength of the adhesive to the base film 4 and NCP9 is desirably an absolute value larger than 400 N / m. When the connection strength is 400 N / m or less, there is a high possibility that the integrated circuit chip 1 is peeled from the wiring board 20 depending on the use environment. For this reason, as said adhesive agent (material (B)), it is desirable to select the said connection strength so that it may become larger than 400 N / m.

  When polyimide is used as the base film 4 as described above, for example, the adhesive strength between the base film 4 made of polyimide and the adhesive (material (B)) is generally 1000 N / m. Therefore, the adhesive strength between the adhesive (material (B)) and NCP9 is preferably 1000 N / m or more, more preferably 1500 N / m or more.

  Therefore, when the polyimide is used as the base film 4 as the adhesive (material (B)), the adhesion between the base film 4 made of the polyimide and the NCP 9 is more adhesive than the NCP 9. Although it will not specifically limit if it is a material with higher (adhesive strength), It is more desirable to select so that the adhesive strength mentioned above may be satisfied.

  In the present embodiment, a flexible substrate made of polyimide is used as the base film 4, but the present invention is not limited to this. When a flexible substrate is used as the base film 4, a material other than polyimide, such as a liquid crystal polymer, may be used as long as it is an insulating material having high insulation, dimensional stability, heat resistance, and low dielectric constant. I do not care. As the material of the base film 4, polyimide is preferably used as a material that satisfies the above performance.

  Further, as the base film 4, it is possible to use not only a flexible flexible substrate as described above, but also a rigid substrate that is a hard laminate plate made of a base material and a resin and cannot be bent. . Specifically, as such a rigid substrate, for example, a paper base phenolic resin laminate, a glass cloth base epoxy resin laminate, a glass cloth / paper composite base epoxy resin laminate, a glass cloth / glass nonwoven composite A base material epoxy resin laminated board etc. are mentioned.

  Further, the thickness of the base film 4 is not particularly limited, and base films having various thicknesses can be used. Even if the through hole 40 is provided, the NCP 9 and the base film 4 in the through hole 40 are provided. A base film 4 having a thickness of 100 μm or less, for example, a base film 4 having a thickness of 25 μm to 100 μm as used in the present embodiment, in which an anchoring effect due to an increase in the bonding area with the surface is not expected. By applying the present invention to a wiring board, the effects of the present invention can be particularly exhibited. Needless to say, the effect can be obtained by applying the present invention even when the base film 4 thicker than 100 μm is used.

  In the present embodiment, the case where the integrated circuit chip 1 is mounted on the wiring board 20 using the NCP 9 has been described. However, the present invention is not limited to this, and other connection methods include connection by ACF. It is also possible to use a method or a connection method in which an underfill is filled between the integrated circuit chip 1 and the wiring substrate 20 after Au—Sn eutectic bonding.

  As described above, the present invention provides a mounting region in which an integrated circuit chip is mounted by connecting bumps of the integrated circuit chip to connection terminals formed on a part of a wiring pattern formed on an insulating substrate. It is particularly suitable for the provided wiring board and electronic circuit element.

  Furthermore, although the case where the chip electronic component 21 is mounted on the wiring board 20 by solder connection has been described in the present embodiment, the chip electronic component 21 may be mounted on the wiring board 20 by other conventionally known connection methods. Absent.

  Furthermore, in the present embodiment, the case where the liquid crystal panel 10 and the electronic circuit element 7 are connected using the ACF has been described. However, in addition, a connection method using NCP or solder connection may be used. It is not particularly limited.

  In this embodiment mode, an active matrix liquid crystal display device using TFT as a switching element is described as an example of the display device according to the present invention. However, the display device includes three terminals such as a TFT. In addition to an active matrix liquid crystal display device using elements, an active matrix liquid crystal display device using a two-terminal element such as MIM (Metal Insulator Metal) as a switching element may be used. The display device of the present invention can be applied not only to an active drive type display device but also to a passive (multiplex) drive type display device. Furthermore, the display device of the present invention can be applied to any type of transmissive type, reflective type, and transmissive / reflective type display device, as well as organic electroluminescence (EL) display devices, inorganic EL display devices, and plasma display panels. It can also be applied to various display devices such as (PDP), vacuum fluorescent display (VFD) devices, and electronic paper.

  The wiring board and electronic circuit element of the present invention can be suitably used not only for display devices but also for various electronic devices such as mobile phones, PDAs (Personal Digital Assistants), OA devices and the like.

[Embodiment 2]
The following will describe another embodiment of the present invention with reference to FIG. In the present embodiment, differences from the first embodiment will be mainly described. For convenience of explanation, components having the same functions as those of the components in the wiring board 20 described in the first embodiment are denoted by the same reference numerals, and description thereof is omitted.

  FIG. 4 is a cross-sectional view showing a schematic configuration in the vicinity of the integrated circuit chip 1 mounting region in the electronic circuit element 7 according to the present embodiment.

  As shown in FIG. 4, the wiring board 20 in the electronic circuit element 7 according to the present exemplary embodiment has a surface opposite to the mounting surface of the integrated circuit chip 1 in the wiring board 20 shown in FIG. Instead of the cover lay 6 with adhesive, a solder resist film 5b (layer made of solder resist) made of solder resist is provided, and the solder resist is filled in the through holes 40 provided in the connection region of the base film 4 Except for this, it has the same configuration as the wiring board 20 shown in FIG. In the present embodiment, the solder resist film 5b is provided so as to cover the second wiring pattern 31 and the connection region including the chip mounting region. The solder resist film 5b was formed by applying a solder resist to a predetermined region of the wiring board 20 using a mask, drying, and heating to 120 to 150 degrees in an oven. Further, the constituent elements other than those described above are formed with the same objects and materials as in the first embodiment.

  The solder resist (solder resist film 5 b) filled in the through hole 40 and the NCP 9 (NCP layer 9 a and fillet 9 b) used for mounting the integrated circuit chip 1 are strong in the region where the through hole 40 exists. It is joined to.

  Also in the present embodiment, the electronic circuit element 7 is heated in advance prior to the mounting of the integrated circuit chip 1 so that the solder resist filled in the through hole 40 is cured in advance. An integrated circuit chip 1 is mounted. The NCP9 adheres well to the cured solder resist, and its adhesiveness is extremely higher than the adhesiveness between the NCP9 and the base film 4. Therefore, also in the present embodiment, the NCP 9 (NCP layer 9a and fillet 9b) used for mounting the integrated circuit chip 1 and the solder resist (solder resist film 5b) filled in the through hole 40 are as follows. In the region where the through hole 40 is present, they are firmly bonded to each other.

  The method for forming the solder resist film 5b is not limited to the example described above, and the solder resist is applied by irradiating light through a mask after applying the solder resist on the entire surface of the wiring substrate 20. After reacting the solder resist in either the region to be or the region not forming the solder resist, after removing the unnecessary portion of the solder resist by etching and drying it, it is heated to 120 to 150 degrees in an oven or the like You may use the method of hardening by.

  The type of solder resist that can be used for the solder resist films 5a and 5b is not particularly limited, and examples thereof include epoxy-based, urethane-based, and imide-based resins. The solder resist can be mainly divided into a photosensitive type and a thermosetting type. Of these, the photosensitive type is often made of an epoxy resin, and the thermosetting type is an epoxy type, urethane type, imide type resin, or the like.

  For the solder resist film 5b, the same material as the solder resist film 5a covering the first wiring pattern 30 may be used, or a different material may be used. It is preferable to use a resin.

  In the electronic circuit element 7, when the solder resist film 5 b is formed on the back surface of the wiring substrate 20, the solder resist film 5 b is preferably made of a material that allows water vapor to pass therethrough. Examples of the material that allows water vapor to permeate include epoxy resins. Since the epoxy resin has a high water vapor transmission rate, water vapor generated from the water contained in the NCP layer 9a can be discharged to the outside through the through hole 40a. For this reason, even if the moisture contained in the NCP layer 9a evaporates in the reflow heating process for solder connection of the chip electronic component 21 and the vapor pressure increases, the water vapor can be discharged from the through hole 40. Therefore, it is possible to prevent the integrated circuit chip 1 from being separated from the wiring substrate 20 by the vapor pressure of water vapor generated from the moisture contained in the NCP layer 9a.

  In this embodiment, the solder resist film 5b is provided so as to cover the second wiring pattern 31 and the region where the through hole 40 is provided (that is, the connection region). May be provided so as to cover the entire back surface of the base film 4 as in the first embodiment. In other words, at least the second wiring pattern 31 and the connection region may be covered.

  Also in this embodiment, the solder resist in the through hole 40 is preliminarily cured when the integrated circuit chip 1 is mounted. However, the solder resist is not completely formed when the integrated circuit chip 1 is mounted. You may have the state which has not hardened. That is, according to the present embodiment, a solder resist is applied (laminated) to the back surface of the base film 4 and the solder resist is filled in the through holes 40, and then the solder resist is applied by heating or light irradiation. Alternatively, the solder resist film 5b may be formed by being cured so as not to be completely cured.

  In this case, before the contact interface with the NCP 9 in the solder resist is completely cured, the bumps 2 of the integrated circuit chip 1 and the connection terminals 32 provided on the base film 4 are aligned and the NCP 9 is aligned. Then, the integrated circuit chip 1 is mounted on the base film 4, and then the NCP 9 and the solder resist are completely cured by heating and pressurizing or irradiating light again, so that the integrated circuit chip 1 and the base film are cured. 4 may be connected by the NCP9, and the NCP9 and the solder resist may be bonded to each other. Thus, by mounting the integrated circuit chip 1 in a state where the contact interface (connection interface) with the NCP 9 in the solder resist is in an uncured or semi-cured state, particularly in an uncured state, the NCP 9 and the solder resist are, for example, It becomes possible to perform stronger bonding by chemical bonding or local mixing.

  Also in the present embodiment, when the contact area between the solder resist film 5b and the NCP 9 is small in the through hole 40 of the wiring substrate 20 and there is a possibility that sufficient adhesive force cannot be obtained, As in the first embodiment, for example, after the solder resist film 5b is placed on the wiring board 20, a material that adheres firmly to the solder resist film 5b and the NCP 9 is added into the through hole 40 from the surface on which the integrated circuit chip 1 is mounted. It is also possible.

  Furthermore, in the present embodiment, the solder resist is soaked into the through hole 40 from the uncured solder resist on the back surface of the base film 4, but the present invention is not limited to this, Also in the embodiment, as in the first embodiment, the same kind of solder resist as the solder resist or a material that adheres firmly to both the solder resist and the NCP 9 is previously penetrated by using, for example, a capillary phenomenon. After filling the holes 40, the solder resist film 5b may be stacked and the integrated circuit chip 1 may be mounted.

  The present invention is not limited to the above-described embodiments, and various modifications are possible within the scope shown in the claims, and can be obtained by appropriately combining technical means disclosed in different embodiments. Embodiments are also included in the technical scope of the present invention.

  The results of comparing the difference between the adhesive force between the wiring board and the integrated circuit chip in the electronic circuit element according to the present invention and the adhesive force between the wiring board and the integrated circuit chip in the conventional electronic circuit element are shown below.

  The electronic circuit element having the structure shown in FIG. 1 is used as a test sample of the electronic circuit element according to the present invention, and the connection region as shown in FIG. That is, an electronic circuit element composed of an integrated circuit chip and a wiring board in which no through hole is provided in the chip mounting region and its vicinity was used.

  For both test samples, only for the test sample of the electronic circuit element according to the present invention, a through hole having a diameter of 0.5 mm is formed in the connection region of the base film, and the ratio of the total area of the through hole in the connection region is 40%. It was prepared under the same conditions except that the adhesive was soaked in the through-hole and the adhesive of the coverlay with adhesive was soaked. Further, NCP was used for connection between the integrated circuit chip and the wiring board. That is, in the conventional test sample of the electronic circuit element, the adhesive force between the wiring board and the integrated circuit chip is entirely caused by the adhesive force between the NCP and the base film.

  Regarding the above two test samples, (1) immediately after mounting the integrated circuit chip, (2) after the reflow heating process, and (3) after placing in a high temperature and high humidity bath of 80 ° C.-95% RH for 120 hours, The adhesive strength with the chip was measured.

  As a result, the test sample of the electronic circuit element of the present invention was (1) 36% immediately after mounting the integrated circuit chip, (2) 86% after the reflow heating process, 3) It was confirmed that the adhesive strength was improved by 130% after the 80 ° C.-95% RH high temperature and high humidity layer was charged.

  Therefore, it can be seen that in the electronic circuit element according to the present invention, the integrated circuit chip and the wiring board are bonded more firmly than in the past. Therefore, according to the present invention, it is possible to suppress / prevent a connection failure due to peeling between the integrated circuit chip and the wiring substrate, which can contribute to a reduction in the failure rate.

  The wiring board of the present invention is a wiring board for electronic circuit elements using an integrated circuit chip, and an adhesive material (A) for mounting the integrated circuit chip is mounted on the insulating substrate when the integrated circuit chip is mounted. In the through-hole provided in the area | region distribute | arranged, the material (B) whose adhesiveness with the said connection material (A) is higher than the adhesiveness of the said connection material (A) with respect to an insulating substrate is the said insulating substrate. By filling up to a position substantially the same as or lower than the surface, it is possible to reinforce the adhesive force between the adhesive material (A) and the insulating substrate at the time of mounting the integrated circuit chip. . Therefore, the wiring substrate and the electronic circuit element using the wiring substrate are suitable for various display devices such as an active matrix liquid crystal display device and a passive (multiplex) drive display device. The wiring board and electronic circuit element can be widely used not only for display devices but also for various electronic devices such as mobile phones, PDAs, and OA devices.

It is sectional drawing which shows schematic structure of the integrated circuit chip mounting area vicinity in the electronic circuit element concerning one Embodiment of this invention. FIG. 2 is a bottom view of the electronic circuit element shown in FIG. 1 with a partial cutaway showing a schematic configuration on the side opposite to the integrated circuit chip mounting side. It is a top view which shows schematic structure of the liquid crystal display device concerning one Embodiment of this invention. It is sectional drawing which shows schematic structure of the integrated circuit chip mounting area vicinity in the electronic circuit element concerning other embodiment of this invention. It is sectional drawing which shows schematic structure of the integrated circuit chip mounting area vicinity in a general electronic circuit element. It is sectional drawing which shows schematic structure of the integrated circuit chip mounting area vicinity in another general electronic circuit element. It is sectional drawing which shows schematic structure of the integrated circuit chip mounting area vicinity in the conventional plastic BAG package.

Explanation of symbols

1 Integrated circuit chip 2 Bump 4 Base film (insulating substrate)
5 Solder resist 5a Solder resist 5b Solder resist (material (B))
6 Coverlay with adhesive 6a Coverlay 6b Adhesive (material (B), adhesive (C))
7 Electronic circuit elements 9 NCP (Connection material (A))
9a NCP layer (connection material (A))
9b Fillet (Connection material (A))
10 Liquid crystal panel 20 Wiring board (FPC)
21 chip electronic component 30 first wiring pattern (wiring pattern)
31 Second wiring pattern (wiring pattern)
32 Connection terminal 40 Through hole 40a Through hole 40b Through hole 100 Liquid crystal display device (display device)

Claims (10)

An insulating substrate, a wiring pattern formed on the insulating substrate, and a connection terminal for electrically connecting the wiring pattern and a bump of the integrated circuit chip, the integrated circuit chip and the insulating substrate, A wiring board for mounting an integrated circuit on which the integrated circuit chip is flip-chip mounted by a connection material (A) for connecting
In the insulating substrate, a through-hole penetrating the insulating substrate is provided in a region where the connecting material (A) is disposed when the integrated circuit chip is mounted, and the connecting material for the insulating substrate is provided in the through-hole. The material (B) having higher adhesion to the connection material (A) than the adhesion of (A) is filled up to a position substantially the same as or lower than the surface of the insulating substrate. Wiring board.   The wiring board according to claim 1, wherein the insulating substrate is made of polyimide.   A cover lay is provided on the surface of the insulating substrate opposite to the integrated circuit chip mounting surface via an adhesive (C) so as to cover the through hole, and the material is formed in the through hole. The wiring board according to claim 1, wherein (B) is filled with an adhesive (C).   On the surface of the insulating substrate opposite to the integrated circuit chip mounting surface, a layer made of a solder resist is provided so as to cover the through hole, and in the through hole, as the material (B), The wiring board according to claim 1, wherein the solder resist is filled.   The wiring board according to claim 1, wherein the material (B) is a material that allows water vapor to pass therethrough.   The wiring board according to claim 1, wherein the material (B) is in a state before being completely cured.   An integrated circuit chip is mounted on the wiring board according to any one of claims 1 to 6 by the connection material (A), and the connection material (A) and the material (B) are insulated from each other. An electronic circuit element characterized by being bonded to each other at a position substantially the same as or lower than the surface of the conductive substrate.   A display device comprising the electronic circuit element according to claim 7. On a wiring board for mounting an integrated circuit, comprising: an insulating substrate; a wiring pattern formed on the insulating substrate; and a connection terminal for electrically connecting the wiring pattern and a bump of the integrated circuit chip And a method of manufacturing an electronic circuit element in which the integrated circuit chip is flip-chip mounted with a connection material (A) for connecting the integrated circuit chip and an insulating substrate,
Providing a through-hole penetrating the insulating substrate in a region of the insulating substrate where the connection material (A) is disposed when the integrated circuit chip is mounted;
Providing the wiring pattern and connection terminals on the insulating substrate;
In the through-hole, the material (B) whose adhesiveness to the connecting material (A) is higher than the adhesiveness of the connecting material (A) to the insulating substrate is substantially the same as or more than that of the insulating substrate surface. Filling to a lower position,
Curing the material (B);
Aligning the connection terminals and bumps of the integrated circuit chip, and mounting the integrated circuit chip on the insulating substrate via the connection material (A);
By curing the connection material (A), the integrated circuit chip and the insulating substrate are connected by the connection material (A), and the connection material (A) and the material (B) are bonded to each other. A process for producing an electronic circuit element. On a wiring board for mounting an integrated circuit, comprising: an insulating substrate; a wiring pattern formed on the insulating substrate; and a connection terminal for electrically connecting the wiring pattern and a bump of the integrated circuit chip And a method of manufacturing an electronic circuit element in which the integrated circuit chip is flip-chip mounted with a connection material (A) for connecting the integrated circuit chip and an insulating substrate,
Providing a through-hole penetrating the insulating substrate in a region of the insulating substrate where the connection material (A) is disposed when the integrated circuit chip is mounted;
Providing the wiring pattern and connection terminals on the insulating substrate;
In the through-hole, the material (B) whose adhesiveness to the connecting material (A) is higher than the adhesiveness of the connecting material (A) to the insulating substrate is substantially the same as or more than that of the insulating substrate surface. Filling to a lower position,
Curing the material (B) so that the material (B) is not completely cured;
The integrated circuit is positioned on the insulating substrate via the connection material (A) in a state before the connection terminal and the bump of the integrated circuit chip are aligned and before the material (B) is completely cured. The process of mounting the chip,
The connection material (A) and the material (B) are cured to connect the integrated circuit chip and the insulating substrate with the connection material (A), and the connection material (A) and the material (B). And a step of adhering each other to the electronic circuit element.

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