JP2005164480A - Probe card and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a probe card capable of performing highly accurately an electrical test of a circuit pattern even when a wafer is large, and reducing cost, and its manufacturing method. <P>SOLUTION: This probe card 1 for testing electrically the circuit pattern 12 on the wafer 11 has a ceramic substrate 14 having a circuit pattern 13 for the test, and a metal bump 15 formed on the surface of the ceramic substrate 14, connected to the circuit pattern 13 on the ceramic substrate 14, and having conductivity enabling contact with the the circuit pattern 12 on the wafer 11. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a probe card for electrically testing a circuit pattern on a wafer and a manufacturing method thereof.

  A probe card is used to electrically test a circuit pattern on a wafer. This probe card is provided with a test circuit pattern on a substrate. In addition, a large number of terminals that can contact the circuit pattern on the wafer are connected to the circuit pattern. This terminal is provided on the substrate.

  Conventionally, resin substrates have been used as probe card substrates. Further, needle-like terminals are used for the probe card. The needle-like terminal is provided so as to protrude obliquely from the substrate. By causing the needle-like terminals to project obliquely with respect to the substrate in this way, the needle-like terminals can be elastically deformed when they come into contact with the wafer.

  Since the resin substrate has a large thermal expansion coefficient, the amount of thermal deformation during the test increases. Thus, when the amount of thermal deformation of the substrate is large, an error in the interval between the wafer and the probe card becomes large, but the error can be absorbed by using an elastically deformable needle-like terminal.

However, when needle-like terminals are used for the probe card, a large number of needle-like terminals must be attached to the substrate one by one, which is cumbersome and increases the number of work steps. Therefore, probe cards using metal bumps as terminals instead of needle-like terminals have been proposed (see, for example, Patent Documents 1 and 2).
JP 2000-174078 A JP 2000-12726 A

  However, since a conventional probe card using metal bumps as a terminal uses a resin substrate having a large amount of thermal deformation, there is a problem that the distance between the substrate and the wafer changes during the test.

  When the distance between the substrate and the wafer changes in this way, the contact state between the metal bumps on the substrate and the circuit pattern of the wafer becomes unstable, and the test accuracy decreases. Therefore, a conventional probe card using metal bumps as terminals is mainly used when an electrical test of a small wafer is performed, and is not suitable for testing a large wafer.

  The present invention has been made in view of such problems, and it is an object of the present invention to provide a probe card and a method for manufacturing the same that can perform an electrical test of a large wafer with high accuracy and can reduce costs. .

  The present invention employs the following means in order to solve the above problems.

  That is, the present invention provides a probe card for electrically testing a circuit pattern on a wafer, a ceramic substrate having a test circuit pattern, and formed on the surface of the ceramic substrate and connected to the circuit pattern, And metal bumps having conductivity that can contact the circuit pattern on the wafer.

  In the present invention, a ceramic having a small thermal expansion coefficient is used for the substrate. Therefore, even when the substrate is enlarged, the amount of thermal deformation is reduced. Further, the thermal expansion coefficient of the ceramic and the thermal expansion coefficient of the wafer are substantially the same.

  Therefore, when the circuit pattern on the large wafer is electrically tested, the distance between the ceramic substrate and the wafer can be kept substantially constant, so that the electrical contact between the metal bumps on the ceramic substrate and the circuit pattern on the wafer can be maintained. The state is stable.

  Here, the ceramic substrate can be composed of a plurality of laminated ceramic layers and a predetermined circuit formed between the ceramic layers.

  The metal bump can be formed of a plating layer. An example of the metal bump is a nickel plating layer. A reinforcing film can be formed on the surface of the metal bump.

  In the probe card manufacturing method for electrically testing a circuit pattern on a wafer, the present invention provides a conductive layer on the surface of the ceramic substrate, and forms a test circuit pattern by etching the conductive layer. A resist material is provided on the circuit pattern of the ceramic substrate, the resist material is provided with bumps by an etching process, a conductive metal is filled in the holes by a plating process, and the metal around the metal is etched by an etching process. By removing the resist material, the metal bumps are formed on the circuit pattern of the ceramic substrate.

  In the present invention, since metal bumps are formed on the ceramic substrate by plating and etching, a large number of metal bumps can be formed simultaneously.

  The above-described configurations can be combined with each other without departing from the spirit of the present invention.

  As described above, in the present invention, a ceramic substrate having a small thermal expansion coefficient is used, and a large number of metal bumps are provided on the ceramic substrate. Therefore, even when the ceramic substrate is enlarged, the amount of thermal deformation is reduced. Furthermore, the thermal expansion coefficient of the ceramic substrate and the thermal expansion coefficient of the wafer are substantially the same.

  Therefore, when the circuit pattern on the large wafer is electrically tested, the distance between the ceramic substrate and the wafer can be kept substantially constant. The contact state is stable. Thereby, a circuit pattern on a large wafer can be tested with high accuracy.

  In the present invention, since the metal bumps are formed by plating and etching, a large number of metal bumps can be formed at a time. Therefore, the cost can be reduced.

  Hereinafter, embodiments of the present invention will be described with reference to FIGS.

  FIG. 1 shows a probe card 1 according to the present invention. The probe card 1 is for electrically testing a circuit pattern 12 on a wafer 11. The probe card 1 is formed on the surface of the ceramic substrate 14 having a test circuit pattern 13 and is connected to the circuit pattern 13 so as to be in contact with the circuit pattern 12 on the wafer 11. And a metal bump 15 having a property.

  Next, each of the above configurations will be described in detail. The wafer 11 is formed relatively large. In the present embodiment, the diameter of the wafer 11 is 200 mm. On the wafer 11, circuit patterns 12 of a large number of chips are formed. In the present embodiment, circuit patterns 12 for a plurality of chips are formed on the wafer 11.

  The ceramic substrate 14 has a plurality of ceramic layers laminated. A predetermined circuit pattern (not shown) is provided between the ceramic layers. Moreover, in this example, the ceramic substrate 14 is formed in a square of 120 to 150 mm. Both surfaces of the ceramic substrate 14 are polished.

  The circuit pattern 13 provided on the surface of the ceramic substrate 14 is connected to a circuit pattern (not shown) between ceramic layers. The metal bumps 15 connected to the circuit pattern 13 of the ceramic substrate 14 are formed in a substantially truncated cone shape. In this example, the diameter d of the upper end surface of the metal bump 15 is 30 ηm, the height h is 50 ηm, and the distance b between the metal bumps 15 is 100 to 200 ηm.

  The metal bump 15 is formed by a plating layer. In this example, the metal bump 15 is formed by the nickel plating layer 24 by electroless plating. A reinforcing film 16 such as a gold plating layer is provided on the surface of the metal bump 15. The reinforcing film 16 can be omitted.

  Further, the metal bumps 15 are provided in such a number that a plurality of chips formed on the wafer 11 can be tested at a time. In this example, 80 to 100 metal bumps 15 are provided per chip. Accordingly, the probe card 1 is provided with 2000 to 3000 metal bumps 15.

  Next, a method for manufacturing the probe card 1 will be described. Here, first, as shown in FIG. 2, a conductive layer 21 such as a copper foil is attached to the surface of the ceramic substrate 14 by thermocompression bonding or the like. The conductive layer 21 has a thickness of 100 ηm or less.

  Next, circuit patterning is performed by etching the conductive layer 21. As a result, a predetermined circuit pattern 13 is formed on the ceramic substrate 14 as shown in FIG.

  Next, as shown in FIG. 4, a resist material 22 is applied to the surface of the ceramic substrate 14 on the side where the circuit pattern 13 is provided. Next, a hole 23 having a predetermined diameter is provided in the resist material 22 by etching. The holes 23 are formed according to the diameter, number and position of the metal bumps 15.

  Next, as shown in FIG. 5, the nickel plating layer 24 is filled into the holes 23 of the resist material 22 by electroless plating. The nickel plating layer 24 is projected from the surface of the resist material 22. Subsequently, as shown in FIG. 6, the portion of the nickel plating layer 24 protruding from the resist material 22 is removed by polishing.

  Next, as shown in FIG. 7, the resist material 22 around the nickel plating layer 24 is removed by an etching process. Thereafter, a trimming process is performed to change the shape of the nickel plating layer 24 into a truncated cone.

  Next, as shown in FIG. 8, the reinforcing film 16 is formed on the frustoconical nickel plating layer 24 by plating. Thereby, the truncated conical metal bump 15 is formed. In this way, 2000 to 3000 metal bumps 15 can be formed at a time by plating and etching.

  FIG. 9 shows a test apparatus 30 to which the probe card 1 is applied. This test apparatus 30 includes a wafer holder 31 for holding a wafer 11, a ceramic substrate 14 brazed to a metal head holder 33, a metal head holder 33 with a low expansion coefficient processed with high accuracy, a probe, A weight 34 for preventing deformation of the card 1 and a connector 35 attached to the probe card 1 are provided. An electric wire 36 extending from the connector 35 is connected to an external measuring instrument (not shown).

  When an electrical test of the wafer 11 is performed using the test apparatus 30, the prober holder 32 is lowered. Then, all the metal bumps 15 of the probe card 1 are brought into electrical contact with the circuit pattern 12 of the wafer 11. Thereby, the electrical test of all the circuit patterns 12 on the wafer 11 can be performed at a time.

  That is, the probe card 1 according to the present invention is provided with a large number of conductive metal bumps 15. The metal bumps 15 include a circuit pattern 13 provided on the ceramic substrate 14, a circuit pattern between ceramic layers, a connector 35, and an electric wire 36. It is electrically connected to an external measuring instrument or the like. Accordingly, the electrical inspection of the circuit pattern 12 can be performed by bringing the metal bump 15 into contact with the circuit pattern 12 on the wafer 11 and flowing electricity.

  The ceramic substrate 14 has a very small coefficient of thermal expansion compared to a conventional resin substrate, so that even when the ceramic substrate 14 is enlarged, the amount of thermal deformation is small. Further, since the metal bumps 15 are formed by plating and etching processes, a large number of metal bumps 15 can be formed at a time.

  That is, the probe card 1 of the present invention can be made large because the ceramic substrate 14 having a small thermal expansion coefficient is used. Also, a large number of 2880 to 3000 metal bumps 15 can be easily provided on the ceramic substrate 14, for example.

  In this way, by using the large probe card 1, it is possible to perform an electrical test on a large wafer 11 provided with a large number of chips, for example, about 36. In this case, since the amount of thermal deformation of the ceramic substrate 14 is small, the distance between the ceramic substrate 14 and the wafer 11 is kept constant.

  Thereby, the electrical contact state between each metal bump 15 on the ceramic substrate 14 and the circuit pattern 12 on the wafer 11 is stabilized, so that the electrical test of the wafer 11 can be performed with high accuracy.

  Further, in the method for manufacturing the probe card 1 according to the present invention, since a large number of metal bumps 15 can be formed at a time, the cost can be reduced.

It is sectional drawing which shows the probe card which concerns on embodiment. It is sectional drawing explaining the manufacturing method of the probe card which concerns on embodiment. It is sectional drawing explaining the manufacturing method of the probe card which concerns on embodiment. It is sectional drawing explaining the manufacturing method of the probe card which concerns on embodiment. It is sectional drawing explaining the manufacturing method of the probe card which concerns on embodiment. It is sectional drawing explaining the manufacturing method of the probe card which concerns on embodiment. It is sectional drawing explaining the manufacturing method of the probe card which concerns on embodiment. It is sectional drawing explaining the manufacturing method of the probe card which concerns on embodiment. It is sectional drawing which shows the testing apparatus using the probe card which concerns on embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Probe card 11 Wafer 12 Wafer circuit pattern 13 Ceramic substrate circuit pattern 14 Ceramic substrate 15 Metal bump 16 Gold plating layer 21 Conductive layer 22 Resist material 23 Hole 24 Nickel plating layer 30 Test apparatus 31 Wafer holder 32 Prober holder 33 Metal Made head holder 34 Weight 35 Connector 36 Electric wire

Claims (6)

In the probe card (1) for electrically testing the circuit pattern (12) on the wafer (11),
A ceramic substrate (14) having a circuit pattern (13) for testing;
A conductive metal bump (15) formed on the surface of the ceramic substrate (14), connected to the circuit pattern (13), and capable of contacting the circuit pattern (12) on the wafer (11). And a probe card.   The probe card according to claim 1, wherein the ceramic substrate (14) has a plurality of laminated ceramic layers and a predetermined circuit formed between the ceramic layers.   The probe card according to claim 1 or 2, wherein the metal bump (15) is a plated layer.   The probe card according to claim 3, wherein the plating layer is a nickel plating layer (24).   The probe card according to any one of claims 1 to 4, further comprising a reinforcing film (16) on a surface of the metal bump (15). In the method of manufacturing the probe card (1) for electrically testing the circuit pattern (12) on the wafer (11),
A conductive layer (21) is provided on the surface of the ceramic substrate (14),
A test circuit pattern (13) is formed by etching the copper foil (21).
A resist material (22) is provided on the surface of the circuit pattern (13) of the ceramic substrate (14),
Bump holes (23) are provided in the resist material (22) by etching,
Filling the hole (23) with conductive metal (24) by plating,
By removing the resist material (22) around the metal (24) by an etching process,
A method for manufacturing a probe card, wherein the metal bumps (15) are formed on the surface of the circuit pattern (13) of the ceramic substrate (14).

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