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JP2005149873A - Plasma display panel - Google Patents

Plasma display panel Download PDF

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JP2005149873A
JP2005149873A JP2003384813A JP2003384813A JP2005149873A JP 2005149873 A JP2005149873 A JP 2005149873A JP 2003384813 A JP2003384813 A JP 2003384813A JP 2003384813 A JP2003384813 A JP 2003384813A JP 2005149873 A JP2005149873 A JP 2005149873A
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electrode
dielectric layer
transparent
discharge
display panel
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Seiji Watanuki
清司 綿貫
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Hitachi Ltd
Advanced PDP Development Center Corp
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Hitachi Ltd
Advanced PDP Development Center Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To solve such a problem of an AC type plasma display panel in which a uniformly formed transparent intermediate layer is provided, grooves are made with a thickness almost the same as that of discharge gaps, tip parts of transparent electrodes connected from X, Y electrodes are arranged at side walls of the grooves, and a dielectric layer is superposed so as to coat the X, Y electrodes with a protecting membrane (MgO) formed over it to make up a display screen side glass substrate; that the transmittance of light from a light-emitting phosphor is degraded in proportion to the thickness of the newly provided transparent intermediate layer. <P>SOLUTION: On the display screen side glass substrate, transparent ribs made of lead glass or the like are provided at places located at the tip parts of the X, Y discharge gaps, the transparent electrode is arranged so as to cover the ribs, and X, Y bus electrodes are arranged so as to connect to it, on which the dielectric layer is uniformly coated by printing. After that, the dielectric layer falling on the discharge gap part is removed by etching with nitric acid, the protecting membrane (MgO) is adhered on the whole surface to complete the display screen side glass substrate. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、交流駆動の3電極面放電方式のAC型プラズマディスプレイパネルに関する。   The present invention relates to an AC type three-electrode surface discharge AC type plasma display panel.

従来の交流駆動の3電極面放電方式のプラズマディスプレイパネル(以下、AC型プラズマディスプレイパネルと称する)は、表示基板と背面基板が所定間隙の放電空間を介して、対向して配置されている。表示基板には、ガラス基板上に放電ギャップを挟んで対向する対をなす行電極である放電維持電極が複数配列されている。放電維持電極はX電極(共通電極ともいう)とY電極(走査電極ともいう)とからなり、各電極は、ガラス基板上に設けられた例えばITO膜である透明電極と、その上に形成された低抵抗のバス電極からなっている。そして、放電維持電極は誘電体層で覆われ、その誘電体層は保護層で覆われている。また、背面基板には、蛍光体が塗布された複数の列電極であるアドレスが形成されており、1対の放電維持電極と1つの列電極の交差部が1画素を形成する単位放電セルとなっている。   A conventional AC-driven three-electrode surface discharge type plasma display panel (hereinafter referred to as an AC type plasma display panel) has a display substrate and a rear substrate arranged to face each other with a discharge space having a predetermined gap. On the display substrate, a plurality of discharge sustain electrodes, which are paired row electrodes facing each other across a discharge gap, are arranged on a glass substrate. The discharge sustaining electrode is composed of an X electrode (also referred to as a common electrode) and a Y electrode (also referred to as a scanning electrode). Each electrode is formed on a transparent electrode such as an ITO film provided on a glass substrate. It consists of a low-resistance bus electrode. The discharge sustaining electrode is covered with a dielectric layer, and the dielectric layer is covered with a protective layer. The rear substrate is formed with addresses which are a plurality of column electrodes coated with a phosphor, and a unit discharge cell in which an intersection of a pair of discharge sustaining electrodes and one column electrode forms one pixel. It has become.

ところで、対をなすX電極とY電極(1対の放電維持電極)の間に電圧を加えた場合、電気力線は放電ギャップ及びその近傍で密となる。しかし、従来では、それらの電気力線は誘電率の高い誘電体層内部に閉じ込められている為、放電空間内においては、電気力線が疎になり、電界強度が弱く、維持放電開始電圧が高く、消費電力を低減できない要因となっていた。   By the way, when a voltage is applied between the paired X electrode and Y electrode (a pair of discharge sustaining electrodes), the electric lines of force become dense at and near the discharge gap. However, conventionally, since these electric lines of force are confined inside a dielectric layer having a high dielectric constant, the electric lines of force are sparse in the discharge space, the electric field strength is weak, and the sustain discharge start voltage is low. The power consumption is high and cannot be reduced.

そこで、前記放電ギャップ上に対応した誘電体層領域に凹部を設けて、または誘電体層がないよう溝を設けて、放電ギャップ及びその近傍での電界強度を強くし、維持放電開始電圧を低減して、消費電力を低減する技術が、例えば下記特許文献1で開示されている。   Therefore, a concave portion is provided in the corresponding dielectric layer region on the discharge gap, or a groove is provided so that there is no dielectric layer, and the electric field strength in the discharge gap and its vicinity is increased to reduce the sustain discharge starting voltage. A technique for reducing power consumption is disclosed, for example, in Patent Document 1 below.

特開平11−297215号公報JP 11-297215 A

上記特許文献1では、維持放電開始電圧を低下させるために、維持放電電極(対をなすX電極とY電極)間の放電ギャップ上に対応した誘電体層領域に凹部または溝を設け、放電ギャップ及びその近傍での電界強度を強くしている。さらに、維持放電電極間の電位分布の一様性(即ち、並行電界)を保つため、溝内にX,Y電極の放電ギャップ近傍の電極の一部を形成している。   In Patent Document 1, in order to reduce the sustain discharge start voltage, a recess or a groove is provided in the dielectric layer region corresponding to the discharge gap between the sustain discharge electrodes (a pair of X electrode and Y electrode), and the discharge gap And the electric field strength in the vicinity thereof is increased. Further, in order to maintain the uniformity of the potential distribution between the sustain discharge electrodes (that is, the parallel electric field), a part of the electrodes near the discharge gap of the X and Y electrodes is formed in the groove.

これは、上記特許文献1の3頁段落番号0020乃至0022及び図4,図5で示されるように、表示基板のガラス基板上に、低融点ガラス層からなる一様に形成された透明中間層を設け、サンドブラスト法で放電ギャップ幅と同程度の幅を有する溝を作り、溝の側壁にX,Y電極の透明電極の一部である先端部を配置し、その後、X,Y電極を被覆するように一様な厚さで誘電体層を重ね、その上に保護膜(MgO)を形成して、表示基板を構成している。   This is because, as shown in page 3, paragraph numbers 0020 to 0022 of FIG. 4 and FIG. 4 and FIG. 5, a transparent intermediate layer uniformly formed of a low melting point glass layer on the glass substrate of the display substrate. A groove having a width about the same as the discharge gap width is formed by sandblasting, and the tip portion which is a part of the transparent electrode of the X and Y electrodes is arranged on the side wall of the groove, and then the X and Y electrodes are covered. In this way, a dielectric layer is stacked with a uniform thickness, and a protective film (MgO) is formed thereon to constitute a display substrate.

このように、上記特許文献1では、新たに透明中間層を設け、これをサンドブラスト法で削り、溝を設けて、この上に透明中間層の形状に沿って透明電極を配置して、さらに、この上に誘電体層を均一に設けている。しかし、蛍光体からの光が出射する溝領域外の透光領域では新たに設けた透明中間層の厚さの分だけ、蛍光体からの光の透過率が落ちるという問題が新たに生じる。   Thus, in the above-mentioned Patent Document 1, a transparent intermediate layer is newly provided, this is shaved by a sandblast method, a groove is provided, a transparent electrode is disposed on the transparent intermediate layer along the shape thereof, and further, A dielectric layer is uniformly provided thereon. However, a problem arises in that the transmittance of light from the phosphor is reduced by the thickness of the newly provided transparent intermediate layer in the transparent region outside the groove region where the light from the phosphor is emitted.

本発明は、上記した事情に鑑みてなされたもので、その目的は、蛍光体からの光が出射する溝領域外の透光領域での透過率を低下させることなく、維持放電開始電圧を低減できるプラズマディスプレイパネルを提供することにある。   The present invention has been made in view of the above circumstances, and its purpose is to reduce the sustain discharge start voltage without reducing the transmittance in the translucent area outside the groove area where the light from the phosphor is emitted. It is to provide a plasma display panel that can be used.

上記課題を解決するために、本発明では、放電空間を介して対向配置された基板対の表示面側基板の内面に、複数配列された電極対である放電ギャップを挟んで配設された第1の電極および第2の電極と、前記第1の電極および前記第2電極を前記放電空間に対して被覆する誘電体層とを備えたプラズマディスプレイパネルにおいて、前記表示面側基板内面上で、対をなす前記第1の電極と前記第2電極間の前記放電ギャップの両先端部近傍領域に、所定厚さ(高さ)に形成された透光性リブを備え、対をなす前記第1の電極および前記第2の電極を前記透光性リブを覆うように形成し、前記誘電体層を前記放電ギャップに対応する領域内に誘電体層のない凹部あるいは溝を有するように構成する。   In order to solve the above-described problems, in the present invention, a first pair of electrode pairs arranged on a display surface side substrate of a pair of substrates opposed to each other with a discharge space interposed therebetween is arranged with a plurality of electrode gaps arranged therebetween. In a plasma display panel comprising one electrode and a second electrode, and a dielectric layer that covers the first electrode and the second electrode with respect to the discharge space, on the display surface side substrate inner surface, The translucent ribs formed at a predetermined thickness (height) are provided in the vicinity of both ends of the discharge gap between the first electrode and the second electrode that form a pair, and the first pair that forms a pair The electrode and the second electrode are formed so as to cover the translucent rib, and the dielectric layer is configured to have a recess or groove having no dielectric layer in a region corresponding to the discharge gap.

このように構成すれば、放電ギャップ領域内に誘電体層のない溝が形成されているので、また、透光性リブの放電側ギャップ側壁面に放電ギャップを挟んで対向する第1の電極および第2の電極の対向部が形成されるので、対をなす第1の電極および第2の電極の間の電気力線は、誘電体層のない放電ギャップ間で密となり、電界が強くなり、かつ、電位分布が一様で電界が並行となり、対をなす第1の電極および第2の電極間の維持放電開始電圧を低下させることができる。   According to this structure, since the groove without the dielectric layer is formed in the discharge gap region, the first electrode opposed to the discharge side gap side wall surface of the translucent rib with the discharge gap interposed therebetween, and Since the opposing portion of the second electrode is formed, the electric lines of force between the paired first electrode and the second electrode become dense between the discharge gaps without the dielectric layer, and the electric field becomes strong, In addition, since the electric potential distribution is uniform and the electric fields are parallel, the sustain discharge start voltage between the paired first electrode and second electrode can be reduced.

この時、前記特許文献1とは異なり、透明中間層がなく、蛍光体で発光された光が通過する誘電体層の厚さ(透光性リブのある部分では、透光性リブの厚さ+誘電体層7の厚さ)は従来と略同等であり、従来と比べて蛍光体からの光の透過率が落ちることはない。   At this time, unlike the above-mentioned Patent Document 1, there is no transparent intermediate layer, and the thickness of the dielectric layer through which the light emitted from the phosphor passes (the thickness of the translucent rib in the portion having the translucent rib). + Thickness of the dielectric layer 7) is substantially the same as the conventional one, and the transmittance of light from the phosphor does not drop compared to the conventional one.

本発明によれば、蛍光体からの光が出射する溝領域外の透光領域での透過率を低下させることなく、維持放電開始電圧を低減できるプラズマディスプレイパネルを提供することができる。   ADVANTAGE OF THE INVENTION According to this invention, the plasma display panel which can reduce a sustain discharge start voltage can be provided, without reducing the transmittance | permeability in the translucent area | region outside the groove | channel area | region which the light from a fluorescent substance radiate | emits.

以下、本発明を実施するための最良の形態について、図を用いて詳細に説明する。なお、各図に共通な機能を有する構成要素には、同一符号を付して示す。   Hereinafter, the best mode for carrying out the present invention will be described in detail with reference to the drawings. In addition, the same code | symbol is attached | subjected and shown to the component which has a function common to each figure.

図1は本発明の実施例1であるAC型プラズマディスプレイパネルを示し、AC型プラズマディスプレイパネルを行電極(X,Y電極)側から見た断面図である。図2は、図1を立体的に見た斜視図である。   FIG. 1 shows an AC type plasma display panel that is Embodiment 1 of the present invention, and is a cross-sectional view of the AC type plasma display panel as seen from the row electrode (X, Y electrode) side. FIG. 2 is a perspective view of FIG. 1 viewed three-dimensionally.

本実施例は、一対のX電極とY電極の間の放電ギャップの先端部(両端)に略対応するガラス基板上の近傍領域に、所定厚さ(高さ)を有する透光性の透明リブを設けたことを特徴とする。   In this embodiment, a translucent transparent rib having a predetermined thickness (height) in a vicinity region on the glass substrate substantially corresponding to the tip (both ends) of the discharge gap between the pair of X and Y electrodes. Is provided.

図1,図2において、表示基板は、透光性のガラス基板1と、一対のX電極3とY電極4の間の放電ギャップ20先端部に略対応する近傍(両端)領域に設けられた、行電極方向に平行に伸びた所定厚さ(高さ)を有する透光性の透明リブ2と、ガラス基板1と透明リブ2上に設けられた複数の対をなす行電極(一般に維持放電電極と称する)であるX電極3およびY電極4と、放電ギャップ20に略対応する領域に行電極に平行な溝21を有する行電極を覆うように形成された透明な誘電体層7と、該誘電体層7上に設けられた例えばMgoの保護層8とからなる。   1 and 2, the display substrate is provided in the vicinity (both ends) of the translucent glass substrate 1 and substantially corresponding to the tip of the discharge gap 20 between the pair of X electrode 3 and Y electrode 4. The transparent transparent rib 2 having a predetermined thickness (height) extending parallel to the row electrode direction, and a plurality of pairs of row electrodes (generally sustain discharges) provided on the glass substrate 1 and the transparent rib 2 A transparent dielectric layer 7 formed so as to cover the row electrode having a groove 21 parallel to the row electrode in a region substantially corresponding to the discharge gap 20; For example, the protective layer 8 made of Mg is provided on the dielectric layer 7.

背面基板は、ガラス基板12と、ガラス基板12上に行電極に交差するように配置されたアドレス電極11と、アドレス電極11を覆うように設けられた誘電体層10と、一対の行電極とアドレス電極の交差部に1画素となる単位放電セルを構成するように行方向に仕切る隔壁14と、隔壁14で囲まれた誘電体層10上に塗布された蛍光体9とからなる。   The back substrate includes a glass substrate 12, an address electrode 11 disposed on the glass substrate 12 so as to intersect the row electrode, a dielectric layer 10 provided so as to cover the address electrode 11, and a pair of row electrodes. It consists of a partition wall 14 partitioned in the row direction so as to form a unit discharge cell of one pixel at the intersection of address electrodes, and a phosphor 9 applied on the dielectric layer 10 surrounded by the partition wall 14.

表示基板と背面基板との間の放電空間15は隔壁14で所定間隙となるように設けられており、表示基板と背面基板との間には放電ガス(不図示)が封入されている。   The discharge space 15 between the display substrate and the back substrate is provided with a predetermined gap by the partition wall 14, and a discharge gas (not shown) is sealed between the display substrate and the back substrate.

上記したX電極3及びY電極4は、例えばITO膜である透明電極3a,4aと、その上に設けられた低抵抗のバス電極3b,4bとからなる。そして、その透明電極3aと4aの放電ギャップ20側端部は、透明リブ2を覆っており、透明電極3aと4aの放電ギャップ20側先端部は透明リブ2の斜面2aに沿って、放電ギャップ20を挟んで対向する対向部3agと4agを形成している。   The X electrode 3 and the Y electrode 4 described above are composed of transparent electrodes 3a and 4a, which are ITO films, for example, and low-resistance bus electrodes 3b and 4b provided thereon. The ends of the transparent electrodes 3a and 4a on the side of the discharge gap 20 cover the transparent rib 2, and the ends of the transparent electrodes 3a and 4a on the side of the discharge gap 20 along the inclined surface 2a of the transparent rib 2 Opposing portions 3ag and 4ag facing each other across 20 are formed.

本実施例による表示基板は、先ず、表示基板側のガラス基板1上で、対をなすX電極3とY電極4の間の放電ギャップ20の両先端部に略対応する近傍位置にのみ、所定厚さ(高さ)となるように、例えば低融点の鉛ガラス等のペースト材を印刷して、乾燥焼成させて透明リブ2を作成する。透明リブ2の所定厚さは、誘電体層の厚さをtとすると、透明電極3a,4aの厚さと略同じ1μm以上で、t以下の例えば25μm以下とする。最低厚さは、後述する電位分布の一様性の点からバス電極3b(4b)の厚さより大きいのが望ましい。この透明リブ2の形状は、粘性など考慮すると、山型又は台形状とするのが望ましい。   The display substrate according to the present embodiment is first predetermined on the glass substrate 1 on the display substrate side only at positions near the tip portions of the discharge gap 20 between the X electrode 3 and the Y electrode 4 that make a pair. The transparent rib 2 is created by printing a paste material such as a low melting point lead glass so as to have a thickness (height), followed by drying and baking. The predetermined thickness of the transparent rib 2 is not less than 1 μm and not more than t, for example, 25 μm or less, which is substantially the same as the thickness of the transparent electrodes 3a and 4a, where t is the thickness of the dielectric layer. The minimum thickness is preferably larger than the thickness of the bus electrode 3b (4b) from the viewpoint of the uniformity of the potential distribution described later. The shape of the transparent rib 2 is preferably a mountain shape or a trapezoidal shape in consideration of viscosity and the like.

その後、この透明リブ2を被覆して、Xバス電極3b,Yバス電極4bが配置される場所まで、X電極3の透明電極3a、Y電極4の透明電極4aを例えば1μm弱程度の厚さでスパッタリング等で作成し、そして、この上に金属材料でできたXバス電極3b、Yバス電極4bを作成してパネルの電極構造とする。   Thereafter, the transparent rib 3 is covered, and the transparent electrode 3a of the X electrode 3 and the transparent electrode 4a of the Y electrode 4 are about 1 μm thick, for example, until the X bus electrode 3b and the Y bus electrode 4b are disposed. Then, an X bus electrode 3b and a Y bus electrode 4b made of a metal material are formed thereon to form a panel electrode structure.

さらに、その上に低融点ガラス粉末を主成分とするペースト状の材料を数十μm(例えば30μm〜50μm)の厚さで全体に均一に印刷塗布して、誘電体層7を仕上げる。次に放電ギャップ20に略対応する部分の誘電体層を硝酸などでエッチング除去して、ガラス基板1に達する溝21を設け、この上から保護膜(MgO)8を蒸着等で全面に一様に付着させて表示基板を完成させる。なお、背面基板の製造工程は従来通りであり、説明を省略する。   Further, a paste-like material mainly composed of a low-melting-point glass powder is uniformly printed on the whole with a thickness of several tens of μm (for example, 30 μm to 50 μm), and the dielectric layer 7 is finished. Next, a portion of the dielectric layer substantially corresponding to the discharge gap 20 is removed by etching with nitric acid or the like to provide a groove 21 reaching the glass substrate 1, and a protective film (MgO) 8 is uniformly deposited on the entire surface by vapor deposition or the like. A display substrate is completed by attaching to the substrate. Note that the manufacturing process of the rear substrate is the same as the conventional process, and the description thereof is omitted.

以上述べたように構成されたAC型プラズマディスプレイパネルでは、対をなすX電極3とY電極4の間に維持放電開始電圧以上の印加電圧が印加されると、放電空間15で維持放電が起こり、紫外線が発生する。この紫外線が背面基板の蛍光体9を励起して発光させ、この光が表示基板の放電ギャップ、透明電極領域を透過して表示基板から出射し、視聴者に対して映像を映し出す。   In the AC type plasma display panel configured as described above, a sustain discharge occurs in the discharge space 15 when an applied voltage higher than the sustain discharge start voltage is applied between the paired X electrode 3 and Y electrode 4. UV rays are generated. This ultraviolet light excites the phosphor 9 on the back substrate to emit light, and this light passes through the discharge gap and the transparent electrode region of the display substrate and is emitted from the display substrate to display an image to the viewer.

この時、対をなすX電極3とY電極4の間の電気力線30は、図3に示すように、放電ギャップ20領域内に誘電体層のない溝21が形成されているので、また、X電極3の透明電極3aおよびY電極4の透明電極4aの放電ギャップ側対向部3agと4agが放電ギャップ20を介して対向しているので、誘電体層のない放電ギャップ間で密となり、電界が強くなり、かつ、電位分布が一様で電界が並行となり、対をなすX電極3とY電極4間の維持放電開始電圧を低下させることができる。   At this time, the electric lines of force 30 between the paired X electrode 3 and Y electrode 4 have a groove 21 without a dielectric layer formed in the region of the discharge gap 20 as shown in FIG. The discharge gap side facing portions 3ag and 4ag of the transparent electrode 3a of the X electrode 3 and the transparent electrode 4a of the Y electrode 4 are opposed to each other through the discharge gap 20, so that the discharge gap without the dielectric layer becomes dense, The electric field becomes stronger, the electric potential distribution is uniform and the electric fields are parallel, and the sustain discharge start voltage between the paired X electrode 3 and Y electrode 4 can be lowered.

放電ギャップ間で低い維持放電電圧で、一旦放電が開始すると、放電は並行電界が発生している広い対向部3ag,4agの電極面に広がり、放電ガスを電離させてから、さらに透明電極を伝わってXバス電極,Yバス電極側に広がっていくため、低い維持放電開始電圧でも、放電の立ち消えが無く、安定した放電が実現できる。これにともない、消費電力を低減することができる。   Once the discharge is started at a low sustain discharge voltage between the discharge gaps, the discharge spreads to the electrode surfaces of the wide facing portions 3ag, 4ag where the parallel electric field is generated, ionizes the discharge gas, and further travels through the transparent electrode. Therefore, even if the sustain discharge start voltage is low, the discharge does not go out and a stable discharge can be realized. Accordingly, power consumption can be reduced.

且つ、本実施例では、前記特許文献1とは異なり、透明中間層がなく、蛍光体で発光された光が通過する誘電体層7の厚さ(透明リブのある部分では、透明リブの厚さ+誘電体層7の厚さ)は従来と略同等であり、従来と比べて蛍光体からの光の透過率が落ちることはない。   Also, in this embodiment, unlike the above-mentioned Patent Document 1, there is no transparent intermediate layer, and the thickness of the dielectric layer 7 through which the light emitted from the phosphor passes (the thickness of the transparent rib in the portion with the transparent rib). (Thickness + thickness of the dielectric layer 7) is substantially the same as that of the prior art, and the transmittance of light from the phosphor does not drop compared to the prior art.

なお、本実施例では、放電ギャップ20内の溝21はガラス基板1の内面にまで達しているが、これに限定されるものではなく、ガラス基板1と溝21の底面との間に透明リブ2の厚さ(高さ)より薄い誘電体層があってもよいことはいうまでもない。しかし、溝21内の誘電体層の高さは、電位分布の一様性(並行電界)の観点から透明リブ2の厚さ(高さ)の1/2以下が望ましい。   In this embodiment, the groove 21 in the discharge gap 20 reaches the inner surface of the glass substrate 1. However, the present invention is not limited to this, and a transparent rib is formed between the glass substrate 1 and the bottom surface of the groove 21. It goes without saying that there may be a dielectric layer thinner than 2 thicknesses (heights). However, the height of the dielectric layer in the groove 21 is preferably ½ or less of the thickness (height) of the transparent rib 2 from the viewpoint of uniformity of potential distribution (parallel electric field).

また、以上では、透明電極3a,4aは透明リブ2を覆うように形成されているが、これに限定されるものではなく、透明リブ2の上面まで形成し、斜面2aには形成しないようにしてもよい。このようにしても、透明リブ2の上面上の透明電極から出る電気力線は、溝を介して相対している相手電極との間では、溝の底面側にも膨らみ有効活用されるのと、溝から放電が拡大していく最初の面放電側では、誘電体7の厚さが透明リブ2の高さによって薄くなっているので、電気力線が強まっており有効である。従来は、透明電極はガラス基板上に形成されている為、ガラス基板側の電気力線は有効利用されていない。しかし、上記のようにすれば、ガラス基板側の電気力線も利用できるので、維持放電開始電圧を低減させることが可能となる。   In the above description, the transparent electrodes 3a and 4a are formed so as to cover the transparent rib 2. However, the present invention is not limited to this, and the transparent electrodes 3a and 4a are formed up to the upper surface of the transparent rib 2 and not formed on the inclined surface 2a. May be. Even if it does in this way, the electric force line which comes out of the transparent electrode on the upper surface of the transparent rib 2 swells to the bottom surface side of the groove between the opposite electrode facing through the groove and is effectively used. On the first surface discharge side where the discharge expands from the groove, the thickness of the dielectric 7 is reduced by the height of the transparent rib 2, so that the lines of electric force are strengthened and effective. Conventionally, since the transparent electrode is formed on the glass substrate, the electric lines of force on the glass substrate side have not been effectively used. However, with the above configuration, the electric lines of force on the glass substrate side can be used, so that the sustain discharge start voltage can be reduced.

次に、第2の実施例であるAC型プラズマディスプレイパネルについて以下述べる。図4は表示基板の作成工程を一部変更した第2の実施例である。図4において、図1,図2,図3と同じ機能を有する部分には、同一符号を付して示し、煩雑さをさけるために、その説明を省略する。   Next, an AC type plasma display panel according to the second embodiment will be described below. FIG. 4 shows a second embodiment in which a part of the manufacturing process of the display substrate is changed. 4, parts having the same functions as those in FIGS. 1, 2 and 3 are denoted by the same reference numerals, and the description thereof is omitted to avoid complexity.

本実施例は、対をなすX電極とY電極の放電ギャップ側に厚さの厚い透明電極を有し、放電ギャップに略対応する領域に誘電体層の形成されていない溝を備えることを特徴とする。   This embodiment has a thick transparent electrode on the discharge gap side of the paired X electrode and Y electrode, and has a groove in which a dielectric layer is not formed in a region substantially corresponding to the discharge gap. And

図4において、本実施例は、実施例1とは行電極(維持放電電極)であるX電極およびY電極の構成が異なる。本実施例では、表示基板のガラス基板1上に設けられた複数の対をなす行電極であるX電極5とY電極6は、それぞれ、ガラス基板1上に設けられた透明電極5a,6aと、透明電極上に設けられたバス電極5b,バス電極6bと、透明電極5a,6aの放電ギャップ20側端部に形成され、放電ギャップ20を介して対向する厚さの厚い透明電極13xと13yとからなる。そして、行電極を覆うように、放電ギャップ20に略対応する領域に行電極に平行な溝21を有する透明な誘電体層7が形成されて、さらに、その上に保護膜8が設けられている。   In FIG. 4, the present embodiment differs from the first embodiment in the configuration of the X electrodes and Y electrodes that are row electrodes (sustain discharge electrodes). In this embodiment, the X electrode 5 and the Y electrode 6 which are a plurality of pairs of row electrodes provided on the glass substrate 1 of the display substrate are respectively transparent electrodes 5 a and 6 a provided on the glass substrate 1. The thick transparent electrodes 13x and 13y formed on the discharge electrode 20 side end of the bus electrode 5b, the bus electrode 6b, and the transparent electrodes 5a and 6a provided on the transparent electrode and facing each other through the discharge gap 20. It consists of. A transparent dielectric layer 7 having a groove 21 parallel to the row electrode is formed in a region substantially corresponding to the discharge gap 20 so as to cover the row electrode, and a protective film 8 is further provided thereon. Yes.

本実施例による表示基板は、ガラス基板1上で、X電極5の透明電極5aとY電極6の透明電極6aを同時に作成したのち、これと接続するXバス電極5bとYバス電極6bを作成する。その後、透明電極の放電ギャップ側端部に透明電極13を設ける。透明電極13は、透明電極5a,6a上に例えば透明酸化物半導体であるTiO,SnO,In,ZnO等を所定厚さ(高さ)となるように印刷塗布して仕上げる。透明電極13の所定厚さ(透明電極5a,6aの厚さを含むものとする)は、誘電体層の厚さをtとすると、透明電極5a,6aの厚さの略2倍の2μm以上で、t以下の例えば25μm以下とする。最低厚さは、電位分布の一様性の点から透明電極5a(6a)とバス電極5b(6b)の厚さの和より大きいのが望ましい。規定厚さに仕上がらない場合は、数回印刷して、規定厚さに仕上げる。誘電体層7と溝21と保護膜8については実施例1に同じであり、説明を省略する。 In the display substrate according to this embodiment, the transparent electrode 5a of the X electrode 5 and the transparent electrode 6a of the Y electrode 6 are simultaneously formed on the glass substrate 1, and then the X bus electrode 5b and the Y bus electrode 6b connected to the transparent electrode 5a are formed. To do. Thereafter, the transparent electrode 13 is provided at the end of the transparent electrode on the discharge gap side. The transparent electrode 13 is finished by printing and applying a transparent oxide semiconductor such as TiO 2 , SnO 2 , In 2 O 3 , ZnO or the like on the transparent electrodes 5 a, 6 a so as to have a predetermined thickness (height). The predetermined thickness of the transparent electrode 13 (including the thickness of the transparent electrodes 5a and 6a) is 2 μm or more, which is approximately twice the thickness of the transparent electrodes 5a and 6a, where t is the thickness of the dielectric layer. For example, 25 μm or less. The minimum thickness is preferably larger than the sum of the thicknesses of the transparent electrode 5a (6a) and the bus electrode 5b (6b) from the viewpoint of uniformity of potential distribution. If it is not finished to the specified thickness, print several times and finish to the specified thickness. The dielectric layer 7, the groove 21, and the protective film 8 are the same as those in the first embodiment, and a description thereof is omitted.

本実施例でも、実施例1と同様、厚さ(高さ)の厚い透明電極13xと13yが、放電ギャップ20を介して対向しており、かつ、放電ギャップ20領域内に誘電体層のない溝21が形成されているので、誘電体層のない放電ギャップ間で密となり、電界が強くなり、かつ、電位分布が一様で電界が並行となり、対をなすX電極5とY電極6間の維持放電開始電圧を低下させることができる。且つ、本実施例でも、透明中間層を必要とせず、従来と比べて蛍光体からの光の透過率が落ちることはない。   Also in the present embodiment, similar to the first embodiment, thick transparent electrodes 13x and 13y are opposed to each other through the discharge gap 20, and there is no dielectric layer in the discharge gap 20 region. Since the grooves 21 are formed, the discharge gap without the dielectric layer becomes dense, the electric field becomes strong, the electric potential distribution is uniform and the electric fields are parallel, and the pair between the X electrode 5 and the Y electrode 6 is paired. The sustain discharge start voltage can be reduced. Also in this embodiment, a transparent intermediate layer is not required, and the transmittance of light from the phosphor does not drop compared to the conventional case.

なお、本実施例では、実施例1と同様に、放電ギャップ20内の溝21はガラス基板1の内面にまで達しているが、これに限定されるものではなく、ガラス基板1と溝21の底面との間に透明電極13の厚さ(高さ)より薄い誘電体層があってもよいことはいうまでもない。しかし、溝21内の誘電体層の高さは、電位分布の一様性(並行電界)の観点から透明電極13の厚さ(高さ)の1/2以下が望ましい。   In the present embodiment, as in the first embodiment, the groove 21 in the discharge gap 20 reaches the inner surface of the glass substrate 1, but the present invention is not limited to this. It goes without saying that there may be a dielectric layer thinner than the thickness (height) of the transparent electrode 13 between the bottom surface. However, the height of the dielectric layer in the groove 21 is desirably ½ or less of the thickness (height) of the transparent electrode 13 from the viewpoint of uniformity of potential distribution (parallel electric field).

実施例1のAC型プラズマディスプレイパネルを行電極側から見た断面図。Sectional drawing which looked at the AC type plasma display panel of Example 1 from the row electrode side. 図1を立体的に見た斜視図。The perspective view which looked at FIG. 1 in three dimensions. 図1のAC型プラズマディスプレイパネルの電気力線の様子を示す図。The figure which shows the mode of the electric force line | wire of the AC type plasma display panel of FIG. 実施例2のAC型プラズマディスプレイパネルを行電極側から見た断面図。Sectional drawing which looked at the AC type plasma display panel of Example 2 from the row electrode side.

符号の説明Explanation of symbols

1 ガラス基板、2 透明リブ、3 X電極、4 Y電極、5 X電極、6 Y電極、7 誘電体層、8 保護膜、9 蛍光体、10 誘電体層、11 アドレス電極、12 ガラス基板、13 透明電極、14 隔壁、15 放電空間、20 放電ギャップ、21 溝、30 電気力線。
DESCRIPTION OF SYMBOLS 1 Glass substrate, 2 Transparent rib, 3 X electrode, 4 Y electrode, 5 X electrode, 6 Y electrode, 7 Dielectric layer, 8 Protective film, 9 Phosphor, 10 Dielectric layer, 11 Address electrode, 12 Glass substrate, 13 transparent electrode, 14 barrier rib, 15 discharge space, 20 discharge gap, 21 groove, 30 lines of electric force.

Claims (6)

放電空間を介して対向配置された基板対の表示面側基板の内面に、複数配列された電極対である放電ギャップを挟んで配設された第1の電極および第2の電極と、前記第1の電極および前記第2電極を前記放電空間に対して被覆する誘電体層とを備えたプラズマディスプレイパネルにおいて、
前記表示面側基板内面上で、対をなす前記第1の電極と前記第2電極間の前記放電ギャップの両先端部近傍領域に、所定厚さ(高さ)に形成された透光性リブを備え、対をなす前記第1の電極および前記第2の電極は前記透光性リブを覆うように形成され、前記誘電体層は前記放電ギャップに対応する領域内に誘電体層のない凹部あるいは溝を有することを特徴とするプラズマディスプレイパネル。
A first electrode and a second electrode disposed on an inner surface of a display surface side substrate of a pair of substrates opposed to each other through a discharge space, with a plurality of electrode pairs arranged with a discharge gap interposed therebetween; A plasma display panel comprising: a first electrode and a dielectric layer that covers the second electrode with respect to the discharge space;
A translucent rib formed at a predetermined thickness (height) in a region in the vicinity of both ends of the discharge gap between the first electrode and the second electrode forming a pair on the inner surface of the substrate on the display surface side And the pair of the first electrode and the second electrode are formed so as to cover the translucent rib, and the dielectric layer is a recess having no dielectric layer in a region corresponding to the discharge gap. Alternatively, a plasma display panel having a groove.
前記凹部あるいは溝の底面の前記表示面側基板内面からの高さが、少なくとも前記透光性リブの厚さ(高さ)以下であることを特徴とする請求項1に記載のプラズマディスプレイパネル。   2. The plasma display panel according to claim 1, wherein a height of a bottom surface of the recess or groove from an inner surface of the display surface side substrate is at least equal to or less than a thickness (height) of the translucent rib. 放電空間を介して対向配置された基板対の表示面側基板の内面に、複数配列された電極対である放電ギャップを挟んで配設された第1の電極および第2の電極と、前記第1の電極および前記第2電極を前記放電空間に対して被覆する誘電体層とを備えたプラズマディスプレイパネルにおいて、
対をなす前記第1の電極と前記第2電極は前記放電ギャップ側端部に所定厚さ(高さ)の透光性電極部を備え、前記誘電体層は前記放電ギャップに対応する領域内に誘電体層のない凹部あるいは溝を有することを特徴とするプラズマディスプレイパネル。
A first electrode and a second electrode disposed on an inner surface of a display surface side substrate of a pair of substrates opposed to each other through a discharge space, with a plurality of electrode pairs arranged with a discharge gap interposed therebetween; A plasma display panel comprising: a first electrode and a dielectric layer that covers the second electrode with respect to the discharge space;
The first electrode and the second electrode forming a pair include a translucent electrode portion having a predetermined thickness (height) at an end portion on the discharge gap side, and the dielectric layer is in a region corresponding to the discharge gap. A plasma display panel having a recess or groove having no dielectric layer.
前記凹部あるいは溝の底面の前記表示面側基板内面からの高さが、少なくとも前記透光性電極部の厚さ(高さ)以下であることを特徴とする請求項3に記載のプラズマディスプレイパネル。   4. The plasma display panel according to claim 3, wherein a height of the bottom surface of the concave portion or the groove from the inner surface of the display surface side substrate is at least equal to or less than a thickness (height) of the translucent electrode portion. . 前記透光性電極の電極部材が透明酸化物半導体であることを特徴とする請求項3または4に記載のプラズマディスプレイパネル。   The plasma display panel according to claim 3 or 4, wherein the electrode member of the translucent electrode is a transparent oxide semiconductor. 前記透光性電極の電極部材である透明酸化物半導体がTiO,SnO,In,ZnOのいずれかであることを特徴とする請求項5に記載のプラズマディスプレイパネル。
The plasma display panel according to claim 5, wherein the transparent oxide semiconductor that is an electrode member of the translucent electrode is any one of TiO 2 , SnO 2 , In 2 O 3 , and ZnO.
JP2003384813A 2003-11-14 2003-11-14 Plasma display panel Pending JP2005149873A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100659074B1 (en) 2004-12-01 2006-12-19 삼성에스디아이 주식회사 Plasma display panel
WO2007013135A1 (en) * 2005-07-26 2007-02-01 Fujitsu Hitachi Plasma Display Limited Plasma display panel and plasma display unit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100659074B1 (en) 2004-12-01 2006-12-19 삼성에스디아이 주식회사 Plasma display panel
WO2007013135A1 (en) * 2005-07-26 2007-02-01 Fujitsu Hitachi Plasma Display Limited Plasma display panel and plasma display unit

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