JP2005026636A - Semiconductor device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device which is thin and excellent in a dimensional stability of a conductor pattern, and to provide a method for manufacturing the same. <P>SOLUTION: The method for manufacturing the semiconductor device includes a step of forming a conductor pattern 1a by partly removing a metal plate 1; a step of adhering the metal plate 1 to a support 2, supplying a first insulating resin material 3 to an opposite surface of the support 2 to the adhered surface, and filling the first insulating resin material 3 in a removed part; a step of releasing the support 2 from the metal plate 1; a step of connecting a semiconductor chip 5 to the conductor pattern 1a; and a step of covering at least a connecting part of the conductor pattern 1a to the semiconductor chip 5 with a second insulating resin 6. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a semiconductor device in which a semiconductor chip is mounted on an interposer substrate and a method for manufacturing the same, and more specifically, while a thin and flat metal plate is used as a starting material, a series of processes are performed to achieve thinness. The present invention relates to a semiconductor device having excellent handling properties and processability and a method for manufacturing the same.

Conventionally, there is a TAB (Tape Automated Bonding) technique as one of semiconductor chip mounting techniques for realizing miniaturization and thinning. In this method, a copper foil lead is formed on a resin film tape, and the lead and an electrode pad of a semiconductor chip are connected via a bump made of metal. For example, see Patent Document 1.
JP-A-6-333999

  However, since TAB tape is based on a resin film, it has flexibility, and when it is thinned to reduce the thickness of a semiconductor device, warping and bending occur, resulting in poor conveyance and productivity. Was low.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a semiconductor device that is thin and excellent in dimensional stability of a conductor pattern and a method for manufacturing the same.

  In the semiconductor device of the present invention, a first insulating resin material is filled between conductor patterns obtained by partially removing a metal plate, a semiconductor chip is bonded to the conductor pattern, and at least the conductor pattern and the semiconductor chip are The junction is covered with a second insulating resin material.

  Further, the method for manufacturing a semiconductor device of the present invention includes a step of partially removing the metal plate to form a conductor pattern, and attaching the metal plate to the support, on the opposite surface of the surface attached to the support. Supplying the first insulating resin material, filling the removed portion of the metal plate with the first insulating resin material, peeling the support from the metal plate, and bonding the semiconductor chip to the conductor pattern And a step of covering at least a joint portion between the conductor pattern and the semiconductor chip with a second insulating resin material.

  In the present invention, the conductor pattern is formed by partially removing the metal plate, and the semiconductor chip is mounted after the conductor pattern is filled with the first insulating resin material. Therefore, the dimensional stability of the conductor pattern A series of processes can be performed with good handleability while maintaining a high value. In addition, since the metal plate is less affected by heat and chemicals than the resin film, the selectivity of the material of the metal plate itself, the heating temperature, the chemicals to be used, etc. is expanded.

  The semiconductor chip may be bonded to the conductor pattern before or after the support is peeled from the conductor pattern.

  Examples of the method for partially removing the metal plate include mechanical processing such as etching, punching and pressing, and laser processing.

  In order to ensure the bonding reliability between the semiconductor chip and the conductor pattern, at least the bonding portion between the conductor pattern and the semiconductor chip is covered with the second insulating resin material. Of course, complete protection of the semiconductor chip may be achieved by covering all of the semiconductor chip with the second insulating resin material.

  A plurality of the semiconductor devices may be stacked. In this case, as an electrical connection method between semiconductor devices, for example, solder bumps, plating bumps, stud bumps, etc. are used as interlayer connection materials to be interposed between conductor patterns of each semiconductor device, or both ends of the conductor patterns are bent. And may function as an interlayer connection material.

  The first insulating resin material may be selectively supplied only between the conductor patterns using, for example, a screen mask. However, when the distance between the conductor patterns becomes narrow, filling with this method becomes difficult. Therefore, for example, first, after supplying the first insulating resin material to the entire surface of the metal plate, the first insulating resin material is polished so as to expose the surface of the conductor pattern. By filling with the first insulating resin material, it is possible to reliably fill the first insulating resin material even when the conductor pattern is narrow. As a method for supplying the first insulating resin material, a varnish-like material may be sprayed or applied, or a film-like material may be attached.

  In addition, if the second insulating resin material is supplied onto the metal plate in a state where the first insulating resin material is semi-cured, and the first and second insulating resin materials are cured together, The reliability of the semiconductor device can be improved by increasing the adhesive force between the second insulating resin materials.

  As a material of the first and second insulating resin materials, a thermosetting resin, a photocurable resin, a thermoplastic resin, or the like can be used.

  According to the present invention, the first insulating resin material is filled between the conductor patterns obtained by partially removing the metal plate, the semiconductor chip is joined to the conductor pattern, and at least the conductor pattern and the semiconductor chip Since the joint portion is covered with the second insulating resin material, a thin semiconductor device having excellent conductor pattern dimensional stability can be obtained by a simple process using existing equipment. As a result, a thin semiconductor device with low cost and excellent reliability can be obtained.

[First Embodiment]
In the present embodiment, a semiconductor device in which a semiconductor chip is bonded to a conductor pattern by a flip chip method and an example of a manufacturing method thereof will be described as an example of a semiconductor chip mounting form.

(Step of FIG. 1A)
A flat thin metal plate 1 is prepared. The material is, for example, copper, copper alloy, 42Alloy (42Ni-58Fe alloy) or the like. The thickness is, for example, 0.1 mm to 0.3 mm.

(Step of FIG. 1B)
After forming an etching resist (not shown) on both surfaces of the metal plate 1, an etching solution such as ferric chloride solution is supplied from both surfaces of the metal plate 1 by a spray method using the etching resist as a mask. Partially etch.

  Thereby, the hole which penetrates the thickness direction partially is formed in the metal plate 1, and the conductor pattern 1a of a desired shape is obtained. That is, the portion of the metal plate 1 that has not been removed by the etching becomes the conductor pattern 1a.

(Step of FIG. 1C)
A support 2 is attached to the lower surface of the metal plate 1, and the first insulating resin material 3 is supplied to the opposite surface of the side on which the support 2 is attached by, for example, a printing method. The support 2 is, for example, an insulating resin film, and the first insulating resin material 3 is made of, for example, an epoxy-based thermosetting resin. The first insulating resin material 3 is supplied onto the support 2 and the conductor pattern 1a in a varnish-like A stage state, and fills the space between the conductor patterns 1a and covers the surface of the conductor pattern 1a.

(Process of FIG. 1D)
After the first insulating resin material 3 is brought into a semi-cured state of the B stage by heating, the surface side thereof is polished by, for example, buffing or belt sander. The polishing of the first insulating resin material 3 is performed until the surface of the conductor pattern 1a is exposed and the surface of the first insulating resin material 3 filling the space between the conductor patterns 1a is flush with the surface of the conductor pattern 1a. Is called.

(Step of FIG. 1E)
The support body 2 is peeled from the metal plate 1, and the other surface of the conductor pattern 1a covered with the support body 2 is also exposed to the outside. The support 2 is, for example, a film whose adhesive strength disappears or decreases when irradiated with ultraviolet rays, and is peeled off when irradiated with ultraviolet rays.

  Then, the metal films 4a and 4b are formed on both surfaces of the conductor pattern 1a exposed to the outside by, for example, a plating method to obtain the interposer substrate 22. The metal films 4a and 4b are made of, for example, Ni, Au, Ag, Sn, Sn-Pb, Sn-Ag, and the like, and play a role of improving the bonding property with a semiconductor chip, a motherboard, and other semiconductor devices.

(Process of FIG. 2F)
The semiconductor chip 5 is mounted on the interposer substrate 22. Specifically, conductive bumps 19 made of, for example, Ni, Au, Ag, Sn, Sn—Pb, Sn—Ag, or the like are formed on each of the plurality of electrode pads formed on the main surface of the semiconductor chip 5. By heating with the conductive bump 19 pressed against the metal film 4a formed on one surface of the conductor pattern 1a, the conductive bump 19 is metal-bonded to the conductor pattern 1a via the metal film 4a. As a result, the semiconductor chip 5 is electrically connected to the conductor pattern 1 a via the conductive bump 19.

  At this time, the metal film 4a improves wettability and bondability between the conductive bump 19 and the conductor pattern 1a, can be bonded at a lower load and lower temperature, and damage to the semiconductor chip 5 can be reduced. .

(Process of FIG. 2G)
The second insulating resin material 6 is supplied between the semiconductor chip 5 and the interposer substrate 22 using, for example, a syringe. The second insulating resin material 6 is made of, for example, an epoxy-based thermosetting resin and is supplied in a varnish-like A stage state. At this time, the first insulating resin material 3 filling the space between the conductor patterns 1a is not yet fully cured and is in a semi-cured state.

  Then, after the second insulating resin material 6 is supplied, the second insulating resin material 6 and the first insulating resin material 3 are heated together to be fully cured to the C stage, and the semiconductor device shown in FIG. 2G. 7 is obtained.

  By leaving the first insulating resin material 3 in a semi-cured state until the step of FIG. 2G, the first insulating resin material 3 is polished in the step of FIG. 1D and the support 2 is peeled off in the step of FIG. 1E. Make it easier. Furthermore, the adhesive force with the 2nd insulating resin material 6 poured between the semiconductor chip 5 and the interposer board | substrate 22 can also be raised, both peeling can be prevented and reliability can be improved.

  In addition, when the second insulating resin material 6 is supplied, it is supplied on the interposer substrate 22 that has already been flattened with the first insulating resin material 3 between the conductor patterns 1a. Sometimes it is not necessary to fill the conductor pattern 1a with the second insulating resin material 6, and it is not necessary to pay much attention to the adjustment of various conditions (viscosity, temperature, etc.), and the process management is facilitated.

  In particular, when the conductor pattern 1a is fine pitched and the space between the conductor patterns 1a is narrowed, it becomes difficult to fill the space between the conductor patterns 1a by the step of supplying an insulating resin material between the semiconductor chip 5 and the interposer substrate 22. Come.

  On the other hand, as in this embodiment, before the semiconductor chip 5 is mounted, the first insulating resin material 3 is supplied in advance so as to cover the conductor pattern 1a, and then unnecessary portions are polished. For example, the insulating resin material can be reliably and easily filled even between the narrow conductor patterns 1a.

  A large number of electrode pads formed on the semiconductor chip 5 are drawn through the conductor pattern 1a to a surface opposite to the bonding surface with the semiconductor chip 5 in the conductor pattern 1a with a larger pitch. . Since such a structure can be realized by using the front and back of the single-layer conductor pattern 1a, the entire semiconductor device 7 can be thinned.

  Moreover, in this embodiment, since the rigid metal plate 1 is used as a starting material, and processing such as patterning is performed on the metal plate 1 or the semiconductor chip 5 is joined, compared to the TAB tape, Expansion and warping during handling can be suppressed, and the fine pitch conductor pattern 1a can be handled with high dimensional stability.

  Furthermore, the metal plate 1 has fewer restrictions in heat treatment and treatment using chemicals than organic materials, and has a high degree of freedom in selecting materials, heating, and pressure conditions.

  If the material of the metal plate 1 is 42Alloy (42Ni-58Fe alloy) having a value close to the linear expansion coefficient of silicon often used as the material of the semiconductor chip 5, the linear expansion with the semiconductor chip 5 during the thermal process is performed. It is possible to suppress peeling of the joint (conductive bump 19) due to the difference in coefficient and cracks generated in the second insulating resin material 6.

[Second Embodiment]
Next, a second embodiment of the present invention will be described. In addition, the same code | symbol is attached | subjected to the same component as the said 1st Embodiment, and the detailed description is abbreviate | omitted.

  In the present embodiment, a semiconductor device in which a semiconductor chip is bonded to a conductor pattern by a wire bonding method and a manufacturing method thereof will be described. 1A to 1E are performed in the same manner as in the first embodiment. And in this embodiment, the following processes are continued after the process of FIG. 1E.

(Process of FIG. 3F)
The semiconductor chip 5 is mounted on the interposer substrate 22 using, for example, a die bonding paste such as a thermosetting resin, and a plurality of electrode pads formed on the main surface of the semiconductor chip 5 using a bonding wire 8 and a conductor The metal film 4a formed on the surface of the pattern 1a is joined. Thereby, the semiconductor chip 5 is electrically connected to the conductor pattern 1 a via the bonding wire 8.

(Process of FIG. 3G)
The interposer substrate 22 that has been bonded to the semiconductor chip 5 is set in a mold, and liquefied, for example, an epoxy-based thermosetting resin is poured into the mold cavity to perform molding. Thereafter, after the poured resin is thermally cured together with the semi-cured first insulating resin material 3, the interposer substrate 22 is released from the mold, thereby joining the semiconductor chip 5 and the conductor pattern 1a. A second insulating resin material 9 is formed to cover the entire semiconductor chip 5 including the bonding portion between the bonding wire 8 and the electrode pad of the semiconductor chip 5 and the bonding portion between the bonding wire 8 and the conductor pattern 1a.

  Note that the number of semiconductor chips 5 accommodated in the second insulating resin material 9 is not limited to one, and may be two semiconductor chips 5a and 5b as in the semiconductor device 18 shown in FIG. The semiconductor chip 5b is bonded onto the semiconductor chip 5a with a die bonding paste, and the electrode pads of each of the semiconductor chips 5a and 5b are connected to the conductor pattern 1a via bonding wires 8. The number of semiconductor chips is not limited to two and may be more than that.

[Third Embodiment]
Next, a third embodiment of the present invention will be described. In addition, the same code | symbol is attached | subjected to the same component as the said 1st Embodiment, and the detailed description is abbreviate | omitted.

  In this embodiment, as shown in FIG. 4A, the two semiconductor devices 7 obtained in the first embodiment are immersed in a solder bath in a state where they are accommodated in a tray 11, for example. The two semiconductor devices 7 are positioned in the tray 11 in a state where both end portions of the conductor pattern 1a to be connected to each other are opposed to each other.

  When the tray 11 is immersed in the solder bath in this state, the metal film 4b formed on the lower surface of the conductor pattern 1a of the upper semiconductor device 7 and the lower semiconductor device 7 at both ends of the opposing conductor pattern 1a. Each metal pattern 4a formed on the upper surface of the conductor pattern 1a is wetted.

  When the tray 11 is pulled up from the solder bath, solder is interposed between the opposite ends of the conductor pattern 1a facing each other due to surface tension, and this is an interlayer connection material that connects the conductor patterns 1a of the upper and lower semiconductor devices 7 together. 12 functions. As a result, a semiconductor device 13 is obtained in which the two semiconductor chips 5 stacked one above the other are electrically connected via the interlayer connecting material 12.

  Alternatively, as shown in FIG. 9, both end portions of the conductor pattern 1 a of the semiconductor device 20 a stacked on the upper side are bent to form the interlayer connection material 23, and the lower end portion of the interlayer connection material 23 is placed on the lower side via the solder 21. A semiconductor in which two semiconductor chips 5 stacked one above the other are bonded electrically to each other through an interlayer connecting member 23 by bonding to the metal film 4a formed on the surface of the conductor pattern 1a of the semiconductor device 20b. The device 20 may be obtained. The number of semiconductor chips is not limited to two and may be more than that.

[Fourth Embodiment]
Next, a fourth embodiment of the present invention will be described. In addition, the same code | symbol is attached | subjected to the same component as the said 1st Embodiment, and the detailed description is abbreviate | omitted.

(Step of FIG. 5A)
A flat thin metal plate 14 is prepared. The material is, for example, copper, copper alloy, 42Alloy (42Ni-58Fe alloy) or the like. The thickness is, for example, 0.1 mm to 0.3 mm.

(Step of FIG. 5B)
An etching resist 15a is formed on one surface of the metal plate 14 and an etching resist 15b is formed on the other surface, and then the second chloride is formed from both sides of the metal plate 14 by a spray method or the like using the etching resists 15a and 15b as a mask. An etching solution such as an iron solution is supplied to partially etch the metal plate 14. The etching resists 15a and 15b have different patterns.

(Step of FIG. 5C)
As a result, a hole that partially penetrates the thickness direction is formed in the metal plate 14, and the conductor pattern 16a is formed on one surface and the conductor pattern 16b having a pattern shape different from the conductor pattern 16a is formed on the other surface. The

(Step of FIG. 5D)
The support 2 is attached to the lower surface of the metal plate 14, and the first insulating resin material 3 is supplied to the opposite surface of the side on which the support 2 is attached by, for example, a printing method. The support 2 is, for example, an insulating resin film, and the first insulating resin material 3 is made of, for example, an epoxy-based thermosetting resin. The first insulating resin material 3 is supplied onto the support 2 and the metal plate 14 in a varnish-like A stage state, and fills the space between the conductor patterns 16a and 16b and covers the surface of the conductor pattern 16a.

(Step of FIG. 6E)
After the first insulating resin material 3 is heated to be in a semi-cured state of the B stage, the surface side thereof is polished by, for example, buffing or a belt sander. The polishing of the first insulating resin material 3 is such that the surface of the conductor pattern 16a is exposed and the surface of the first insulating resin material 3 filling between the conductor patterns 16a and 16b is flush with the surface of the conductor pattern 16a. It is done until.

(Step of FIG. 6F)
The support body 2 is peeled from the metal plate 14, and the surface of the conductor pattern 16b covered with the support body 2 is also exposed to the outside. The support 2 is, for example, a film whose adhesive strength disappears or decreases when irradiated with ultraviolet rays, and is peeled off when irradiated with ultraviolet rays.

  Then, the metal films 4a and 4b are formed on both surfaces of the conductor patterns 16a and 16b exposed to the outside by, for example, a plating method, and the interposer substrate 24 is obtained. The metal films 4a and 4b are made of, for example, Ni, Au, Ag, Sn, Sn-Pb, Sn-Ag, and the like, and play a role of improving the bonding property with a semiconductor chip, a motherboard, and other semiconductor devices.

(Step of FIG. 6G)
The semiconductor chip 5 is mounted on the interposer substrate 24. Specifically, conductive bumps 19 made of, for example, Ni, Au, Ag, Sn, Sn—Pb, Sn—Ag, or the like are formed on each of the plurality of electrode pads formed on the main surface of the semiconductor chip 5. By heating with the conductive bump 19 pressed against the metal film 4a formed on the surface of the conductor pattern 16a, the conductive bump 19 is metal-bonded to the conductor pattern 16a via the metal film 4a. As a result, the semiconductor chip 5 is electrically connected to the conductor patterns 16 a and 16 b through the conductive bumps 19.

  Further, the second insulating resin material 6 is supplied between the semiconductor chip 5 and the interposer substrate 24 using, for example, a syringe. The second insulating resin material 6 is made of, for example, an epoxy-based thermosetting resin and is supplied in a varnish-like A stage state. At this time, the first insulating resin material 3 is not yet fully cured and is in a semi-cured state.

  Then, after the second insulating resin material 6 is supplied, the second insulating resin material 6 and the first insulating resin material 3 are heated together and finally cured to the C stage, as shown in FIG. 6G. Thus, the semiconductor device 17 having different pattern shapes is obtained between the conductor pattern 16a serving as the joint surface of the semiconductor chip 5 and the conductor pattern 16b serving as the joint surface to the mother board or another semiconductor device.

  When obtaining the conductor patterns 16a and 16b, not only etching but also a mechanical processing method may be used.

  Specifically, the metal plate 14 shown in FIG. 7A is first partially punched to partially form through holes as shown in FIG. 7B. Then, by pressing the hatched portions in FIG. 7B, conductor patterns 16a and 16b having different pattern shapes can be formed on both surfaces of the metal plate 14, as shown in FIG. 7C.

  The embodiment of the present invention has been described above. Of course, the present invention is not limited to this, and various modifications can be made based on the technical idea of the present invention.

  In the semiconductor device 7 according to the first embodiment shown in FIG. 2G, the second insulating resin material 6 may be formed so as to cover the entire semiconductor chip 5.

It is sectional drawing which shows the manufacturing process of the semiconductor device which concerns on the 1st Embodiment of this invention. FIG. 2 is a cross-sectional view showing a step that follows FIG. 1. It is sectional drawing which shows the manufacturing process of the semiconductor device which concerns on the 2nd Embodiment of this invention. It is sectional drawing which shows the manufacturing process of the semiconductor device which concerns on the 3rd Embodiment of this invention. It is sectional drawing which shows the manufacturing process of the semiconductor device which concerns on the 4th Embodiment of this invention. FIG. 6 is a cross-sectional view showing a step that follows FIG. 5. It is sectional drawing which shows the manufacturing process of the semiconductor device by a modification. It is sectional drawing of the semiconductor device by another modification. It is sectional drawing of the semiconductor device by another another modification.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Metal plate, 1a ... Conductor pattern, 2 ... Support body, 3 ... 1st insulating resin material, 5 ... Semiconductor chip, 5a, 5b ... Semiconductor chip, 6 ... 2nd insulating resin material, 7 ... Semiconductor device, DESCRIPTION OF SYMBOLS 9 ... 2nd insulating resin material, 10 ... Semiconductor device, 13 ... Semiconductor device, 14 ... Metal plate, 16a, 16b ... Conductor pattern, 17 ... Semiconductor device, 18 ... Semiconductor device, 20, 20a, 20b ... Semiconductor device.

Claims (5)

A first insulating resin material is filled between conductive patterns obtained by partially removing the metal plate, a semiconductor chip is bonded to the conductive pattern, and at least a bonding portion between the conductive pattern and the semiconductor chip is the first. A semiconductor device characterized by being covered with an insulating resin material. A first insulating resin material is filled between conductive patterns obtained by partially removing the metal plate, a semiconductor chip is bonded to the conductive pattern, and at least a bonding portion between the conductive pattern and the semiconductor chip is the first. A semiconductor device, wherein a plurality of semiconductor devices covered with two insulating resin materials are stacked, and the conductor patterns are electrically connected to each other through an interlayer connecting material. A step of partially removing the metal plate to form a conductor pattern;
A step of attaching the metal plate to a support, supplying a first insulating resin material to the surface opposite to the surface attached to the support, and filling the removed portion with the first insulating resin material. When,
Peeling the support from the metal plate;
Bonding a semiconductor chip to the conductor pattern;
A method of manufacturing a semiconductor device, comprising: a step of covering at least a joint portion between the conductor pattern and the semiconductor chip with a second insulating resin material. After supplying the first insulating resin material to the entire surface of the metal plate, the first insulating resin material is polished so as to expose the surface of the conductor pattern, whereby the first conductor pattern is between the first conductor patterns. The semiconductor device manufacturing method according to claim 3, wherein the semiconductor device is filled with a first insulating resin material. The second insulating resin material is supplied onto the metal plate in a state in which the first insulating resin material is semi-cured, and the first and second insulating resin materials are cured together. Item 4. A method for manufacturing a semiconductor device according to Item 3.

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