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JP2005005435A - Mounting substrate and its manufacturing method - Google Patents

Mounting substrate and its manufacturing method Download PDF

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Publication number
JP2005005435A
JP2005005435A JP2003166347A JP2003166347A JP2005005435A JP 2005005435 A JP2005005435 A JP 2005005435A JP 2003166347 A JP2003166347 A JP 2003166347A JP 2003166347 A JP2003166347 A JP 2003166347A JP 2005005435 A JP2005005435 A JP 2005005435A
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JP
Japan
Prior art keywords
conductor pattern
transfer sheet
pattern
layer
external terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2003166347A
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Japanese (ja)
Inventor
Hideko Inoyae
英子 猪八重
Ken Orui
研 大類
Yuji Nishitani
祐司 西谷
Hidetoshi Kusano
英俊 草野
Hiroshi Asami
浅見  博
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP2003166347A priority Critical patent/JP2005005435A/en
Publication of JP2005005435A publication Critical patent/JP2005005435A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

Landscapes

  • Manufacturing Of Printed Wiring (AREA)
  • Combinations Of Printed Boards (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a thin mounting substrate also having excellent dimensional stability, and a manufacturing method for the substrate. <P>SOLUTION: The mounting substrate has a process in which a conductor pattern 12 is formed on one surface of a transfer sheet 10, a process in which an air gap 16 is formed at an insulating layer 14, a process in which the sheet 10 and the layer 14 are laminated with each other so as to hold the pattern 12 and the sheet 10 is removed, a process in which an element 17 is housed in the air gap 16 while being electrically connected to the pattern 12, and a process in which external terminals 22 electrically connected to the element 17 are joined with the reverse surface of the connecting surface of the element 17 in the pattern 12. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
本発明は、導体パターンの形成を転写シートを用いた転写法によって行う実装基板及びその製造方法に関し、更に詳しくは、1層の導体パターンの一表面に素子が実装され、反対側の他方の面に外部端子が接合された実装基板及びその製造方法に関する。
【0002】
【従来の技術】
近年、携帯電話機やPDA(Personal Digital Assistant)、ノート型コンピュータ等の電子機器の小型化、高機能化に伴い、これらを構成する電子部品の高密度実装化が不可欠となっている。従来より、電子部品の高密度実装化は、電子部品の小型化による部品端子のファインピッチ化や、電子部品が実装される配線基板上の導体パターンの微細化等によって進められてきた。
【0003】
また、近年においては、三次元的な配線の引き回しを可能とする多層配線化の開発が進められ、更には、その多層配線基板に対し、チップ抵抗やチップコンデンサ等あるいは半導体ベアチップ等の素子を内蔵して、実装効率の更なる向上を図った素子実装基板の開発も進められている。
【0004】
また、配線基板の導体パターンを形成する方法として、従来より、転写シートを用いた転写法が知られている。この転写法による配線基板の製造プロセスは、主として、転写シートの一表面に導体パターンを形成するパターン形成工程と、形成した導体パターンを転写シートごと絶縁層へ貼り合わせた後、転写シートを剥離するパターン転写工程とを有している。
【0005】
この種の従来技術として、例えば特許文献1が知られている。以下、図10を参照して、従来の実装基板の製造方法について説明する。
【0006】
【特許文献1】
特開平10−107445号公報
【0007】
先ず、図10(a)に示すように、絶縁基材1の表面に導体パターン2が形成された配線基板を作製または準備する。
【0008】
次に、図10(b)に示すように、絶縁基材1の表面に絶縁性スラリーを塗布して絶縁層3を形成する。
【0009】
次に、図10(c)に示すように、絶縁層3に導体パターン2と連絡するビアホール4をレーザ加工等によって形成し、形成したビアホール4の内部に導電ペースト5を充填する。
【0010】
次に、図10(d)に示すように、絶縁層3に対し、あらかじめ転写シート7の上に形成しておいた別の導体パターン6を転写し、導電ペースト5を介して、2つの導体パターン2、6を接続する。
【0011】
転写シート7は、ポリエチレンテレフタレート(PET)等の合成樹脂材料を主体として構成されている。導体パターン6は、この転写シート7の上に貼着または蒸着された導体層をウェットエッチング法によって所定形状にパターニングして形成される。転写シート7から絶縁層3への導体パターン6の転写は、導体パターン6と絶縁層3及び転写シート7との間の密着力の差を利用して行われる。
【0012】
【発明が解決しようとする課題】
上記従来例では、導体パターンに素子を実装し、なおかつその素子の電極パッドを再配置して引き出すための外部端子を形成しようとする場合には、ビアで接続された2つの導体パターンを必要とし、実装基板全体としての薄型化に限界がある。
【0013】
本発明は上述の問題に鑑みてなされ、その目的とするところは、薄く且つ寸法安定性にも優れた実装基板及びその製造方法を提供することにある。
【0014】
【課題を解決するための手段】
以上の課題を解決するにあたり、本発明の実装基板では、転写シートから転写された導体パターンが空隙部を有する絶縁層に貼り合わされ、その導体パターンに電気的に接続して空隙部に素子が収容され、導体パターンにおいて素子の接続面の反対面に素子と電気的に接続する外部端子が接合されていることを特徴としている。
【0015】
また、以上の課題を解決するにあたり、本発明の実装基板の製造方法は、転写シートの一表面に導体パターンを形成する工程と、絶縁層に空隙部を形成する工程と、導体パターンを挟むように転写シートと絶縁層とを互いに貼り合わせた後、転写シートを除去するパターン転写工程と、導体パターンに電気的に接続させて空隙部に素子を収容する工程と、導体パターンにおいて素子の接続面の反対面に素子と電気的に接続する外部端子を接合させる工程を有することを特徴としている。
【0016】
本発明では、導体パターンと、絶縁層とはそれぞれ独立した工程にて形成された後、互いに貼り合わされ、導体パターンを支持していた転写シートを剥離すれば、導体パターンにおいて絶縁層が貼り合わされた面の反対面は全面が露出する。導体パターンの他方の面は絶縁層の空隙部に露出する。したがって、それぞれ露出した面に素子、あるいは外部端子を接合させることで、1層の導体パターンの表裏面それぞれに素子あるいは外部端子が接合された実装基板が得られ、2層の導体パターンがビアを介して接続された構造に比べ実装基板を薄くできる。
【0017】
なお、導体パターンにおいて外部端子が接合される面にも素子を接合させてもよい。あるいは、その素子の代わりに、より多くの外部端子を接合させてフルグリッド化を図ってもよい。
【0018】
また、複数の実装基板どうしを積み重ねたスタック構造とすることも可能である。具体的には、ある実装基板の外部端子を、他の実装基板の絶縁層を貫通させてこの実装基板の導体パターンに接合させるようにして積み重ね、これら積み重ねられた実装基板の導体パターンどうし、あるいは素子どうしを電気的に接続する。
【0019】
転写シートは、導体パターンの平面度を維持するため及びハンドリング性を向上させるための支持体として機能する。したがって、この要求に応えるべき強度等の機械的性質及び耐熱温度等の材料学的性質を具備するように構成される。
【0020】
転写シートは、最終的には導体パターンから分離されて残らない。その分離を容易とするための剥離層を有していることが好ましい。剥離層としては、例えば複数の金属層を積層させた構成が挙げられる。この構成の場合には、例えば300℃ほどの加熱工程を経ても寸法変化や変質などが生じないという利点がある。
【0021】
また、他の剥離層の構成として、剥離されるべき表面の所定部位に離型剤が塗布された樹脂層が挙げられる。更に、他の剥離層として熱発泡層を用いてもよく、この場合、所定温度への加熱処理により熱発泡層を発泡させて転写用支持体の剥離が可能である。
【0022】
あるいは、剥離層は設けずに、転写シートを溶解させて、導体パターンから分離させてもよい。
【0023】
また、転写シートに導電性をもたせれば、アディティブ法によるパターンめっき技術を用いてファインピッチな導体パターンを形成できる。
【0024】
また、他の基板などへの接合部として機能する外部端子の付け根部がリング状の樹脂材で囲まれた構成とすれば、特に多ピン化に伴って寸法の小さな外部端子の接合強度をその樹脂材で補強することができる。
【0025】
その補強用の樹脂材は外部端子全体を覆うのではなく、その付け根部をリング状に囲むので、接合後に不良や異常が検出されたものを取り換えるリペアを行うことが可能になる。また、溶融した樹脂材はフィレット状に外部端子の付け根部へとぬれる傾向にある。ここで、フィレット状とは、樹脂材の厚さが外部端子の付け根部から先端部側へといくにつれて徐々に薄くなっていく形状である。このようなフィレット状の樹脂材で補強されると、外部端子にかかる熱応力が一点にかからず分散するため高い接合信頼性が得られる。フィレット状とするには、従来より一般的に行われている加熱リフロー装置及び加熱条件にて容易に実現できる。
【0026】
また、外部端子の付け根部を囲む上記樹脂材は、互いに面一とされた導体パターン及びこれら導体パターン間を埋める平坦化層の上に形成されていることが好ましい。樹脂材の供給箇所が平坦であり凹凸がないと、くぼみに樹脂材が流れてしまうことがなく、実装基板の反りを抑えるために樹脂材の供給量を少なくしても、より多くの樹脂材を外部端子の付け根部へのぬれ上がりに供させることができ、接合部の強度確保に必要な安定した高さの樹脂材でもって補強が行える。
【0027】
【発明の実施の形態】
[第1の実施の形態]
以下、本発明の一例としての第1の実施の形態に係る実装基板の製造方法及び実装基板について説明する。
【0028】
(図2Aの工程)
転写シート10の一表面に剥離層11を形成する。図3に、この積層体の構成の詳細を示す。
【0029】
転写シート10は例えばCuからなり、ハンドリングに必要とされる機械的性質または材料学的性質を具備するように構成される。厚さは、例えば140μmほどである。
【0030】
剥離層11は、2層の金属層11a、11bから構成される。Cr層(例えば厚さ0.01μm)11aは転写シート10に積層され、このCr層11aに(Ni−Co)層(例えば厚さ0.15μm)11bが積層される。何れも、転写シート10を給電体とした電気めっき法で形成される。
【0031】
Cr層11aと(Ni−Co)層11bは、例えば320℃ほどの温度でも金属接合しない特性を有し、したがって、後工程で熱プレスを受けても簡単に剥離することができる。この場合、Cr層11aと(Ni−Co)層11bとの境界で剥離可能である。
【0032】
(図2Bの工程)
剥離層11上に導体パターン12を形成する。具体的には、先ず、剥離層11の表面である(Ni−Co)層11bの表面にフォトレジスト膜を形成後、そのフォトレジスト膜に露光及び現像を施して、フォトレジスト膜を所望の形状にパターニングしてめっきレジスト(図示せず)を形成する。
【0033】
続いて、転写シート10を銅の電解浴中に浸漬し、カソード電極に接続して銅の電気めっき膜として導体パターン12を析出させた後、めっきレジストを除去する。
【0034】
一般に、ウェットエッチング法によって導体膜の不要部分を除去し導体パターンを形成する方法(サブトラクティブ法)に比べて、電気めっき法によって必要な部分のみ導体膜を析出させて導体パターンを形成する方法(アディティブ法)の方が微細なパターンを形成することができるので、本実施の形態によれば、ラインアンドスペース(L/S)が例えば10μm/10μmといったファインピッチな導体パターン12を高精度に形成することができる。
【0035】
また、樹脂フィルムなどに比べて厚く且つ寸法変化の小さいCuからなる転写シート10に導体パターン12を形成するので、ハンドリング性が向上し、更に導体パターン12が薄いものであっても反りなどを抑制でき寸法精度も安定させることができる。
【0036】
(図2Cの工程)
導体パターン12を覆うように剥離層11上にペースト状の絶縁性樹脂材を塗布し、その樹脂材を加熱硬化させた後、研磨して導体パターン12の表面を露出させる。これにより、導体パターン12間を埋め且つ導体パターン12表面と面一な平坦化層13が剥離層1の上に形成され、転写シート10の一表面が平坦化される。
【0037】
(図4Dの工程)
上記導体パターン12を転写シート10ごと絶縁層14に貼り合わせる。絶縁層14は、例えば樹脂やセラミックなどからなり、その一表面側には絶縁性の接着層15が積層されている。
【0038】
絶縁層14及び接着層15には、厚さ方向を貫く空隙部16が形成されている。例えば、ドリルやルータを用いた加工、金型パンチ、レーザ加工などの公知の穿孔加工技術が適用可能である。
【0039】
導体パターン12及び平坦化層13の面一な表面に接着層15が接着されて、転写シート10と絶縁層14とが互いに貼り合わせられる。例えば、熱プレスにて貼り合わせは行われる。接着層15としては、このときに空隙部16に流れ出してしまわないように流動性が少なく形状維持性の高い例えばエポキシ系のものが用いられる。
【0040】
(図4Eの工程)
空隙部16に素子17を収容する。素子17の下面に形成された電極パッドには導電性バンプ17aが形成され、この導電性バンプ17aが導体パターン12の表面に押圧された状態で加熱されて金属接合される。これにより、素子17は、導電性バンプ17aを介して導体パターン12と電気的に接続される。素子17の実装後、空隙部16にアンダーフィル樹脂材18が充填され素子17と導体パターン12との接合部の保護が図られる。
【0041】
なお、導電性バンプ17aの表面や、これが接合される導体パターン12の表面に、はんだ、錫、ニッケル、金、銀などを付着させたうえで両者の接合を行っても良い。この場合には、導電性バンプ17aと導体パターン12との間のぬれ性や接合性を高めて、より低荷重、低温での接合が行え、素子17へのダメージを軽減化が図れる。
【0042】
(図5Fの工程)
転写シート10を剥離する。具体的には、図3に示す剥離層11におけるCr層11aと(Ni−Co)層11bとの境界面で剥離される。例えば、その境界面に切れ込みを入れて剥離する。Cr層11a及び(Ni−Co)層11bは、絶縁層14との貼り合わせ工程時の熱プレスによる熱ストレスを受けても互いに金属接合せず簡単に剥離が可能である。
【0043】
(図5Gの工程)
導体パターン12及び平坦化層13の面一な表面上には、(Ni−Co)層11bが残ることになるがこれを例えば過酸化水素系のエッチング液にてウェットエッチングして除去する。
【0044】
(図6Hの工程)
転写シート10及び剥離層11が除去された、導体パターン12及び平坦化層13の面一な表面上に樹脂材20を供給する。樹脂材20の供給方法としては、例えば溶媒により希釈した液状の樹脂材をスプレー法により塗布し乾燥させる方法や、ペースト状の樹脂材を印刷あるいはスピンコート法により供給する方法、あるいは完全硬化していない例えばBステージ状態のフィルム状の樹脂材を貼り付けることにより供給する方法などが挙げられるが、必要量を均一に供給できる方法であれば、特にこれらには限定されない。ここで、必要量とは、後述するフィレットを接合強度確保に必要な高さとすることができる量である。
【0045】
本実施の形態では、例えば、紫外線硬化性を有し且つ活性剤を含有した樹脂材20を用いる。具体的には、少なくともアクリロイル基又はメタクリロイル基を含有するフェノールノボラックと、この硬化剤として機能する樹脂と、光重合開始剤とを配合した樹脂材20を用いる。フェノールノボラックのフェノール性水酸基は活性剤として機能し、その還元作用によりはんだ及び金属表面の酸化物などの汚れを除去したり、再酸化を防止したりして、後述する外部端子の接合面である導体パターン12の表面に対するはんだや溶融金属のぬれ性を高める。なお、活性剤のこの作用は樹脂材20が硬化すると失われる。
【0046】
(図6Iの工程)
上記樹脂材20において、導体パターン12上における外部端子の接合面となる部分公知のフォトリソグラフィ及びエッチングにより、レジストマスク21を形成する。その他の部分は露出している。そして、この状態で紫外線を照射する。
【0047】
これにより、レジストマスク21で覆われていない部分の樹脂材20aが硬化する。この樹脂材20aは、導体パターン12間、あるいは導体パターン12と外部端子とのショートを防ぐ絶縁性保護膜(ソルダレジスト)として機能する。したがって、別途、ソルダレジストを形成する必要がなくなり工程が簡略化できる。
【0048】
(図6Jの工程)
レジストマスク21を除去した後、未硬化のままとなっている樹脂材20がその表面上に存在する導体パターン12上に、球状の外部端子22を配置する。外部端子22の材質は特に限定されず、Sn−Pb、Sn−Ag、Sn−Ag−Cu、Sn−Zn、Sn−Zn−Biなど公知の合金組成のものが用いられる。
【0049】
また、図9に示すように、例えば樹脂材料からなるコア部48aを内包する外部端子48を用いるようにしてもよい。コア部48aの表面は、金属層48bとはんだめっき層48cからなる導電性の表層部でもって被覆されている。内包されたコア部48aにより、外的応力を外部端子全体で受けるため、接合部へのストレスが軽減される。コア部48aは、応力緩和性を持ち粒径が揃っていればよく、樹脂に限らずゴムや金属であってもよい。
【0050】
次に、上記外部端子22を搭載した実装基板をリフロー炉に投入して加熱する。導体パターン12上に配置された外部端子22は自重によって導体パターン12表面と接触し、更に加熱を受けて溶融して、未硬化の樹脂材20をおしのけるようにして、導体パターン12表面にぬれ広がっていく。これにより、外部端子22と導体パターン12とが金属接合される。
【0051】
このリフロー時、外部端子22が配置されている箇所の樹脂材20は未硬化であるため、上述した活性剤による金属活性作用を有しており、別途フラックスを塗布しなくても外部端子22と導体パターン12とのぬれ性を向上させて接合性を高めることができる。
【0052】
また、このときの加熱により、その未硬化の樹脂材20は、図1に示すように、外部端子22の付け根部(導体パターン12との接合部側の部分)にリング状にぬれ上がって、その付け根部を囲むフィレット23を形成した後、更なる加熱を受けて硬化される。
【0053】
導体パターン12間を平坦化層13が埋めて、外部端子22が接合される表面が平坦化されているために、フィレット23の形成に際して、未硬化の樹脂材20が導体パターン12間に流れてしまうことがなく、よってその分、外部端子22の付け根部にぬれ上がる量を多くできる。
【0054】
この結果、接合面と絶縁層表面との間に段差があり平坦化されていない場合に比べて、(補強樹脂材の供給量を同じとした場合)フィレットの高さを高くすることができ、外部端子22の接合強度を向上させることができる。
【0055】
光硬化性を有し、更に活性剤を含有した樹脂材20はその特性上、フィラーなどをあまり混入できず硬化収縮が比較的大きい傾向にある。したがって、実装基板の反りを抑える意味でなるべく樹脂材20の供給量は少なくしたい。本実施の形態では、上述したように樹脂材20の供給面は平坦化されているので、少ない供給量としつつも強度確保に必要なフィレット高さを実現できる。強度確保に必要なフィレット高さは、樹脂材の材質や、外部端子22の材質や大きさなどによって変わってくるが、例えば外部端子22の高さの1割以上あれば十分である。
【0056】
最後に個片化処理を行い、図1に示すように、単層の導体パターン12の一方の面に素子17が実装され、反対側の他方の面に外部端子22が接合された実装基板25が得られる。
【0057】
外部端子22は、素子17の実装された面の反対面に接合されるので、素子17に重なる位置にも配置でき、すなわち、実装基板25の裏面全面を使ったフルグリッド化が可能となる。これにより、素子17の電極パッド数が多いものであっても、その電極パッド間のピッチよりも拡大されたピッチでもって多数の外部端子22を引き出す(再配置する)ことができる。あるいは、1つ1つの外部端子22の寸法を大きくでき、外部端子22を介しての他の基板との接合信頼性を高めることができる。
【0058】
また、素子17の実装面側に、素子17をよけるようにして素子17の左右に外部端子を形成する構造に比べ、平面寸法を小さくできる。更に、素子17の実装面側に外部端子を形成する構造では、絶縁層14に導体パターン12に達する貫通孔を形成してその貫通孔に外部端子を埋め込むことが必要になり、作業性が悪く歩留まり低下の原因になり得るが、本実施の形態では、露出している導体パターン12表面にそのまま配置するので、作業性良く行える。
【0059】
また、導体パターン12の形成に際しては、厚く平らな転写シート10を出発材とし、アディティブ法によるパターンめっきによって、通常の半導体インターポーザ基板やTAB(tape automated bonding)テープでは不可能な10μm以下の微細な導体パターン12を形成することが可能となる。
【0060】
更に、転写シート10はハンドリング性や寸法変化に問題のない機械的強度や材料的特性を有するので、非常に薄い導体パターン12を高精度に形成できる。そして、最終的には、転写シート10は剥離されるので、結果として100μm以下の薄い実装基板25が得られる。
【0061】
また、転写シート10、剥離層11、及び導体パターン12は全て金属であるので、図4Dに示す絶縁層14との貼り合わせ工程の熱プレス時、材料の選択や加熱、加圧条件などに制約を受けることがない。
【0062】
[第2の実施の形態]
次に本発明の第2の実施の形態について説明する。なお、上記第1の実施の形態と同じ構成部分には同一の符号を付し、その詳細な説明は省略する。
【0063】
図7に示すように、本実施の形態に係る実装基板35では、素子17の実装面の反対面に、外部端子22及び別の素子37を実装させている。素子37はその電極パッドに形成された導電性バンプ37aを介して導体パターン12と電気的に接続されている。また、導電性バンプ37aと導体パターン12との接合部を保護するためアンダーフィル樹脂38が充填されている。
【0064】
[第3の実施の形態]
次に本発明の第3の実施の形態について説明する。なお、上記第1の実施の形態と同じ構成部分には同一の符号を付し、その詳細な説明は省略する。
【0065】
本実施の形態では、図8に示すように、上記第1の実施の形態で得られた実装基板の絶縁層14に貫通孔を形成してスタック用の実装基板25’として、この実装基板25’に、3つの実装基板40a〜40cを重ねている。
【0066】
実装基板40cの外部端子22は、実装基板25’の絶縁層14に形成された貫通孔内に入り込んで実装基板25’の導体パターン12に接合し、実装基板40bの外部端子22は、実装基板40cの絶縁層14に形成された貫通孔内に入り込んで実装基板40cの導体パターン12に接合し、実装基板40aの外部端子22は、実装基板40bの絶縁層14に形成された貫通孔内に入り込んで実装基板40bの導体パターン12に接合している。これ以上の数の実装基板を重ねて、より多層化を図ってもよい。
【0067】
また、図9に示すような、例えば樹脂材料からなるコア部48aを内包する外部端子48を用いれば、絶縁層14の貫通孔を介した接続を確実にすることができると共に、各外部端子の高さばらつきを吸収でき、各実装基板間のギャップの均一化が図れる。例えば、外部端子としてはんだを用いた場合にははんだの流れなどにより外部端子の高さにばらつきが生じ実装基板が傾いてしまう、更には貫通孔の底部に露出する導体パターンに外部端子が届かずに接続が不良となるおそれがある。
【0068】
以上、本発明の各実施の形態について説明したが、勿論、本発明はこれらに限定されることなく、本発明の技術的思想に基づいて種々の変形が可能である。
【0069】
転写シートとしては、金属に限らず、ガラスや半導体ウェーハなどであってもよい。この場合、その転写シートに無電解めっき法あるいはスパッタリング法にて、例えばNi層、(Ni−P)層、Cr層などを剥離層として形成する。
【0070】
また、剥離層としては、図3に示す構成に限らず、例えば、Cr層1層で構成したり、あるいはNi層1層で構成したり、あるいはCr層と(Ni−Cr)層との2層構造、Cr層とNi層との2層構造であってもよい。
【0071】
転写シート10の剥離は、絶縁層14との貼り合わせ後、素子17の実装前に行ってもよい。
【0072】
素子としては、ベアチップ状のものに限らず、パッケージングされた部品、チップ抵抗、チップコンデンサなどであってもよい。
【0073】
【発明の効果】
以上述べたように、本発明によれば、転写シートから転写された導体パターンが空隙部を有する絶縁層に貼り合わされ、その導体パターンに電気的に接続して空隙部に素子が収容され、導体パターンにおいて素子の接続面の反対面に素子と電気的に接続する外部端子が接合されているので、2層の導体パターン及びこれらを接続するビアを形成しなくても、1層の導体パターンに対して素子と外部端子とをそれぞれ反対面に実装させることができ、実装基板の薄型化が図れる。また、外部端子を、素子の実装されていない面に接合させることで、素子に妨げられることなく、より多くの外部端子の配置が可能になる。
【図面の簡単な説明】
【図1】本発明の第1の実施の形態に係る実装基板の断面図である。
【図2】同第1の実施の形態に係る実装基板の製造工程断面図である。
【図3】図2における要部の拡大断面図である。
【図4】図2に続く製造工程断面図である。
【図5】図4に続く製造工程断面図である。
【図6】図5に続く製造工程断面図である。
【図7】本発明の第2の実施の形態に係る実装基板の断面図である。
【図8】本発明の第3の実施の形態に係る実装基板の断面図である。
【図9】外部端子の変形例の断面図である。
【図10】従来例の実装基板の製造工程断面図である。
【符号の説明】
10…転写シート、11…剥離層、12…導体パターン、13…平坦化層、14…絶縁層、16…空隙部、17…素子、22…外部端子、23…フィレット、25…実装基板、25’…実装基板、35…実装基板、37…素子、40a〜40c…実装基板。
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a mounting substrate in which a conductor pattern is formed by a transfer method using a transfer sheet, and a method for manufacturing the same. More specifically, an element is mounted on one surface of a one-layer conductor pattern and the other surface on the opposite side. The present invention relates to a mounting substrate in which external terminals are bonded to each other and a manufacturing method thereof.
[0002]
[Prior art]
In recent years, as electronic devices such as mobile phones, PDAs (Personal Digital Assistants), and notebook computers have become smaller and more sophisticated, it is indispensable to mount high-density electronic components. Conventionally, high-density mounting of electronic components has been promoted by making finer pitches of component terminals by miniaturization of electronic components, miniaturization of conductor patterns on a wiring board on which electronic components are mounted, and the like.
[0003]
In recent years, the development of multilayer wiring that enables three-dimensional wiring routing has been promoted, and further, elements such as chip resistors, chip capacitors, or semiconductor bare chips are incorporated in the multilayer wiring board. Thus, development of an element mounting board that further improves the mounting efficiency is also underway.
[0004]
As a method for forming a conductor pattern on a wiring board, a transfer method using a transfer sheet is conventionally known. The manufacturing process of the wiring substrate by this transfer method mainly includes a pattern forming step of forming a conductor pattern on one surface of the transfer sheet, and the formed conductor pattern is bonded to the insulating layer together with the transfer sheet, and then the transfer sheet is peeled off. Pattern transfer process.
[0005]
As this type of conventional technology, for example, Patent Document 1 is known. Hereinafter, a conventional method for manufacturing a mounting substrate will be described with reference to FIG.
[0006]
[Patent Document 1]
Japanese Patent Laid-Open No. 10-107445
First, as shown in FIG. 10A, a wiring board in which the conductor pattern 2 is formed on the surface of the insulating base 1 is prepared or prepared.
[0008]
Next, as shown in FIG. 10B, an insulating slurry 3 is applied to the surface of the insulating base material 1 to form the insulating layer 3.
[0009]
Next, as shown in FIG. 10C, a via hole 4 communicating with the conductor pattern 2 is formed in the insulating layer 3 by laser processing or the like, and a conductive paste 5 is filled in the formed via hole 4.
[0010]
Next, as shown in FIG. 10 (d), another conductor pattern 6 previously formed on the transfer sheet 7 is transferred to the insulating layer 3, and two conductors are passed through the conductive paste 5. Connect patterns 2 and 6.
[0011]
The transfer sheet 7 is mainly composed of a synthetic resin material such as polyethylene terephthalate (PET). The conductor pattern 6 is formed by patterning a conductor layer adhered or deposited on the transfer sheet 7 into a predetermined shape by a wet etching method. The transfer of the conductor pattern 6 from the transfer sheet 7 to the insulating layer 3 is performed using a difference in adhesion between the conductor pattern 6 and the insulating layer 3 and the transfer sheet 7.
[0012]
[Problems to be solved by the invention]
In the above conventional example, when an element is mounted on a conductor pattern and an external terminal for rearranging and drawing out the electrode pad of the element is to be formed, two conductor patterns connected by vias are required. There is a limit to reducing the thickness of the entire mounting board.
[0013]
The present invention has been made in view of the above-described problems, and an object thereof is to provide a mounting substrate that is thin and excellent in dimensional stability and a method for manufacturing the same.
[0014]
[Means for Solving the Problems]
In solving the above problems, in the mounting substrate of the present invention, the conductor pattern transferred from the transfer sheet is bonded to an insulating layer having a gap, and the element is accommodated in the gap by being electrically connected to the conductor pattern. In the conductor pattern, an external terminal that is electrically connected to the element is bonded to the surface opposite to the connection surface of the element.
[0015]
In order to solve the above-described problems, the mounting substrate manufacturing method of the present invention includes a step of forming a conductor pattern on one surface of a transfer sheet, a step of forming a void in an insulating layer, and a conductor pattern. After the transfer sheet and the insulating layer are bonded to each other, a pattern transfer process for removing the transfer sheet, a process of electrically connecting to the conductor pattern and accommodating the element in the gap, and a connection surface of the element in the conductor pattern And a step of bonding an external terminal electrically connected to the element to the opposite surface.
[0016]
In the present invention, the conductor pattern and the insulating layer are formed in independent processes, and then bonded to each other. If the transfer sheet supporting the conductor pattern is peeled off, the insulating layer is bonded to the conductor pattern. The entire opposite side of the surface is exposed. The other surface of the conductor pattern is exposed in the gap of the insulating layer. Accordingly, by bonding elements or external terminals to the exposed surfaces, a mounting substrate in which elements or external terminals are bonded to the front and back surfaces of the one-layer conductor pattern is obtained, and the two-layer conductor pattern has vias. The mounting substrate can be made thinner than the structure connected via the connector.
[0017]
In addition, you may join an element also to the surface where an external terminal is joined in a conductor pattern. Alternatively, a full grid may be achieved by joining more external terminals in place of the element.
[0018]
Also, a stack structure in which a plurality of mounting boards are stacked can be used. Specifically, the external terminals of a mounting board are stacked so as to pass through the insulating layer of another mounting board and be bonded to the conductive pattern of the mounting board, and the conductor patterns of the stacked mounting boards are stacked, or The elements are electrically connected.
[0019]
The transfer sheet functions as a support for maintaining the flatness of the conductor pattern and improving handling properties. Therefore, it is configured to have mechanical properties such as strength and material properties such as heat-resistant temperature to meet this requirement.
[0020]
The transfer sheet is finally left separated from the conductor pattern. It is preferable to have a release layer for facilitating the separation. As a peeling layer, the structure which laminated | stacked the several metal layer is mentioned, for example. In the case of this configuration, for example, there is an advantage that no dimensional change or alteration occurs even after a heating process of about 300 ° C.
[0021]
Moreover, as a structure of another peeling layer, the resin layer by which the mold release agent was apply | coated to the predetermined site | part of the surface which should be peeled is mentioned. Furthermore, a thermal foam layer may be used as another release layer. In this case, the transfer support can be peeled by foaming the thermal foam layer by heat treatment to a predetermined temperature.
[0022]
Alternatively, the transfer sheet may be dissolved and separated from the conductor pattern without providing a release layer.
[0023]
Further, if the transfer sheet is made conductive, a fine pitch conductor pattern can be formed using a pattern plating technique based on an additive method.
[0024]
In addition, if the base of the external terminal that functions as a joint to another substrate is surrounded by a ring-shaped resin material, the joint strength of the external terminal with a small size can be reduced especially as the number of pins increases. It can be reinforced with a resin material.
[0025]
The reinforcing resin material does not cover the entire external terminal, but surrounds the base of the external terminal in a ring shape, so that it is possible to perform repairs to replace those in which defects or abnormalities are detected after joining. Also, the molten resin material tends to get wet into the base of the external terminal in a fillet shape. Here, the fillet shape is a shape in which the thickness of the resin material gradually decreases as it goes from the base portion of the external terminal to the tip portion side. When reinforced with such a fillet-shaped resin material, the thermal stress applied to the external terminal is dispersed without being applied to a single point, so that high bonding reliability is obtained. The fillet shape can be easily realized by a heating reflow apparatus and heating conditions that are generally performed conventionally.
[0026]
Moreover, it is preferable that the said resin material surrounding the base part of an external terminal is formed on the planarization layer which fills the conductor pattern made into the mutually flush surface, and these conductor patterns. If the supply location of the resin material is flat and there is no unevenness, the resin material will not flow into the recess, and even if the supply amount of the resin material is reduced in order to suppress the warping of the mounting substrate, more resin material Can be used for wetting to the base of the external terminal, and can be reinforced with a resin material having a stable height necessary for securing the strength of the joint.
[0027]
DETAILED DESCRIPTION OF THE INVENTION
[First Embodiment]
Hereinafter, a method for manufacturing a mounting board and a mounting board according to a first embodiment as an example of the present invention will be described.
[0028]
(Process of FIG. 2A)
A release layer 11 is formed on one surface of the transfer sheet 10. FIG. 3 shows details of the structure of the laminate.
[0029]
The transfer sheet 10 is made of Cu, for example, and is configured to have mechanical properties or material properties required for handling. The thickness is about 140 μm, for example.
[0030]
The release layer 11 is composed of two metal layers 11a and 11b. A Cr layer (for example, 0.01 μm thick) 11a is laminated on the transfer sheet 10, and a (Ni—Co) layer (for example, 0.15 μm thick) 11b is laminated on the Cr layer 11a. Both are formed by electroplating using the transfer sheet 10 as a power feeder.
[0031]
The Cr layer 11a and the (Ni—Co) layer 11b have a characteristic that metal bonding does not occur even at a temperature of about 320 ° C., for example. In this case, peeling is possible at the boundary between the Cr layer 11a and the (Ni—Co) layer 11b.
[0032]
(Step of FIG. 2B)
A conductor pattern 12 is formed on the release layer 11. Specifically, first, after forming a photoresist film on the surface of the (Ni—Co) layer 11b, which is the surface of the release layer 11, the photoresist film is exposed and developed to form the photoresist film in a desired shape. A plating resist (not shown) is formed by patterning.
[0033]
Subsequently, the transfer sheet 10 is immersed in a copper electrolytic bath and connected to the cathode electrode to deposit the conductor pattern 12 as a copper electroplating film, and then the plating resist is removed.
[0034]
In general, compared to a method (subtractive method) in which unnecessary portions of a conductive film are removed by wet etching and a conductive pattern is formed (subtractive method), a conductive pattern is formed by depositing a conductive film only in necessary portions by electroplating ( Since the additive method can form a finer pattern, according to the present embodiment, the fine pitch conductor pattern 12 having a line and space (L / S) of, for example, 10 μm / 10 μm can be formed with high accuracy. can do.
[0035]
In addition, since the conductive pattern 12 is formed on the transfer sheet 10 made of Cu that is thicker and has a smaller dimensional change than a resin film, the handling property is improved, and even when the conductive pattern 12 is thin, warping is suppressed. And dimensional accuracy can be stabilized.
[0036]
(Step of FIG. 2C)
A paste-like insulating resin material is applied on the release layer 11 so as to cover the conductor pattern 12, the resin material is heated and cured, and then polished to expose the surface of the conductor pattern 12. As a result, a flattened layer 13 that fills the space between the conductor patterns 12 and is flush with the surface of the conductor pattern 12 is formed on the release layer 1, and one surface of the transfer sheet 10 is flattened.
[0037]
(Step of FIG. 4D)
The conductor pattern 12 is bonded to the insulating layer 14 together with the transfer sheet 10. The insulating layer 14 is made of, for example, resin or ceramic, and an insulating adhesive layer 15 is laminated on one surface side thereof.
[0038]
The insulating layer 14 and the adhesive layer 15 are formed with a gap 16 penetrating in the thickness direction. For example, known drilling techniques such as machining using a drill or a router, die punching, and laser machining can be applied.
[0039]
The adhesive layer 15 is adhered to the same surface of the conductor pattern 12 and the planarizing layer 13, and the transfer sheet 10 and the insulating layer 14 are bonded to each other. For example, bonding is performed by a hot press. As the adhesive layer 15, for example, an epoxy type material having a low fluidity and a high shape maintaining property is used so that the adhesive layer 15 does not flow out into the gap 16 at this time.
[0040]
(Step of FIG. 4E)
The element 17 is accommodated in the gap 16. Conductive bumps 17 a are formed on the electrode pads formed on the lower surface of the element 17, and the conductive bumps 17 a are heated while being pressed against the surface of the conductor pattern 12 to be metal-bonded. Thereby, the element 17 is electrically connected to the conductor pattern 12 via the conductive bump 17a. After the element 17 is mounted, the gap portion 16 is filled with the underfill resin material 18 to protect the joint portion between the element 17 and the conductor pattern 12.
[0041]
In addition, after bonding solder, tin, nickel, gold | metal | money, silver, etc. to the surface of the conductive bump 17a and the surface of the conductor pattern 12 to which this is joined, you may join both. In this case, the wettability and bondability between the conductive bumps 17a and the conductor pattern 12 can be improved, bonding can be performed at a lower load and lower temperature, and damage to the element 17 can be reduced.
[0042]
(Step of FIG. 5F)
The transfer sheet 10 is peeled off. Specifically, the peeling layer 11 shown in FIG. 3 peels at the boundary surface between the Cr layer 11a and the (Ni—Co) layer 11b. For example, the boundary surface is cut off and peeled off. The Cr layer 11a and the (Ni—Co) layer 11b can be easily peeled off without being metal-bonded to each other even when subjected to thermal stress by hot pressing during the bonding process with the insulating layer 14.
[0043]
(Step of FIG. 5G)
The (Ni—Co) layer 11b remains on the flush surfaces of the conductor pattern 12 and the planarizing layer 13, but this is removed by wet etching with, for example, a hydrogen peroxide-based etchant.
[0044]
(Step of FIG. 6H)
The resin material 20 is supplied onto the same surface of the conductor pattern 12 and the planarization layer 13 from which the transfer sheet 10 and the release layer 11 have been removed. As a method of supplying the resin material 20, for example, a method of applying a liquid resin material diluted with a solvent by a spray method and drying, a method of supplying a paste-like resin material by printing or a spin coating method, or complete curing. For example, there is a method of supplying by sticking a film-like resin material in a B-stage state, but the method is not particularly limited as long as the method can supply a required amount uniformly. Here, the necessary amount is an amount that can make a fillet, which will be described later, a height necessary for securing the bonding strength.
[0045]
In the present embodiment, for example, a resin material 20 having ultraviolet curability and containing an activator is used. Specifically, a resin material 20 in which a phenol novolak containing at least an acryloyl group or a methacryloyl group, a resin that functions as a curing agent, and a photopolymerization initiator is used. The phenolic hydroxyl group of phenol novolac functions as an activator, and by its reducing action, it removes dirt such as oxides on the solder and metal surface, and prevents reoxidation, and is a joint surface of an external terminal described later. The wettability of solder and molten metal to the surface of the conductor pattern 12 is enhanced. This action of the activator is lost when the resin material 20 is cured.
[0046]
(Step of FIG. 6I)
In the resin material 20, a resist mask 21 is formed by known photolithography and etching which are portions of the conductor pattern 12 that serve as joint surfaces of external terminals. Other parts are exposed. In this state, ultraviolet rays are irradiated.
[0047]
Thereby, the resin material 20a of the part which is not covered with the resist mask 21 is hardened. The resin material 20a functions as an insulating protective film (solder resist) that prevents a short circuit between the conductor patterns 12 or between the conductor patterns 12 and the external terminals. Therefore, it is not necessary to separately form a solder resist, and the process can be simplified.
[0048]
(Step of FIG. 6J)
After the resist mask 21 is removed, the spherical external terminals 22 are arranged on the conductor pattern 12 on which the resin material 20 that remains uncured is present. The material of the external terminal 22 is not particularly limited, and a known alloy composition such as Sn—Pb, Sn—Ag, Sn—Ag—Cu, Sn—Zn, Sn—Zn—Bi is used.
[0049]
Further, as shown in FIG. 9, for example, an external terminal 48 including a core portion 48 a made of a resin material may be used. The surface of the core portion 48a is covered with a conductive surface layer portion composed of a metal layer 48b and a solder plating layer 48c. Since the external stress is received by the entire external terminal by the included core portion 48a, the stress on the joint portion is reduced. The core portion 48a only needs to have stress relaxation properties and have a uniform particle diameter, and is not limited to resin and may be rubber or metal.
[0050]
Next, the mounting board on which the external terminals 22 are mounted is put into a reflow furnace and heated. The external terminals 22 arranged on the conductor pattern 12 come into contact with the surface of the conductor pattern 12 due to their own weight, and are further heated and melted so that the uncured resin material 20 can be applied and wetted on the surface of the conductor pattern 12. It spreads. Thereby, the external terminal 22 and the conductor pattern 12 are metal-bonded.
[0051]
At the time of this reflow, since the resin material 20 where the external terminals 22 are arranged is uncured, it has a metal activation action by the above-mentioned activator, and the external terminals 22 can be connected without applying a separate flux. The wettability with the conductor pattern 12 can be improved and the bondability can be improved.
[0052]
In addition, due to the heating at this time, the uncured resin material 20 is wetted in a ring shape at the base portion of the external terminal 22 (the portion on the joint portion side with the conductor pattern 12), as shown in FIG. After forming the fillet 23 surrounding the base, it is cured by receiving further heating.
[0053]
Since the planarization layer 13 is filled between the conductor patterns 12 and the surface to which the external terminals 22 are joined is planarized, the uncured resin material 20 flows between the conductor patterns 12 when the fillet 23 is formed. Therefore, the amount of wetting to the base portion of the external terminal 22 can be increased accordingly.
[0054]
As a result, the height of the fillet can be increased (when the supply amount of the reinforcing resin material is the same) as compared with the case where there is a step between the bonding surface and the insulating layer surface and the surface is not flattened, The bonding strength of the external terminal 22 can be improved.
[0055]
The resin material 20 having photocurability and further containing an activator tends to have a relatively large cure shrinkage due to its characteristics that it cannot contain much filler. Therefore, it is desirable to reduce the supply amount of the resin material 20 as much as possible in order to suppress warping of the mounting substrate. In this embodiment, since the supply surface of the resin material 20 is flattened as described above, the fillet height necessary for securing the strength can be realized while the supply amount is small. The fillet height necessary for securing the strength varies depending on the material of the resin material and the material and size of the external terminal 22, for example, 10% or more of the height of the external terminal 22 is sufficient.
[0056]
Finally, as shown in FIG. 1, a mounting substrate 25 in which the element 17 is mounted on one surface of the single-layer conductor pattern 12 and the external terminal 22 is bonded to the other surface on the opposite side, as shown in FIG. Is obtained.
[0057]
Since the external terminal 22 is bonded to the surface opposite to the surface on which the element 17 is mounted, it can be disposed at a position overlapping the element 17, that is, a full grid using the entire back surface of the mounting substrate 25 is possible. Thereby, even if the number of electrode pads of the element 17 is large, a large number of external terminals 22 can be drawn out (rearranged) with a pitch larger than the pitch between the electrode pads. Alternatively, the size of each external terminal 22 can be increased, and the bonding reliability with another substrate can be increased via the external terminal 22.
[0058]
Further, the planar dimensions can be reduced as compared with a structure in which external terminals are formed on the left and right sides of the element 17 so as to avoid the element 17 on the mounting surface side of the element 17. Further, in the structure in which the external terminal is formed on the mounting surface side of the element 17, it is necessary to form a through hole reaching the conductor pattern 12 in the insulating layer 14 and embed the external terminal in the through hole, so that workability is poor. Although this may cause a decrease in yield, in the present embodiment, since it is arranged as it is on the exposed surface of the conductor pattern 12, it can be performed with good workability.
[0059]
In forming the conductor pattern 12, a fine and flat transfer sheet 10 is used as a starting material, and fine plating of 10 μm or less, which is impossible with a normal semiconductor interposer substrate or TAB (tape automated bonding) tape, is performed by pattern plating using an additive method. The conductor pattern 12 can be formed.
[0060]
Furthermore, since the transfer sheet 10 has mechanical strength and material characteristics that do not cause problems in handling properties and dimensional changes, a very thin conductor pattern 12 can be formed with high accuracy. Finally, the transfer sheet 10 is peeled off, and as a result, a thin mounting substrate 25 of 100 μm or less is obtained.
[0061]
Further, since the transfer sheet 10, the release layer 11, and the conductor pattern 12 are all metal, there are restrictions on the selection of materials, heating, and pressing conditions during hot pressing in the bonding process with the insulating layer 14 shown in FIG. 4D. Not receive.
[0062]
[Second Embodiment]
Next, a second embodiment of the present invention will be described. In addition, the same code | symbol is attached | subjected to the same component as the said 1st Embodiment, and the detailed description is abbreviate | omitted.
[0063]
As shown in FIG. 7, in the mounting substrate 35 according to the present embodiment, the external terminal 22 and another element 37 are mounted on the surface opposite to the mounting surface of the element 17. The element 37 is electrically connected to the conductor pattern 12 via conductive bumps 37a formed on the electrode pads. An underfill resin 38 is filled to protect the joint between the conductive bump 37a and the conductor pattern 12.
[0064]
[Third Embodiment]
Next, a third embodiment of the present invention will be described. In addition, the same code | symbol is attached | subjected to the same component as the said 1st Embodiment, and the detailed description is abbreviate | omitted.
[0065]
In the present embodiment, as shown in FIG. 8, through holes are formed in the insulating layer 14 of the mounting board obtained in the first embodiment to form a mounting board 25 ′ for stacking. Three mounting boards 40a to 40c are overlapped with each other.
[0066]
The external terminal 22 of the mounting board 40c enters the through hole formed in the insulating layer 14 of the mounting board 25 ′ and is joined to the conductor pattern 12 of the mounting board 25 ′, and the external terminal 22 of the mounting board 40b is connected to the mounting board 25b. 40c enters the through-hole formed in the insulating layer 14 and is joined to the conductor pattern 12 of the mounting substrate 40c. The external terminal 22 of the mounting substrate 40a is in the through-hole formed in the insulating layer 14 of the mounting substrate 40b. It enters and is joined to the conductor pattern 12 of the mounting substrate 40b. More layers may be stacked by stacking more mounting boards.
[0067]
Further, if an external terminal 48 including a core portion 48a made of, for example, a resin material as shown in FIG. 9 is used, the connection through the through hole of the insulating layer 14 can be ensured, and each external terminal The height variation can be absorbed, and the gap between the mounting boards can be made uniform. For example, when solder is used as the external terminal, the height of the external terminal varies due to the flow of solder, etc., causing the mounting board to tilt, and the external terminal does not reach the conductor pattern exposed at the bottom of the through hole. There is a risk of connection failure.
[0068]
As mentioned above, although each embodiment of this invention was described, of course, this invention is not limited to these, A various deformation | transformation is possible based on the technical idea of this invention.
[0069]
The transfer sheet is not limited to metal, and may be glass or a semiconductor wafer. In this case, for example, a Ni layer, a (Ni-P) layer, a Cr layer, or the like is formed as a release layer on the transfer sheet by electroless plating or sputtering.
[0070]
Further, the release layer is not limited to the configuration shown in FIG. 3, for example, it may be configured with one Cr layer, one Ni layer, or two of a Cr layer and a (Ni—Cr) layer. A layer structure or a two-layer structure of a Cr layer and a Ni layer may be used.
[0071]
The transfer sheet 10 may be peeled off after being bonded to the insulating layer 14 and before the element 17 is mounted.
[0072]
The element is not limited to a bare chip, but may be a packaged component, a chip resistor, a chip capacitor, or the like.
[0073]
【The invention's effect】
As described above, according to the present invention, the conductor pattern transferred from the transfer sheet is bonded to the insulating layer having a gap, electrically connected to the conductor pattern, and the element is accommodated in the gap. Since external terminals that are electrically connected to the element are joined to the opposite surface of the element connection surface in the pattern, the two-layer conductor pattern and the via connecting the two layers are not formed. On the other hand, the element and the external terminal can be mounted on the opposite surfaces, and the mounting substrate can be thinned. Further, by bonding the external terminals to the surface where the element is not mounted, more external terminals can be arranged without being blocked by the element.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of a mounting board according to a first embodiment of the present invention.
FIG. 2 is a manufacturing process sectional view of the mounting board according to the first embodiment;
3 is an enlarged cross-sectional view of a main part in FIG. 2. FIG.
FIG. 4 is a manufacturing process sectional view subsequent to FIG. 2;
FIG. 5 is a manufacturing process sectional view following FIG. 4;
6 is a manufacturing process sectional view subsequent to FIG. 5;
FIG. 7 is a cross-sectional view of a mounting board according to a second embodiment of the present invention.
FIG. 8 is a cross-sectional view of a mounting board according to a third embodiment of the present invention.
FIG. 9 is a cross-sectional view of a modified example of the external terminal.
FIG. 10 is a cross-sectional view of a manufacturing process of a conventional mounting board.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10 ... Transfer sheet, 11 ... Release layer, 12 ... Conductor pattern, 13 ... Planarization layer, 14 ... Insulating layer, 16 ... Gap part, 17 ... Element, 22 ... External terminal, 23 ... Fillet, 25 ... Mounting board, 25 '... Mounting substrate, 35 ... Mounting substrate, 37 ... Element, 40a-40c ... Mounting substrate.

Claims (9)

転写シートから転写された導体パターンが、空隙部を有する絶縁層に貼り合わされ、
前記導体パターンに電気的に接続して前記空隙部に素子が収容され、
前記導体パターンにおいて前記素子の接続面の反対面に前記素子と電気的に接続する外部端子が接合されている
ことを特徴とする実装基板。
The conductor pattern transferred from the transfer sheet is bonded to an insulating layer having a gap,
An element is accommodated in the gap portion electrically connected to the conductor pattern,
An external terminal that is electrically connected to the element is bonded to a surface opposite to the connection surface of the element in the conductor pattern.
前記導体パターンは、導電性を有する前記転写シートにパターンめっきされて形成されためっき膜である
ことを特徴とする請求項1に記載の実装基板。
The mounting substrate according to claim 1, wherein the conductive pattern is a plating film formed by pattern plating on the transfer sheet having conductivity.
前記外部端子の付け根部はリング状の樹脂材で囲まれている
ことを特徴とする請求項1に記載の実装基板。
The mounting substrate according to claim 1, wherein a base portion of the external terminal is surrounded by a ring-shaped resin material.
前記外部端子の付け根部を囲む前記樹脂材は、互いに面一とされた前記導体パターン及びこれら導体パターン間を埋める平坦化層の上に形成されている
ことを特徴とする請求項3に記載の実装基板。
The said resin material surrounding the base part of the said external terminal is formed on the planarization layer which fills the said conductor pattern and these conductor patterns which were mutually flush | planar, and these conductor patterns are characterized by the above-mentioned. Mounting board.
前記導体パターンの前記反対面にも前記導体パターンに電気的に接続して素子が接合されている
ことを特徴とする請求項1に記載の実装基板。
2. The mounting substrate according to claim 1, wherein an element is bonded to the opposite surface of the conductor pattern by being electrically connected to the conductor pattern.
前記実装基板が複数個積み重ねられた実装基板であって、
前記外部端子が、他の実装基板の前記絶縁層を貫通して前記他の実装基板の前記導体パターンに接合されることで前記複数の実装基板が積み重なっている
ことを特徴とする請求項1に記載の実装基板。
A mounting board in which a plurality of the mounting boards are stacked,
2. The plurality of mounting boards are stacked by the external terminals penetrating through the insulating layer of another mounting board and joined to the conductor pattern of the other mounting board. The mounting board described.
転写シートの一表面に導体パターンを形成する工程と、
絶縁層に空隙部を形成する工程と、
前記導体パターンを挟むように前記転写シートと前記絶縁層とを互いに貼り合わせた後、前記転写シートを除去するパターン転写工程と、
前記導体パターンに電気的に接続させて前記空隙部に素子を収容する工程と、
前記導体パターンにおいて前記素子の接続面の反対面に前記素子と電気的に接続する外部端子を接合させる工程を有する
ことを特徴とする実装基板の製造方法。
Forming a conductor pattern on one surface of the transfer sheet;
Forming a void in the insulating layer;
A pattern transfer step of removing the transfer sheet after the transfer sheet and the insulating layer are bonded together so as to sandwich the conductor pattern;
Electrically connecting to the conductor pattern and accommodating the element in the gap,
A method for manufacturing a mounting board, comprising: bonding an external terminal electrically connected to the element to a surface opposite to a connection surface of the element in the conductor pattern.
前記転写シートは導電性を有し、前記転写シートに前記導体パターンを電気めっき法でパターンめっきして形成する
ことを特徴とする請求項7に記載の実装基板の製造方法。
The method for manufacturing a mounting substrate according to claim 7, wherein the transfer sheet has conductivity, and the conductive pattern is formed on the transfer sheet by pattern plating using an electroplating method.
前記転写シートに前記導体パターンを形成した後、前記導体パターン間を埋め、且つ前記導体パターンの表面と面一となるように絶縁性の平坦化層を形成する工程を有する
ことを特徴とする請求項7に記載の実装基板の製造方法。
A step of forming an insulating flattening layer so as to fill the gap between the conductor patterns and be flush with the surface of the conductor pattern after forming the conductor pattern on the transfer sheet. Item 8. A method for manufacturing a mounting board according to Item 7.
JP2003166347A 2003-06-11 2003-06-11 Mounting substrate and its manufacturing method Pending JP2005005435A (en)

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JP2007266379A (en) * 2006-03-29 2007-10-11 Toshiba Corp Component built-in printed-wiring board, manufacturing method thereof, and electronic equipment
JP2007335845A (en) * 2006-06-16 2007-12-27 Samsung Electro-Mechanics Co Ltd Electronic element package printed circuit board and method for manufacturing same
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