JP2005005420A - Semiconductor device and unit circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of producing a semiconductor device having a light receiving part of an arbitrary shape, for a short period of time. <P>SOLUTION: The semiconductor device is provided with a plurality of output terminals, a first light receiving part, a second light receiving part and a wire connection circuit. The first light receiving part has a first optical filter which makes light of specific wavelength penetrate selectively on a light receiving surface side and outputs a signal according to light receiving amount. The second light receiving part has a second optical filter wherein wavelength region of transmitting light is different from that of the first optical filter on a light receiving surface side, and outputs a signal according to light receiving amount. The wire connection circuit accepts programming which directs a desired wire connection pattern to the first light receiving part, the second light receiving part and a plurality of output terminals, and performs wire connection of them to changeable. As a result, e.g. many semiconductor devices before programming are produced beforehand, and only programming is performed later according to customer's specification, so that the semiconductor device having the light receiving part of an arbitrary shape can be provided at short appointed date of delivery. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a technique for outputting output signals of a plurality of light receiving units to a plurality of output terminals in a desired combination in a semiconductor device including a plurality of light receiving units.
[0002]
[Prior art]
A photosensor circuit having a large number of light-receiving units in one chip is used in a light-receiving element for automatic photometry, an automatic focus detection device, and the like. Such an optical sensor circuit has been desired to have a plurality of output terminals and to output a signal of an arbitrary light receiving unit to a desired output terminal.
[0003]
In addition, in a light receiving element for alignment of a semiconductor exposure apparatus, an optical pickup IC for DVD, and the like, the shape of the light receiving portion needs to be matched to customer specifications. That is, it is necessary to manufacture a semiconductor device having a light receiving portion having a desired shape in accordance with customer specifications. Usually, when a semiconductor device having a light receiving portion having an arbitrary shape is manufactured, a photomask process corresponding to the shape of the light receiving portion is performed. However, this method takes time to design and manufacture and increases the manufacturing cost.
[0004]
Therefore, Patent Document 1 devises a method of providing a switch between all combinations of m light receiving units 1 and n output terminals and providing a shift register assigned to each switch. Then, by appropriately inputting ON / OFF data to each stage of the shift register, any switch is opened / closed independently, and the photocurrent of any light receiving unit is output to a desired output terminal.
[0005]
[Patent Document 1]
JP-A-8-172563 (Section 2-3, FIG. 1)
[0006]
[Problems to be solved by the invention]
The invention of Patent Document 1 has excellent effects as described above. However, it is necessary to input ON / OFF data to the shift register every time it is used. In addition, it has been desired to provide a semiconductor device having a light receiving portion having an arbitrary shape with a short delivery time.
[0007]
An object of the present invention is to provide a technique for manufacturing a semiconductor device having a light receiving portion having an arbitrary shape in a short period of time.
[0008]
[Means for Solving the Problems]
Hereinafter, the content of the present invention will be described separately for each claim.
[0009]
<Claim 1>
According to another aspect of the present invention, a semiconductor device includes a plurality of output terminals, a first light receiving unit, a second light receiving unit, and a connection circuit. The first light receiving unit includes a first optical filter that selectively transmits light of a specific wavelength on the light receiving surface side, and outputs a signal corresponding to the amount of received light. The second light receiving unit has a second optical filter on the light receiving surface side, which has a different wavelength range of transmitted light from the first optical filter, and outputs a signal corresponding to the amount of received light. The connection circuit can change the first light-receiving unit, the second light-receiving unit, and the plurality of output terminals by receiving programming that designates a desired connection pattern for the first light-receiving unit, the second light-receiving unit, and the plurality of output terminals. Connect to.
[0010]
<Claim 2>
A semiconductor device according to a second aspect is characterized in that, in the invention according to the first aspect, the wiring circuit includes a storage unit for storing a wiring pattern instructed by programming.
[0011]
<Claim 3>
According to a third aspect of the present invention, there is provided the semiconductor device according to the second aspect, wherein “the storage unit is a rewritable nonvolatile semiconductor memory device”.
[0012]
<Claim 4>
The unit circuit according to claim 4 includes a first switch, a second switch, a third switch, a fourth switch, a fifth switch, a sixth switch, and a light receiving element. .
The first switch has a terminal A, a terminal B, and a terminal C. The first switch receives a signal by programming at the terminal A, and switches conduction or insulation between the terminal B and the terminal C according to the signal.
[0013]
The second switch has a terminal D, a terminal E, and a terminal F connected to the terminal C. The terminal D receives a signal by programming, and the conduction or insulation between the terminal E and the terminal F according to this signal. Switch.
The third switch has a terminal G, a terminal H connected to the terminal B, and a terminal I connected to the terminal E. The third switch receives a signal by programming at the terminal G, and the terminal H and the terminal accordingly. Switches between conduction and insulation between I.
The fourth switch has a terminal J, a terminal K, and a terminal L connected to the terminal E. The fourth switch receives a signal by programming at the terminal J, and conducts or insulates between the terminal K and the terminal L according to this. Switch.
[0014]
The fifth switch has a terminal M, a terminal N, and a terminal O connected to the terminal E. The fifth switch receives a signal by programming at the terminal M, and conducts or insulates between the terminal N and the terminal O according to the signal. Switch.
The sixth switch has a terminal P, a terminal Q, and a terminal R connected to the terminal N. The sixth switch receives a programming signal at the terminal P, and conducts or insulates between the terminal Q and the terminal R according to the signal. Switch.
The light receiving element is connected to a connection node X between the terminal E, the terminal I, the terminal L, and the terminal O.
[0015]
<Claim 5>
A semiconductor device according to a fifth aspect is characterized in that the plurality of unit circuits according to the fourth aspect and the plurality of output terminals are regularly connected so as to satisfy the following (1) to (8).
(1) The terminal R of the sixth switch of another unit circuit adjacent to the unit circuit is connected to the terminal Q of the sixth switch of one unit circuit, or another unit circuit is not connected.
[0016]
(2) The connection node X of one unit circuit is connected to the terminal K of the fourth switch of another unit circuit adjacent to this unit circuit, or is not connected to another unit circuit.
(3) The terminal F of the second switch of one unit circuit is connected to the terminal F of the second switch of up to three other unit circuits adjacent to the unit circuit, or another unit circuit. Do not connect.
[0017]
(4) An output terminal is connected to a terminal F of a unit circuit that is not connected to a terminal F of another unit circuit.
(5) When there is a connection node between the terminals F of two unit circuits adjacent to each other by the connection method of (3), an output terminal is connected to this connection node.
[0018]
(6) When there is a connection node between terminals F of three unit circuits adjacent to each other by the connection method of (3), an output terminal is connected to this connection node.
(7) When there is a connection node between the terminals F of the four unit circuits adjacent to each other by the connection method of (3), the output terminal is not connected to this connection node.
(8) Do not connect output terminals to each other.
[0019]
<Claim 6>
The semiconductor device according to claim 6 includes a plurality of output terminals, a plurality of light receiving portions that output signals according to the amount of received light, a rewritable nonvolatile semiconductor memory device, and a connection circuit. To do. The non-volatile semiconductor memory device receives programming for instructing desired connection patterns for a plurality of light receiving units and a plurality of output terminals, and stores them. The connection circuit connects the plurality of light receiving units and the plurality of output terminals in a changeable manner based on information stored in the nonvolatile semiconductor memory device.
[0020]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings. In addition, in each figure, the same code | symbol is attached | subjected to the same element and the overlapping description is abbreviate | omitted.
The semiconductor device according to the present embodiment corresponding to all the claims is configured by connecting a large number of unit cells composed of four unit circuits according to the connection rule, and the output signal of the light receiving element of the desired unit circuit is obtained by programming. Can be output to the terminal. In the following, description will be given in the order of unit circuit, unit cell, connection rule, and programming method.
[0021]
<Unit circuit of this embodiment>
FIG. 1 is a circuit diagram of a unit circuit of the semiconductor device of this embodiment. As shown in the figure, a unit circuit A formed on a semiconductor substrate (not shown) includes switches AS1, AS2, AS3, AS4, AS5, AS6, and a rewritable nonvolatile semiconductor memory device (in this embodiment, as an example). AM1, AM2, AM3, AM4, AM5, and AM6 (using flash memory) and a photodiode AD. An output terminal AT is connected to a connection node of the switches AS1 and AS2.
[0022]
Note that the output terminal AT may be considered to be included in the unit circuit A. The switches AS1 to AS6 all have the same structure, and the flash memories AM1 to AM6 all have the same structure. Further, since unit circuits B, C, and D having the same circuit configuration as unit circuit A are used as will be described later, the leading “A” of each symbol given to indicate belonging to unit circuit A is omitted as appropriate. To explain.
[0023]
Each of the switches S1 to S6 is an N channel enhancement type MOS transistor. The gates of the switches S1 to S6 are connected to the source terminals of the flash memories M1 to M6, respectively, and given a predetermined potential. That is, by storing predetermined charges in the flash memories M1 to M6, the gate potentials of the switches S1 to S6 are fixed, and the connection states of the switches S1 to S6 are turned on (conductive) and off (insulated). Fix it.
[0024]
Hereinafter, in order to simplify the description of the unit circuit connection rules, which will be described later, the terminal names of the unit circuits are defined to be the same as the claims.
The first switch according to the claims corresponds to the switch S1, and its gate is the terminal A. Of the source and drain of the switch S1, the one connected to the switch S2 is the terminal C and the other is the terminal B.
[0025]
The second switch according to the claims corresponds to the switch S2, and its gate is the terminal D. Of the source and drain of the switch S2, the terminal connected to the switch S1 is the terminal F and the other is the terminal E.
The third switch in the claims corresponds to the switch S3, and its gate is the terminal G. Of the source and drain of the switch S3, the one connected to the switch S1 is the terminal H and the other is the terminal I.
[0026]
The fourth switch in the claims corresponds to the switch S4, and its gate is the terminal J. Of the source and drain of the switch S4, the terminal connected to the switch S2 is the terminal L and the other is the terminal K.
The fifth switch in the claims corresponds to the switch S5, and its gate is the terminal M. Of the source and drain of the switch S5, the one connected to the switch S3 is the terminal O and the other is the terminal N.
The sixth switch in the claims corresponds to the switch S6, and its gate is the terminal P. Of the source and drain of the switch S6, the one connected to the switch S5 is the terminal R, and the other is the terminal Q.
The light receiving element according to the claims corresponds to the photodiode D, and a connection node of the switches S2, S3, S4, S5 and the photodiode D is a connection node X.
[0027]
FIG. 2 shows details of the flash memories M1 to M6 (hereinafter, abbreviated as “flash memory” when distinction is unnecessary). Each flash memory includes a source terminal 20 connected to the ground line GND through a resistor 18, a high concentration N-type source region 22, a high concentration N-type drain region 24, a drain terminal 26, an insulating film 30, It has a floating gate 32, an insulating film 34, a control gate 36, and a gate terminal 38. The operation of the flash memory will be briefly described below.
[0028]
When performing a write operation, for example, a voltage of about 7 V is applied to the drain terminal 26 to activate electrons near the channel region, and a voltage of about 12 V is applied to the gate terminal 38. As a result, electrons are taken into the floating gate 32 through the insulating film 34, and the flash memory is turned on.
When performing the erase operation, for example, by applying a voltage of about −9 V to the gate terminal 38 and about 6 V to the source terminal 20, electrons in the floating gate 32 are extracted to the high concentration N-type source region 22 side. As a result, the flash memory is turned off.
[0029]
When performing a read operation, for example, a voltage of about 5 V is applied to the gate terminal 38 and a voltage of about 1 V is applied to the drain terminal 26. Thereby, the presence or absence of current flowing between the source terminal 20 and the drain terminal 26 is read as data. That is, when the flash memory is on, the voltage at the source terminal 20 is high. When the flash memory is off, the voltage at the source terminal 20 is low.
[0030]
<Unit cell of this embodiment>
FIG. 3 is a circuit diagram of a unit cell constituting the semiconductor device of this embodiment. As shown in the figure, the unit cell 50 includes the unit circuit A, the unit circuit B, the unit circuit C, and the unit circuit D described above. The unit circuits B, C, and D are the same as the unit circuit A except for the optical characteristics of an optical filter that covers a light receiving surface of a photodiode described later.
[0031]
In the figure, for the unit circuit B, the photodiode is shown as BD, the switches as BS1 to BS6, and the flash memory as BM1 to BM6. In addition, for the unit circuit C, a photodiode is indicated as CD, a switch is indicated as CS1 to CS6, and a flash memory is indicated as CM1 to CM6. For the unit circuit D, a photodiode is indicated as DD, a switch as DS1 to DS6, and a flash memory as DM1 to DM6.
[0032]
The unit terminals B, C, and D are connected to output terminals BT, CT, and DT, respectively. Note that the output terminals BT, CT, and DT may be considered to be included in the unit circuits B, C, and D, respectively.
Moreover, in the following description, when it is not necessary to distinguish between the unit circuits A to D, the unit circuits are omitted and denoted as unit circuits. Similarly, the photodiodes AD to DD and the output terminals AT to DT are also referred to as photodiodes and output terminals, respectively, omitting the reference numerals when it is not necessary to distinguish them.
[0033]
The light receiving surface of the photodiode AD of the unit circuit A is covered with an optical filter (not shown) that selectively transmits light having a wavelength of about 650 nm. Therefore, for example, when the semiconductor device of this embodiment is used as an optical pickup IC of a DVD-ROM (Digital Versatile Disk Read-Only-Memory), the output signal of the photodiode AD of the unit circuit A may be extracted.
[0034]
The light receiving surface of the photodiode BD of the unit circuit B is covered with an optical filter (not shown) that selectively transmits light having a wavelength of about 405 nm. Therefore, for example, when used as a blue-ray-disc optical pickup IC, the output signal of the photodiode BD of the unit circuit B may be extracted.
The light receiving surface of the photodiode CD of the unit circuit C is covered with an optical filter (not shown) that selectively transmits light having a wavelength of about 780 nm. Therefore, for example, when used as an optical pickup IC of a CD-ROM (Compact Disc Read-Only-Memory), the output signal of the photodiode CD of the unit circuit C may be extracted.
[0035]
The light receiving surface of the photodiode DD of the unit circuit D is covered with an optical filter (not shown) that selectively transmits light having a wavelength of about 635 nm. Therefore, for example, when used as an optical pickup IC of a DVD-R (Digital Versatile Disk Recordable), the output signal of the photodiode DD of the unit circuit D may be extracted.
[0036]
<Wiring rules of this embodiment>
FIG. 4 is a schematic view of the semiconductor device 60 of the present embodiment configured by connecting 16 unit cells 50 in a vertical 4 × horizontal direction, that is, 64 unit circuits in a vertical 8 × horizontal direction 8. is there. In FIG. 4, one unit circuit is described as one square of a square. FIG. 5 is a circuit diagram showing details of the semiconductor device 60 shown in FIG. In FIG. 5, the number of circuit elements is complicated, and the reference numerals and the flash memory are omitted.
[0037]
Hereinafter, as shown in (1) to (5), the connection rule of the unit circuit applied to the connection of the semiconductor device 60 will be described. The unit cell 50 is obtained by connecting four unit circuits so as to satisfy the following connection rule. The connection rule shown below is also a connection rule for the unit cell 50. The unit circuit may be any of A, B, C, and D described above, and is assumed to have no output terminal.
[0038]
(1) Considering each unit circuit as a square and considering it in a plan view, each unit circuit is arranged so as to fit the square in accordance with the grid. If the wiring connecting the switch S2 and the switch S3 is considered as a reference side among the four sides of the square (see FIGS. 1 and 3), the direction of the grid line here is a direction parallel to the reference side. And a direction orthogonal to the reference side.
[0039]
(2) “Terminal R of switch S6 of another unit circuit adjacent to this unit circuit” is connected to terminal Q of switch S6 of one unit circuit, or another unit circuit is not connected. Hereinafter, the third unit circuit A from the top in FIG. 4 and FIG. 5 and the third unit circuit A from the left (in FIG. 5, the photodiode is blacked out and described in a larger size) will be described as a reference unit circuit. To do. Further, the vertical and horizontal directions are defined as directions along the above-described grid as shown by arrows in FIGS. The reference unit circuit and the vertical and horizontal directions are used in the same manner in the description of the programming method described later.
[0040]
The connection rule of this item corresponds to the connection relationship between the reference unit circuit and the adjacent unit circuit C in FIGS. 4 and 5. In FIG. 5, the direction of the circuit symbol of the photodiode of the reference unit circuit is different from the direction of the circuit symbol of the photodiode of the unit circuit C adjacent thereto by 90 °. Further, when viewed from the unit circuit B adjacent to the right side of the reference unit circuit in FIG. 4, this connection rule corresponds to the connection relationship with the reference unit circuit.
[0041]
(3) The connection node X of one unit circuit is connected to “the terminal K of the switch S4 of another unit circuit adjacent to this unit circuit along the reference side of this unit circuit” or another Do not connect the unit circuit. This connection rule corresponds to the connection relation between the reference unit circuit and the adjacent unit circuit C in FIGS. In FIG. 5, the direction of the circuit symbol of the photodiode of the reference unit circuit is different from the direction of the circuit symbol of the photodiode of the unit circuit C adjacent thereto by 90 °.
[0042]
(4) The terminal F of the switch S2 of one unit circuit is connected to the terminal F of the switch S2 of up to three other unit circuits adjacent to the unit circuit, or another unit circuit is connected. do not do.
In FIG. 5, the terminal F of three different unit circuits is connected to the terminal F of the reference unit circuit. In FIG. 4, these three unit circuits include a unit circuit C adjacent to the upper side with respect to the reference, a unit circuit B adjacent to the left with respect to the reference, and a unit circuit D adjacent to the upper left with respect to the reference. is there.
[0043]
If the connection is made so as to satisfy the above conditions, the following condition (5) is also satisfied.
(5) When the four unit circuits are connected so that the switches S6 of these four unit circuits are connected in series to each other, only the terminal N of the switch S5 is connected to the connection node between the switches S6 and S6. Has been.
[0044]
The above is the connection rule of the unit circuit and the unit cell. Further, as is apparent from the connection rule (1), the unit circuits of the present embodiment can be connected infinitely in a lattice shape.
[0045]
Next, as shown in the following (6) to (10), output terminal connection rules will be described.
[0046]
(6) An output terminal is connected to a terminal F of a unit circuit that is not connected to a terminal F of another unit circuit. In the semiconductor device 60 according to the present embodiment, four of them shown separately from the output terminal Z in FIG.
[0047]
(7) When there is a connection node between the terminals F of two adjacent unit circuits by the connection method of (4), an output terminal is connected to this connection node. In the semiconductor device 60 of the present embodiment, 12 output terminals distinguished by being enclosed in parentheses in FIG. 4 correspond to this.
[0048]
(8) When there is a connection node between terminals F of three adjacent unit circuits by the connection method of (4), an output terminal is connected to this connection node. Since there is no output terminal corresponding to this in the semiconductor device 60 of this embodiment, it illustrates in FIG. 6 mentioned later.
[0049]
(9) When there is a connection node between terminals F of four adjacent unit circuits by the connection method of (4), the output terminal is not connected to this connection node. In the semiconductor device 60 of this embodiment, nine connection nodes marked with “X” in FIG. 4 correspond to this.
[0050]
(10) Do not connect output terminals to each other.
The above is the output terminal connection rule. The semiconductor device 60 of this embodiment is merely an example in which unit circuits and output terminals are connected based on the above rules (1) to (10). Therefore, for example, as shown in FIG. 6A, ten unit circuits A and six output terminals may be connected. FIG. 6B is a circuit diagram showing details of FIG. In FIG. 6, the number of circuit elements is complicated, and the reference numerals and the flash memory are omitted.
[0051]
In the example of FIG. 6, there is one connection node between the terminals F of three adjacent unit circuits, which is not the semiconductor device 60 of the present embodiment. Therefore, in the example of FIG. 6, the output terminal is connected to this connection node according to the connection rule (8).
[0052]
<The programming method of this embodiment>
Hereinafter, a programming method for outputting an output signal of a desired photodiode to a desired output terminal will be described for each item (11) to (15).
[0053]
In the following description, only the switches that are turned on (any one of S1 to S6, hereinafter appropriately omitted) will be mainly described, and switches that are not particularly touched are turned off. However, “turning on” here means turning on the flash memory by supplying the high-level voltage to the gate of the switch by turning on the flash memory by the write operation. Here, “turning off” means that the flash memory is turned off by an erasing operation, a low level voltage is supplied to the gate of the switch, and the switch is turned off (insulated).
[0054]
(11) When combining the output signals of the photodiodes of unit circuits adjacent to each other vertically and horizontally, at least one of the switches S4, S5, and S6 of these unit circuits is turned on. For example, when attention is paid to the unit circuit A (see FIGS. 4 and 5) used as a reference in the description of the connection rule, the following is obtained.
When coupling with the photodiode of the unit circuit C adjacent to the upper side, the switch S4 of the unit circuit C adjacent to the upper side is turned on.
[0055]
When coupling with the photodiode of the unit circuit C adjacent to the lower side, the switches S5 and S6 of the reference unit circuit and the switch S5 of the unit circuit C adjacent to the lower side are turned on.
When coupling with the photodiode of the unit circuit B adjacent to the right, the switch S5 of the reference unit circuit and the switches S5 and S6 of the unit circuit B adjacent to the right are turned on.
When combining with the photodiode of the unit circuit B adjacent to the left, the switch S4 of the reference unit circuit is turned on.
[0056]
In this way, the output signal sum of the photodiode is introduced to the connection node X of the reference unit circuit. The output signal sum of the photodiode guided to the connection node X is guided to a desired output terminal by the method (15) described later.
The above rules can also be applied to other unit circuits A in the semiconductor device 60. Also, the unit circuits B, C, and D in which the direction of the reference side is different from that of the unit circuit A (the direction of the reference side of the unit circuit D is considered to be 180 ° different from the direction of the reference side of the unit circuit A) Since the rules for coupling the output signals of the photodiodes of the unit circuits adjacent to each other are the same, detailed description is omitted.
[0057]
(12) When combining the output signals of the photodiodes of the unit circuits located one apart in the up, down, left, and right directions, either of the switches S2 and S3 is turned on for both unit circuits to be combined. To do. Further, the switch S1 of another one or two unit circuits adjacent to at least one of the unit circuits to be coupled is turned on.
For example, paying attention to the same unit circuit A as in (11) above, a unit circuit photodiode in which only one unit circuit is sandwiched between the reference in any of the upper, lower, left, and right directions, and a reference photodiode Consider the case where the output signals are combined.
[0058]
In FIG. 4, in the case of coupling with the photodiode of the unit circuit A that is positioned two above the reference, the switch S2 of the reference unit circuit and the switch S2 of the unit circuit A that is two above are turned on (the following description) (See Fig. 5 for the position of each switch.) Further, the switch S1 of the unit circuit C adjacent above the reference and the switch S1 of the unit circuit B adjacent leftward with respect to the unit circuit A two above the reference are turned on.
[0059]
In FIG. 4, in the case of coupling with the photodiode of the unit circuit A that is positioned two below the reference, the switch S2 of the reference unit circuit A and the switch S2 of the unit circuit A that is two lower are turned on. Further, the switch S1 of the unit circuit C adjacent below the reference and the switch S1 of the unit circuit B adjacent left to the reference are turned on.
[0060]
In FIG. 4, in the case of coupling with the photodiode of the unit circuit A that is positioned two right relative to the reference, the switch S3 of the reference unit circuit 2 and the switch S2 of the right unit circuit A are turned on. Further, the switch S1 of the unit circuit D adjacent to the upper right with respect to the reference is turned on.
[0061]
In FIG. 4, in the case of coupling with the photodiode of the unit circuit A that is located two to the left of the reference, the switch S2 of the reference unit circuit and the switch S3 of the unit circuit A that is two left are turned on. Further, the switch S1 of the unit circuit D adjacent to the upper left with respect to the reference is turned on.
[0062]
In this way, similar to (11), the output signal sum of the photodiode is introduced to the connection node X of the reference unit circuit.
This rule can be applied to other unit circuits A in the semiconductor device 60. The same rules apply to the unit circuits B, C, and D whose reference side direction is different from that of the unit circuit A in the case where the output signals of the photodiodes of the unit circuits positioned one above the other are vertically separated. Therefore, detailed description is omitted.
[0063]
(13) When combining the output signals of the photodiodes of the unit circuits located two or more apart in any of the top, bottom, left and right directions, it is the same as (12). That is, for both unit circuits to be coupled, either of the switches S2 and S3 is turned on. Further, the switches S1 of the other two or more unit circuits are turned on.
[0064]
(14) The switches S2, S3, S4, and S5 are always turned off for the unit circuit to which the photodiode that does not want to extract the output signal belongs.
[0065]
(15) When the output signal of the photodiode of one unit circuit is led to the output terminal (from the connection node X), the switch closer to the output terminal to be output is turned on among the switches S2 and S3 of this unit circuit. Then, the switch S1 of the other unit circuit between the turned-on switch S2 or S3 and the output terminal is turned on. Thus, when the output signal of the photodiode of another unit circuit is led to the connection node X connected to the output terminal according to the rules (11) to (13), the output terminal has the photodiode of the photodiode. The output signal sum is output.
The above is the description of the programming method.
[0066]
<Effect of this embodiment>
The unit circuit of this embodiment can connect an infinite number of pieces in the plane direction according to the connection rule described above. In addition, since the unit circuit itself includes a switch and a wiring, no separate wiring for connecting the unit circuits is necessary when the unit circuit is expanded in the surface direction. Furthermore, the shape of the semiconductor device formed by connecting a large number of unit circuits is not limited to a rectangle when viewed in a plan view, and can be a desired shape, for example, as shown in FIG.
[0067]
In the programming method of the present embodiment, it is possible to combine output signals between photodiodes of unit circuits adjacent vertically and horizontally. It is also possible to combine the output signals of the photodiodes of the unit circuits that are located one or more apart in either the top, bottom, left or right direction. Furthermore, a desired photodiode output signal can be output to a desired output terminal. As a result, output signals between desired photodiodes can be combined, and the combined output signal can be output from a desired output terminal.
[0068]
Therefore, for example, if this embodiment is applied as shown in steps S1 to S3 below, a semiconductor light receiving element having a light receiving portion having an arbitrary shape can be manufactured in a short period of time.
[0069]
[Step S1]
First, a large number of semiconductor devices in which a sufficient number of unit cells are arranged in a matrix and connected together with output terminals in accordance with connection rules are manufactured as IC packages. The IC package here is one in which output terminals and terminals connected to wiring necessary for writing to the flash memory are provided outside the package.
[0070]
[Step S2]
The light receiving wavelength range of the light receiving unit is selected according to the customer specific specifications. For example, the unit cell of this embodiment can be used as an optical pickup IC for a DVD-ROM if the output signal of the photodiode AD of the unit circuit A is extracted at the time of programming in the next step S3. If the output signal of the photodiode BD is extracted, the output signal of the photodiode DD is extracted as a blue-ray-disc optical pickup IC. If the output signal of the photodiode CD is extracted, the output signal of the photodiode DD is extracted as an optical pickup IC of the CD-ROM. Then, it can be used as an optical pickup IC for DVD-R.
[0071]
[Step S3]
In order to connect the connection node X of the unit circuit (any one of A, B, C, and D) selected in step S2 in the desired unit cell in accordance with the customer specifications, the terminal of the IC package is connected to the desired output terminal. Programming.
[0072]
Thus, if a large number of IC packages before programming are prepared in advance and only programming is performed later according to customer specifications, the manufacturing cost per unit price can be reduced.
Further, programming is performed as a write operation and an erase operation for the flash memory. Therefore, once written information is not lost, and it is not necessary to program the connection information every time it is used. Further, by programming again, the pattern of which photodiode output signal is output from which output terminal can be changed without limit.
[0073]
<Supplementary items of this embodiment>
[1] In the semiconductor device 60 of the present embodiment, an example in which a large number of unit cells 50 including four unit circuits are connected has been described. The present invention is not limited to such an embodiment.
For example, without using the concept of unit cell 50, one or a plurality of semiconductor devices in which a sufficient number of unit circuits are arranged in a matrix and connected together with output terminals in accordance with a connection rule may be formed on a semiconductor substrate. Hereinafter, this semiconductor substrate is referred to as a base wafer, and a number of these are prepared. However, the base wafer here does not have an optical filter.
[0074]
Then, the entire surface of the semiconductor device is covered with an optical filter having a transmission wavelength region that meets the customer's specifications. Thereafter, after packaging, programming is performed in the same manner as in step S3, so that a semiconductor device including a light receiving portion having a desired shape and a light receiving wavelength region can be manufactured in a short period of time.
[0075]
[2] The example in which the light receiving wavelength range of the photodiode of each unit circuit of the unit cell 50 is set in advance has been described assuming a DVD optical pickup IC or the like. The present invention is not limited to such an embodiment.
For example, the light receiving wavelength range of the unit cell 50 may be set so as to be a Bayer array. That is, the light receiving wavelength range of the photodiodes AD and DD may be in the vicinity of green light, the light receiving wavelength range of the photodiode BD may be in the vicinity of red light, and the light receiving wavelength range of the photodiode CD may be in the vicinity of blue light.
[0076]
In this way, desired spectral characteristics can be obtained by changing the light receiving characteristics of each photodiode according to the transmission wavelength region of the optical filter and guiding an arbitrary sum of the output signals of these photodiodes to the output terminal.
[0077]
[3] The example in which one photodiode is formed in one unit circuit has been described. The present invention is not limited to such an embodiment. For example, a plurality of photodiodes connected to the connection node X may be formed in one unit circuit, and the light receiving surfaces of these photodiodes may be covered with optical filters having different light receiving wavelength ranges.
[0078]
[4] In the above-described programming method, the example in which the output signals of the photodiodes of the unit circuits adjacent in one of the upper, lower, left, and right directions, or positioned at a distance of one or more are coupled is described. The present invention is not limited to such an embodiment. You may make it couple | bond the output signal of the photodiode of the unit circuits located diagonally.
[0079]
[5] The example in which the pattern of which photodiode output signal is output from which output terminal is performed by writing to the flash memory has been described. The present invention is not limited to such an embodiment.
For example, in the unit circuit A shown in FIG. 1, the flash memories AM1 to AM6 and the switches SW1 to SW6 are omitted, and a unit circuit in which six locations where the switches SW1 to SW6 are omitted is connected by wiring is used. Then, assuming that the terminals A to Q of the switches SW1 to SW6 are present in the connection of the unit circuit, the above-described connection rule may be applied as it is based on the positions of these terminals A to Q.
[0080]
Further, assuming that the switches SW1 to SW6 are present, the above-described programming method is applied as it is. Specifically, the wiring at the position corresponding to the “switch to be turned off in programming” may be cut with a laser or the like. In this way, although rewriting is not possible, the present invention can be implemented in a form different from writing to the flash memory.
[0081]
[6] Finally, the correspondence between the claims and the embodiment will be described. In addition, the correspondence shown below is one interpretation for reference, and does not limit the present invention.
The first light receiving unit described in the claims corresponds to any one of the photodiodes AD, BD, CD, and DD.
The first optical filter according to the claims corresponds to an optical filter covering the light receiving surface of the first light receiving unit.
[0082]
The second light receiving unit described in the claims corresponds to any one of the photodiodes AD, BD, CD, and DD that does not correspond to the first light receiving unit.
The second optical filter according to the claims corresponds to an optical filter that covers the light receiving surface of the second light receiving unit.
“Programming” recited in the claims corresponds to “outputting a desired photodiode output signal to a desired output terminal by turning on or off the flash memory”.
[0083]
The connection circuit described in claims corresponds to the flash memories M1 to M6 and the switches S1 to S6.
The storage unit described in the claims corresponds to the flash memories M1 to M6.
The “signal by programming” recited in the claims corresponds to “a high or low level voltage applied to the gates of the switches S1 to S6 during the read operation of the flash memory”.
[0084]
【The invention's effect】
In one embodiment of the present invention, a semiconductor device includes a plurality of output terminals, a plurality of light receiving portions, and a connection circuit. The connection circuit receives programming that designates a desired connection pattern for the plurality of output terminals and the plurality of light receiving units, and connects them in a changeable manner. Therefore, for example, if a large number of semiconductor devices before programming are prepared in advance and only programming is performed later according to customer-specific specifications, a semiconductor device having a light receiving portion of any shape can be provided in a short delivery time.
[0085]
In another embodiment of the present invention, the unit circuit includes a plurality of switches that switch conduction or insulation according to programming and a light receiving element, and can be connected indefinitely according to the connection rule. Therefore, if a semiconductor device constituted by connecting a large number of unit circuits according to the connection rule is prepared in advance and only programming is performed later, the same effect as described above can be obtained.
[Brief description of the drawings]
FIG. 1 is a circuit diagram of a unit circuit of a semiconductor device according to an embodiment.
FIG. 2 is a schematic cross-sectional view showing details of the flash memory of FIG. 1;
FIG. 3 is a circuit diagram of a unit cell configured by four unit circuits.
FIG. 4 is a schematic block diagram of the semiconductor device of the present embodiment.
5 is a circuit diagram showing details of the semiconductor device of FIG. 4;
FIG. 6 is an example of a circuit diagram when there is a connection node between terminals F of three adjacent unit circuits.
[Explanation of symbols]
A, B, C, D Unit circuit
18 Resistance
20 Source terminal
22 High-concentration N-type source region
24 High concentration N-type drain region
26 Drain terminal
30 Insulating film
32 Floating gate
34 Insulating film
36 Control gate
38 Gate terminal
50 unit cells
60 Semiconductor devices
AD, BD, CD, DD Photodiode
M1-M6 flash memory
S1-S6 switch

Claims (6)

Multiple output terminals,
A first optical filter having a first optical filter that selectively transmits light of a specific wavelength on the light receiving surface side and outputting a signal corresponding to the amount of received light;
A second light receiving unit that has a second optical filter on the light receiving surface side that is different in wavelength range of transmitted light from the first optical filter, and outputs a signal corresponding to the amount of received light;
The first light receiving unit, the second light receiving unit, and the plurality of output terminals are programmed according to a programming instruction for a desired connection pattern for the plurality of output terminals. A semiconductor device comprising: a connection circuit for connecting in a changeable manner. The semiconductor device according to claim 1,
2. The semiconductor device according to claim 1, wherein the connection circuit includes a storage unit that stores a connection pattern instructed by the programming. The semiconductor device according to claim 2,
The semiconductor device is a rewritable nonvolatile semiconductor memory device. A first switch that has a terminal A, a terminal B, and a terminal C, receives a signal from the terminal A by programming, and switches the conduction or insulation between the terminal B and the terminal C according to the signal;
A terminal D, a terminal E, and a terminal F connected to the terminal C. The terminal D receives a signal from the programming, and according to this, conduction or insulation between the terminal E and the terminal F A second switch for switching between,
A terminal G; a terminal H connected to the terminal B; and a terminal I connected to the terminal E. The terminal G receives a signal by the programming, and accordingly the terminal H and the terminal A third switch for switching conduction or insulation between the terminals I;
A terminal J, a terminal K, and a terminal L connected to the terminal E; the terminal J receives a signal from the programming; and the conduction or insulation between the terminal K and the terminal L according to the signal. A fourth switch for switching between
A terminal M, a terminal N, and a terminal O connected to the terminal E. The terminal M receives a signal from the programming and conducts or insulates the terminal N and the terminal O according to the signal. A fifth switch for switching between,
A terminal P, a terminal Q, and a terminal R connected to the terminal N; the terminal P receives a signal from the programming, and the conduction or insulation between the terminal Q and the terminal R according to the signal; A sixth switch for switching between,
A unit circuit comprising a light receiving element connected to a connection node X of the terminal E, the terminal I, the terminal L, and the terminal O. 5. A semiconductor device, wherein the plurality of unit circuits according to claim 4 and the plurality of output terminals are regularly connected so as to satisfy the following (1) to (8).
(1) The terminal R of the sixth switch of another unit circuit adjacent to the unit circuit is connected to the terminal Q of the sixth switch of one unit circuit, or another terminal Do not connect the unit circuit.
(2) The terminal K of the fourth switch of another unit circuit adjacent to the unit circuit is connected to the connection node X of one unit circuit, or another unit circuit is connected do not do.
(3) The terminal F of the second switch of one unit circuit is connected to the terminal F of the second switch of up to three other unit circuits adjacent to the unit circuit, Alternatively, another unit circuit is not connected.
(4) The output terminal is connected to the terminal F of the unit circuit that is not connected to the terminal F of another unit circuit.
(5) When there is a connection node between the terminals F of two unit circuits adjacent to each other by the connection method of (3), the output terminal is connected to the connection node.
(6) When there is a connection node between the terminals F of the three unit circuits adjacent to each other by the connection method of (3), the output terminal is connected to this connection node.
(7) When there is a connection node between the terminals F of the four unit circuits adjacent to each other by the connection method of (3), the output terminal is not connected to this connection node.
(8) The output terminals are not connected to each other. Multiple output terminals,
A plurality of light receiving units that output signals according to the amount of received light;
A rewritable nonvolatile semiconductor memory device that receives programming for instructing a desired connection pattern for the plurality of light receiving units and the plurality of output terminals, and stores this.
A semiconductor device comprising: a wiring circuit that connects the plurality of light receiving units and the plurality of output terminals in a changeable manner based on information stored in the nonvolatile semiconductor memory device.

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