JP2005086845A - Switching power supply and control unit therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a control unit for a switching power supply which prevents an output voltage from being varied owing to phase delay in the switching power supply using "Bang-Bang control", and to provide the switching power supply. <P>SOLUTION: The control unit 6 for the switching power supply controls switching elements 2, 3 of the switching power supply 1. The control unit 6 includes an arithmetic means 11 for performing integration together with the cutting-off of a low frequency component by calculating a signal corresponding to a drive signal DS for driving the switching elements 2, 3, a correcting means 12 for correcting an output voltage V<SB>O</SB>detected in the switching power supply 1 by the signal calculated by the arithmetic means 11, and a drive signal generating means 13 for generating the drive signal DS based on the output voltage V<SB>C</SB>corrected by the correcting means 12 and a target voltage V<SB>R</SB>in the switching power supply. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a switching power supply control device and switching power supply device using Bang-Bang control.

  The switching power supply device has features such as small size, light weight and high efficiency, and loads such as CPU [Central Processing Unit], MPU [Micro Processing Unit], DSP [Digital Signal Processor], etc. incorporated in various devices. Widely used as a power source. With these loads, lower voltage and higher speed processing are progressing, and current consumption is increasing. Therefore, in the switching power supply device, the load current suddenly increases or decreases depending on the processing load in the load. In addition, the switching power supply device has a feature that it can easily cope with a wide input voltage range, and is also used as a power supply that can be supported in several countries around the world and a power supply with a wide input voltage specification setting. In a switching power supply device, it is necessary to ensure a stable output voltage against such changes in load current and input voltage. Furthermore, even when the output voltage has a transient response to a sudden change in load current or input voltage, the switching power supply is required to quickly recover to a stable state.

  For this purpose, the switching power supply device is provided with a control device such as a digital control type controller IC [Integrated Circuit], and this control device turns on and off switching elements such as FET [Field Effect Transistor] at high speed (non- Patent Document 1). Generally, PWM [Pulse Width Modulation] control by feedback is used in a switching power supply device, and the control device generates a PWM signal for turning on / off the switching element. As a general method of PWM control in a switching power supply device, the output voltage of the switching power supply device and a target voltage are differentially amplified by a differential amplifier using an operational amplifier, and the differentially amplified signal and the ramp signal are compared by a comparator. By doing so, the pulse width in the PWM signal is set.

In recent years, further lowering of the voltage of a load such as a CPU and speeding up of a clock have progressed, and switching power supply devices are required to further speed up response to fluctuations in load current and output voltage. However, in the case of PWM control, since a differential amplifier is used before the comparator, there is a limit to speeding up. Therefore, in order to realize further higher speed, it has been studied to use Bang-Bang control in the switching power supply device. As a general method of Bang-Bang control in a switching power supply device, an comparator compares an output voltage of the switching power supply device with a target voltage, and an on signal and an off signal in a drive signal according to the magnitude relationship between the two voltages. Set.
Harada Kosuke, Ninomiya Tadashi and Keibun Kenji, “Basics of Switching Converters”, Corona, p. 48-79

  However, in the Bang-Bang control, since the output voltage detected by the switching power supply device is directly compared by the comparator, if noise is added to the output voltage, the on / off signal of the drive signal becomes intense according to the noise. fluctuate. Therefore, when performing the Bang-Bang control, it is necessary to remove the noise by passing the detected output voltage through a low-pass filter before the comparison by the comparator. When the low-pass filter is used, the phase of the output voltage after passing through the low-pass filter is delayed with respect to the actually detected output voltage. For this reason, the ON / OFF signal is set based on the output voltage including the phase delay for the drive signal, so that switching between the ON signal and the OFF signal of the drive signal causes the actual output voltage fluctuation in the switching power supply device. A delay occurs. As a result, in the switching power supply controlled by this drive signal, even when the load current is constant, the fluctuation (ripple) of the output voltage becomes large. Accordingly, the cycle of the output voltage becomes longer (and consequently the cycle of the drive signal becomes longer), and the responsiveness in the switching power supply device deteriorates.

  Therefore, an object of the present invention is to provide a switching power supply control device and a switching power supply device that prevent fluctuations in output voltage caused by phase delay in a switching power supply device that uses Bang-Bang control.

  The control device for a switching power supply according to the present invention computes a signal corresponding to a drive signal for driving a switching element of the switching power supply, detects low frequency components and performs integration, and is detected by the switching power supply. Correction means for correcting the output voltage obtained by the signal calculated by the calculation means, and drive signal generation means for generating a drive signal based on the output voltage corrected by the correction means and the target voltage in the switching power supply device. It is characterized by.

  In this switching power supply controller, the calculation means cuts off the low frequency component of the signal corresponding to the drive signal and performs integration, and the correction means calculates the output voltage detected by the switching power supply by the calculation means. Correct by signal. Further, in this control device, in order to control the output voltage to the target voltage by Bang-Bang control by feedback, the drive signal is generated based on the output voltage corrected by the correction means by the drive signal generation means and the target voltage of the switching power supply device. Is generated. In the control device, the switching element is driven and controlled by this drive signal. In this way, the control device feeds back the drive signal that is the output of the control device, and performs an operation for phase advance (integration) and DC gain securing (low frequency component cutoff) on the signal corresponding to the drive signal. The output value is corrected using the calculated value, and the drive signal is generated based on the corrected output voltage. In the control device, the output voltage detected by the switching power supply device becomes a phase lag due to passing through a low-pass filter or the like, but the phase lag of the output voltage is compensated by the above correction. With this phase compensation, the control device can generate a drive signal based on a corrected output voltage with little or no delay with respect to actual output voltage fluctuations. The signal is a signal that switches between the on signal and the off signal without delay with respect to the voltage fluctuation. As a result, in the switching power supply device, since the switching element is switched by a drive signal having no phase delay, the fluctuation (ripple) of the output voltage does not increase due to the phase delay, and the high-speed response by the Bang-Bang control. Is possible.

  The signal corresponding to the drive signal is a variety of signals representing the ON / OFF signal of the drive signal. For example, the drive signal itself generated by the drive signal generation means, and the switching operation of the switching element driven by the drive signal (A voltage input to the smoothing circuit of the switching power supply device).

  In the switching power supply device control device of the present invention, the calculation means may be a calculation circuit that combines a high-pass filter function and an integration function.

  In this switching power supply control device, a low-frequency component is cut off from the signal corresponding to the drive signal by the arithmetic circuit that combines the high-pass filter function and the integration function, and integration is performed to obtain a signal corresponding to the drive signal. On the other hand, an operation that ensures phase advance and DC gain is performed.

  In the switching power supply controller according to the present invention, the calculation means includes a high-pass filter that cuts off a low-frequency component included in a signal corresponding to a drive signal, and an integration that integrates a signal whose low-frequency component is cut off by the high-pass filter. It is good also as a structure containing a means.

  In this switching power supply controller, the low-frequency component included in the signal corresponding to the drive signal is cut off by the high-pass filter, the signal that cut off the low-frequency component is integrated by the integrating means, and the signal corresponding to the drive signal is integrated. On the other hand, an operation for ensuring the phase advance and ensuring the DC gain is performed.

  In the switching power supply controller of the present invention, it is preferable that the high-pass filter function or the high-pass filter in the arithmetic circuit is a secondary high-pass filter.

  In this switching power supply controller, the low-frequency component of the drive signal can be reliably cut off by using a secondary high-pass filter as the high-pass filter in the computing means.

  The control device for a switching power supply according to the present invention includes a low pass filter that cuts off a high frequency component of the output voltage detected by the switching power supply, and the correction means corrects the output voltage from which the high frequency component is cut off by the low pass filter. A configuration is preferable.

  In this switching power supply control device, the low-frequency filter blocks the high-frequency component of the output voltage detected by the switching power supply, and the correction means corrects the output voltage that has passed through the low-pass filter. Therefore, in this control apparatus, since it removes by the unnecessary noise which entered into the output voltage, the drive signal which eliminated the influence by noise can be generated. Further, in the control device, a phase lag occurs in the output voltage by passing through the low-pass filter, but the phase lag can be eliminated by phase compensation by the calculation means and the correction means.

  In the switching power supply controller according to the present invention, it is preferable that the calculation means has a high gain in a frequency region centered on a resonance frequency of an LC circuit configured in the switching power supply.

  This control device for a switching power supply device is configured such that the gain characteristic of the switching power supply device is such that the gain in the frequency region centered on the resonance frequency of the LC circuit is high. That is, in this control device, the signal corresponding to the drive signal is calculated, and the output voltage is corrected by the calculated value, so that the frequency domain component centered on the resonance frequency of the LC circuit is changed to another frequency domain. More light can pass through.

  The switching power supply device according to the present invention includes a control device that generates a drive signal for switching control of the switching element, and a switching element that is turned on / off based on the drive signal generated by the control device. It is any one of the control devices described above.

  In this switching power supply device, the control device is configured as the control device, and the switching element is turned on / off by a drive signal generated based on the phase-compensated output voltage. In this switching power supply device, the input voltage is converted into the output voltage by turning on / off the switching element so as to be the target voltage. By being controlled by the control device, in this switching power supply device, the switching element is switched by a drive signal having no phase lag, so that the fluctuation (ripple) of the output voltage does not increase due to the phase lag. Fast response by Bang-Bang control becomes possible.

  According to the present invention, in a switching power supply apparatus using Bang-Bang control, it is possible to prevent fluctuations in the output voltage due to phase delay by compensating the phase of the output voltage used for generating the drive signal. it can.

  Embodiments of a switching power supply controller and a switching power supply according to the present invention will be described below with reference to the drawings.

  In the present embodiment, the switching power supply device according to the present invention is applied to a step-down DC / DC converter, and the switching power supply control device according to the present invention is used to control a switching element of the DC / DC converter. This is applied to the controller IC that generates The controller IC according to the present embodiment is a digital control type that performs processing at high speed, and performs feedback control of the DC / DC converter by Bang-Bang control.

  The configuration of the DC / DC converter 1 will be described with reference to FIG. FIG. 1 is a configuration diagram of a DC / DC converter.

The DC / DC converter 1 is a power supply circuit that converts a DC input voltage V _I into a DC output voltage V _O (<V _I ) and can be used in various applications, for example, in a VRM [Voltage Regulator Module]. Is done. The DC / DC converter 1 is a switching regulator that turns on / off a switching element by Bang-Bang control in order to increase the response speed. Input voltage _{V I} is variable, input voltage range (e.g., 5～12V) is set. The output voltage V _O is set to a constant target voltage (for example, 1 V) according to the load L. The load L corresponds to, for example, a CPU, an MPU, or a DSP such as a communication device such as a computer or a router, and the load current greatly varies depending on the processing load.

The DC / DC converter 1 includes two MOSFETs 2 and 3 as switching elements, an inductor 4, a capacitor 5, and a controller IC 6 as main components. The MOSFET 2 is turned on when the drive signal DS from the controller IC 6 is a high signal. The MOSFET 3 is turned on when the drive signal DS is a low signal. The inductor 4 and the capacitor 5 constitute a smoothing circuit. Pulse voltage equal to the input voltage V _I amplitude by power S by the switching operation of MOSFET2,3 is outputted to the smoothing circuit averages the pulse voltage in the smoothing circuit. The controller IC 6 generates the drive signal DS by the Bang-Bang control based on the output voltage V _O so that the output voltage V _O detected by the voltage sensor (not shown) becomes the target voltage, and the MOSFETs 2, 3 Control on / off of.

The controller IC 6 will be described in detail with reference to FIGS. FIG. 2 is a circuit diagram showing an example when the arithmetic circuit of FIG. 1 is configured by a digital circuit. FIG. 3 is a circuit diagram showing an example when the arithmetic circuit of FIG. 1 is configured by an analog circuit. FIG. 4 is a diagram illustrating an example of a control circuit that performs feedback in a feedback loop. FIG. 5 is a diagram illustrating the gain characteristic of the transfer function in the control circuit of FIG. FIG. 6 is a diagram illustrating a phase characteristic of a transfer function in the control circuit of FIG. FIG. 7 is a diagram showing the gain characteristic of the transfer function in the controller IC of FIG. FIG. 8 is a diagram showing the phase characteristics of the transfer function in the controller IC of FIG. Figure 9 is a timing chart of the controller IC, (a) is an output voltage V _O is input to the controller IC, a high-frequency cutoff output voltage V _LPF after (b) is passed through the low-pass filter, ( c) is a phase compensation signal V _S output from the arithmetic circuit, (d) is a corrected output voltage V _C and the target voltage V _R to be inputted to the comparator, (e) the drive signal output from the controller IC DS.

The controller IC 6 is a digital circuit that operates based on a master clock (for example, 10 MHz to 100 MHz). The controller IC 6, the feedback control by Bang-Bang control, generates a driving signal DS based on the output voltage _{V O} of the A / D converted digital and the target voltage _{V R.} In particular, the controller IC 6, in order to remove noise included in the output voltage V _O, to cut off a high frequency component of the output voltage V _O. Further, the controller IC 6 feeds back the generated drive signal DS by a minor loop to realize phase compensation and DC gain securing, and after the high frequency component is cut off by the phase compensation signal V _S obtained by performing a predetermined calculation on the drive signal DS. The output voltage V _LPF is corrected. For this purpose, the controller IC 6 includes a low-pass filter 10, an arithmetic circuit 11, an adder 12, a comparator 13, and a power supply 14.

  In the present embodiment, the low-pass filter 10 corresponds to the low-pass filter described in the claims, the arithmetic circuit 11 corresponds to the arithmetic means (arithmetic circuit) described in the claims, and the adder 12 claims. The comparator 13 corresponds to the drive signal generation means described in the claims.

The low-pass filter 10 is inputted with the output voltage V _O after being detected by the DC / DC converter 1 and converted into digital. The low-pass filter 10 cuts off the high-frequency component of the output voltage V _O and outputs a high-frequency cut-off output voltage V _LPF . Output voltage V _O removes noise included in the output voltage V _O by passing the low-pass filter 10 prevents the high signal and the low signal of the driving signal DS by noise cut to換Ru. Incidentally, when the low-pass filter 10 is passed, the phase of the high-frequency cutoff output voltage V _LPF is delayed with respect to the phase of the output voltage V _O detected by the DC / DC converter 1 (see FIGS. 9A and 9B). ). The cut-off frequency of the low-pass filter 10 is 1 MHz, for example.

The arithmetic circuit 11 is an arithmetic circuit in which a secondary high-pass filter and an integrator are combined in order to realize phase advance and DC gain securing. In the arithmetic circuit 11, the low frequency component is blocked and integrated with respect to the drive signal DS output from the comparator 13, and the phase compensation signal V _S is output. Thus, by providing the integrator in the arithmetic circuit 11, the transfer function of the controller IC 6 becomes a phase advance. The phase compensation of the output voltage V _LPF in which the phase delay is generated by the low-pass filter 10 can be realized. Further, the low-frequency component is cut off by the secondary high-pass filter in the arithmetic circuit 11, so that the integrated value can be prevented from being saturated (diverged to infinity).

  As shown in FIG. 2, the arithmetic circuit 11 includes D flip-flops 11a to 11c as delay units, a multiplier 11d having a multiplication coefficient (b1 + b2), a multiplier 11e having a multiplication coefficient (b1 * b2), and an adder 11f. Can be configured. The digital arithmetic circuit 11 has a circuit configuration based on a transfer function H (Z) expressed by the following equation (1).

なお、演算回路１１は、図２に示す回路構成以外でも、式（１）の伝達関数を満たすデジタル回路であればよい。あるいは、制御手段をアナログ回路で構成する場合、演算回路１１は、図３に示すように、コンデンサ１１ｇ，１１ｈ、抵抗１１ｉ，１１ｊで構成することができる。このアナログの演算回路１１の回路構成は、以下の式（２）により表される伝達関数Ｈ（Ｓ）に基づいて構成される。

The arithmetic circuit 11 may be a digital circuit that satisfies the transfer function of Expression (1) other than the circuit configuration shown in FIG. Alternatively, when the control means is composed of an analog circuit, the arithmetic circuit 11 can be composed of capacitors 11g and 11h and resistors 11i and 11j as shown in FIG. The analog arithmetic circuit 11 has a circuit configuration based on a transfer function H (S) expressed by the following equation (2).

式（２）において、Ｃ１はコンデンサ１１ｇの静電容量であり、Ｃ２はコンデンサ１１ｈの静電容量であり、Ｒ１は抵抗１１ｉの抵抗値であり、Ｒ２は抵抗１１ｊの抵抗値である。

In Expression (2), C1 is the capacitance of the capacitor 11g, C2 is the capacitance of the capacitor 11h, R1 is the resistance value of the resistor 11i, and R2 is the resistance value of the resistor 11j.

The adder 12 includes a high-frequency cutoff output voltage _{V LPF} and phase compensation signal _{V S} is input, and adds the phase compensation signal _{V S} to the high-frequency cutoff output voltage _{V LPF,} the added value _(V LPF + _{V S)} correction output and outputs as a voltage _{V C} to the comparator 13.

The comparator 13 generates a driving signal DS based on the corrected output voltage _{V C} and the target voltage _{V R.} Therefore, the comparator 13, the correction output voltage V _C to the inverting input terminal is input, the non-inverting input terminal is generated by the power supply 14 target voltage V _R is input. The comparator 13 compares the corrected output voltage V _C and the target voltage V _R, the corrected output voltage V _C is higher than the target voltage V _R as a low signal, the corrected output voltage V _C is below the target voltage V _R high A drive signal DS as a signal is generated (see FIGS. 9D and 9E).

  Here, with reference to FIG. 4, the principle of realizing phase advance in the controller IC 6 will be described.

The control circuit 20 shown in FIG. 4 is configured in the same manner as the controller IC 6 and shows an example of a control circuit that feeds back an integrated value of the high-frequency cutoff output voltage V _LPF by a feedback loop. The control circuit 20 includes an integrator 21 whose transfer function is Gd, a multiplier 22 and an adder 23 whose transfer function is kd. The transfer function Gc (Z) of the control circuit 20 is expressed by the following equation (3). Further, the transfer function Gd (Z) of the integrator 21 is expressed by the following equation (4).

式（４）を式（３）に代入すると、制御回路２０の伝達関数Ｇｃ（Ｚ）は、以下に示す式（５）で求まる。

When Expression (4) is substituted into Expression (3), the transfer function Gc (Z) of the control circuit 20 is obtained by Expression (5) shown below.

ここで、一次のハイパスフィルタの伝達関数Ｈ（Ｚ）は、（１−Ｚ^−１）／（１−ｂ＊Ｚ^−１）；（ｂは係数）により表される。したがって、式（５）の伝達関数Ｇｃ（Ｚ）は、一次のハイパスフィルタの伝達関数で表されることが判る。すなわち、図４に示す帰還ループに積分器２１を有する制御回路２０の伝達関数Ｇｃ（Ｚ）は、一次のハイパスフィルタの伝達関数で表されることになる。一般に、一次のハイパスフィルタの伝達関数は、位相進みとなる。したがって、図４に示す帰還ループに積分器２１を有する制御回路２０の伝達関数Ｇｃ（Ｚ）も位相進みとなる。

Here, the transfer function H (Z) of the first-order high-pass filter is represented by (1-Z ⁻¹ ) / (1-b * Z ⁻¹ ); (b is a coefficient). Therefore, it can be seen that the transfer function Gc (Z) in Expression (5) is expressed by the transfer function of the first-order high-pass filter. That is, the transfer function Gc (Z) of the control circuit 20 having the integrator 21 in the feedback loop shown in FIG. 4 is represented by the transfer function of the first-order high-pass filter. In general, the transfer function of the first-order high-pass filter is a phase advance. Therefore, the transfer function Gc (Z) of the control circuit 20 having the integrator 21 in the feedback loop shown in FIG.

  This can also be seen from the gain characteristic and phase characteristic of the transfer function Gc in the control circuit 20 shown in FIGS. In the figure showing the gain characteristics, the vertical axis represents the gain [dB] and the horizontal axis represents the frequency [Hz]. In the diagram showing the phase characteristics, the vertical axis is the phase [°], and the horizontal axis is the frequency [Hz].

  As shown in FIG. 5, the gain of the transfer function Gc in the control circuit 20 decreases at a rate of −20 [dB / dec]. This is because the transfer function Gc of the control circuit 20 is proportional to the frequency.

  As shown in FIG. 6, the phase of the transfer function Gc in the control circuit 20 is 90 ° in a frequency band lower than a predetermined frequency (in the vicinity of 10 kHz in FIG. 6). This indicates that the phase of the transfer function Gc in the control circuit 20 is a phase advance of 90 ° in the frequency band.

  From the above, since the controller IC 6 integrates the integrator with the arithmetic circuit 11 in the feedback loop, similarly to the control circuit 20, the transfer function is expressed as the transfer function of the first-order high-pass filter, and the phase advance Can be realized.

  Incidentally, the gain of the transfer function Gc in the control circuit 20 decreases at a rate of −20 dB / dec with respect to the decrease in frequency. This indicates that the DC gain of the transfer function Gc in the control circuit 20 is theoretically −∞ dB. The direct current gain is a gain value of a transfer function when the frequency is brought close to 0 as much as possible. Generally, the DC gain of the entire system including the control circuit is required to be about 20 to 60 dB. Therefore, it is necessary to design the circuit so that the DC gain of the entire system is about 20 to 60 dB. Therefore, the controller IC 6 fuses a second-order high-pass filter to the arithmetic circuit 11 to block the low-frequency component of the feedback signal due to the feedback loop, thereby preventing the gain from decreasing.

  The gain characteristics and phase characteristics of the transfer function in the controller IC 6 will be described with reference to FIGS. As shown in FIGS. 7 and 8, the gain characteristic and the phase characteristic of the transfer function of the controller IC 6 are secondary characteristics fused to the arithmetic circuit 11 among the characteristics in the case of only the integrator shown in FIGS. In the frequency region where the low-frequency component is blocked by the high-pass filter, the gain returns to 0 dB and the phase to 0 °.

In this way, by integrating the integrator and the secondary high-pass filter into the arithmetic circuit 11 included in the feedback loop of the controller IC6, the transfer function of the controller IC6 is advanced in phase, and a DC gain is also ensured. Therefore, the phase of the output voltage V _LPF delayed by the low-pass filter 10 (and hence the phase of the drive signal DS) can be compensated, and the DC / DC converter 1 can perform highly accurate control according to the output voltage V _O. In addition, the arithmetic circuit 11 has a gain characteristic that increases by 20 dB / dec in a low frequency region below a predetermined frequency and decreases by −20 dB / dec in a high frequency region from a predetermined frequency by adopting such a configuration. become. That is, the arithmetic circuit 11 has a gain characteristic like a band pass filter in which the transmittance in a predetermined frequency region is higher than the transmittance in other frequency regions. This predetermined frequency is the resonance frequency fn of the LC circuit formed by the inductor 4 and the capacitor 5 of the DC / DC converter 1 shown in Expression (6).

なお、式（６）において、Ｌ３はインダクタ４のインダクタンスであり、Ｃ３はコンデンサ５の静電容量である。共振周波数ｆｎとしては、例えば、１０ｋＨｚである。

In Expression (6), L3 is the inductance of the inductor 4, and C3 is the capacitance of the capacitor 5. The resonance frequency fn is, for example, 10 kHz.

  The operations of the DC / DC converter 1 and the controller IC 6 will be described with reference to FIGS.

An input voltage V _I is input to the DC / DC converter 1. Then, in the DC / DC converter 1, the MOSFETs 2 and 3 are alternately turned on / off based on the drive signal DS from the controller IC 6. Further, in the DC / DC converter 1, the inductor 4 and the capacitor 5 average the input voltage V _I output as a pulse during the ON period of the MOSFET 2, and output the voltage V _O. This output voltage V _O is detected by a voltage sensor and input to the controller IC 6.

When the detected output voltage V _O is input, the controller IC 6 cuts off the high frequency component of the output voltage V _O (see FIG. 9A). Further, the controller IC 6 calculates the phase compensation signal V _S by performing integration and blocking of the low frequency component on the generated drive signal DS (see FIG. 9C). Then, the controller IC 6 adds the phase compensation signal V _S to the high-frequency cutoff output voltage V _LPF to generate a corrected output voltage V _C (see FIGS. 9B to 9D). Subsequently, the controller IC 6, compares the corrected output voltage V _C and the target voltage V _R, corrected output voltage V _C is higher period than the target voltage V _R to the low signal, corrected output voltage V _C is the target voltage V _R A drive signal DS having a lower period as a high signal is generated (see FIGS. 9D and 9E). As described above, the controller IC 6 performs integration and low-frequency component cutoff on the drive signal DS of the DC / DC converter 1 in the feedback loop, and corrects the output voltage V _LPF after passing through the low-pass filter 10 by the calculated value. Therefore, the phase is advanced and the DC gain is secured.

In the controller IC 6, the phase of the output voltage V _LPF after passing through the low-pass filter 10 is delayed, but the phase of the corrected output voltage V _C advances by correcting the output voltage V _LPF with the phase compensation signal V _S. As a result, the phase of the corrected output voltage V _C is returned to the phase of the output voltage V _O detected in the DC / DC converter 1. Therefore, because it produces a driving signal DS based on the corrected output voltage V _C which is in the comparator 13 phase compensation cut換Ri the high signal and the low signal of the driving signal DS according to the variation of the output voltage V _O Switch to high accuracy. Therefore, the drive signal DS, the output voltage V _O becomes low signal is higher than the target voltage V _R, the output voltage V _O becomes high signal is lower than the target voltage V _R. This driving signal DS, the DC / DC converter 1, the MOSFET3 is turned on when the output voltage _{V O} is higher than the target voltage _{V R,} turned on MOSFET2 is when the output voltage _{V O} is lower than the target voltage _{V R} .

According to the controller IC6, the phase advance can be realized and the DC gain can be secured by the integration function and the high-pass filter function in the arithmetic circuit 11 in the feedback loop. Therefore, although the phase of the output voltage V _LPF is delayed by the low-pass filter 10, the controller IC 6 compensates the phase and secures the DC gain, and also compensates the phase of the entire DC / DC converter 1 and the DC gain. Is also secured. As a result, the DC / DC converter 1 can prevent the fluctuation (ripple) of the output voltage V _O from increasing due to the phase delay caused by the low-pass filter 10 (and hence the period of the output voltage V _O ). High-speed response can be realized by Bang-Bang control.

  As mentioned above, although embodiment which concerns on this invention was described, this invention is implemented in various forms, without being limited to the said embodiment.

  For example, in the present embodiment, the control device is configured by a digital circuit, but may be configured by an analog circuit. In the present embodiment, each unit of the control device is configured by a digital circuit (hardware) of the controller IC. However, each unit of the control device may be configured by a program (software) incorporated in a computer such as a microcomputer. . A program for realizing each means may be distributed by distribution via a storage medium such as a CD-ROM or the Internet, or may be distributed as a control device in a state of being incorporated in a computer.

  In this embodiment, the present invention is applied to a DC / DC converter. However, the present invention can also be applied to an AC / DC converter and a DC / AC converter. In this embodiment, the present invention is applied to a non-insulating and step-down converter having no transformer. However, the present invention can also be applied to an insulating converter having a transformer, and can also be applied to a step-up or step-up / step-down converter. is there.

  Further, in the present embodiment, the arithmetic unit is configured by an arithmetic circuit in which a high-pass filter function and an integration function are combined. However, an arithmetic circuit having a circuit configuration different from the circuit shown in FIG. The integrating circuit may be configured separately.

  In this embodiment, the present invention is applied to a switching power supply device in which a phase lag is generated by passing the output voltage through a low-pass filter. However, the present invention is also applicable to a switching power supply device in which a phase lag occurs in the output voltage due to another factor. .

  In this embodiment, the arithmetic circuit calculates the drive signal itself as a signal corresponding to the drive signal. Another signal such as a pulsed input voltage (voltage input to the LC smoothing circuit) after being switched by two MOSFETs may be calculated by an arithmetic circuit.

It is a block diagram of the DC / DC converter which concerns on this Embodiment. It is a circuit diagram which shows an example at the time of comprising the arithmetic circuit of FIG. 1 with a digital circuit. FIG. 2 is a circuit diagram illustrating an example when the arithmetic circuit of FIG. 1 is configured by an analog circuit. It is a figure which shows an example of the control circuit which feeds back in a feedback loop. FIG. 5 is a diagram illustrating gain characteristics of a transfer function in the control circuit of FIG. 4. FIG. 5 is a diagram illustrating phase characteristics of a transfer function in the control circuit of FIG. 4. It is a figure which shows the gain characteristic of the transfer function in the controller IC of FIG. It is a figure which shows the phase characteristic of the transfer function in the controller IC of FIG. 2 is a timing chart in the controller IC of FIG. 1, (a) is an output voltage input to the controller IC, (b) is a high-frequency cutoff output voltage after passing through a low-pass filter, and (c) is an arithmetic circuit. (D) is the corrected output voltage and target voltage input to the comparator, and (e) is the drive signal output from the controller IC.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... DC / DC converter, 2, 3 ... MOSFET, 4 ... Inductor, 5 ... Capacitor, 6 ... Controller IC, 10 ... Low pass filter, 11 ... Arithmetic circuit, 11a-11c ... D flip-flop, 11d, 11e ... Multiplier 11f, adder, 11g, 11h, capacitor, 11i, 11j, resistor, 12 ... adder, 13 ... comparator, 14 ... power supply, 20 ... control circuit, 21 ... integrator, 22 ... multiplier, 23 ... adder

Claims (7)

A calculation means for calculating a signal corresponding to a drive signal for driving the switching element of the switching power supply device, cutting off a low frequency component and performing integration;
Correction means for correcting the output voltage detected by the switching power supply device by a signal calculated by the calculation means;
A control device for a switching power supply comprising: drive signal generation means for generating a drive signal based on the output voltage corrected by the correction means and a target voltage in the switching power supply. 2. The control device for a switching power supply device according to claim 1, wherein the arithmetic means is an arithmetic circuit in which a high-pass filter function and an integration function are integrated. The calculation means includes a high-pass filter that cuts off a low-frequency component included in a signal corresponding to the drive signal, and an integration means that integrates a signal whose low-frequency component is cut off by the high-pass filter. The control device for a switching power supply device according to claim 1. 4. The switching power supply control device according to claim 2, wherein the high-pass filter function or the high-pass filter in the arithmetic circuit is a secondary high-pass filter. Including a low-pass filter that cuts off a high-frequency component of the output voltage detected by the switching power supply device;
5. The switching power supply control device according to claim 1, wherein the correction unit corrects an output voltage in which a high-frequency component is cut off by the low-pass filter. The switching power supply according to any one of claims 1 to 5, wherein the arithmetic means has a high gain in a frequency region centered on a resonance frequency of an LC circuit configured in the switching power supply device. Control device for equipment. A control device for generating a drive signal for switching control of the switching element;
A switching element that is turned on / off based on a drive signal generated by the control device,
The switching power supply device, wherein the control device is the control device according to any one of claims 1 to 6.

Images