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JP2005045046A - Process for producing multilayer printed wiring board - Google Patents

Process for producing multilayer printed wiring board Download PDF

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Publication number
JP2005045046A
JP2005045046A JP2003278157A JP2003278157A JP2005045046A JP 2005045046 A JP2005045046 A JP 2005045046A JP 2003278157 A JP2003278157 A JP 2003278157A JP 2003278157 A JP2003278157 A JP 2003278157A JP 2005045046 A JP2005045046 A JP 2005045046A
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Japan
Prior art keywords
hole
printed wiring
wiring board
multilayer printed
copper
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JP2003278157A
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Japanese (ja)
Inventor
Morio Take
杜夫 岳
Nobuyuki Ikeguchi
信之 池口
Katsuji Komatsu
勝次 小松
Yasuo Tanaka
恭夫 田中
Yoshifumi Takeuchi
敬文 竹内
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Mitsubishi Gas Chemical Co Inc
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Mitsubishi Gas Chemical Co Inc
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Priority to JP2003278157A priority Critical patent/JP2005045046A/en
Publication of JP2005045046A publication Critical patent/JP2005045046A/en
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  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a process for producing a high density multilayer printed wiring board having a through hole exhibiting excellent workability, economy and reliability. <P>SOLUTION: A copper clad multilayer substrate is made by aligning a multilayer board including electronic circuit conductors at high density in an inner layer and the copper foil is irradiated directly with a UV laser beam from above to open a through hole where the difference of diameter is 20% or less between the surface and rear and the hole diameter is preferably in the range of 20-100 μm on the incoming side. Copper plating is carried out on the entire surface including the inside of the through hole by electroless plating and/or electroplating and then the central part of the hole is closed by a plating deposition layer projected from the opposite hole walls by electroplating. Subsequently, upper and lower spaces remaining in the through hole are filled by 90% or more with copper or a copper alloy deposited by performing electroplating using a reverse pulse power supply. At the same time, pattern plating is performed on the electronic circuit conductors and electronic circuits are formed on the opposite outer sides thus producing a multilayer printed wiring board. Thickness of the printed wiring board is preferably set in the range of 0.1-0.5 mm. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、小径の貫通スルーホール孔を有する多層プリント配線板の製造方法に関し、特に高密度配線を有し孔信頼性にも優れた多層プリント配線板に関して、得られた多層プリント配線板は、半導体プラスチックパッケージ用、マザーボード用等に広く使用できる。   The present invention relates to a method for producing a multilayer printed wiring board having through-holes with a small diameter, and particularly to a multilayer printed wiring board having high-density wiring and excellent hole reliability, the obtained multilayer printed wiring board is Can be widely used for semiconductor plastic packages, motherboards, etc.

従来、プリント配線板は内層板の上にプリプレグ及び銅箔を配置し、一体成形後に貫通孔をドリルであけていた(例えば、特許文献1参照)。このドリル径は150μm以下の小径の孔あけではドリルが折れる、加工速度が遅い等の問題点があった。又、ビルドアップ工法で漸次積層して積み上げ、ブラインドビア孔で上下の銅箔を導通して作製するプリント配線板があるが(例えば、特許文献2〜4参照)、表裏に1層ずつ積み上げていくために、工程が長く、価格が高い欠点があった。更に、貫通孔が大きい場合は、貫通孔の内部は銅メッキで充填する場合に、銅メッキ中に空隙が多く残り、メッキ液が残存して信頼性に劣る等の欠点が見られた。
特開2000-91750号公報 特開2000-91750号公報 特開2000-183384号公報 特開平4-338695号公報
Conventionally, a printed wiring board has a prepreg and a copper foil disposed on an inner layer board, and a through hole is drilled after integral molding (see, for example, Patent Document 1). This drill had a problem that the drill breaks when drilling with a small diameter of 150 μm or less, and the processing speed is slow. In addition, there is a printed wiring board that is made by gradually laminating and stacking with a build-up method and conducting conduction between the upper and lower copper foils through blind via holes (see, for example, Patent Documents 2 to 4). As a result, the process is long and the price is high. Further, when the through hole is large, when the inside of the through hole is filled with copper plating, many voids remain in the copper plating, and the plating solution remains, resulting in poor reliability.
JP 2000-91750 A JP 2000-91750 A JP 2000-183384 A Japanese Patent Laid-Open No. 4-338695

本発明は、以上の問題点を解決した、多層銅張板を一体成形し、この多層銅張り板の各層を好適には孔径20〜100μmの小径の貫通孔で導通させることにより、ビルドアップ工法の基板製造法より加工工程が短く、信頼性の優れた小径のスルーホールを有する高密度多層プリント配線板を安価に提供するのを目的とする。   The present invention solves the above-mentioned problems by integrally forming a multilayer copper-clad plate, and by conducting each layer of this multilayer copper-clad plate preferably through a small-diameter through hole having a pore diameter of 20 to 100 μm, An object of the present invention is to provide a high-density multilayer printed wiring board having a small-diameter through hole having a shorter processing step and superior reliability than the substrate manufacturing method at low cost.

本発明は、多層銅張板にUVレーザーを用いて貫通孔をあけ、これを銅メッキで充填してから多層プリント配線板を製造する。この場合、孔径は好適には20〜100μmとする。又、孔はテーパー形状になるが、好適には入側の孔径に対し出側の孔径差を20%以下になるように孔あけする。次いで貫通孔内を含む全面に無電解銅メッキ及び/又は極薄電気銅メッキを行い、絶縁体表面を電気導通化した後、直流電気メッキにより貫通孔内の中央部を、両孔壁からせり出させた銅メッキ析出層により閉鎖し、次いでリバースパルス電源による電気メッキにより貫通孔内上下に残る空間を析出銅または銅合金で充填すると同時に電子導体をパターンメッキし、最後に両外側に電子回路を形成して多層プリント配線板を製造する。   In the present invention, through holes are formed in a multilayer copper-clad board using a UV laser and filled with copper plating, and then a multilayer printed wiring board is manufactured. In this case, the hole diameter is preferably 20 to 100 μm. The hole has a tapered shape, but the hole is preferably drilled so that the difference in the hole diameter on the outlet side is 20% or less with respect to the hole diameter on the inlet side. Next, electroless copper plating and / or ultra-thin electrolytic copper plating is performed on the entire surface including the inside of the through hole to make the surface of the insulator electrically conductive, and then the central portion of the through hole is placed from both hole walls by direct current electroplating. Closed by the deposited copper plating deposit layer, then filled the space left and right in the through hole with electroplating by reverse pulse power supply with deposited copper or copper alloy, and simultaneously pattern plated the electronic conductor, and finally the electronic circuit on both sides To form a multilayer printed wiring board.

孔あけする場合も孔径は好適には20〜100μmとし、絶縁層は好適には基材補強の熱硬化性組成物で、電気絶縁層間厚さは好適には10μm〜0.48mmとすることにより、孔の充填度が格段に向上して信頼性に優れ、高密度の多層プリント配線板とすることができる。   Also in the case of drilling, the hole diameter is preferably 20-100 μm, the insulating layer is preferably a base-reinforced thermosetting composition, and the electrically insulating interlayer thickness is preferably 10 μm-0.48 mm, The hole filling degree is remarkably improved and the reliability is excellent, and a high-density multilayer printed wiring board can be obtained.

UVレーザによる貫通孔径の差を20%以下にすることにより、貫通孔を銅メッキで充填する際、孔径の違いによるメッキ銅充填速度や形状の不具合から起きる充填不良を解消することができる。   By making the through hole diameter difference due to the UV laser 20% or less, when filling the through hole with copper plating, it is possible to eliminate the filling failure caused by defects in the plated copper filling speed and shape due to the difference in hole diameter.

内層に電子回路導体を有し、両外層に金属が全面に接着された形の多層化積層された多層プリント配線板を製造する工程と、次いでUVレーザーにより両外層及び内層電子回路導体を貫通して微小孔を表裏の孔径差が20%以下となるように形成する工程と、次いで無電解メッキ及び電気メッキにより貫通孔内を銅又は銅合金で貫通孔の両孔壁からせり出させた銅メッキ析出層により孔中央部を閉鎖し、次いでリバースパルス電源による電気メッキにより貫通孔内上下に残る空間を析出銅又は銅合金で充填し、同時に電気導体をパターンメッキし、次いで両外側に電子回路を形成して多層プリント配線板を製造することにより、ビルドアップ工法による高密度多層基板と同等な高密度回路基板を多層回路形成の工程に於いて大幅に削減でき、作業性、経済性に優れた多層プリント配線板を得ることができた。更に孔内を銅メッキで充填することにより、孔導通信頼性に優れた高密度の多層プリント配線板が製作出来た。   A process of manufacturing a multilayer printed wiring board having an electronic circuit conductor in the inner layer and metal in both outer layers bonded to the entire surface, and then penetrating both the outer layer and inner layer electronic circuit conductor by UV laser Then, the step of forming the micro-holes so that the difference in diameter between the front and back surfaces is 20% or less, and then the copper inside the through-holes by copper or copper alloy by electroless plating and electroplating. The center of the hole is closed by the plating deposit layer, and then the space remaining above and below the through hole is filled with deposited copper or copper alloy by electroplating with a reverse pulse power source, and at the same time, the electric conductor is pattern-plated, and then both sides are electronic circuits By manufacturing the multilayer printed wiring board, the high-density circuit board equivalent to the high-density multilayer board by the build-up method can be greatly reduced in the multilayer circuit formation process. Gender, it was possible to obtain an excellent multilayer printed wiring board in economy. Furthermore, by filling the hole with copper plating, a high-density multilayer printed wiring board excellent in hole conduction reliability could be manufactured.

本発明のプリント配線板は、 内部に銅層を1層以上有する多層銅張板を通常の多層基板製作工程で作製し、この片面からUVレーザーを直接銅箔上に照射して貫通孔をあけ、この貫通孔内を銅メッキで90容積%以上充填し、表層を好適には機械研磨して平滑にしてから公知の方法で外層回路を形成して多層プリント配線板とする。   In the printed wiring board of the present invention, a multilayer copper-clad board having one or more copper layers inside is manufactured by a normal multilayer substrate manufacturing process, and a UV laser is directly irradiated on the copper foil from one side to open a through hole. The through hole is filled with 90% by volume or more with copper plating, and the surface layer is preferably mechanically polished and smoothed, and then an outer layer circuit is formed by a known method to obtain a multilayer printed wiring board.

本発明で使用される多層プリント配線板には一般に公知の多層銅箔張板が使用される。使用される樹脂も特に限定はなく、一般に公知の樹脂が使用される。具体的には、エポキシ樹脂、ポリイミド樹脂、多官能性マレイミド樹脂、多官能性シアン酸エステル樹脂、不飽和基含有ポリフェニレンエーテル樹脂等の熱硬化性樹脂組成物、更には熱可塑性樹脂、光選択熱硬化性樹脂、アデテイブ用樹脂等、一般に公知の樹脂が1種或いは2種以上組み合わせて使用される。耐熱性、耐マイグレーション性等の優れた多層プリント配線板を得るためには、多官能性シアン酸エステル樹脂を必須成分とした樹脂組成物を使用するのが好ましい。   As the multilayer printed wiring board used in the present invention, generally known multilayer copper foil-clad boards are used. The resin used is not particularly limited, and generally known resins are used. Specifically, thermosetting resin compositions such as epoxy resins, polyimide resins, polyfunctional maleimide resins, polyfunctional cyanate ester resins, unsaturated group-containing polyphenylene ether resins, thermoplastic resins, photoselective heat Generally known resins such as curable resins and additive resins are used alone or in combination of two or more. In order to obtain a multilayer printed wiring board having excellent heat resistance and migration resistance, it is preferable to use a resin composition containing a polyfunctional cyanate ester resin as an essential component.

本発明の好適な樹脂である多官能性シアン酸エステル化合物とは、分子内に2個以上のシアナト基を有する化合物である。具体的に例示すると、1,3-又は1,4-ジシアナトベンゼン、1,3,5-トリシアナトベンゼン、1,3-、1,4-、1,6-、1,8-、2,6-又は2,7-ジシアナトナフタレン、1,3,6-トリシアナトナフタレン、4,4-ジシアナトビフェニル、ビス(4-ジシアナトフェニル)メタン、2,2-ビス(4-シアナトフェニル)プロパン、2,2-ビス(3,5-ジブロモー4-シアナトフェニル)プロパン、ビス(4-シアナトフェニル)エーテル、ビス(4-シアナトフェニル)チオエーテル、ビス(4-シアナトフェニル)スルホン、トリス(4-シアナトフェニル)ホスファイト、トリス(4-シアナトフェニル)ホスフェート、およびノボラックとハロゲン化シアンとの反応により得られるシアネート類等である。   The polyfunctional cyanate ester compound which is a suitable resin of the present invention is a compound having two or more cyanato groups in the molecule. Specific examples include 1,3- or 1,4-dicyanatobenzene, 1,3,5-tricyanatobenzene, 1,3-, 1,4-, 1,6-, 1,8-, 2 , 6- or 2,7-dicyanatonaphthalene, 1,3,6-tricyanatonaphthalene, 4,4-dicyanatobiphenyl, bis (4-dicyanatophenyl) methane, 2,2-bis (4-cyanato Phenyl) propane, 2,2-bis (3,5-dibromo-4-cyanatophenyl) propane, bis (4-cyanatophenyl) ether, bis (4-cyanatophenyl) thioether, bis (4-cyanatophenyl) ) Sulfone, tris (4-cyanatophenyl) phosphite, tris (4-cyanatophenyl) phosphate, and cyanates obtained by the reaction of novolac and cyanogen halide.

これらのほかに特公昭41-1928、同43-18468、同44-4791、同45-11712、同46-41112、同47-26853及び特開昭51-63149等に記載の多官能性シアン酸エステル化合物類も用いら得る。これらの分子内に臭素、りんを含有するものも使用できる。また、これら多官能性シアン酸エステル化合物のシアナト基の三量化によって形成されるトリアジン環を有する分子量400〜6,000 のプレポリマーが使用される。このプレポリマーは、上記の多官能性シアン酸エステルモノマーを、例えば鉱酸、ルイス酸等の酸類;ナトリウムアルコラート等、第三級アミン類等の塩基;炭酸ナトリウム等の塩類等を触媒として重合させることにより得られる。この樹脂中には一部未反応のモノマーも含まれており、モノマーとプレポリマーとの混合物の形態をしており、このような原料は本発明の用途に好適に使用される。一般には可溶な有機溶剤に溶解させて使用する。   Besides these, multifunctional cyanic acid described in JP-B-41-1928, JP-A-43-18468, JP-A-44-4791, JP-A-45-11712, JP-A-46-41112, JP-A-51-63149, etc. Ester compounds can also be used. Those containing bromine and phosphorus in these molecules can also be used. Further, a prepolymer having a molecular weight of 400 to 6,000 having a triazine ring formed by trimerization of cyanate groups of these polyfunctional cyanate ester compounds is used. This prepolymer polymerizes the above-mentioned polyfunctional cyanate ester monomers using, for example, acids such as mineral acids and Lewis acids; bases such as sodium alcoholates and tertiary amines; salts such as sodium carbonate and the like as catalysts. Can be obtained. This resin also contains a partially unreacted monomer and is in the form of a mixture of a monomer and a prepolymer, and such a raw material is suitably used for the application of the present invention. Generally, it is used after being dissolved in a soluble organic solvent.

エポキシ樹脂としては、特に限定はなく、一般に公知のものが使用できる。例えばビスフェノールA型ポキシ樹脂、ビスフェノールF型エポキシ樹脂、脂環式エポキシ樹脂、ノボラック型エポキシ樹脂、ビフェニル型エポキシ樹脂等が1種或いは2種以上組み合わせて使用される。好適には溶解可能な有機溶剤に溶解させて使用する。   There is no limitation in particular as an epoxy resin, Generally a well-known thing can be used. For example, bisphenol A-type epoxy resin, bisphenol F-type epoxy resin, alicyclic epoxy resin, novolac-type epoxy resin, biphenyl-type epoxy resin and the like are used alone or in combination. It is preferably used after being dissolved in a soluble organic solvent.

上記樹脂を溶解する有機溶剤として使用されるものは特に限定はないが、例えばアセトン、メチルエチルケトン、メチルイソブチルケトン等のケトン類;トルエン、キシレン等の芳香族炭化水素類;N,N-ジメチルホルムアミド等のアミド類等が挙げられ、これらは1種或いは2種以上が組み合わせて使用される。   What is used as an organic solvent for dissolving the resin is not particularly limited, for example, ketones such as acetone, methyl ethyl ketone and methyl isobutyl ketone; aromatic hydrocarbons such as toluene and xylene; N, N-dimethylformamide and the like These amides may be used, and these may be used alone or in combination of two or more.

本発明の硬化性樹脂組成物は、それ自体は加熱により硬化するが硬化速度が遅く、作業性、経済性等に劣るため使用した硬化性樹脂に対して公知の硬化触媒を用いる。又、(メタ)アクリレート類等を使用した場合には光重合開始剤等を使用する。使用量は、それぞれの硬化性樹脂100重量部に対し、0.005〜10重量部、好ましくは0.01〜5重量部である。   The curable resin composition of the present invention is cured by heating, but has a slow curing rate and is inferior in workability, economy, and the like, and therefore a known curing catalyst is used for the curable resin used. When (meth) acrylates are used, a photopolymerization initiator is used. The amount used is 0.005 to 10 parts by weight, preferably 0.01 to 5 parts by weight per 100 parts by weight of each curable resin.

本発明の硬化性樹脂組成物には、組成物本来の特性が損なわれない範囲で、所望に応じて上記以外の種々の添加物を配合することができる。これらの添加物としては、固形、液状のエポキシ樹脂、2重結合付加ポリフェニレンエーテル樹脂、ポリフェニレンエーテル樹脂、ポリオレフィン樹脂、エポキシアクリレート、多官能(メタ)アクリレート等、更にこれらの公知の臭素化物、リン含有化合物等の各種樹脂類、公知の上記以外の無機、有機の充填剤、染料、顔料、増粘剤、滑剤、消泡剤、分散剤、レベリング剤、光増感剤、難燃剤、光沢剤、重合禁止剤、チキソ性付与剤等の各種添加剤が、所望に応じて適宜組み合わせて用いられる。必要により、反応基を有する化合物は公知の硬化剤、触媒が適宜配合される。   In the curable resin composition of the present invention, various additives other than the above can be blended as desired within a range where the original properties of the composition are not impaired. Examples of these additives include solid and liquid epoxy resins, double bond addition polyphenylene ether resins, polyphenylene ether resins, polyolefin resins, epoxy acrylates, polyfunctional (meth) acrylates, and other known bromides and phosphorus-containing materials. Various resins such as compounds, other known inorganic and organic fillers, dyes, pigments, thickeners, lubricants, antifoaming agents, dispersants, leveling agents, photosensitizers, flame retardants, brighteners, Various additives such as a polymerization inhibitor and a thixotropic agent are used in appropriate combination as desired. If necessary, the compound having a reactive group is appropriately mixed with a known curing agent and catalyst.

本発明の各成分を均一に分散する方法は、一般に公知の方法が使用され得る。例えば、各成分を有機溶剤にて配合し、ホモミキサ−で高速攪拌する方法、三本ロールにて、室温或いは加熱下に混練するか、ボールミル、ライカイ機で混練する等、一般に公知の方法が使用される。    As a method for uniformly dispersing the components of the present invention, generally known methods can be used. For example, generally known methods such as mixing each component with an organic solvent and stirring at high speed with a homomixer, kneading with a three-roller at room temperature or under heating, or kneading with a ball mill or a likai machine are used. Is done.

本発明で使用するプリント配線板は、基材なし、基材ありのいずれでも良いが、剛性を高くするためには基材補強のものが好ましい。上記樹脂組成物を用いて基材に含浸、乾燥してBステージ化するか、或いは基材の両面に樹脂層を配置して加熱圧着等で一体化してプリプレグを作製する。基材としては、有機、無機繊維織布又は不織布を使用する。種類については特に限定はないが、有機繊維布としては、好適には液晶ポリエステル繊維、ポリベンザゾール繊維、全芳香族ポリアミド繊維等の耐熱性の織布又は不織布が使用される。無機繊維布としては、一般の断面が円形状、扁平の公知のガラス繊維織布、不織布、更にはセラミック繊維織布、不織布を用いる。これらは開繊されたガラス織布が好適に使用される。又、ポリイミドフィルム、全芳香族ポリアミドフィルム、液晶ポリエステルフィルム等の耐熱性有機フィルム基材も好適に使用し得る。フィルム基材の表面は熱硬化性樹脂組成物の密着性を向上させるために、表面にはコロナ処理、プラズマ処理、薬液処理等が施される。   The printed wiring board used in the present invention may be either without a base material or with a base material, but in order to increase the rigidity, a substrate having a base material reinforcement is preferable. A base material is impregnated with the above resin composition and dried to form a B stage, or a resin layer is disposed on both surfaces of the base material and integrated by thermocompression bonding or the like to prepare a prepreg. As the substrate, organic or inorganic fiber woven fabric or non-woven fabric is used. Although there is no particular limitation on the type, a heat-resistant woven or non-woven fabric such as liquid crystal polyester fiber, polybenzazole fiber, wholly aromatic polyamide fiber or the like is preferably used as the organic fiber cloth. As the inorganic fiber cloth, a known glass fiber woven cloth or non-woven cloth having a general circular cross section and a flat shape, and further a ceramic fiber woven cloth or non-woven cloth are used. These are preferably opened glass woven fabrics. Moreover, heat resistant organic film base materials, such as a polyimide film, a wholly aromatic polyamide film, and a liquid crystal polyester film, can also be used conveniently. In order to improve the adhesion of the thermosetting resin composition, the surface of the film substrate is subjected to corona treatment, plasma treatment, chemical treatment, and the like.

又、例えば両面回路を形成した内層基板の上に配置して多層化する層は特に限定はなく、アディティブ用樹脂組成物、Bステージ樹脂付き銅箔、有機或いは無機基材補強Bステージ樹脂組成物(プリプレグ)、耐熱性フイルム機材Bステージ樹脂組成物(プリプレグ)等、一般に公知の積層シート、ビルドアップ型光選択熱硬化レジスト等が使用し得る。これらは必要によりブラインドビア孔を形成することも可能であるが、生産性、効率化、コスト等の点から、全て積層して多層銅張板とした後に最後にUVレーザーを用いて直接銅箔を貫通する貫通孔をあけ、その後に貫通孔内を含む全体を銅メッキしてから回路を形成してプリント配線板とするか、表面にパターンメッキレジストを付着してから現像、露光し、孔内を含む全体を銅メッキし、メッキレジストを剥離後にフラッシュエッチングで細密回路を形成する方法等で高密度プリント配線板とする。   In addition, for example, there are no particular limitations on the layers that are arranged on the inner substrate on which the double-sided circuit is formed, and there are no particular limitations. Additive resin composition, copper foil with B-stage resin, organic or inorganic base material reinforced B-stage resin composition (Prepreg), heat-resistant film equipment B-stage resin composition (prepreg), etc., generally known laminated sheets, build-up type photoselective thermosetting resists, etc. can be used. Blind via holes can be formed if necessary, but from the viewpoint of productivity, efficiency, cost, etc., all are laminated to form a multilayer copper-clad plate, and finally a direct copper foil using a UV laser After that, the entire circuit including the inside of the through hole is plated with copper, and then a circuit is formed to form a printed wiring board, or a pattern plating resist is attached to the surface and then developed, exposed, and exposed. The whole including the inside is plated with copper, and after removing the plating resist, a high-density printed wiring board is formed by a method of forming a fine circuit by flash etching or the like.

本発明の内層に銅層を少なくとも1層以上有する多層板を作製する方法は特に限定はないが、例えば、上記樹脂組成物を基材に含浸、乾燥してプリプレグを作製し、両面に金属箔、好適には銅箔を使用して基材入り両面銅張板を作製する。これを用いて両面に回路を形成し、表面を化学処理した後、この内層板を複数枚使用しこの内層板の間にプリプレグを配置、両外側にプリプレグおよび銅箔を配置して積層成形し、高多層銅張板とする。使用する銅箔の厚さは特に限定はないが、加工性、その後の細密回路形成等を考えて適宜選択する。好適には、内層銅箔は5〜18μm、外層銅箔は3〜12μmとする。もちろん、3〜12μm銅箔張多層板としてから、薬液で表層銅箔を溶解して銅箔厚さを1〜2μmとしたものも使用できる。本発明の多層銅張板の製造方法はこれに限定されるものではなく、一般に公知の方法が使用できる。   A method for producing a multilayer board having at least one copper layer as an inner layer of the present invention is not particularly limited. For example, a prepreg is produced by impregnating a substrate with the resin composition and drying, and a metal foil on both sides. A double-sided copper-clad board containing a substrate is preferably produced using copper foil. After using this to form circuits on both sides and chemically treating the surface, use a plurality of this inner layer plate, arrange the prepreg between the inner layer plates, arrange the prepreg and copper foil on both outer sides, laminate molding, A multilayer copper-clad plate is used. The thickness of the copper foil to be used is not particularly limited, but is appropriately selected in consideration of processability, subsequent formation of a fine circuit, and the like. Preferably, the inner layer copper foil is 5 to 18 μm, and the outer layer copper foil is 3 to 12 μm. Of course, it is also possible to use a 3 to 12 μm copper foil-clad multilayer board and a copper foil thickness of 1 to 2 μm by dissolving the surface layer copper foil with a chemical solution. The manufacturing method of the multilayer copper-clad board of this invention is not limited to this, Generally a well-known method can be used.

本発明の多層化する際の積層成形条件は、特に限定はないが、真空ラミネータプレス、一般の多段プレス等の公知の装置に仕込み、一般には温度100〜300℃、圧力2〜50kgf/cm2、時間は1分〜5時間で、好適には真空下で積層成形する。積層時間の短いものは、加熱炉等で後硬化する。 Lamination molding conditions for multi-layering of the present invention are not particularly limited, but are charged into a known apparatus such as a vacuum laminator press, a general multi-stage press, etc., generally at a temperature of 100 to 300 ° C., a pressure of 2 to 50 kgf / cm 2. The time is from 1 minute to 5 hours, and preferably laminated and formed under vacuum. Those having a short lamination time are post-cured in a heating furnace or the like.

これ以外にも公知の多層銅張板、例えば、ビルドアップ型光選択熱硬化レジスト或いはアディティブ用樹脂組成物を使用の場合は、基板の上に塗布、乾燥してBステージ化して、表面粗化、銅メッキを施し、回路形成を行う方法で多層化したものを使用できる。いずれにしても、絶縁層間の厚さは、好適には10μm〜0.48mmである。   In addition to this, in the case of using a known multilayer copper-clad plate, for example, a build-up type light selective thermosetting resist or additive resin composition, it is coated on a substrate and dried to form a B-stage to roughen the surface. In addition, it is possible to use a multi-layered copper plating method for forming a circuit. In any case, the thickness between the insulating layers is preferably 10 μm to 0.48 mm.

本発明のUVレーザーで貫通孔を形成する場合、裏面にバックアップシートを使用する。これは一般に公知のバックアップシートが使用できる。例えば特開平11-346044、特開平11-347767、特開2003-008172、特開2003-008173等に挙げられるバックアップシートが使用できる。更には室温で接着できる、樹脂組成物層に粘着剤を配合した室温ラミネートタイプのバックアップシートも使用できる。   When forming a through-hole with the UV laser of the present invention, a backup sheet is used on the back surface. In general, a known backup sheet can be used. For example, the backup sheets described in JP-A-11-346044, JP-A-11-347767, JP-A-2003-008172, JP-A-2003-008173, etc. can be used. Furthermore, a room temperature laminate type backup sheet in which a pressure-sensitive adhesive is blended in the resin composition layer that can be bonded at room temperature can also be used.

本発明の貫通孔あけにはUVレーザーを使用する。入り側の孔径は好適には20〜100μmとする。UVレーザーの種類は特に限定はなく、例えばUV-YAGレーザー、UV-Vanaレーザー等、一般に公知のものが使用でき、波長200〜400nmが好適に使用される。孔形状は出側の孔直径を入り側の孔径に比べて80%以上とする。もちろん、炭酸ガスレーザーとUVレーザーの組み合わせも使用できるが、小径の孔を形成する場合にはUVレーザーが好ましい。貫通孔の孔径差を制御するにはUVレーザの加工条件として、レーザ光ショット数とレーザ光出力制御と位置を制御するガルバノメータ位置制御プログラムの組み合わせによる加工設計により最適加工条件が選択される。   A UV laser is used for through-hole drilling according to the present invention. The hole diameter on the entry side is preferably 20-100 μm. The type of UV laser is not particularly limited, and generally known ones such as UV-YAG laser and UV-Vana laser can be used, and a wavelength of 200 to 400 nm is preferably used. The hole shape is such that the outlet side hole diameter is 80% or more compared to the inlet side hole diameter. Of course, a combination of a carbon dioxide laser and a UV laser can also be used, but a UV laser is preferred when forming small-diameter holes. In order to control the hole diameter difference between the through holes, the optimum machining conditions are selected as machining conditions of the UV laser by machining design using a combination of a galvanometer position control program for controlling the number of laser beam shots, laser beam output control and position.

本発明の極細線回路を作成する場合、セミアディティブプロセスでは、パターンメッキレジストを形成後に銅メッキを行い、レジストを剥離後にエッチングで細密回路を形成する。この溶液は特に限定はないが、例えば、特開平02-22887、同02-22896、同02-25089、同02-25090、同02-59337、同02-60189、同02-166789、同03-25995、同03-60183、同03-94491、同04-199592、同04-263488で開示された、薬品で金属表面を溶解除去する方法(SUEP法と呼ぶ)による。エッチング速度は、0.02〜1.0μm/秒 で行う。   In producing the ultrafine wire circuit of the present invention, in a semi-additive process, copper plating is performed after forming a pattern plating resist, and after the resist is removed, a fine circuit is formed by etching. Although this solution is not particularly limited, for example, JP-A Nos. 02-22887, 02-22896, 02-25089, 02-25090, 02-59337, 02-60189, 02-166789, 03- 25995, 03-60183, 03-94491, 04-199592, 04-263488, and a method of dissolving and removing a metal surface with a chemical (referred to as SUEP method). The etching rate is 0.02 to 1.0 μm / sec.

本発明の多層プリント配線板を製造する工程は、まず内層に電子回路導体を有し、両外層に金属箔が全面に接着された形の多層化積層された多層プリント配線板を製造する工程と、次いでUVレーザーにより両外層及び内層電子回路導体を貫通して貫通孔を形成する工程と、次いで無電解メッキ、次いで直流のリバースパルス電源による電気メッキにより貫通孔内を銅又は銅合金で充填し、内外層の電子導体をパターンメッキし、次いで両外側に電子回路を形成する。この貫通孔形状は入側の孔径に対して出側の孔直径の差が20%以下であり、孔あけする場合も孔径は好適には20〜100μmとし、絶縁層間の厚さは好適には基材補強の熱硬化性組成物で、電気絶縁層間厚さは好適には10μm〜0.48mmとすることにより、信頼性に優れ、高密度の多層プリント配線板とすることができる。   The process of manufacturing the multilayer printed wiring board of the present invention includes the steps of manufacturing a multilayered multilayer printed wiring board having an electronic circuit conductor on the inner layer and a metal foil bonded to the entire surface on both outer layers. Next, a step of forming a through hole through both the outer layer and inner layer electronic circuit conductors with a UV laser, and then filling the inside of the through hole with copper or a copper alloy by electroless plating and then electroplating with a DC reverse pulse power source. The inner and outer layer electronic conductors are pattern plated, and then electronic circuits are formed on both outer sides. This through hole shape has a difference of 20% or less of the diameter of the exit side with respect to the diameter of the entrance side, and when drilling, the diameter of the hole is preferably 20-100 μm, and the thickness between the insulating layers is preferably By using a thermosetting composition for substrate reinforcement and having an electrically insulating interlayer thickness of preferably 10 μm to 0.48 mm, a highly reliable multilayer printed wiring board can be obtained.

本発明の貫通孔を充填する方法は、貫通孔を含む全面に無電解銅メッキ及び/又は極薄電気銅メッキを行い、絶縁体表面を電気導通化した後、直流電気メッキにより貫通孔内のほぼ中央を、両孔壁からせり出させた銅メッキ析出層により孔中央部を閉鎖し、次いでリバースパルス電源による電気メッキにより貫通孔内上下に残る空間を析出銅で充填する。貫通孔は銅又は銅合金メッキで、一般に、電流密度1〜3A/dm2でメッキ充填される。この充填率は90容積%以上とする。もちろん、孔の上下部分は一部凸凹となっても良いが、平滑にするためには表面をバフ研磨装置等で機械的に研磨して平滑とする。 In the method of filling the through holes of the present invention, electroless copper plating and / or ultra-thin electrolytic copper plating is performed on the entire surface including the through holes, and the surface of the insulator is made electrically conductive. The center of the hole is closed approximately at the center by a copper plating deposit layer protruding from both hole walls, and then the remaining space above and below the through hole is filled with deposited copper by electroplating with a reverse pulse power source. The through hole is plated with copper or copper alloy, and is generally plated and filled with a current density of 1 to 3 A / dm 2 . This filling rate is 90% by volume or more. Of course, the upper and lower portions of the hole may be partially uneven, but in order to make it smooth, the surface is mechanically polished with a buffing device or the like to make it smooth.

パターンメッキする場合、パターンメッキレジストの厚さを越えるように電気銅メッキを析出させ、機械研磨により表面を平滑に研磨し、所定の厚みとする。こうすることにより、パターン銅メッキ厚さのばらつきによる厚さの不揃いが無くなると同時に、表層は平滑となり、フリップチップの搭載等に適した多層プリント配線板とすることができる。   In the case of pattern plating, electrolytic copper plating is deposited so as to exceed the thickness of the pattern plating resist, and the surface is polished smoothly by mechanical polishing to a predetermined thickness. By doing so, uneven thickness due to variations in pattern copper plating thickness is eliminated, and at the same time, the surface layer becomes smooth, and a multilayer printed wiring board suitable for flip chip mounting and the like can be obtained.

以下に実施例、比較例で本発明を具体的に説明する。尚、特に断らない限り、『部』は重量部を表す。
(実施例1)
2,2-ビス(4-シアナトフェニル)プロパンモノマーを400部150℃に溶融させ、撹拌しながら4時間反応させ、平均分子量1,900のモノマーとプレポリマーの混合物を得た。これをメチルエチルケトンに溶解し、ワニスAとした。これにビスフェノールA型エポキシ樹脂(商品名:エピコート1001、ジャパンエポキシレジン<株>製)350部、ノボラック型エポキシ樹脂(商品名:DEN431、ダウケミカル<株>製)50部、クレゾールノボラック型エポキシ樹脂(商品名:ESCN-220F、住友化学工業<株>製)100部を配合し、硬化触媒としてアセチルアセトン鉄0.3部をメチルエチルケトンに溶解して加え、均一に攪拌混合してワニスBとした。更に球状シリカ(平均粒子径4.1μm)1200部を加え、均一に分散混合してワニスCとした。このワニスCを厚さ50μmのガラス織布に含浸、乾燥してプリプレグD(170℃でのゲル化時間130秒、樹脂組成物含有量54wt%)及び厚さ15μmの開繊されたガラス織布に含浸、乾燥してプリプレグ E(170℃でのゲル化時間143秒、樹脂組成物含有量81wt%) を作製した。プリプレグDを1枚用い、両面に厚さ12μmの電解銅箔を配置し、200℃、25kgf/cm2で90分積層成形して、両面銅張積層板Fを作製した。これを用いて表裏に回路を形成し、この表面を黒色酸化銅処理した後、この内層板2枚の間に上記プリプレグ E を1枚配置し、更にこれらの両外側にプリプレグ E を各1枚配置し、その上に厚さ12μmの電解銅箔を置き、同様に積層成形して、6層両面銅張板Gとした。この銅箔をSUEP溶液にて銅箔厚さ4μmまでエッチングして薄くし、6層両面銅張板Hとした。
The present invention will be specifically described below with reference to examples and comparative examples. Unless otherwise specified, “parts” represents parts by weight.
(Example 1)
2,2-bis (4-cyanatophenyl) propane monomer was melted in 400 parts at 150 ° C. and reacted for 4 hours with stirring to obtain a monomer and prepolymer mixture having an average molecular weight of 1,900. This was dissolved in methyl ethyl ketone to obtain varnish A. In addition to this, 350 parts of bisphenol A type epoxy resin (trade name: Epicoat 1001, manufactured by Japan Epoxy Resin Co., Ltd.), 50 parts of novolac type epoxy resin (trade name: DEN431, manufactured by Dow Chemical Co., Ltd.), cresol novolac type epoxy resin (Product name: ESCN-220F, manufactured by Sumitomo Chemical Co., Ltd.) 100 parts were blended, 0.3 part of acetylacetone iron was dissolved in methyl ethyl ketone as a curing catalyst, and the mixture was uniformly stirred to obtain varnish B. Furthermore, 1200 parts of spherical silica (average particle size 4.1 μm) was added, and dispersed and mixed uniformly to obtain varnish C. This varnish C is impregnated into a glass woven fabric having a thickness of 50 μm, dried, and prepreg D (gelation time at 170 ° C. for 130 seconds, resin composition content: 54 wt%) and a opened glass woven fabric having a thickness of 15 μm. Was impregnated and dried to prepare prepreg E (gelation time at 170 ° C .: 143 seconds, resin composition content: 81 wt%). Using a single prepreg D, an electrolytic copper foil having a thickness of 12 μm was placed on both sides, and laminate-molded at 200 ° C. and 25 kgf / cm 2 for 90 minutes to prepare a double-sided copper-clad laminate F. Using this, circuits are formed on the front and back, and this surface is treated with black copper oxide. Then, one prepreg E is placed between the two inner layers, and one prepreg E is placed on both outer sides. Then, an electrolytic copper foil having a thickness of 12 μm was placed thereon and laminated and molded in the same manner to obtain a 6-layer double-sided copper-clad board G. This copper foil was etched and thinned with a SUEP solution to a copper foil thickness of 4 μm to obtain a 6-layer double-sided copper-clad plate H.

一方、厚さ50μmのアルミニウム箔の片面に室温で粘着性を有する水溶性ポリエステル樹脂を水に溶解した溶液を、樹脂層厚さ50μmとなるように塗布、乾燥してバックアップシートI を作製した。上記6層両面銅張積層板 H の下にバックアップシートI を樹脂面が銅箔側を向くように配置し、室温で、線圧5kgf/cmでラミネートし、接着させた。この6層両面銅張積層板 H の上から、間隔1mmで、上側の孔径60μm、下側の孔径55μmの貫通孔をUV-YAGレーザーを銅箔上に直接照射してあけた。   On the other hand, a backup sheet I was prepared by applying and drying a solution of water-soluble polyester resin having adhesiveness at room temperature on one side of an aluminum foil having a thickness of 50 μm in water so as to have a resin layer thickness of 50 μm. The backup sheet I was placed under the six-layer double-sided copper-clad laminate H so that the resin surface faced the copper foil side, and was laminated and adhered at room temperature with a linear pressure of 5 kgf / cm. From the top of this 6-layer double-sided copper-clad laminate H, through-holes having an upper hole diameter of 60 μm and a lower hole diameter of 55 μm were formed by directly irradiating a copper foil with a UV-YAG laser at an interval of 1 mm.

この板全体に無電解銅メッキ0.5μm、電解銅メッキを1μm付着させて絶縁体表面を電気導通化した後、この上にパターンメッキレジストを厚さ25μm付着させ、直流電気メッキにより貫通孔内のほぼ中央を、両孔壁からせり出させて銅メッキ析出層により孔中央部を閉鎖し、次いでリバースメッキにより貫通孔内上下に残る空間を析出銅で充填して充填率100%とした。同時に回路用銅メッキの高さを25〜28μm付着させ、この表面を機械的研磨で銅メッキ高さ22μmまで研磨して表面を平滑にした。その後、パターンメッキレジストを剥離除去してからSUEP溶液でフラッシュエッチングし、ライン/スペース=30/30μmの回路を形成した。この表面に、ニッケルメッキ、更に金メッキを付着させて6層プリント配線板を作製した。評価結果を表1に示す。   Electroless copper plating 0.5 μm and electrolytic copper plating 1 μm are attached to the entire plate to make the insulator surface electrically conductive. Then, a pattern plating resist is attached 25 μm thick on this surface, and direct current electroplating is applied to the inside of the through hole. The center of each hole was protruded from both hole walls, and the center of the hole was closed with a copper plating deposited layer, and then the space remaining above and below the through hole was filled with the deposited copper to achieve a filling rate of 100%. At the same time, the height of the copper plating for the circuit was adhered to 25 to 28 μm, and this surface was polished to a copper plating height of 22 μm by mechanical polishing to smooth the surface. Thereafter, the pattern plating resist was peeled and removed, and then flash etching was performed with a SUEP solution to form a circuit of line / space = 30/30 μm. A 6-layer printed wiring board was produced by attaching nickel plating and further gold plating to the surface. The evaluation results are shown in Table 1.

(実施例2)
ビスフェノールA型エポキシ樹脂(商品名:エピコ−ト1001)、500部、フェノールノボラック型エポキシ樹脂(商品名:DEN438、ダウケミカル<株>製)500部、イミダゾール系硬化剤(商品名:2E4MZ、四国化成<株>製)30部、カルボキシル基変性アクリル多層構造粉体(商品名:スタフィロイドIM-301、平均粒子径0.2μm、Max.粒径0.5μm)50部、微粉砕シリカ(平均粒子径2.4μm、Max.粒径5.0μm)40部、タルク(平均粒子径1.8μm、Max.粒径4.2μm)100部、及びアクリロニトリルーブタジエンゴム(商品名:ニポール1031、日本ゼオン<株>製)30部をメチルエチルケトンに溶解した溶液を加え、3本ロールにて良く分散し、ワニスJとした。このワニスJを表面平滑で厚さ25μmの離型PETフィルムの片面に連続的に塗布、乾燥して樹脂組成物層の厚み7μmの離型フィルム付きBステージ樹脂組成物シートK(170℃でのゲル化時間67秒)を作製し、乾燥ゾーンから出てきた時点で樹脂面に厚さ20μmの保護ポリプロピレンフィルムを配置し、温度100℃、線圧5kgf/cmのロールにて連続的にラミネートし、巻き取った。
(Example 2)
Bisphenol A type epoxy resin (trade name: Epicote 1001), 500 parts, phenol novolac type epoxy resin (trade name: DEN438, manufactured by Dow Chemical Co., Ltd.), 500 parts, imidazole curing agent (trade name: 2E4MZ, Shikoku) Kasei Chemical Co., Ltd.) 30 parts, carboxyl group-modified acrylic multilayer structure powder (trade name: Staphyloid IM-301, average particle size 0.2 μm, Max. Particle size 0.5 μm), finely pulverized silica (average particle size) 2.4 μm, Max. Particle size 5.0 μm) 40 parts, Talc (average particle size 1.8 μm, Max. Particle size 4.2 μm) 100 parts, and acrylonitrile-butadiene rubber (trade name: Nipol 1031, manufactured by Nippon Zeon Co., Ltd.) A solution in which 30 parts were dissolved in methyl ethyl ketone was added and dispersed well with three rolls to obtain Varnish J. This varnish J was applied to one side of a release PET film having a smooth surface and a thickness of 25 μm, dried, and dried to obtain a B-stage resin composition sheet K with a release film having a thickness of 7 μm (at 170 ° C. The gelation time is 67 seconds), and when it comes out of the drying zone, a protective polypropylene film with a thickness of 20 μm is placed on the resin surface and laminated continuously with a roll at a temperature of 100 ° C and a linear pressure of 5 kgf / cm. Wound up.

又、ビスフェノールA型エポキシ樹脂(商品名:エピコ−ト1001)、500部、フェノールノボラック型エポキシ樹脂(商品名:DEN438、)450部、イミダゾール系硬化剤(商品名:2E4MZ、)30部、MBS樹脂粉体(商品名:平均粒径0.2μm,Max.粒径0.5μm)150部を加え3本ロールにて良く均一分散し、ワニスLとした。このワニスLを連続的に厚さ25μmの表面平滑な離型PETフィルムに塗布、乾燥して樹脂組成物厚さ10μm、ゲル化時間が65秒のBステージ樹脂組成物層Mを形成し、これを厚さ4.5μmの全芳香族ポリアミド(アラミド)フィルムの表面を900Wで2分処理し、水接触角5度とした耐熱フィルムNの片面に配置し、その反対面に上記離型フィルム付きBステージ樹脂組成物シートKの保護フィルムを剥離しながら配置し、温度100℃、線圧5kgf/cmの加熱ロールにてラミネートし、耐熱フィルム基材入り両面離型フィルム付きBステージ樹脂組成物シート O を作製した。更に上記耐熱フィルムNの両面にBステージ樹脂組成物層Mを付着させた両面離型フィルム付きBステージ樹脂組成物シートPを作製した。   Also, bisphenol A type epoxy resin (trade name: Epicote 1001), 500 parts, phenol novolac type epoxy resin (trade name: DEN438), 450 parts, imidazole curing agent (trade name: 2E4MZ), 30 parts, MBS Varnish L was obtained by adding 150 parts of resin powder (trade name: average particle size 0.2 μm, Max. Particle size 0.5 μm) and uniformly dispersing with three rolls. This varnish L is continuously applied to a 25 μm thick smooth PET release film and dried to form a B-stage resin composition layer M having a resin composition thickness of 10 μm and a gel time of 65 seconds. Is placed on one side of heat-resistant film N with a surface of 4.5μm thick aromatic polyamide (aramid) film treated at 900W for 2 minutes and a water contact angle of 5 degrees, and B on the opposite side. B stage resin composition sheet with double-sided release film containing heat-resistant film base material, placed while peeling off protective film of stage resin composition sheet K, laminated with a heating roll at a temperature of 100 ° C. and a linear pressure of 5 kgf / cm Was made. Further, a B-stage resin composition sheet P with a double-sided release film in which a B-stage resin composition layer M was adhered to both surfaces of the heat-resistant film N was produced.

一方、厚さ0.1mm、12μm両面銅張りのエポキシ系銅張積層板(商品名:CCL-EL170、三菱ガス化学<株>製)に回路を形成し、導体に黒色酸化銅処理後に、この内層板2枚の間に上記耐熱フィルム基材入り離型フィルム付きBステージ樹脂組成物シートPの両面の離型フィルムを剥離して配置し、この内層板の両外側に上記離型フィルム付きBステージ樹脂組成物シートOの樹脂組成物層10μm側の離型フィルムを剥離して配置し、プレス装置に仕込んで、170℃まで25分で温度を上げ、圧力は最初から15kgf/cm2とし、真空度0.5Torrにて温度170℃にて30分保持して硬化処理をした後、冷却して取り出し、この表面の離型フィルムを除去後、クロム酸水溶液で粗化処理をして、樹脂表層からの凹凸合計で2.9〜5.0μm(平均粗度Rz:3.5μm)とした。次に、この粗化表面に無電解銅メッキを1μm付着させ、加熱炉に入れて100℃から徐々に温度を150℃まで30分で上げ、更に徐々に温度を上げて170℃で60分加熱硬化した。この板の下側に実施例1のバックアップシート I を室温でラミネート接着し、この板の上から波長355nmのUV-YAGレーザーを直接照射して入側孔径40μm、出側孔径35μmの貫通孔をあけた後、この上にパターンメッキレジストを高さ25μm形成し、露光、現像後に実施例1と同様に無電解銅メッキ0.4μm、電解銅メッキ25〜28μm付着させ、貫通孔内を100%充填し、レジストを溶解除去後にSUEP溶液でフラッシュエッチングにてライン/スペース=20/20μmの回路を作製し、実施例1と同様に、回路導体をニッケルメッキ、金メッキッして6層プリント配線板とした。評価結果を表1に示す。 On the other hand, a circuit is formed on an epoxy-based copper-clad laminate (trade name: CCL-EL170, manufactured by Mitsubishi Gas Chemical Co., Ltd.) with a thickness of 0.1 mm and 12 μm double-sided copper, and this inner layer is treated with black copper oxide on the conductor. The release film on both sides of the B-stage resin composition sheet P with a release film containing a heat-resistant film substrate is placed between two plates, and the B-stage with the release film is placed on both outer sides of the inner layer plate. The release film on the resin composition layer 10 μm side of the resin composition sheet O is peeled off and placed, loaded into a press machine, the temperature is raised to 170 ° C. in 25 minutes, the pressure is set to 15 kgf / cm 2 from the beginning, vacuum After holding for 30 minutes at a temperature of 170 ° C at a temperature of 0.5 Torr, cooling and taking out, removing the release film on this surface, roughening with chromic acid aqueous solution, from the resin surface layer The total unevenness was 2.9 to 5.0 μm (average roughness Rz: 3.5 μm). Next, 1 μm of electroless copper plating is attached to this roughened surface, put in a heating furnace, gradually increase the temperature from 100 ° C to 150 ° C in 30 minutes, further increase the temperature gradually and heat at 170 ° C for 60 minutes Cured. The back-up sheet I of Example 1 was laminated and bonded to the lower side of this plate at room temperature, and a UV-YAG laser having a wavelength of 355 nm was directly irradiated on the plate to form a through-hole having an inlet-side hole diameter of 40 μm and an outlet-side hole diameter of 35 μm. After opening, a pattern plating resist is formed 25 μm in height on this, and after exposure and development, electroless copper plating 0.4 μm and electrolytic copper plating 25 to 28 μm are applied in the same manner as in Example 1 to fill the through hole 100%. Then, after dissolving and removing the resist, a circuit of line / space = 20/20 μm is prepared by flash etching with SUEP solution, and the circuit conductor is nickel-plated and gold-plated to form a 6-layer printed wiring board as in Example 1. did. The evaluation results are shown in Table 1.

(実施例3)
実施例1のワニスBに焼成タルクを50重量%となるように配合したワニスQを厚さ30μmの全芳香族ポリアミド繊維不織布に含浸、乾燥して樹脂組成物含有量75wt%、ゲル化時間120秒(at170℃)のプリプレグ R を作製した。これを用いて実施例1のプリプレグDを8枚用い、両面に厚さ12μmの電解銅箔を配置し、200℃、25kgf/cm2で90分積層成形して、両面銅張積層板を作製した。これを用いて表裏に回路を形成し、この表面を黒色酸化銅処理した後、この内層板の両面にプリプレグR を各1枚配置し、その外側に厚さ35μmの銅箔キャリア付き5μm電解銅箔を配置し、同様の積層条件で積層成形して4層銅張積層板Sを作製した。表面のキャリア箔を剥離後、SUEP溶液にて銅箔厚さ 2μmまで溶解し、この板の下側に実施例1のバックアップシート I をラミネート接着し、この板の上から波長355nmのUV-Vanaレーザーを照射して、入り側の孔径70μm、出側の孔径60μmの貫通孔を形成し、これに無電解銅メッキ0.7μm、電解銅メッキ1.5μmを付着させ、この上にパターンメッキレジストを実施例1と同様に付着させ、同様に加工して貫通孔内を98%銅メッキで充填した。表層を機械研磨で銅メッキ厚さ22μmまで研磨して表面を平滑にした後に、パターンメッキレジストを剥離し、フラッシュエッチングにてライン/スペース=25/25μmの回路を作製し、実施例1と同様に、回路導体をニッケルメッキ、金メッキッして4層プリント配線板とした。評価結果を表1に示す。
Example 3
Varnish Q containing 50% by weight of calcined talc in varnish B of Example 1 was impregnated into a 30 μm-thick wholly aromatic polyamide fiber nonwoven fabric and dried to obtain a resin composition content of 75 wt% and a gel time of 120 Second (at 170 ° C.) prepreg R was prepared. Using this, 8 sheets of prepreg D of Example 1 were used, 12μm thick electrolytic copper foil was placed on both sides, and laminate molding was performed at 200 ° C and 25kgf / cm 2 for 90 minutes to produce a double-sided copper-clad laminate did. Using this, circuits are formed on the front and back, and this surface is treated with black copper oxide, then one prepreg R is placed on both sides of this inner layer board, and 5 μm electrolytic copper with a 35 μm thick copper foil carrier on the outside. A four-layer copper-clad laminate S was prepared by arranging foils and laminate-molding under the same lamination conditions. After peeling off the carrier foil on the surface, the copper foil thickness was dissolved to 2 μm with the SUEP solution, and the backup sheet I of Example 1 was laminated and bonded to the lower side of this plate, and UV-Vana with a wavelength of 355 nm was applied from above the plate. Irradiate a laser to form a through hole with an incoming hole diameter of 70 μm and an outgoing hole diameter of 60 μm, and attach electroless copper plating 0.7 μm and electrolytic copper plating 1.5 μm to it, and carry pattern plating resist on it It was made to adhere in the same manner as in Example 1 and processed in the same manner to fill the inside of the through hole with 98% copper plating. After polishing the surface layer to a copper plating thickness of 22μm by mechanical polishing and smoothing the surface, the pattern plating resist was peeled off, and a circuit of line / space = 25 / 25μm was prepared by flash etching, as in Example 1. The circuit conductor was nickel-plated and gold-plated to form a 4-layer printed wiring board. The evaluation results are shown in Table 1.

(比較例1)
実施例1の両面銅張積層板Fを用いて、これに一般的なNCドリルで150μmの貫通孔をあけ無電解銅メッキ0.5μm、電気銅メッキ15μmを付けた。これに両面回路を形成し、黒色酸化銅処理を施した後、この両側にプリプレグEを各1枚配置し、その外側に12μmの電解銅箔を置き同様に積層成形して4層板とした。これに炭酸ガスレーザで孔径100μmのブラインドビア孔をあけて内層板とスルーホールと接続し、表裏導通した構造とした。デスミヤ処理して無電解銅メッキを0.7μm、電気銅めっき15μm付着させて回路形成後に黒色酸化銅処理を施してこの表裏にプレプリグEを配置し積層成型し、同様にパターン加工して6層、プリント配線とした。評価結果を表1に示す
(Comparative Example 1)
Using the double-sided copper-clad laminate F of Example 1, a 150 μm through hole was drilled with a general NC drill, and electroless copper plating 0.5 μm and electrolytic copper plating 15 μm were attached. After forming a double-sided circuit on this and performing black copper oxide treatment, one prepreg E was placed on each side, and 12 μm electrolytic copper foil was placed on the outside to form a four-layer board in the same manner. . A blind via hole having a hole diameter of 100 μm was formed in this with a carbon dioxide laser, and the inner layer plate and the through hole were connected to each other to form a conductive structure. Desmear treatment, electroless copper plating 0.7μm, electrolytic copper plating 15μm attached, black copper oxide treatment is applied after circuit formation, prepreg E is placed on this front and back, laminated molding, pattern processing is done in the same way, 6 layers, Printed wiring. The evaluation results are shown in Table 1.

(比較例2)
実施例2で内層版に厚さ0.5mm、12μm両面銅張り積層板を用い、その他は同様に加加工し6層銅張積層板とし、これにプリント配線板とした。評価結果を表1に示す。
(Comparative Example 2)
In Example 2, a 0.5 mm thick, 12 μm double-sided copper-clad laminate was used for the inner layer plate, and the others were similarly processed into a 6-layer copper-clad laminate, which was used as a printed wiring board. The evaluation results are shown in Table 1.

(表1)
項目 実施例 比較例
1 2 3 1 2
多層プリント配線板厚み(mm)
0.28 0.33 0.52 0.31 1.15
プリント配線版層数
6 6 4 6 6
積層絶縁層間厚さ(μm)
24 15 35 24 15
貫通孔直径(μm)
60 40 70 100 150
貫通孔表裏比
0.97 0.88 0.86 --- 1.0
貫通孔内銅メッキ充填率(%)
100 100 98 --- 84
導通孔・ヒートサイクル試験(%)
1.3 2.6 1.0 11.5 10.1
(Table 1)
Item Example Comparative example
1 2 3 1 2
Multilayer printed wiring board thickness (mm)
0.28 0.33 0.52 0.31 1.15
Number of printed wiring board layers
6 6 4 6 6
Multilayer insulation interlayer thickness (μm)
24 15 35 24 15
Through hole diameter (μm)
60 40 70 100 150
Through-hole ratio
0.97 0.88 0.86 --- 1.0
Filling rate of copper plating in through hole (%)
100 100 98 --- 84
Conduction hole / heat cycle test (%)
1.3 2.6 1.0 11.5 10.1

(表2)加工数比較
項目 実施例 比較例
1 2 3 1 2
積層プレス 1 1 1 2 1
孔あけ 1 1 1 5 1
銅メッキ 1 1 1 3 1
導体回路作成 3 3 2 3 3
孔加工時間比較 1 1 1 3.3 1.2
(Table 2) Number of machining comparison items Example Comparative example
1 2 3 1 2
Laminating press 1 1 1 2 1
Drilling 1 1 1 5 1
Copper plating 1 1 1 3 1
Conductor circuit creation 3 3 2 3 3
Drilling time comparison 1 1 1 3.3 1.2

<測定方法>
1)多層プリント配線板厚み : 銅箔込みの総厚さを厚み測定器で測定した。
2)積層絶縁層間厚さ : 断面写真を撮り、絶縁層間の厚みを測定した。表層の絶縁層間の厚みを示した。
3)貫通孔表裏比 : 入側孔径、出側孔径を各100個測定し、この平均値を用い、裏の直径/表の直径比率を示した。
4)貫通孔内銅メッキ : 各実施例、比較例であけた、孔内の銅メッキ充填率を、100個断面を観察して、孔内に90%容積以上銅メッキが充填している率を示した。尚、内部に空隙があるものは非充填とした。
5)表裏貫通孔・ヒートサイクル試験 : 各孔にランド径200μmを作製し、900孔を表裏交互につなぎ、1サイクルが、260℃・ハンダ・浸せき30秒→室温・5分 で、200サイクル実施し、抵抗値の変化率の最大値を示した。
6)加工工程 : 内層板作製も含め、プリント配線板が完成するまでの工程の回数を示した。又孔加工時間比較は内層板加工も含め実施例を1.0として比較値を示した。
<Measurement method>
1) Multilayer printed wiring board thickness: The total thickness including copper foil was measured with a thickness meter.
2) Thickness of laminated insulating layer: A cross-sectional photograph was taken and the thickness between insulating layers was measured. The thickness between the surface insulating layers is shown.
3) Through hole front / back ratio: 100 inlet-side hole diameters and outlet-side hole diameters were measured, and the average value was used to indicate the ratio of the back diameter / front diameter.
4) Copper plating in through-holes: Percentage of copper plating filling in the holes opened in each example and comparative example was observed at 100 cross-sections, and the rate of filling 90% or more copper plating in the holes showed that. In addition, the thing with a space | gap inside was not filled.
5) Front / back through-hole / heat cycle test: Land diameter of 200μm is made in each hole, 900 holes are connected alternately on the front and back, and one cycle is 200 cycles at 260 ° C, solder, immersion 30 seconds → room temperature, 5 minutes The maximum change rate of the resistance value was shown.
6) Machining process: The number of processes until the printed wiring board is completed, including the production of the inner layer board, is shown. Further, the comparison of the drilling time was shown as a comparative value with the example as 1.0 including the inner layer plate processing.

Claims (9)

内層に電子回路導体を有し、両外層に金属が全面に接着された形の多層化積層された多層プリント配線板を製造する工程と、次いでUVレーザーにより両外層及び内層電子回路導体を貫通して、貫通孔の入り側孔直径と出側孔直径の差が20%以下に貫通孔を形成する工程と、貫通孔内を含む全面に無電解メッキおよび/又は極薄電気メッキを行い、絶縁体表面を電気導通化後、直流電気メッキにより貫通孔内の中央部を両孔壁からせり出させたメッキ析出層により閉鎖し、次いでリバースパルス電源による電気メッキを行い貫通孔内上下に残る空間を析出銅又は銅合金で充填し、同時に内外層の電子導体をパターンメッキして、次いで両外層に電子回路を形成することを特徴とする多層プリント配線板。 A process of manufacturing a multilayer printed wiring board having an electronic circuit conductor in the inner layer and metal in both outer layers bonded to the entire surface, and then penetrating both the outer layer and inner layer electronic circuit conductor by UV laser In addition, the step of forming the through hole so that the difference between the diameter of the entrance side hole and the exit side hole of the through hole is 20% or less, and electroless plating and / or ultrathin electroplating is performed on the entire surface including the inside of the through hole to insulate After the body surface is made electrically conductive, the center portion in the through hole is closed by a plating deposit layer protruding from both hole walls by direct current electroplating, and then electroplated by a reverse pulse power source to remain above and below the through hole. A multilayer printed wiring board characterized in that the inner and outer layer electronic conductors are pattern plated at the same time, and then an electronic circuit is formed on both outer layers. 貫通孔を含む全面に無電解銅メッキ及び/又は極薄電気銅メッキを行い、絶縁体表面を電気導通化した後、直流電気メッキにより貫通孔内のほぼ中央を、両孔壁からせり出させた銅メッキ析出層により孔中央部を閉鎖し、次いでリバースパルス電源による電気銅メッキにより貫通孔内上下に残る空間を析出銅で孔容積の90%以上充填することを特徴とするメッキ法による請求項1記載の多層プリント配線板。 After electroless copper plating and / or ultra-thin electrolytic copper plating is applied to the entire surface including the through holes to make the insulator surface electrically conductive, the center of the through hole is protruded from both hole walls by direct current electroplating. The central portion of the hole is closed with a copper plating deposition layer, and then the space remaining above and below the through hole is filled with deposited copper by 90% or more of the hole volume by electrolytic copper plating with a reverse pulse power supply. Item 11. A multilayer printed wiring board according to Item 1. パターンメッキレジストの厚さを越えるように電気銅メッキを析出させ、機械研磨により表面を平滑に研磨することを特徴とする請求項1又は2記載の多層プリント配線板。 3. The multilayer printed wiring board according to claim 1, wherein the electrolytic copper plating is deposited so as to exceed the thickness of the pattern plating resist, and the surface is polished smoothly by mechanical polishing. 多層プリント配線板の厚さが0.1〜1.0mmである請求項1、2又は3記載の多層プリント配線板。 The multilayer printed wiring board according to claim 1, 2 or 3, wherein the thickness of the multilayer printed wiring board is 0.1 to 1.0 mm. 該貫通孔の入側孔直径が20〜100μmである請求項1、2、3、又は4記載の多層プリント配線板。 The multilayer printed wiring board according to claim 1, 2, 3, or 4, wherein the through-hole diameter of the through hole is 20 to 100 µm. 各層電子回路導体間の電気絶縁層の厚さが10μm以上、0.48mm以下である請求項1、2、3、4、又は5記載の多層プリント配線板。 The multilayer printed wiring board according to claim 1, 2, 3, 4, or 5, wherein the thickness of the electrical insulating layer between the electronic circuit conductors of each layer is 10 µm or more and 0.48 mm or less. 電子回路導体の主体が銅箔及び/又は電気メッキ析出銅であることを特徴とする請求項1、2、3,4、5、又は6記載の多層プリント配線板。 The multilayer printed wiring board according to claim 1, 2, 3, 4, 5, or 6, wherein the electronic circuit conductor is mainly copper foil and / or electroplated copper. 該電気絶縁層が補強基材で補強された熱硬化性樹脂組成物である請求項1、2、3、4、5、6、又は7記載の多層プリント配線板。 The multilayer printed wiring board according to claim 1, 2, 3, 4, 5, 6, or 7, wherein the electrical insulating layer is a thermosetting resin composition reinforced with a reinforcing substrate. 該請求項8記載の補強基材がガラス繊維布、耐熱有機繊維布、耐熱プラスチックフィルムから選ばれる1種或いは2種以上から成ることを特徴とする請求項1、2、3、4、5、6、7、又は8記載の多層プリント配線板。 The reinforcing substrate according to claim 8 is composed of one or more selected from glass fiber cloth, heat-resistant organic fiber cloth, and heat-resistant plastic film. The multilayer printed wiring board according to 6, 7, or 8.
JP2003278157A 2003-07-23 2003-07-23 Process for producing multilayer printed wiring board Pending JP2005045046A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010044315A1 (en) * 2008-10-16 2010-04-22 大日本印刷株式会社 Through electrode substrate, method for manufacturing the through electrode substrate, and semiconductor device using the through electrode substrate
JP2011003925A (en) * 2008-10-16 2011-01-06 Dainippon Printing Co Ltd Through-electrode substrate and manufacturing method of the same, and semiconductor device using through-electrode substrate
JP2014095104A (en) * 2012-11-07 2014-05-22 Toppan Printing Co Ltd Copper filling method of open hole by plating

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010044315A1 (en) * 2008-10-16 2010-04-22 大日本印刷株式会社 Through electrode substrate, method for manufacturing the through electrode substrate, and semiconductor device using the through electrode substrate
JP2010118645A (en) * 2008-10-16 2010-05-27 Dainippon Printing Co Ltd Through electrode substrate, method of manufacturing the same, and semiconductor device using the through electrode substrate
JP2011003925A (en) * 2008-10-16 2011-01-06 Dainippon Printing Co Ltd Through-electrode substrate and manufacturing method of the same, and semiconductor device using through-electrode substrate
JP4735767B2 (en) * 2008-10-16 2011-07-27 大日本印刷株式会社 Through electrode substrate and semiconductor device
US8288772B2 (en) 2008-10-16 2012-10-16 Dai Nippon Printing Co., Ltd. Through hole electrode substrate with different area weighted average crystal grain diameter of metal in the conductive part and semiconductor device using the through hole electrode substrate
US8637397B2 (en) 2008-10-16 2014-01-28 Dai Nippon Printing Co., Ltd Method for manufacturing a through hole electrode substrate
JP2014095104A (en) * 2012-11-07 2014-05-22 Toppan Printing Co Ltd Copper filling method of open hole by plating

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