JP2004266312A - Apparatus and method for capturing synchronization - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To conduct a high-speed cell searching by efficiently identifying a scrambling code. <P>SOLUTION: At ST (slot timing) 201, a correlation operation between data of one symbol and a first search code is performed. At ST202, a correlation operation between the scrambling code of a known cell and a reception signal is performed concurrently with the correlation operation at ST 201 to detect path timing of the known cell. At ST 203, the slot timing of the known cell is excluded from the phase of a correlation value calculated at ST 201 i.e. slot timing, using the path timing of the known cell detected at ST 202. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a synchronization acquisition device and a synchronization acquisition method used in a CDMA (Code Division Multiple Access) cellular system.
[0002]
[Prior art]
In a CDMA cellular system, it is necessary to perform a cell search at the time of cell switching (handover) or intermittent reception due to movement of a mobile station. Among these cell searches, a three-stage cell search is well known (for example, see Patent Document 1). Hereinafter, the three-stage cell search will be briefly described with reference to the drawings.
[0003]
The three-stage cell search is performed in the following order: slot timing detection in the first stage, identification of scrambling code group and scrambling code timing (ie, frame timing) in the second stage, and identification of scrambling code in the third stage. Done in In the first stage, a first search code that is a short-cycle code common to all base stations is used, and in the second stage, a second search code that is a short-cycle code is used. The second search code is arranged in a different pattern (an arrangement pattern of the second search code number multiplied by one symbol of each slot) for each group including a plurality of scrambling codes that are long-period codes. See FIG. 6).
[0004]
<First stage> Detection of slot timing
Normally, in CDMA, as shown in FIG. 7, a first search code (PSC; Primary Search Code) and a second search code (SSC; Secondary Search Code) are code-multiplexed as synchronization codes and prepared at the beginning of each slot. ing. In the first stage, the slot timing is detected using the first search code. One specific symbol (the leading symbol in this case) in the slot is spread only with a first search code common to all base stations, and the slot timing is detected using the first search code.
[0005]
Specifically, the detection of the slot timing is performed in the steps as shown in ST11 to ST12 in FIG. In ST11, a correlation value between data for one symbol and a first search code (PSC) is calculated. Then, the calculation of the correlation value is performed over one slot, and a delay profile for one slot is created. In order to improve the detection accuracy of the slot timing, usually, the delay profiles for a plurality of slots are averaged.
[0006]
In ST12, it is determined whether or not the correlation value exceeds a predetermined threshold on the delay profile. That is, a peak of the correlation value is detected, a peak timing exceeding a predetermined threshold is detected as a slot timing candidate, and the process proceeds to ST13. On the other hand, if there is no peak exceeding the predetermined threshold, the synchronization acquisition processing ends.
[0007]
<Second stage> Identification of scrambling code group and detection of scrambling code timing
Here, the scrambling code group is identified and the scrambling code timing is detected using the second search code (SSC). One specific symbol (here, the first symbol) of all slots in one frame is spread by the second search code. The arrangement of the second search code in the frame differs for each group in which the scrambling code, which is a long-period code, is classified. The number of groups is 32 in total as shown in FIG. In general, 17 types of second search codes are prepared. Using this second search code, a scrambling code group (row in FIG. 6) is identified, and the head of the frame, that is, the scrambling code timing is detected.
[0008]
Specifically, the process is performed in steps as shown in ST13 to ST14 in FIG. In ST13, according to the arrangement table of the second search code shown in FIG. 6, based on the slot timing detected in the first stage, one specific symbol (here, the first symbol) of the received slot, the second search code, Perform correlation processing between. Thereby, the correlation value corresponding to each of the slots 0 to 15 is calculated for each group (each row of the arrangement table).
[0009]
Next, after the second search code arrangement shown in FIG. 6 is shifted by one slot, the next received slot is identified based on the slot timing detected in the first stage according to the arrangement table after the one slot shift. The correlation process is performed again between one symbol of the second search code and the second search code. At this time, in order to increase the identification accuracy of the scrambling code group and the detection accuracy of the scrambling code timing, the correlation values corresponding to the slots 0 to 15 are averaged sequentially. Then, the averaging process is performed for predetermined slots while shifting the arrangement of the second search code shown in FIG. 6 by one slot.
[0010]
In ST14, it is determined whether or not the correlation value calculated in ST13 exceeds a predetermined threshold. If the threshold value is exceeded, it is determined that a candidate for the scrambling code group and the scrambling code timing (that is, the head of the frame) has been detected, and the process proceeds to ST15. On the other hand, when the difference does not exceed the predetermined threshold, the process proceeds to ST19.
[0011]
<Third step> Identification of scrambling code
Here, one scrambling code is identified from 16 types of scrambling code candidates determined from the scrambling code group identified in the second stage. Specifically, the process is performed in steps as shown in ST15 to ST16 in FIG.
[0012]
In ST15, a correlation value between the received data and the scrambling code is calculated according to the detected scrambling code timing. This process is performed for 16 types of scrambling codes belonging to the identified scrambling code group. In order to increase the accuracy of detecting the scrambling code timing, correlation values for a plurality of symbols are averaged.
[0013]
In ST16, if the correlation value calculated in ST15 exceeds a predetermined threshold value, it is identified as a scrambling code, and the process proceeds to ST17. On the other hand, when the difference does not exceed the predetermined threshold, the process proceeds to ST19.
[0014]
Since the process shown in FIG. 8 is a process of identifying the scrambling codes of a plurality of paths, in ST17, the paths corresponding to the already identified scrambling codes are excluded. That is, the correlation value corresponding to the already detected scrambling code timing is excluded from the delay profile created in ST15.
[0015]
When the processes of the first to third stages are completed and one scrambling code is identified, it is checked in ST18 whether a predetermined number of scrambling codes have been identified. Then, when a predetermined number of scrambling codes have been identified, the process is terminated, and when the number of identified scrambling codes has not reached the predetermined number, the process proceeds to ST19.
[0016]
In ST19, it is determined whether or not the second stage processing of ST13 and ST14 has been completed for all the timings detected as candidates for the slot timing in ST12. If the processing has been completed, the cell search is completed. The process moves to ST13.
[0017]
[Patent Document 1]
JP 2001-145151 A (Page 7, FIG. 1)
[0018]
[Problems to be solved by the invention]
However, there are the following problems in performing a handover from a communicating cell to another cell and in a cell search at the time of intermittent reception. This will be specifically described with reference to the drawings.
[0019]
FIG. 9 is a diagram illustrating an example of a conventional wireless communication system. In this figure, when the mobile station 21 is registered with the base station 22 in a cell 25 that is in a range where the mobile station 21 can communicate with the base station 22, a cell search is performed at a position where the mobile station 21 can communicate with the base station 23 and the base station 24. Consider the case when you go. At this time, the path arriving at the mobile station 21 from the base station 22 may be a plurality of paths (multipath) due to the propagation environment. FIG. 10 shows this in a delay profile in the first stage of the cell search.
[0020]
In FIG. 10, paths 61, 62, 63 and 64 are paths arriving from the base station 22. The path 71 is a path arriving from the base station 23, and the path 81 is a path arriving from the base station 24. Since the mobile station 21 has been registered with the base station 22, the second stage and the third cell search of the path of the base station 22 which arrived by multipath even though the synchronization acquisition has already been completed. Performs stepwise processing. Therefore, there is a problem that the time required for the cell search becomes longer.
[0021]
The present invention has been made in view of such a point, and an object of the present invention is to provide a synchronization acquisition device and a synchronization acquisition method capable of efficiently identifying a scrambling code and performing a high-speed cell search.
[0022]
[Means for Solving the Problems]
In order to solve this problem, a synchronization acquisition device of the present invention is a synchronization acquisition device that performs a three-stage cell search, wherein a timing of a path arriving from a cell in which a cell search is performed is determined by a scrambling code assigned to the cell. , A first stage slot timing detecting means for detecting slot timing based on a correlation value between a received signal and a first search code, and a path detected by the path timing detecting means. An exclusion unit for excluding a slot timing of a signal received from a cell for which a cell search has already been performed from the processes of the second and third stages by using timing, and a slot timing detected by the slot timing detection unit. Based on the slot timing remaining by the exclusion means. Adopts a configuration comprising a second and third stage processing means for performing a cell search of the second stage and third stage had the.
[0023]
According to this configuration, at the time of cell search, the slot timing of the known cell is excluded from the cell search based on the path arriving from the cell (known cell) that has already performed the cell search. For example, when a cell arrives, the path of a known cell is not targeted for cell search, so that a scrambling code can be efficiently identified and a high-speed cell search can be performed.
[0024]
In the above configuration, when the slot timing detection means performs a correlation operation in the first step, if a peak level generated on a delay profile exceeds a predetermined threshold, a peak of a side lobe is detected. A configuration is adopted in which the timing is excluded from the slot timing and the peak timing of the side lobe is not excluded from the slot timing when the peak level occurring on the delay profile is equal to or less than a predetermined threshold.
[0025]
According to this configuration, when the peak of the side lobe occurring on the delay profile exceeds a predetermined threshold, the timing of the peak of the side lobe is excluded from the slot timing, so that the cell timing is erroneously targeted for the cell search as the slot timing. , And the scrambling code can be efficiently identified. When the peak of the side lobe is equal to or less than the predetermined threshold, the timing of the peak of the side lobe is not recognized as the slot timing. Therefore, the timing of the peak is not detected by excluding the peak timing from the slot timing. Time can be reduced.
[0026]
The synchronization acquisition device of the present invention, in the above-described configuration, includes a control unit that controls the processing in each stage of the three-stage cell search and the path timing detection unit, wherein the control unit determines the path timing in which the path search has already been performed. The time required from the detection process is measured, and after a predetermined time has elapsed, the search process is forcibly terminated and the control for starting the search process is performed again.
[0027]
According to this configuration, when the time required from the detection processing of the path timing for which the path search has already been performed elapses the predetermined time, the propagation environment changes, so that the timing of the path coming from the base station apparatus changes. Therefore, by forcibly terminating the path search process and starting the search process again, an accurate path search based on the changed path timing can be performed.
[0028]
The synchronization acquisition device of the present invention, in the above configuration, wherein the control means performs control for stopping the path timing detection means if the time required from the first stage processing is within a predetermined time, and the control means detects the immediately preceding detection. A configuration is employed in which control is performed so as to perform processing in the exclusion unit using path timing.
[0029]
According to this configuration, if the time required from the first-stage processing is within a predetermined time, the path timing of the known cell detected at the same time as the first-stage processing is detected again without any change. Therefore, it is possible to reduce the power required for the process of detecting the path timing of a known cell.
[0030]
The synchronization acquisition device of the present invention has a configuration in the above configuration, in which the control means periodically stops the processing of the exclusion means.
[0031]
According to this configuration, when the slot timing of the known cell matches the slot timing of the new cell, the exclusion unit excludes even the slot timing of the new cell from the target of the cell search, and the cell search cannot be performed. However, by periodically stopping the processing of the exclusion unit, it is possible to increase the possibility that the cell search can be performed even when the slot timing of the known cell matches the slot timing of the new cell.
[0032]
The synchronization acquisition apparatus of the present invention, in the above configuration, wherein the exclusion means subtracts the correlation value of the slot timing in the cell in which the cell search has already been performed from the correlation value in the first stage, and the difference exceeds a predetermined threshold. , A configuration is adopted in which slot timing of a known cell is subjected to cell search.
[0033]
According to this configuration, at the timing when the slot timing of the known cell and the slot timing of the new cell match, the difference obtained by subtracting the correlation value of the slot timing in the cell for which the cell search has already been performed from the first-stage correlation value is a predetermined value. When the threshold value is exceeded, the slot timing of a cell (known cell) for which a cell search has already been performed is not excluded, so that even if the slot timing of the new cell matches the slot timing of the known cell, The slot timing can be detected.
[0034]
The synchronization acquisition method of the present invention is a synchronization acquisition method of performing a three-stage cell search, wherein a path timing detection step of detecting a timing of a path arriving from a cell for which a cell search has already been performed, together with a start of the cell search; A slot timing detecting step of detecting a slot timing of a signal received from the apparatus, and using the path timing detected in the path timing detecting step, a slot timing of a signal received from a cell that has already been subjected to a cell search is subjected to a cell search. And an exclusion step for exclusion from.
[0035]
According to this method, at the time of cell search, the slot timing of the known cell is excluded from the target of the cell search based on the path arriving from the known cell. Since the path is not targeted for cell search, scrambling codes can be efficiently identified, and high-speed cell search can be performed.
[0036]
BEST MODE FOR CARRYING OUT THE INVENTION
The gist of the present invention is to detect the timing of a path arriving from a synchronously acquired cell (known cell) using a scrambling code allocated to the cell during slot detection of a received signal in the first stage of cell search. Then, from the slot timing detected in the first stage, the cell search is performed after excluding the slot timing of the signal received from the known cell from the target of the cell search using the path timing of the known cell. This makes it possible to efficiently identify the scrambling code of a cell (new cell) for which cell search has not yet been performed, and perform cell search at high speed.
[0037]
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[0038]
(One embodiment)
FIG. 1 is a block diagram showing a configuration of a synchronization acquisition device according to one embodiment of the present invention. In this figure, a radio reception unit 102 performs a predetermined radio reception process (down conversion, A / D conversion, etc.) on a signal (received signal) received via an antenna 101, and converts the signal after the radio reception process. Output to SW (switch) 103.
[0039]
The SW 103 switches the signal output from the wireless reception unit 102 to a first-stage processing unit 105, a second-stage processing unit 111, a third-stage processing unit 116, and a path-timing detection unit 121 as appropriate under the control of the control unit 104 described below. Output.
[0040]
The control unit 104 obtains output results from the first-stage processing unit 105, the second-stage processing unit 111, the third-stage processing unit 116, and the path-timing detection unit 121, and sets the SW 103 to perform an efficient cell search. Control.
[0041]
The first-stage processing unit 105 performs the first-stage processing of the three-stage cell search, and detects slot timing. Specifically, first search code generating section 106 generates a first search code commonly used in all base stations and outputs the first search code to correlation circuit 107.
[0042]
Correlation circuit 107 performs a correlation operation between the received signal and the first search code output from first search code generation section 106, and outputs the calculated correlation value to averaging circuit 108. The averaging circuit 108 averages the correlation values calculated by the correlation circuit 107 for a plurality of slots.
[0043]
Slot timing detecting section 109 detects a timing of a correlation value exceeding a predetermined threshold value from the correlation values averaged by averaging circuit 108 and outputs the detected timing to known cell slot timing excluding section 110.
[0044]
The known cell slot timing exclusion unit 110 uses the path timing of the known cell detected by the path timing detection unit 121 described later among the timings output from the slot timing detection unit 109 to determine the slot timing of the known cell in the cell search. Exclude from the target. The remaining slot timing is output to the control unit 104 and the correlation circuit 113 as a slot timing candidate for a new cell.
[0045]
The second-stage processing unit 111 performs the second-stage processing of the three-stage cell search, and identifies a scrambling code group and detects a scrambling code timing. Specifically, second search code generating section 112 generates 17 types of second search codes and outputs them to correlation circuit 113.
[0046]
The correlation circuit 113 performs a correlation operation between the 17 types of second search codes output from the second search code generation unit 112 and the received signal at the slot timing output from the known cell slot timing exclusion unit 110, respectively. The calculated correlation value is output to allocating section 114.
[0047]
The allocating unit 114 sequentially averages the correlation values for each slot while allocating the correlation values calculated by the correlation circuit 113 to the slots 0 to 15 according to the second search code arrangement table shown in FIG. The result of the assignment is output to scrambling code group identification section 115.
[0048]
Scrambling code group identification section 115 performs a threshold determination between the allocation result of allocation section 114 and a predetermined threshold. The scrambling code group is identified and the scrambling code timing (frame timing) is detected from the allocation result exceeding the threshold value. The identification result and the detection result are output to the control unit 104, the scrambling code generation unit 117, and the correlation circuit 118.
[0049]
The third-stage processing unit 116 performs a third-stage process of the three-stage cell search, and identifies a scrambling code. Specifically, scrambling code generation section 117 generates 16 types of scrambling codes belonging to the group identified by scrambling code group identification section 115 and outputs the generated scrambling codes to correlation circuit 118.
[0050]
Correlation circuit 118 performs a correlation operation between the scrambling code output from scrambling code generation section 117 and the received signal at the scrambling code timing detected by scrambling code group identification section 115. The calculated correlation value is output to the averaging circuit 119.
[0051]
The averaging circuit 119 averages the correlation value calculated by the correlation circuit 118 for a plurality of slots, and outputs the result to the scrambling code identification unit 120.
[0052]
The scrambling code identification unit 120 performs a threshold determination between the correlation value averaged by the averaging circuit 119 and a predetermined threshold, and if the correlation exceeds the threshold, identifies the new cell as a scrambling code for a new cell.
[0053]
The path timing detection unit 121 starts detecting the path timing of a known cell when starting the cell search. Specifically, scrambling code generating section 122 generates a scrambling code of a known cell and outputs the generated scrambling code to correlation circuit 123.
[0054]
Correlation circuit 123 performs a correlation operation between a predetermined timing width of the scrambling code output from scrambling code generation section 122 and the received signal, and outputs the calculation result to averaging circuit 124.
[0055]
The averaging circuit 124 averages the correlation value calculated by the correlation circuit 123 with a predetermined timing width, and outputs the averaged correlation value to the path timing detection unit 125.
[0056]
The path timing detection unit 125 performs a threshold determination between the correlation value averaged by the averaging circuit 124 and a predetermined threshold, and detects the timing of the correlation value exceeding the threshold. The detected path timing is output to the control unit 104 and the known cell slot timing exclusion unit 110.
[0057]
FIG. 2 is a flowchart showing the operation of the synchronization acquisition device according to the embodiment of the present invention. In this figure, in ST201, a correlation operation is performed between data for one symbol and a first search code (PSC). Then, this correlation operation is performed over one slot, and a delay profile for one slot is created. In order to improve the detection accuracy of the slot timing, usually, the delay profiles for a plurality of slots are averaged.
[0058]
In ST202, the correlation calculation between the scrambling code of the known cell and the received signal is performed simultaneously with the correlation calculation in ST201, and the path timing of the known cell is detected. Here, the frame timing of the known cell is known from the detected path timing, and the slot timing is known based on the frame timing.
[0059]
In ST203, the slot timing of the known cell is excluded from the phase of the correlation value calculated in ST201, that is, the slot timing, using the path timing of the known cell detected in ST202. In ST201, slot timing is detected for paths from the known cell and the new cell. However, since the cell search has already been performed for the known cell, the slot timing of the known cell is excluded in ST203.
[0060]
In ST204, it is determined whether or not the correlation value exceeds a predetermined threshold on the delay profile. That is, the peak of the correlation value is detected, the peak timing exceeding a predetermined threshold is detected as a slot timing candidate for a new cell, and the process proceeds to ST205. On the other hand, if there is no peak exceeding the predetermined threshold, the synchronization acquisition processing ends.
[0061]
In ST205, based on the slot timing detected in the first stage, the correlation between one specific symbol (here, the first symbol in this case) of the received slot and the second search code is determined according to the second search code arrangement table. Perform processing. Thereby, the correlation value corresponding to each of the slots 0 to 15 is calculated for each group (each row of the arrangement table).
[0062]
Next, after the second search code arrangement shown in FIG. 6 is shifted by one slot, the next received slot is identified based on the slot timing detected in the first stage according to the arrangement table after the one slot shift. The correlation process is performed again between one symbol of the second search code and the second search code. At this time, in order to increase the identification accuracy of the scrambling code group and the detection accuracy of the scrambling code timing, the correlation values corresponding to the slots 0 to 15 are averaged sequentially. Then, the averaging process is performed for predetermined slots while shifting the arrangement of the second search code shown in FIG. 6 by one slot.
[0063]
In ST206, it is determined whether or not the correlation value calculated in ST205 exceeds a predetermined threshold. If the threshold value is exceeded, it is determined that the identification of the scrambling code group and the scrambling code timing (ie, the head of the frame) have been detected, and the process proceeds to ST207. On the other hand, if it does not exceed the predetermined threshold, the process moves to ST211.
[0064]
In ST207, a correlation value between the received signal and the scrambling code is calculated according to the scrambling code timing detected in ST206. This process is performed for 16 types of scrambling codes belonging to the scrambling code group identified in ST206. In order to increase the accuracy of detecting the scrambling code timing, correlation values for a plurality of symbols are averaged.
[0065]
In ST208, when the correlation value calculated in ST207 exceeds a predetermined threshold, the correlation value is identified as a scrambling code, and the process proceeds to ST209. On the other hand, if it does not exceed the predetermined threshold, the process moves to ST211.
[0066]
Since the process shown in FIG. 2 is a process of identifying the scrambling codes of a plurality of paths, in ST209, the slot timing of this processing is excluded from the plurality of slot timings detected in ST204, and the timing of this processing is removed. The processing from ST205 to ST210 is not performed twice or more.
[0067]
When the process of ST209 is completed and one scrambling code is identified, it is confirmed in ST210 whether a predetermined number of scrambling codes have been identified. If a predetermined number of scrambling codes have been identified, the process is terminated, and if the number of identified scrambling codes has not reached the predetermined number, the process proceeds to ST211.
[0068]
In ST211, it is determined whether or not the second stage processing in ST205 and ST206 has been completed for all the timings detected as candidates for the slot timing in ST204. If the processing has been completed, the cell search is completed. The process moves to ST205.
[0069]
As described above, the path timing of the known cell is detected simultaneously with the cell search (particularly the first stage processing), the slot timing is determined from the detected path timing, and the slot timing of the known cell is determined from the slot timing detected in the first stage of the cell search. By excluding the timing, it is not necessary to perform a cell search for a known cell, so that a high-speed cell search can be performed.
[0070]
FIG. 3 is a conceptual diagram illustrating a state in which slot timing of a known cell is excluded. FIG. 3A is a delay profile showing slot timings of a new cell and a known cell in the first stage. However, only the correlation value exceeding a predetermined threshold value and its timing are shown. FIG. 3B shows a delay profile obtained by combining the two delay profiles of FIG. 3A into one. In the first stage of the cell search, the delay profile of the new cell cannot be distinguished from the delay profile of the known cell as shown in FIG. A delay profile is obtained. Therefore, the path timing detection unit 121 detects the path timing of the known cell, and calculates the slot timing from the detected path timing. By excluding the slot timing of the known cell from FIG. 3B, only the path timing of the new cell remains as shown in FIG. 3C.
[0071]
Incidentally, the timing of the correlation value of the new cell may coincide with the timing of the correlation value of the known cell. In this case, if the slot timing of the known cell is excluded, the slot timing of the new cell is also excluded, and the cell search of the new cell may not be performed. This is shown in FIG.
[0072]
FIG. 4 is a conceptual diagram showing a case where the timing of the correlation value of the new cell and the timing of the correlation value of the known cell match. FIG. 4A is a delay profile showing slot timings of a new cell and a known cell, respectively. It is assumed that the new cell has one peak and the known cell has two peaks. FIG. 4B shows a delay profile obtained by combining the two delay profiles of FIG. 4A into one, and since the slot timing of the new cell matches the slot timing of the known cell, the peak is 2 It becomes a book. If the slot timing of the known cell is excluded in this state, the slot timing of the new cell is also excluded, and the state becomes as shown in FIG. 4C, so that the slot timing of the new cell cannot be detected. .
[0073]
Therefore, the known cell slot timing exclusion unit 110 determines whether or not the difference obtained by subtracting the correlation value of the slot timing in the known cell from the correlation value in the first stage exceeds a predetermined threshold. Do not exclude slot timing of known cells. Accordingly, even when the slot timing of the new cell matches the slot timing of the known cell, the slot timing of the new cell can be detected. Since the path search process uses the CPICH and the first stage process uses the P-SCH (Primary-Search Channel), the difference may be calculated in consideration of the transmission power ratio between the CPICH and the P-SCH.
[0074]
The process of excluding the slot timing of the known cell may not be performed periodically. This makes it possible to increase the possibility that a cell search for a new cell can be performed when the slot timings of the new cell and the known cell match. However, in this case, a cell search is also performed for a known cell. Also, by stopping the processing of the path timing detection unit 121, it is possible to reduce the power required for the detection processing.
[0075]
Here, a correlation waveform generated by the correlation operation in the correlation circuit 107 will be described. Here, since the same first search code is correlated, it is referred to as autocorrelation. FIG. 5 is a diagram showing an autocorrelation waveform of the first search code. As shown in FIG. 5A, a peak having a correlation value of “1” appears at 256 [Chip], and a side lobe appears around this peak. In some cases, the slot timing detection unit 109 detects the maximum correlation value as the slot timing, and also detects the timing of forming a peak in the side lobe as the slot timing. However, the timing at which a peak is formed by the side lobe is not the correct slot timing, and if the timing is detected as the slot timing, the processing after the second stage is wastefully performed. Therefore, it is necessary to exclude a timing at which a peak is formed in a side lobe when the timing is detected as a slot timing.
[0076]
Actually, as shown in FIGS. 5B and 5C, it is necessary to consider noise components represented by vertical stripes. FIG. 5B shows the case where the signal level of the cell is high and the noise level is low, and FIG. 5C shows the case where the signal level of the cell is low and the noise level is high.
[0077]
In the case of FIG. 5B, since the peak of the side lobe is higher than the noise level, the slot timing detection unit 109 detects the peak timing of the side lobe as the slot timing. Therefore, the peak timing of the side lobe is excluded from the slot timing. Here, the timing of the peak of the side lobe can be uniquely determined with respect to the 256-chip time, so that it is not necessary to detect the timing of the peak of the side lobe.
[0078]
On the other hand, in the case of FIG. 5C, since the peak of the side lobe is lower than the noise level, the slot timing detecting unit 109 does not detect the timing of the peak of the side lobe as the slot timing.
[0079]
From this, the level (E) of the peak (256 chips) generated by the autocorrelation of the first search code is obtained. _C / I _O Or (RSCP) is larger than a predetermined threshold, it is possible to prevent a cell search at an erroneous slot timing by excluding the side lobe from the slot timing. When the peak level is smaller than the predetermined threshold, the peak timing is not detected as the slot timing, so that it is not necessary to exclude the side lobe from the slot timing, and the side lobe and the slot timing of the new cell are not required. Can be detected, the slot timing of the new cell can be detected.
[0080]
The ratio of the correlation value of the peak (correlation value of 256 Chip) and the correlation value at the timing of the side lobe peak (side lobe peak candidate) is compared with a predetermined threshold value, and the correlation value of the side lobe peak candidate is calculated as the peak correlation If the value divided by the value is larger than a predetermined threshold, it is not necessary to exclude the side lobe from the slot timing.If the value is smaller than the predetermined threshold, the side lobe peak candidate is regarded as a side lobe peak and excluded from the slot timing. You may.
[0081]
Further, similarly to the timing of the known cell, the correlation value on the side lobe that can be theoretically obtained based on the correlation value of the peak is subtracted from the correlation value on the side lobe of the autocorrelation, and the difference value is determined as a threshold value. , The new cell timing and the side lobe timing are considered to match, so the side lobe may be considered as a peak candidate.
[0082]
As described above, according to the present embodiment, the timing of the path arriving from the known cell is detected during the detection of the slot timing of the received signal in the first stage of the cell search, and the known timing is determined from the slot timing detected in the first stage. By excluding cell slot timing, cell search can be performed at high speed.
[0083]
The data indicating the slot timing of the known cell changes its propagation path after a predetermined time, and becomes invalid. For this reason, the control unit 104 measures the time required from the path detection processing of the known cell, and forcibly terminates the cell search when the time during which the slot timing of the known cell is valid elapses. May be controlled to start from the first stage. Thereby, an accurate path search based on the changed path timing can be performed.
[0084]
If the time required from the detection processing of the path timing of the known cell is within a predetermined time, the control unit 104 determines that the path timing of the known cell detected at the same time as the processing of the first stage has not changed. Alternatively, the path timing may not be detected again. As a result, the power required for the detection processing in the path timing detection unit 121 can be reduced. That is, the path timing is detected only for the cells in which the time required from the path timing detection processing of the known cell exceeds the predetermined time, assuming that the path timing has changed.
[0085]
【The invention's effect】
As described above, according to the present invention, during the slot timing detection of a received signal in the first stage of cell search, the timing of a path arriving from a known cell is detected, and from the slot timing detected in the first stage, It is to perform a cell search after excluding a slot timing of a signal received from a known cell from a cell search target using the path timing of the known cell. As a result, the scrambling code of the new cell can be efficiently identified, and the cell search can be performed at high speed.
[Brief description of the drawings]
FIG. 1 is a block diagram illustrating a configuration of a synchronization acquisition device according to an embodiment of the present invention.
FIG. 2 is a flowchart showing the operation of the synchronization acquisition apparatus according to one embodiment of the present invention;
FIG. 3 is a conceptual diagram showing a state where slot timing of a known cell is excluded.
FIG. 4 is a conceptual diagram showing how slot timing is excluded when the timing of the correlation value of a new cell matches the timing of the correlation value of a known cell.
FIG. 5 is a diagram showing an autocorrelation waveform of a first search code.
FIG. 6 is a table showing an arrangement of second search codes corresponding to a scrambling code group;
FIG. 7 is a schematic diagram showing an example of a frame configuration.
FIG. 8 is a flowchart showing the operation of a conventional synchronization acquisition device.
FIG. 9 is a conceptual diagram showing a configuration of a wireless communication system.
FIG. 10 is a diagram showing an example of a delay profile in a first stage of a cell search.
[Explanation of symbols]
101 antenna
102 Wireless receiver
103 SW
104 control unit
105 first stage processing unit
106 1st search code
107, 113, 118, 123 Correlation circuit
108, 119, 124 averaging circuit
109 Slot timing detector
111 second stage processing unit
112 Second search code generator
114 Assignment unit
115 Scrambling code group identification unit
116 third stage processing unit
117, 122 Scrambling code generator
120 scrambling code identification unit
121 Path timing detector
125 path timing detector

Claims (7)

In a synchronization acquisition device that performs a three-stage cell search,
Path timing detection means for detecting the timing of the path arriving from the cell in which the cell search has been performed, using a scrambling code assigned to the cell;
First-stage slot timing detection means for detecting slot timing based on a correlation value between the received signal and the first search code;
Using the path timing detected by the path timing detection means, an exclusion means for excluding a slot timing of a signal received from a cell for which a cell search has already been performed from the processing in the second and third steps;
A second / third-stage processing unit for performing a second-stage and a third-stage cell search based on the slot timing remaining by the exclusion unit out of the slot timings detected by the slot timing detection unit; When,
A synchronization acquisition device, comprising: The slot timing detecting means excludes the side lobe peak timing from the slot timing when the peak level generated on the delay profile exceeds a predetermined threshold when the correlation operation is performed in the first stage, and 2. The synchronization acquisition apparatus according to claim 1, wherein when the generated peak level is equal to or less than a predetermined threshold, the timing of the peak of the side lobe is not excluded from the slot timing. Control means for controlling the processing in each step of the three-step cell search and the path timing detecting means,
The control means measures the time required from the detection processing of the path timing in which the path search has already been performed, and after a predetermined time elapses, forcibly terminates the search processing and performs control to start the search processing again. The synchronization acquisition device according to claim 1 or 2, wherein: If the time required from the first stage processing is within a predetermined time, the control means performs control to stop the path timing detection means, and performs processing in the exclusion means using the path timing detected immediately before. 4. The synchronization acquisition device according to claim 1, wherein control is performed in such a manner. 4. The synchronization acquisition device according to claim 3, wherein the control unit periodically stops the processing of the exclusion unit. When the difference obtained by subtracting the correlation value of the slot timing in the cell for which the cell search has already been performed from the correlation value in the first stage exceeds a predetermined threshold, the slot timing of the known cell is set as a target of the cell search. The synchronization acquisition device according to any one of claims 1 to 4, wherein: In a synchronization acquisition method for performing a three-stage cell search,
With the start of the cell search, a path timing detecting step of detecting the timing of a path arriving from the cell on which the cell search has been performed;
A slot timing detecting step of detecting a slot timing of a signal received from the base station apparatus,
Using the path timing detected in the path timing detection step, an exclusion step of excluding a slot timing of a signal received from a cell that has already been subjected to a cell search from a cell search target,
A synchronization acquisition method, comprising:

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