JP2004264606A - Liquid crystal display element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To quicken response speed of an active matrix liquid crystal display element which is not equipped with a color filter by sufficiently reducing liquid crystal layer thickness of a pixel. <P>SOLUTION: On an inside surface of a front substrate 2 out of a pair of substrates 1, 2 placed opposite to each other interposing a liquid crystal layer 27, a plurality of spacers 21 formed with predetermined height are provided avoiding a plurality of pixel electrodes 3, TFTs, gate wiring lines 13 and data wiring lines mounted on a rear substrate 1. A liquid crystal layer thickness adjusting film 22 is disposed on a region surrounded by a sealing part using a frame shaped sealant on the inside surface of the front substrate 2 and a counter electrode 20 is formed thereon. The liquid crystal layer thickness d<SB>1</SB>of the pixel is specified by bringing the spacers 21 into contact with an inside surface of the rear substrate 1. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an active matrix type liquid crystal display element using a thin film transistor (hereinafter, referred to as TFT) as an active element.
[0002]
[Prior art]
An active matrix type liquid crystal display element having a TFT as an active element is joined through a frame-shaped sealing material, and a pair of liquid crystal layers opposed to each other with a liquid crystal layer provided in a region surrounded by a sealing portion of the sealing material. Of the mutually facing inner surfaces of the substrates, a plurality of pixel electrodes arranged in a matrix in the row and column directions in a region surrounded by the seal portion on the inner surface of one of the substrates, and each of the plurality of pixel electrodes is connected to the plurality of pixel electrodes. A plurality of TFTs, and a plurality of gate wirings and data wirings for supplying gate signals and data signals to these TFTs, and a plurality of pixels are formed on the inner surface of the other substrate by regions respectively facing the plurality of pixel electrodes. The configuration is such that a counter electrode to be formed is provided.
[0003]
In this active matrix type liquid crystal display device, a terminal array portion extending outside of the other substrate is formed on one substrate provided with a TFT, a gate wiring and a data wiring, and the gate wiring and the data are formed on the terminal array portion. A terminal portion of the wiring and a terminal for the counter electrode are provided, and a cross electrode connected to the terminal for the counter electrode is provided on the inner surface of the one substrate so as to correspond to the seal portion, and provided on the inner surface of the other substrate. The opposing electrode and the cross electrode are electrically connected to each other in the seal portion via a cloth material in which resin particles are covered with a metal film.
[0004]
In this type of liquid crystal display device, the surface of a plurality of data wirings provided on the inner surface of one substrate is anodized to form a spacer having a surface height higher than that of the TFT on a portion on the TFT, and these are formed. (Refer to Patent Document 1) in which the thickness of the liquid crystal layer of the pixel is defined by contacting the spacer with the inner surface of the other substrate, and a columnar spacer on the plurality of TFTs provided on the inner surface of the one substrate. There is a device in which these spacers are in contact with the inner surface of the other substrate to define the liquid crystal layer thickness of the pixel (see Patent Document 2).
[0005]
[Patent Document 1]
JP-A-7-270826
[0006]
[Patent Document 2]
JP-A-8-234212
[0007]
[Problems to be solved by the invention]
By the way, the liquid crystal layer thickness of the pixel of the liquid crystal display element is conventionally set to 4 μm to 5 μm. However, the liquid crystal display element used for the field sequential liquid crystal display device has the liquid crystal layer thickness of the pixel as small as about 1.5 μm. It is desired that the response speed be increased.
[0008]
The field sequential liquid crystal display device uses an active matrix type liquid crystal display element without a color filter.
[0009]
However, as described above, the active matrix liquid crystal display element has a counter electrode terminal and a cross electrode provided on one substrate provided with a TFT, a gate wiring and a data wiring, and a counter electrode provided on the inner surface of the other substrate. Since the electrode is electrically connected to the cross electrode via the cloth material in the seal portion formed by the frame-shaped seal material, the gap between the substrates of the seal portion is restricted by the particle size of the cloth material.
[0010]
That is, the inter-substrate gap of the pixel portion of this liquid crystal display element is the distance between the pixel electrode provided on one inner surface and the counter electrode provided on the inner surface of the other substrate. The gap between the substrates in the portion corresponding to the electrodes cannot be smaller than the particle size of the cloth material, and the minimum particle size of the cloth material that can be currently obtained to the extent that mass production is possible is several μm. The gap between the substrates is several μm or more.
[0011]
Therefore, it is difficult for the conventional active matrix type liquid crystal display device without a color filter to make the liquid crystal layer thickness of the pixel sufficiently small to increase the response speed.
[0012]
SUMMARY OF THE INVENTION It is an object of the present invention to provide a liquid crystal display device which is capable of increasing the response speed by sufficiently reducing the thickness of a liquid crystal layer of a pixel while being of an active matrix type having no color filter. is there.
[0013]
[Means for Solving the Problems]
The liquid crystal display element according to the present invention is a liquid crystal display device comprising: a pair of substrates facing each other with a liquid crystal layer provided in a region surrounded by a seal portion formed by the seal material interposed therebetween; A plurality of pixel electrodes arranged in a matrix in a row direction and a column direction in a region surrounded by the seal portion on the inner surface of one substrate; a plurality of TFTs respectively connected to the plurality of pixel electrodes; A plurality of gate wirings and data wirings for supplying gate signals and data signals to the TFT are provided, and provided on the inner surface of the other substrate in a region surrounded by the seal portion at least in correspondence with the plurality of pixel electrodes. A liquid crystal layer thickness adjusting film, and a counter electrode formed on the liquid crystal layer thickness adjusting film and forming a plurality of pixels by regions facing the plurality of pixel electrodes, respectively. A plurality of spacers formed at a predetermined height are arranged on one inner surface of the substrate so as to avoid the plurality of TFTs, the gate wiring and the data wiring, and these spacers serve as the liquid crystal layer thickness adjusting film. The liquid crystal layer thickness of the pixel is formed to a predetermined value by being in contact with the other inner surfaces of the pair of substrates via the pair.
[0014]
In this liquid crystal display element, a plurality of pixel electrodes, TFTs, gate wirings, and data wirings are provided in a region surrounded by a seal portion on one inner surface of a pair of substrates, and the inner surface of the other substrate is surrounded by the seal portion. A liquid crystal layer thickness adjustment film provided corresponding to at least the plurality of pixel electrodes, and a counter electrode formed on the liquid crystal layer thickness adjustment film in an area provided, and any one of the pair of substrates is provided. On the inner surface, a plurality of spacers formed at a predetermined height are arranged avoiding a plurality of TFTs, gate wirings and data wirings, and these spacers are disposed on the other of the pair of substrates via the liquid crystal layer thickness adjusting film. Since the liquid crystal layer thickness of the pixel is formed to a predetermined value by contacting the inner surface of the pixel, a portion of the counter electrode corresponding to a plurality of pixels and a spacer corresponds to the seal portion of the counter electrode. Part to do The gap between the substrates in the pixel portion, which is defined by bringing the plurality of spacers into contact with the inner surface of the opposing substrate, that is, the thickness of the liquid crystal layer of the pixel, is set to be opposite to the cross electrode provided on the one substrate. The gap between the substrates of the seal portion, which is restricted by the particle size of the cloth material connecting the electrodes, can be made smaller.
[0015]
Therefore, according to this liquid crystal display element, the response speed can be increased by sufficiently reducing the thickness of the liquid crystal layer of the pixel even though the liquid crystal display element is of an active matrix type having no color filter.
[0016]
As described above, the liquid crystal display element of the present invention includes a pair of substrates joined to each other via a liquid crystal layer provided in a region surrounded by a seal portion formed of the seal material and opposed to each other. A plurality of pixel electrodes, TFTs, gate wirings, and data wirings are provided in a region surrounded by the seal portion on the inner surface of one substrate among the opposed inner surfaces, and a region surrounded by the seal portion is provided on an inner surface of the other substrate. A plurality of pixels are formed by a liquid crystal layer thickness adjusting film provided at least in a region corresponding to the plurality of pixel electrodes, and a region formed on the liquid crystal layer thickness adjusting film and opposed to the plurality of pixel electrodes. And a plurality of spacers formed at a predetermined height are arranged on the inner surface of one of the pair of substrates, avoiding the plurality of thin film transistors, gate wiring and data wiring. These spacers are brought into contact with the other inner surfaces of the pair of substrates via the liquid crystal layer thickness adjusting film to form the liquid crystal layer thickness of the pixel to a predetermined value, thereby providing an active matrix without a color filter. Although it is of the type, the liquid crystal layer thickness of the pixel is made sufficiently small so that the response speed can be increased.
[0017]
In the liquid crystal display device according to the aspect of the invention, it is preferable that the plurality of spacers are provided so as to correspond to a part of the plurality of pixel electrodes.
[0018]
Further, in this liquid crystal display element, a light-shielding film corresponding to a region other than the plurality of pixels and a portion provided with a spacer in the pixel is provided on the inner surface of the other substrate, and the light-shielding film is covered by the light-shielding film. It is preferable to form a liquid crystal layer thickness adjusting film.
[0019]
BEST MODE FOR CARRYING OUT THE INVENTION
1 to 5 show an embodiment of the present invention. FIG. 1 is a plan view of a part of a liquid crystal display element, FIG. 2 is an enlarged sectional view of a TFT portion of the liquid crystal display element, and FIG. FIG. 4 is an enlarged cross-sectional view of a portion where a gate line of a seal portion of the liquid crystal display element intersects, and FIG. 5 is an enlarged cross-sectional view of a portion of the seal portion of the liquid crystal display device corresponding to a cross electrode. It is sectional drawing.
[0020]
This liquid crystal display element is used for a field sequential liquid crystal display device and does not have a color filter.
[0021]
This liquid crystal display element is an active matrix type liquid crystal display element having a TFT as an active element. Basically, the liquid crystal display element is joined via a frame-shaped sealing material 25 and is surrounded by a sealing portion of the sealing material 25. Of the pair of transparent glass substrates 1 and 2 facing each other with the liquid crystal layer 27 provided therebetween, one substrate, for example, a rear substrate (hereinafter, referred to as an opposite side to the display observation side). A plurality of transparent pixel electrodes 3 arranged in a matrix in the row direction and the column direction in a region surrounded by the seal portion on the inner surface of the back substrate A plurality of TFTs 4 and a plurality of gate wirings 13 and data wirings 14 for supplying gate signals and data signals to these TFTs 4 are provided, and the other substrate, that is, a front side which is a display observation side is provided. On the inner surface of a plate (hereinafter, referred to as a front substrate) 2, a single film-shaped transparent counter electrode 20 for forming a plurality of pixels by regions respectively facing the plurality of pixel electrodes 3 is provided. I have.
[0022]
As shown in FIGS. 1 and 2, the plurality of TFTs 4 provided on the inner surface of the rear substrate 1 include a gate electrode 5 formed on the substrate surface of the rear substrate 1 and a substrate surface covering the gate electrode 5. , A transparent gate insulating film 6 formed substantially over the entire area, an i-type semiconductor film 7 formed on the gate insulating film 6 so as to face the gate electrode 5, and a channel region of the i-type semiconductor film 7. A blocking insulating film 8 formed thereon; a source electrode 10 and a drain electrode 11 formed on both sides of the i-type semiconductor film 7 via an n-type semiconductor film 9; An overcoat insulating film 12 covering the source and drain electrodes 10 and 11 is provided.
[0023]
Although the source electrode 10 and the drain electrode 11 of the TFT 4 are shown as a single layer film in FIG. 2, the source electrode 10 and the drain electrode 11 are formed of a chromium film which is a contact layer with the n-type semiconductor film 9. And an aluminum-based alloy film formed thereon. The gate insulating film 6, the blocking insulating film 8, and the overcoat insulating film 12 are made of SiN (silicon nitride).
[0024]
Further, the plurality of pixel electrodes 3 are formed of a transparent conductive film such as ITO, are formed on the gate insulating film 6, and have a source electrode of the TFT 4 corresponding to the pixel electrode 3 at an edge on one end side. 10 is connected.
[0025]
Further, the plurality of gate lines 13 are formed on the substrate surface of the rear substrate 1 along one side of each pixel electrode row, and the gate electrode 5 of the TFT 4 is integrated with the gate line 13. Is formed.
[0026]
In this embodiment, as shown in FIG. 1, a portion of the gate line 13 corresponding to each pixel electrode 3 is used as the gate electrode 5 of the TFT 4, and the i-type semiconductor film 7, the n-type semiconductor film 9 and The TFT 4 having a large channel width is formed by forming the source and drain electrodes 10 and 11 horizontally long along the length direction of the gate wiring 13.
[0027]
The gate electrode 5 and the gate wiring 13 are formed with a very thin film of a low-resistance aluminum-based alloy film in order to reduce the level difference from the substrate surface. Except for 13a (see FIG. 4), anodizing has been performed.
[0028]
On the other hand, the plurality of data wirings 14 are formed on the gate insulating film 6 along one side of each pixel electrode column, and are connected to the drain electrodes 11 of the TFTs 4 in each column.
[0029]
The data wiring 14 is formed integrally with the drain electrode 11 by the same metal film (laminated film of a chromium film and an aluminum-based alloy film formed thereon) as the source and drain electrodes 10 and 11 of the TFT 4. ing.
[0030]
The source and drain electrodes 10 and 11 of the TFT 4 and the data wiring 14 are formed to have a thickness sufficiently larger than that of the gate wiring 13 in order to minimize the electric resistance.
[0031]
Further, as shown in FIG. 1, the i-type semiconductor film 7 and the n-type semiconductor film 9 of the TFT 4 are formed from the TFT portion to the connection portion between the data line 14 and the drain electrode 11.
[0032]
Further, on the inner surface of the rear substrate 1, a plurality of compensating capacitance electrodes 15 opposing the edges of the pixel electrodes 3 in each row via the gate insulating film 6 and forming a compensating capacitance with the pixel electrodes 3. Is provided.
[0033]
The compensating capacitance electrode 15 is formed in parallel with the gate wiring 13 and has a wiring portion facing the edge of the pixel electrode 3 in each row opposite to the TFT connection side, and extends from this wiring portion to one side thereof. The compensation capacitance is formed along the side edge and both side edge of each pixel electrode 3 opposite to the TFT connection side. Have been.
[0034]
One end (one end of a wiring portion) of each of the plurality of compensation capacitance electrodes 15 is located in a region between a display area in which the plurality of pixels are arranged in a matrix and a sealing portion formed of a frame-shaped sealing material 25. The extension end is commonly connected to one capacitance connection line (not shown) provided on the gate insulating film 6 in parallel with the data line 14.
[0035]
The compensation capacitance electrode 15 is formed on the substrate surface of the rear substrate 1 by the same metal film (aluminum-based alloy film) as the gate electrode 5 and the gate wiring 13 of the TFT 4, and the surface of the compensation capacitance electrode 15 is also formed. Except for the extension end connected to the capacitance connection wiring, anodization is performed.
[0036]
Further, the capacitance connection wiring is formed of the same metal film as the data wiring 14, and is connected to extended ends of the plurality of compensation capacitance electrodes 15 at contact holes formed in the gate insulating film 6.
[0037]
Further, the overcoat insulating film 12 of the TFT 4 is formed over substantially the entire area of the rear substrate 1 except for portions corresponding to the plurality of pixel electrodes 3 respectively. The TFT connection part 3 and the compensation capacitance formation part 3 are covered with the overcoat insulating film 12.
[0038]
Further, a terminal array portion is formed at one end in the row direction and one side in the column direction of the rear substrate 1 so as to extend outward from the front substrate 2. One end of each of the plurality of gate wirings 13 is shown in FIG. As shown, the terminal portion 13a is led out to the terminal array portion 1a in the row direction, and a terminal portion 13a connected to a gate-side drive circuit (not shown) is formed at the leading end.
[0039]
On the other hand, one end of the plurality of data wirings 14 and one end of the capacitor connection wiring are led out to a terminal arrangement portion in a column direction (not shown), and a leading end of the plurality of data wirings 14 is connected to a data side driving circuit (not shown). A terminal portion to be connected to a reference potential of the data side driving circuit is formed at a leading end of the capacitance connection wiring.
[0040]
Further, in this embodiment, in order to make the inner surface level of the seal portion of the rear substrate 1 uniform over the entire circumference of the seal portion, a portion intersecting the seal portions of the plurality of gate wirings 13, the data wirings 14 and the capacitance connection wirings is formed. A plurality of pseudo-wiring portions having the same lamination structure are also formed on the inner surface of the edge portion of the substrate 1 where the terminal arrangement portion is not formed, corresponding to the seal portion, with the gate wiring 13 and the data wiring 14. Are provided at a pitch substantially equal to the pitch of.
[0041]
As shown in FIG. 4, a pseudo wiring 14a made of the same metal film as the data wiring 14 is formed on a portion of the gate insulating film 6 above the gate wiring 13 at a portion intersecting the seal portion of the plurality of gate wirings 13. Although not shown, portions of the plurality of data wirings 14 and the capacitance connection wirings that intersect with the seal portion are not shown, but are provided with the gate wirings 13 on the substrate surface under the data wirings 14 and the capacitance connection wirings. The structure is such that a pseudo wiring made of the same metal film is formed.
[0042]
A pseudo wiring portion provided on the inner surface of the edge portion of the rear substrate 1 having no terminal arrangement portion so as to correspond to the seal portion is not shown, but a lower pseudo layer made of the same metal film as the gate wiring 13 is provided on the substrate surface. A wiring is formed, and an upper pseudo wiring made of the same metal film as the data wiring 14 is formed on a portion of the gate insulating film 6 on the lower pseudo wiring.
[0043]
That is, the portions of the plurality of gate wirings 13 and the data wirings 14 and the capacitance connection wirings that intersect with the seal portion and the pseudo wiring portions provided on the inner surface of the edge without the terminal arrangement portion are all gate wirings 13. Alternatively, the structure is such that a pseudo wiring having the same thickness, the gate insulating film 6, the data wiring 14 or a pseudo wiring having the same thickness as the pseudo wiring, and the overcoat insulating film 12 are stacked.
[0044]
It should be noted that the pseudo wiring 14a at the portion intersecting the seal portion of the gate wiring 13 is extended to the portion led to the terminal array portion 1a of the gate wiring 13 as shown in FIG. By providing an opening for exposing the lead-out part of the gate wiring 13, it is directly stacked on the lead-out part of the gate wiring 13.
[0045]
In addition, the pseudo wiring at a portion intersecting the seal portion of the data wiring 14 and the capacitance connection wiring is extended to a portion led to the terminal array portion of the data wiring 14 and the capacitance connection wiring. By providing an opening that exposes an extension of the pseudo wiring, the dummy wiring is directly stacked under the lead-out part of the data wiring 14 and the capacitance connection wiring.
[0046]
Then, the terminal portion 13a of the gate wiring 13 on which the pseudo wiring 14a is laminated, and the terminal portion of the data wiring 14 and the pseudo wiring of the capacitor connection wiring which are laminated, respectively, have openings in the overcoat insulating film 12. It is exposed by providing.
[0047]
Further, on the inner surface of the rear substrate 1, as shown in FIG. 5, a counter electrode terminal 16 is provided on one or both of the row-direction terminal arrangement portion 1 a and the column-direction terminal arrangement portion, A cross electrode 17 connected to the counter electrode terminal 16 via a lead wiring 18 is provided corresponding to one or a plurality of corner portions of the seal portion.
[0048]
The counter electrode terminal 16, the cross electrode 17, and the lead wiring 18 are formed of a laminated film of a lower metal film 13 b same as the gate wiring 13 and an upper metal film 14 b same as the data wiring 14.
[0049]
The lower metal film 13b and the upper metal film 14b are directly laminated by removing the gate insulating film 6 on the lower metal film 13b, and the counter electrode terminal 16 and the cross electrode 17 are overcoated. It is exposed by providing an opening in the insulating film 12.
[0050]
In addition, an alignment film 19 is provided on the inner surface of the rear substrate 1 so as to cover the plurality of pixel electrodes 3 and the overcoat insulating film 12 over substantially the entire region inside the seal portion.
[0051]
On the other hand, the counter electrode 20 provided on the inner surface of the front substrate 2 is made of a transparent conductive film such as ITO, and has an outer peripheral edge slightly inside the outer periphery of the seal portion. In addition, a cross electrode connecting portion facing the cross electrode 17 provided on the rear substrate 1 is formed at one or a plurality of corners thereof.
[0052]
A display area (a region where a plurality of pixels are arranged in a matrix) on the inner surface of the front substrate 2 is provided on the counter electrode 20 as shown in FIGS. A plurality of columnar spacers 21 formed at a predetermined height are provided so as to avoid the plurality of TFTs 4, the gate wiring 13, the data wiring 14, and the compensation capacitance electrode 15.
[0053]
These spacers 21 are formed by applying a photosensitive resin on the counter electrode 20 and patterning the resin film into a plurality of pillars. The spacers 21 are formed of a plurality of pixel electrodes 3 provided on the rear substrate 1. Some of them are provided corresponding to, for example, one corner.
[0054]
On the inner surface of the front substrate 2, a transparent liquid crystal layer thickness adjusting film 22 is provided over substantially the entire area surrounded by the seal portion, and the counter electrode is provided on the liquid crystal layer thickness adjusting film 22. 20 are formed.
[0055]
The liquid crystal layer thickness adjusting film 22 is formed by applying a highly transparent photosensitive resin such as an acrylic resin and patterning the resin film into a shape corresponding to substantially the entire region surrounded by the seal portion. Is formed.
[0056]
Further, on the inner surface of the front substrate 2, a light-shielding film 23 corresponding to a region other than a plurality of pixels and a portion where the spacer 21 is provided in the pixel is provided. A layer thickness adjusting film 22 is formed.
[0057]
2 to 4, the light-shielding film 23 is shown as a single-layer film, but the light-shielding film 23 is formed on the chromium oxide film formed on the substrate surface of the front substrate 2 and on the chromium oxide film formed thereon. It consists of a chrome film.
[0058]
The light-shielding film 23 is formed so that its outer peripheral edge substantially matches the outer peripheral edge of the counter electrode 20, and a portion of the outer peripheral portion corresponding to the cross electrode connection portion of the counter electrode 20 is shown in FIG. It has been removed as shown. That is, the cross electrode connection portion of the counter electrode 20 is in direct contact with the substrate surface of the front substrate 2.
[0059]
An alignment film 24 is provided on the inner surface of the front substrate 2 so as to cover the counter electrode 20 and the plurality of spacers 21 over substantially the entire area inside the seal portion.
[0060]
Then, the rear substrate 1 and the front substrate 2 are printed with a frame-like sealing material 25 made of a thermosetting resin on one of the inner surfaces thereof, and the two substrates 1 and 2 are overlapped. A plurality of spacers 21 provided on the inner surface are brought into contact with the inner surface of the rear substrate 1 to form a gap between the substrates of the plurality of pixel portions, that is, the liquid crystal layer thickness d of the pixel ₁ Are adjusted and then the sealing material 25 is cured to be joined, and the cross electrode connecting portion of the cross electrode 17 provided on the inner surface of the rear substrate 1 and the counter electrode 20 provided on the inner surface of the front substrate 2 As shown in FIG. 5, is electrically connected to a portion of the seal material 25 corresponding to the cross electrode 17 via a cross material 26 previously mixed.
[0061]
In FIG. 5, the cloth member 26 is shown as an integral member. However, the cloth member 26 is a granular material in which spherical resin particles are covered with a conductive metal film. The cross electrode 17 and the counter electrode 20 are connected with good conductivity by being slightly compressed and sandwiched between the cross electrode connecting portion 20 and the cross electrode connecting portion 20.
[0062]
The liquid crystal layer 27 is formed by partially removing the sealing material 25 in a region surrounded by a sealing portion between the two substrates 1 and 2 joined via the sealing material 25. It is formed by filling a liquid crystal by a vacuum injection method from an injection port, and the liquid crystal injection port is sealed after filling the liquid crystal.
[0063]
This liquid crystal display element is, for example, a TN (twisted nematic) type, and the liquid crystal molecules of the liquid crystal layer 27 define the alignment direction near the rear substrate 1 and the front substrate 2 by the alignment films 19 and 24. In addition, the two substrates 1 and 2 are twist-oriented at a twist angle of substantially 90 degrees.
[0064]
This liquid crystal display element includes a plurality of pixel electrodes 3, TFTs 4, gate wirings 13 and data wirings in a region of a pair of substrates 1 and 2 surrounded by a sealing portion formed by a frame-shaped sealing material 25 on the inner surface of the rear substrate 2. 14, a liquid crystal layer thickness adjustment film 22 provided in an area surrounded by the seal portion on the inner surface of the front substrate 2, and a counter electrode 20 formed on the liquid crystal layer thickness adjustment film 22. A plurality of spacers 21 formed at a predetermined height are arranged on the inner surface of the rear substrate 1 so as to avoid the plurality of TFTs 4, the gate lines 13 and the data lines 14, and these spacers 21 are disposed on the liquid crystal layer thickness adjusting film. A liquid crystal layer thickness d of the pixel by contacting the inner surface of the front substrate 2 ₁ Is formed to a predetermined value, the portion of the counter electrode 20 corresponding to the plurality of pixels and the spacer 21 is higher than the portion of the counter electrode 20 corresponding to the seal portion (closer to the rear substrate 1). The liquid crystal layer thickness of the pixel (gap between the substrates in the pixel portion) defined by bringing the plurality of spacers 21 into contact with the inner surface of the rear substrate 1 opposed thereto d ₁ Can be made smaller than the inter-substrate gap of the seal portion which is restricted by the particle size of the cross material 26 connecting the cross electrode 17 and the counter electrode 20.
[0065]
In this embodiment, a light-shielding film 23 corresponding to a region other than a plurality of pixels and a portion where a spacer 21 is provided in the pixel is provided on the inner surface of the front substrate 2, and the light-shielding film 23 and the liquid crystal layer thickness adjusting film 22 are provided. Since the spacer 21 is provided on the laminated film of the gate electrode 6 and the counter electrode 20, the spacer 21 is used as a spacer contact portion formed of a laminated film of the gate insulating film 6 and the pixel electrode 3 provided on the inner surface of the rear substrate 1. D between the substrate surfaces of the substrates 1 and 2 when they are brought into contact with each other via the alignment films 19 and 24 ₀ Is the sum of the thicknesses of the gate insulating film 6, the pixel electrode 3, the light shielding film 23, the liquid crystal layer thickness adjusting film 22, the counter electrode 20, the alignment films 19 and 24, and the height of the spacer 21.
[0066]
Since the light-shielding film 23 is not provided in the pixel portion, the liquid crystal layer thickness d of the pixel is set. ₁ That is, the gap between the substrates in the pixel portion is the distance d between the substrate surfaces of the two substrates 1 and 2. ₀ From the sum of the thicknesses of the gate insulating film 6, the pixel electrode 3, the liquid crystal layer thickness adjusting film 22, the counter electrode 20, and the alignment films 19 and 24.
[0067]
On the other hand, the inter-substrate gap of the seal portion is different between the intersection of the gate wiring 13 and the data wiring 14 and the capacitance connection wiring, the portion corresponding to the cross electrode 17, and the portion without the wiring and the cross electrode 17.
[0068]
That is, the inter-substrate gap d at the intersection of the gate wiring 13 and the data wiring 14 of the seal portion with the capacitance connection wiring. ₂ (See FIG. 4) is a distance d between the substrate surfaces of the two substrates 1 and 2. ₀ Thus, the gate wiring 13 or a pseudo wiring made of the same metal film as the above, the gate insulating film 6, the data wiring 14 or a pseudo wiring 14a made of the same metal film as the above, the overcoat insulating film 12, the light shielding film 23 and the counter electrode 20 is the value obtained by subtracting the total value of the film thicknesses.
[0069]
Further, the gap d between the substrates in a portion corresponding to the cross electrode 17 of the seal portion is provided. ₃ (See FIG. 5) is a distance d between the substrate surfaces of the two substrates 1 and 2. ₀ This is a value obtained by subtracting the total value of the film thicknesses of the two-layer metal films (the same metal film as the gate wiring 13 and the data wiring 14) 13b and 14b forming the cross electrode 17 and the counter electrode 20.
[0070]
Further, the gap between the substrates at the portion where the wiring of the seal portion and the cross electrode 17 are not provided is a distance d between the substrate surfaces of the substrates 1 and 2. ₀ From the total thickness of the gate insulating film 6, the overcoat insulating film 12, the light-shielding film 23, and the counter electrode 20.
[0071]
The thickness of the gate insulating film 6 is 0.25 μm, the thickness of the pixel electrode 3 is 0.05 μm, the thickness of the gate wiring 13 is 0.23 μm, the thickness of the data wiring 14 is 0.425 μm, The thickness of the insulating film 12 is 0.2 μm. The thickness of the opposing electrode 20 is 0.14 μm, the thickness of the light shielding film 23 is 0.17 μm, and the thickness of the alignment films 19 and 24 is 0.05 μm.
[0072]
In this embodiment, the liquid crystal layer thickness adjusting film 22 is formed to have a thickness of 3 μm, and the spacer 21 is formed to have a height of 1,33 μm. ₁ Is set to 1.5 μm.
[0073]
As described above, the liquid crystal layer thickness adjusting film 22 and the spacer 21 are formed by applying a photosensitive resin and patterning the resin film. Since the coating thickness of the photosensitive resin at the time of forming the spacer and the coating thickness of the photosensitive resin at the time of forming the spacer 21 having a height of 1.33 μm are both within a range that can be easily controlled, The liquid crystal layer thickness adjusting film 22 can be formed to have a uniform thickness over the entire area corresponding to the plurality of pixel electrodes 3 and the plurality of spacers 21 can be formed to have a uniform height.
[0074]
As in this embodiment, the thickness of the liquid crystal layer thickness adjusting film 22 is 3 μm, the height of the spacer 21 is 133 μm, and the liquid crystal layer thickness d of the pixel is d. ₁ Is 1.5 μm, the distance d between the substrate surfaces of the substrates 1 and 2 ₀ Is 5.04 μm. Therefore, the inter-substrate gap d in a portion corresponding to the cross electrode 17 of the seal portion is provided. ₃ Is 4.245 μm.
[0075]
For this reason, the cross material 26 connecting the cross electrode 17 and the counter electrode 20 has a gap d between the substrates corresponding to the cross electrode 17 in the seal portion. ₃ (4.245 μm) with a compressive deformation of about 0.05 to 0.25 μm caused by being sandwiched between the cross electrode 17 and the counter electrode 20, and a particle size of about 4.3 to 4.5 μm. The cloth material having such a particle size can be easily manufactured by the current technology.
[0076]
Therefore, according to this liquid crystal display element, the cross electrode 17 and the counter electrode 20 are connected by using the cross material 26 which can be easily manufactured, while being of an active matrix type having no color filter. Liquid crystal layer thickness d ₁ Can be sufficiently reduced to, for example, 1.5 μm to increase the response speed.
[0077]
The liquid crystal layer thickness d of the pixel of this liquid crystal display element ₁ Is 1.5 μm, that is, the distance d between the substrate surfaces of the two substrates 1 and 2 ₀ Is 5.04 μm, the inter-substrate gap in the other portion of the seal portion is d at the portion where the capacitance wiring is intersected with the gate wiring 13 and the data wiring 14. ₂ = 3.625 μm, and 4.28 μm in a portion without the wiring and the cross electrode 17 (a portion in which the laminated film including only the gate insulating film 6 and the overcoat insulating film 12 and the counter electrode 20 face each other).
[0078]
As described above, in this liquid crystal display element, since the liquid crystal layer thickness adjusting film 22 having a large film thickness of 3 μm is provided in the region surrounded by the seal portion on the inner surface of the front substrate 2, the liquid crystal layer thickness d of the pixel is provided. ₁ The gap between the substrates of the seal portion is much larger than that of the seal portion. Therefore, the portion corresponding to the cross electrode 17 of the seal portion, the portion where the gate wiring 13 and the data wiring 14 intersect with the capacitor connection wiring, the wiring and the cross The gap ratio between the substrate and the portion without the electrode 17 is as small as 4.245: 3.625: 4.28.
[0079]
That is, when the liquid crystal layer thickness adjusting film 22 is not provided and the difference between the liquid crystal layer thickness of the pixel and the gap between the substrates of the seal portion is small, the smaller the liquid crystal layer thickness of the pixel, that is, the gap between the substrates of the seal portion becomes smaller. As the distance becomes smaller, the distance d between the substrate surfaces in the seal portion becomes smaller. ₀ The ratio of the film thickness of the wiring and the insulating film to the substrate becomes large, and the gap ratio between the substrates in each portion of the seal portion increases. However, if the gap between the substrates in the seal portion is large, the distance between the substrate surfaces in the seal portion is large. d ₀ , The ratio of the film thickness of the wiring and the insulating film to the thickness becomes smaller, and the gap ratio between the substrates in each portion of the seal portion becomes smaller.
[0080]
When the rear substrate 1 and the front substrate 2 are joined via the frame-shaped sealing material 25, the amount of crushing of the sealing material 25 increases as the gap between the substrates of the sealing portion becomes smaller. Since the element has a small gap ratio between the substrates in each portion of the seal portion, the difference in the amount of collapse of the seal material 25 in these portions is small. Therefore, the collapse and spread of the seal material 25 are substantially reduced over the entire circumference of the seal portion. Uniform and a good seal shape can be obtained.
[0081]
Further, in the above embodiment, since the plurality of spacers 21 are provided so as to respectively correspond to a part of the plurality of pixel electrodes 3 provided on the inner surface of the rear substrate 1, a part of the plurality of pixel electrodes 3 is provided. Utilizing the spacer 21, the liquid crystal layer thickness d of the pixel is ₁ Can be defined.
[0082]
Further, in the above embodiment, a light-shielding film 23 is provided on the inner surface of the front substrate 2 corresponding to a region other than a plurality of pixels and a portion where the spacers 21 in the pixels are provided. Since the layer thickness adjusting film 22 is formed, it is possible to prevent light leakage not only from a region other than the pixel but also from a portion of the pixel where the spacer 21 is provided, thereby obtaining good display quality.
[0083]
In the above embodiment, the spacer 21 is provided on the inner surface of the front substrate 2. However, the spacer 21 may be provided on the inner surface of the rear substrate 1. In that case, the spacer 21 is provided on the inner surface of the rear substrate 1. A plurality of spacers 21 are provided on the laminated film of the gate insulating film 6 and the pixel electrode 3, and the laminated film of the light shielding film 23, the liquid crystal layer thickness adjusting film 22, and the counter electrode 20 provided on the inner surface of the front substrate 2 is formed. By bringing the spacer 21 into contact with the spacer contact portion as the spacer contact portion, the same effect as in the above embodiment can be obtained.
[0084]
That is, the liquid crystal display element of the present invention has a laminated film of the gate insulating film 6 and the pixel electrode 3 provided on the inner surface of the rear substrate 1, the light shielding film 23 provided on the inner surface of the front substrate 2, and a liquid crystal layer thickness adjustment. A plurality of spacers 21 are provided on one of the stacked films of the film 22 and the counter electrode 20, and are brought into contact with the other stacked film to form a liquid crystal layer thickness d of the pixel. ₁ It is preferable that the liquid crystal layer thickness d of the pixel be adjusted in this manner. ₁ Can be made smaller than the inter-substrate gap of the seal portion which is restricted by the particle size of the cross material 26 connecting the cross electrode 17 and the counter electrode 20.
[0085]
In the above embodiment, the liquid crystal layer thickness adjusting film 22 is provided over substantially the entire region surrounded by the seal portion. However, the liquid crystal layer thickness adjusting film 22 corresponds to a plurality of pixels and spacers 21. You may provide only in a part. That is, the liquid crystal layer thickness adjustment film 22 may be provided in correspondence with at least a plurality of pixels and the spacer 21 in the region surrounded by the seal portion.
[0086]
Further, in the above embodiment, the liquid crystal layer thickness adjusting film 22 is formed with a thickness of 3 μm, and the spacer 21 is formed with a height of 1,33 μm, so that the liquid crystal layer thickness d of the pixel is increased. ₁ Is 1.5 μm, but the liquid crystal layer thickness d of the pixel is d. ₁ Can be arbitrarily set by changing one or both of the thickness of the liquid crystal layer thickness adjusting film 22 and the height of the spacer 21.
[0087]
Further, the liquid crystal display element of the present invention has a liquid crystal layer thickness d ₁ Is suitable for a field-sequential liquid crystal display device, and can also be used for a liquid crystal display device displaying a monochrome image.
[0088]
Still further, the present invention is not limited to a TN type liquid crystal display element, but also a STN (super twisted nematic) type liquid crystal display element and a homogeneous alignment type liquid crystal display element in which liquid crystal molecules are aligned homogeneously with their molecular long axes aligned in one direction. The present invention can also be applied to a ferroelectric or antiferroelectric liquid crystal display device or the like, and can also be applied to an active matrix liquid crystal display device having no compensation capacitance electrode 15.
[0089]
【The invention's effect】
The liquid crystal display element of the present invention is formed by joining a pair of substrates facing each other with a liquid crystal layer provided in a region surrounded by a sealing portion formed by the sealing material and bonded to each other via a frame-shaped sealing material. A plurality of pixel electrodes, TFTs, gate wirings, and data wirings are provided in a region surrounded by the seal portion on the inner surface of one substrate, and at least a region surrounded by the seal portion is provided on the inner surface of the other substrate. A liquid crystal layer thickness adjustment film provided corresponding to the plurality of pixel electrodes; and a counter electrode formed on the liquid crystal layer thickness adjustment film and forming a plurality of pixels by regions respectively facing the plurality of pixel electrodes. A plurality of spacers formed at a predetermined height on one of the inner surfaces of the pair of substrates so as to avoid the plurality of thin film transistors, the gate wiring and the data wiring, and The liquid crystal layer thickness of the pixel is set to a predetermined value by contacting the substrate with the other inner surface of the pair of substrates via the liquid crystal layer thickness adjusting film, so that the active layer having no color filter is provided. Despite being a matrix type, the response speed can be increased by making the liquid crystal layer thickness of the pixel sufficiently small.
[0090]
In the liquid crystal display device according to the present invention, it is preferable that the plurality of spacers are provided so as to correspond to a part of a plurality of pixel electrodes provided on the inner surface of the one substrate, respectively. By using a part of the pixel electrode, the liquid crystal layer thickness of the pixel can be defined by the spacer.
[0091]
Further, in the liquid crystal display element, a light-shielding film corresponding to a region other than a plurality of pixels and a portion provided with a spacer in the pixel is provided on an inner surface of the other substrate, and the liquid crystal layer covers the light-shielding film. It is preferable to adopt a configuration in which a thickness adjusting film is formed. By doing so, it is possible to prevent light leakage not only from a region other than the pixel but also from a portion of the pixel where a spacer is provided, thereby achieving good display. Quality can be obtained.
[Brief description of the drawings]
FIG. 1 is a plan view of a part of a liquid crystal display device according to an embodiment of the present invention.
FIG. 2 is an enlarged sectional view of a TFT portion of the liquid crystal display element.
FIG. 3 is an enlarged sectional view of a spacer portion of the liquid crystal display element.
FIG. 4 is an enlarged cross-sectional view of a portion where a gate wiring of a seal portion of the liquid crystal display element intersects.
FIG. 5 is an enlarged sectional view of a portion corresponding to a cross electrode of a seal portion of the liquid crystal display element.
[Explanation of symbols]
1, 2, substrate, 3 pixel electrode, 4 TFT, 6 gate insulating film, 12 overcoat insulating film, 13 gate wiring, 14 data wiring, 15 compensation capacitance electrode, 17 cross electrode, 19 ... Alignment film, 20 counter electrode, 21 spacer, 22 liquid crystal layer thickness adjustment film, 23 light shielding film, 24 alignment film, 25 seal material, 26 cross material, 27 liquid crystal layer.

Claims (3)

Of a pair of substrates facing each other with a liquid crystal layer provided therebetween in a region surrounded by a sealing portion formed by the sealing material, the pair of substrates facing each other are bonded through a frame-shaped sealing material. A plurality of pixel electrodes arranged in a matrix in a row direction and a column direction in a region surrounded by the seal portion, a plurality of thin film transistors connected to the plurality of pixel electrodes, and a gate signal and a data signal applied to these thin film transistors. A plurality of gate wirings and data wirings are provided, and a liquid crystal layer thickness adjustment film provided on an inner surface of the other substrate in a region surrounded by the seal portion at least in correspondence with the plurality of pixel electrodes, An opposing electrode formed on the liquid crystal layer thickness adjusting film and forming a plurality of pixels by regions opposing the plurality of pixel electrodes, respectively; On either one of the inner surfaces, a plurality of spacers formed at a predetermined height are arranged so as to avoid the plurality of thin film transistors, the gate wiring and the data wiring, and these spacers are disposed via the liquid crystal layer thickness adjusting film. A liquid crystal display device wherein the liquid crystal layer thickness of the pixel is formed to a predetermined value by being in contact with the other inner surfaces of the pair of substrates. The liquid crystal display device according to claim 1, wherein the plurality of spacers are provided so as to correspond to a part of the plurality of pixel electrodes, respectively. On the inner surface of the other substrate, a light-shielding film corresponding to a region other than the plurality of pixels and a portion where the spacer in the pixel is provided is provided, and a liquid crystal layer thickness adjustment film is formed to cover the light-shielding film. The liquid crystal display device according to claim 2, wherein:

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