JP2004248266A - Phase shift circuit, analog quadrature modulation circuit, analog quadrature demodulation circuit, and adaptive array device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a frequency division type phase shift circuit and an analog quadrature modulation/demodulation circuit for generating quadrature signals of the same phase. <P>SOLUTION: In an analog quadrature demodulation circuit (A), FF 315 and 316 included in a frequency division type phase shift circuit 312 divide a frequency of a LOCAL signal into four frequencies to generate quadrature carrier signals. Analog mixers 313 and 314 use the quadrature carrier signals to quadrature demodulate a received signal R into an I received signal and a Q received signal. The FF 315 and 316 are simultaneously reset by a CLEAR signal. The frequency division type phase shift circuit 312 is realized with a one-chip IC of which a clear pin is led outside or the analog quadrature demodulation circuit is realized with such a one-chip IC as a whole. An analog quadrature modulation circuit (B) is also similar. Clear signals are simultaneously imparted from the outside to a plurality of such circuits to match phases of quadrature carrier signals. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

  The present invention relates to a phase shift circuit that generates signals whose phases are orthogonal to each other using a phase shift circuit (hereinafter, simply referred to as a quadrature signal). The present invention relates to a technique for generating uniform quadrature signals.

  2. Description of the Related Art Conventionally, there is a frequency dividing type phase shift circuit that generates a quadrature signal using a frequency dividing circuit using a flip-flop circuit (abbreviated as FF).

  A quadrature modulation circuit including such a frequency division type phase shift circuit is disclosed in, for example, Patent Document 1.

FIG. 5 is a block diagram showing a frequency division type phase shift circuit that generates an orthogonal signal by the same operation as the frequency division type phase shift circuit disclosed in Patent Document 1.
The frequency dividing type phase shift circuit 900 shown in FIG. 5 is configured using FF1 and FF2.
The frequency dividing type phase shift circuit 900 outputs a quadrature signal φ1 and a signal φ2 by dividing the CLOCK signal by four.

  Such a quadrature signal is used as a quadrature carrier signal in performing quadrature modulation and demodulation, as described in Patent Document 1 described above.

Conventionally, a quadrature modulation IC and a quadrature demodulation IC including such a frequency dividing type phase shift circuit have been supplied as a one-chip IC, and such a one-chip IC has been disclosed, for example, in Non-Patent Document 1. The product can be used.
JP-A-6-303271 μPC8194K, μPC8195K data sheet, p. 10, issued by NEC, document number PU10016JJ01V0DS (1st edition) November 2001

Now, the relative phase difference between the signal φ1 and the signal φ2 obtained from the conventional frequency dividing type phase shift circuit 900 is always kept at 90 °, but the absolute phase of both signals is the initial phase of FF1 and FF2. It is not uniquely determined because it depends on the state.

  FIGS. 6A to 6D are timing charts showing the absolute phases of the signals φ1 and φ2 obtained corresponding to different initial states of FF1 and FF2.

  Here, the absolute phase of the FF1Q output in FIG.

It is shown that four types of absolute phases are obtained according to the initial state of the FF.
The fact that the absolute phase is not uniquely determined causes a problem that a desired directivity pattern cannot be formed, for example, when a plurality of frequency-dividing phase shift circuits are applied to a wireless communication device using an adaptive array system.

  As is well known, a wireless communication apparatus based on the adaptive array method includes a plurality of antennas, and selectively receives signals in a desired direction by giving a suitable phase difference and an amplitude ratio to a received signal of each antenna during reception. The reception gain is increased, and at the time of transmission, the transmission gain is selectively increased in the desired direction by giving the suitable phase difference and amplitude ratio to the transmission signal for each antenna.

  For this reason, when orthogonally modulating and demodulating a transmission signal using orthogonal carrier signals obtained from separate frequency-dividing phase shift circuits for each antenna, the absolute phases of the orthogonal carrier signals cannot be aligned for each antenna, and as a result, A suitable phase difference for forming directivity is further weighted by the phase difference of the carrier signal, so that a desired directivity pattern cannot be formed.

  This problem arises when a conventional quadrature modulation IC and a quadrature demodulation IC as disclosed in Non-Patent Document 1 are used for each antenna to form an adaptive array device. This occurs inevitably because there is no means for matching the states of the FFs of the phase shift circuit.

  If the transmission / reception signal for each antenna is digitized and the quadrature modulation / demodulation processing is performed on the digitized transmission / reception signal, the program for the processing includes a step of matching the phase of the orthogonal carrier signal for each antenna. By doing so, the above-mentioned problem is avoided.

  However, in that case, an A / D converter is essential to digitize the transmission / reception signal, and therefore, in order to adapt to recent carriers provided in a high frequency band, an expensive A / D converter having a high response frequency is required. Another problem is that a complicated A / D converter must be used, and the cost reduction of communication devices is hindered.

  That is, a communication device that performs digital quadrature modulation / demodulation processing is not accepted as an inexpensive portable terminal device that demands a low price.

  In view of the above problems, the present invention provides a frequency dividing type phase shift circuit capable of generating quadrature signals having the same absolute phase when a plurality of parallel operations are performed, and an analog quadrature modulation / demodulation circuit using the frequency dividing type phase shift circuit. And an adaptive array device using the analog modulation / demodulation circuit.

  One embodiment of the present invention relates to a quadrature carrier signal generation circuit. The quadrature carrier signal generation circuit is a quadrature carrier signal generation circuit of an adaptive array device that includes a plurality of antennas and transmits and receives a quadrature modulation signal while forming a desired directivity, and generates a clock signal serving as a reference of a carrier. Clock signal generating means, a plurality of orthogonal signal generating means for inputting a clock signal to generate two signals A and B whose phases are orthogonal to each other, and the orthogonal signals A and B output by the orthogonal signal generating means And a synchronizing means for synchronizing each of the plurality of orthogonal signal generating means.

  The orthogonal signal generation means includes a frequency divider to divide the clock signal to generate signals A and B whose phases are orthogonal to each other, and the synchronization means simultaneously clears the frequency dividers of the plurality of orthogonal signal generation means. Then, the phases between the plurality of orthogonal signal generating means may be synchronized.

  The orthogonal signal generating means generates signals A and B whose phases are orthogonal to each other by shifting the phase of the clock signal by a predetermined amount, and the synchronizing means generates the signals A and B at the input terminals of the plurality of orthogonal signal generating means. The phases may be matched to synchronize the phases among the plurality of orthogonal signal generation units.

  Another embodiment of the present invention relates to an adaptive array device. The adaptive array device includes a plurality of antennas, and transmits and receives a quadrature modulated signal while forming a desired directivity. The adaptive array device includes a clock signal generating unit that generates a clock signal serving as a reference of a carrier, and a clear signal. A clear signal generation means for generating a signal; an analog quadrature demodulation means provided for each of the plurality of antennas, for quadrature demodulating a reception signal received by the corresponding antenna into an I reception signal and a Q reception signal; Analog quadrature modulation means provided corresponding to each antenna and quadrature-modulating an I transmission signal and a Q transmission signal for the corresponding antenna into a transmission signal; and a phase and amplitude of each of the I reception signal and the Q reception signal of each antenna. , The desired reception directivity is formed, and the I transmission signal, the Q transmission signal, and the like for each antenna are formed. Directional processing means for forming a desired transmission directivity by adjusting the respective phases and amplitudes, wherein each analog quadrature demodulation means obtains a clock signal, and a clock signal acquisition means for acquiring a clear signal. A clear signal acquiring unit, a frequency dividing circuit that generates an orthogonal carrier signal by dividing the acquired clock signal, and is reset to a predetermined internal state by the clear signal, and a quadrature generated by the frequency dividing circuit. Two analog mixer circuits for quadrature demodulating a received signal received by a corresponding antenna into an I received signal and a Q received signal using a carrier signal, wherein each analog quadrature modulating means includes a clock signal for acquiring a clock signal. Acquiring means, a clear signal acquiring means for acquiring a clear signal, and a quadrature carrier by dividing the frequency of the acquired clock signal. A signal for generating a signal and transmitting the I and Q transmission signals for the corresponding antenna using a frequency divider circuit reset to a predetermined internal state by a clear signal and a quadrature carrier signal generated by the frequency divider circuit And two analog mixer circuits for orthogonally modulating the signals.

  This adaptive array device is applied to communication of a time division multiple access system, and a clear signal generation unit outputs a clear signal prior to the start of each transmission time slot and the start of each reception time slot with which the adaptive array device performs communication. May be generated.

  Another embodiment of the present invention also relates to an adaptive array device. The adaptive array device includes a plurality of antennas, and transmits and receives a quadrature modulated signal while forming a desired directivity. The adaptive array device includes a clock signal generating unit configured to generate a clock signal serving as a reference of a carrier, And an analog quadrature demodulation means for quadrature demodulating a reception signal received by the corresponding antenna into an I reception signal and a Q reception signal, and an analog quadrature demodulation means provided for each of the plurality of antennas. Analog quadrature modulation means for quadrature-modulating the I and Q transmission signals for antennas to the transmission signal, and adjusting the phases and amplitudes of the I and Q reception signals of each antenna to obtain desired reception directivity. By forming and adjusting the phase and amplitude of each of the I and Q transmission signals for each antenna. Directivity processing means for forming a desired transmission directivity, each analog quadrature demodulation means, a clock signal acquisition means for acquiring a clock signal, and a quadrature carrier signal by shifting the phase of the acquired clock signal. A phase shift circuit for generating the signal; and two analog mixer circuits for quadrature demodulating a received signal received by a corresponding antenna into an I received signal and a Q received signal using the orthogonal carrier signal generated by the phase shift circuit. Each analog quadrature modulating means includes a clock signal obtaining means for obtaining a clock signal, a phase shift circuit for generating a quadrature carrier signal by shifting the phase of the obtained clock signal, and a quadrature signal generated by the phase shift circuit. Using the carrier signal, the I and Q transmission signals for the corresponding antenna are orthogonally transformed into transmission signals. And two analog mixer circuits to be adjusted.

  Further, each quadrature demodulation unit and each quadrature modulation unit may perform direct modulation and direct demodulation of a transmission / reception signal, respectively.

According to the present invention, a quadrature carrier signal generation circuit of an adaptive array device that includes a plurality of antennas and that transmits and receives quadrature modulated signals while forming desired directivity is provided. Means, a plurality of orthogonal signal generating means for inputting a clock signal to generate two signals A and B whose phases are orthogonal to each other, and the orthogonal signals A and B output from the orthogonal signal generating means Since a synchronizing means for synchronizing between the signal generating means is provided, it is possible to generate quadrature signals having the same absolute phase.

  In addition, the analog quadrature modulation circuit and analog quadrature demodulation circuit of the adaptive array device of the present invention perform transmission / reception processing using quadrature carrier signals having absolute phases, so that the absolute phases of the quadrature carrier signals for each antenna are not uniform. Thus, the problem that a desired directivity pattern cannot be formed is solved.

  Moreover, in order to solve this problem, an expensive digital processing technique is not used for the modulation / demodulation processing, so that it is possible to provide a communication device which is inexpensive and employs an adaptive array system.

  Further, the adaptive array device is applied to the communication of the time division multiple access system, and the clear signal generating means transmits a clear signal prior to the start of each transmission time slot and the start of each reception time slot with which the adaptive array device communicates. May be generated.

  According to this configuration, when the adaptive array device is applied to the communication of the time division multiple access system, the power supply to each analog quadrature modulation circuit and each analog quadrature demodulation circuit is stopped in a time slot not used for communication. Also, a clear signal supplied prior to the start of each time slot used for communication ensures that an orthogonal carrier signal having the same absolute phase is obtained for each time slot.

  Therefore, an effect of power saving can be obtained after solving the problem that a desired directivity pattern cannot be formed.

  Further, in the adaptive array device, each of the quadrature demodulation units and each of the quadrature modulation units may perform direct modulation and direct demodulation of the transmission / reception signal, respectively.

  According to this configuration, since it is not necessary to provide an intermediate frequency stage, there is an effect that the circuit scale can be reduced in addition to the effects described above.

  An embodiment of the present invention relates to a phase shift circuit for aligning the absolute phases of orthogonal carrier signals for each antenna, and an adaptive array device using the same. Here, as an example of the phase shift circuit according to the present embodiment, a configuration example using active components will be described in Example 1 and a configuration example using passive components will be described in Example 2, respectively.

  In the embodiment of the present invention, a phase shift circuit using a frequency divider, which is an active component, and an adaptive array device using the phase shift circuit will be described.

  FIGS. 1A and 1B are block diagrams showing a quadrature modulation circuit and a quadrature demodulation circuit each including the frequency dividing type phase shift circuit. Compared with the conventional frequency dividing type phase shift circuit, the state of the frequency dividing FF can be reset from the outside. Details will be described below.

  FIG. 1A shows a quadrature demodulation circuit, which includes a frequency-divided phase shift circuit 312 including FFs 315 and 316, a distribution circuit 311, an analog mixer 313, and an analog mixer 314.

  The quadrature demodulation circuit is used in a communication device to quadrature demodulate a received signal.

  The frequency dividing type phase shift circuit 312 divides the local signal LOCAL by 4, generates a quadrature carrier, and simultaneously resets the FFs 315 and 316 when a CLEAR signal is given.

  The distribution circuit 311 distributes the received signal R to the analog mixer 313 and the analog mixer 314, and the analog mixer 313 and the analog mixer 314 convert the distributed received signal into the quadrature carrier generated by the frequency dividing type phase shift circuit 312. To generate an I reception signal RI and a Q reception signal RQ.

  Note that the frequency dividing type phase shift circuit 312 included in the quadrature demodulation circuit may be realized by a one-chip IC with a clear pin for acquiring a clear signal drawn out to the outside. It may be realized by such a one-chip IC.

FIG. 1B shows a quadrature modulation circuit, which includes a frequency-dividing phase shift circuit 321 including FFs 325 and 326, analog mixers 322 and 323, and an adder 324.
The quadrature modulation circuit is used in a communication device to quadrature modulate a transmission signal.

The configuration of the frequency division type phase shift circuit 321 is the same as that of the frequency division type phase shift circuit 312.
The analog mixers 322 and 323 multiply the I transmission signal SI and the Q transmission signal SQ by the quadrature carrier generated by the frequency-dividing phase shift circuit 321 respectively, and the adder 324 adds the signals obtained by the multiplication. By doing so, the transmission signal S is generated.

  Note that the frequency dividing type phase shift circuit 321 included in the quadrature modulation circuit may be realized by a one-chip IC in which a clear pin for acquiring a clear signal is drawn out to the outside. It may be realized by such a one-chip IC.

  Next, an adaptive array device using the above-described frequency dividing type phase shift circuit will be described.

  An adaptive array device according to an embodiment of the present invention includes a plurality of antennas, and a quadrature modulation circuit and a quadrature demodulation circuit each including a frequency-dividing phase shift circuit for each antenna, and is applied to a wireless communication device, and is adapted for directivity by an adaptive array system. Wireless communication with the partner device by controlling the communication.

  FIG. 2 is a functional block diagram showing a wireless communication device including the adaptive array device.

  The wireless communication device includes two antennas 10a and 10b, a temperature-compensated crystal oscillator 15, a front-end unit 20, a modem unit 30, a directivity processing unit 40, a baseband processing unit 50, a speaker 60, a microphone 70, and a control unit 80. Consists of

  The temperature-compensated crystal oscillator 15 generates a clock signal serving as a reference for the operation of the wireless communication device.

  The front end unit 20 includes an RF local oscillation circuit 241, a distribution circuit 242, transmission / reception changeover switches 231a and 231b, band pass filters 211a and 211b, low noise amplifiers 212a and 212b, analog mixers 213a and 213b, and variable gain amplifiers 214a, 214b and 221a. , 221b, analog mixers 222a and 222b, high power amplifiers 223a and 223b, and bandpass filters 224a and 224b.

  In the front end unit 20, the RF local oscillation circuit 241 includes a PLL (Phase Locked Loop) circuit, and uses the PLL circuit based on the clock signal generated by the temperature-compensated crystal oscillator 15 to generate an RF local oscillation signal. And the distribution circuit 242 supplies the RF local oscillation signal to the analog mixers 213a, 213b, 222a, and 222b. The reception signal received by the antenna 10a is supplied to the analog mixer 213a via the transmission / reception changeover switch 231a, the bandpass filter 211a, and the low noise amplifier 212a, and after being frequency-converted to the IF band using the RF local oscillation signal. The amplitude is adjusted by the variable gain amplifier 214a and supplied to the modem 30.

  The received signal received by the antenna 10b is processed in the same manner.

  On the other hand, the transmission signal in the IF band for the antenna 10a supplied from the modulation / demodulation unit 30 is subjected to amplitude adjustment by the variable gain amplifier 221a, and then supplied to the analog mixer 222a, where the frequency is changed to the RF band using the RF local oscillation signal. After the conversion, the signal is transmitted from the antenna 10a via the high power amplifier 223a, the bandpass filter 224a, and the transmission / reception switch 231a.

  The transmission signal in the IF band for the antenna 10b is processed in the same manner.

  The modulation / demodulation unit 30 includes an IF local oscillation circuit 341, a switch 343, distribution circuits 342, 311a, and 311b, a frequency-dividing phase shift circuit (described as 90 ° in FIG. 2) 312a, 312b, 321a, and 321b, and an analog mixer 313a. , 313b, 314a, 314b, 322a, 322b, 323a, and 323b, and adders 324a and 324b.

In the modulation / demodulation unit 30, the IF local oscillation circuit 341 is configured to include a PLL (Phase Locked Loop) circuit, and based on a clock signal generated by the temperature-compensated crystal oscillator 15, uses the PLL circuit to generate an IF local oscillation reference signal. And supplies the IF local oscillation reference signal to the distribution circuit 342 via the switch 343, and the distribution circuit 342 supplies the IF local oscillation reference signal to the frequency dividing type phase shift circuits 312a, 312b, 321a, and 321b. I do.
The frequency-dividing phase shifters 312a, 312b, 321a, and 321b respectively divide the IF local oscillation reference signal to generate an in-phase IF local oscillation signal and a quadrature IF local oscillation signal whose phases are orthogonal to each other, Supply to the corresponding analog mixer.

  Here, the switch 343 stops the supply of the IF local oscillation reference signal during a period in which communication is not performed, in response to an enable signal supplied only from the control unit 80 during a communication execution period, and thereby controls the modulation / demodulation unit 30. Realize power saving.

  Further, each frequency dividing type phase shift circuit may be realized by a different one-chip IC.

  In this case, each one-chip IC is configured to be able to externally supply a clear signal of the frequency-dividing FF, which is a feature of the present invention.

  The clear signal is supplied from the control unit 80.

In particular, when the supply of the enable signal is started, the clear signal is always supplied, and the state of the frequency dividing FF in each one-chip IC is reset.
Thus, the phases of the in-phase IF local oscillation signal and the quadrature IF local oscillation signal generated by each frequency-dividing FF always match.

  The analog mixers 313a and 314a are supplied with the reception signal of the antenna 10a whose frequency has been converted to the IF band via the distribution circuit 311a, and generate the in-phase IF local oscillation signal and the quadrature IF station generated by the frequency dividing type phase shift circuit 312a. Each of the generated signals is subjected to quadrature demodulation into an I reception signal and a Q reception signal in the baseband of the antenna 10a, and then supplied to the directivity processing unit 40.

  The reception signal of the antenna 10b whose frequency has been converted to the IF band is processed in the same manner.

  On the other hand, the analog mixers 322a and 323a are supplied with the baseband I transmission signal and the Q transmission signal for the antenna 10a from the directivity processing unit 40, respectively, and generate the in-phase IF station transmission generated by the frequency dividing type phase shift circuit 321a. After orthogonally modulating the transmission signal in the IF band for the antenna 10 a using the signal and the orthogonal IF local oscillation signal, the signal is supplied to the front end unit 20.

  The I transmission signal and the Q transmission signal in the baseband for the antenna 10b are similarly processed.

  The directivity processing unit 40 includes a complex weight calculation unit 401, phase amplitude adjustment units 411 and 412, an adder 413, a distribution circuit 421, and phase amplitude adjustment units 422 and 423.

At the time of reception, weight calculation section 401 calculates complex weights W1R and W2R representing the amounts of adjustment of the phases and amplitudes of the received signals of antennas 10a and 10b, respectively.
The phase and amplitude adjustment unit 411 adjusts the phase and amplitude by complexly multiplying the I reception signal and the Q reception signal of the antenna 10a by a complex weight W1R, and outputs a complex signal including both signal components after the phase and amplitude adjustment. I do.

  The phase and amplitude adjustment unit 412 adjusts the phase and the amplitude by complexly multiplying the I reception signal and the Q reception signal of the antenna 10b by a complex weight W2R, and outputs a complex signal including both signal components after the phase and amplitude adjustment. Output.

  The adder 413 adds the respective complex signals and supplies the baseband complex reception signal of the baseband that is the result of the addition.

  At this time, as an example, the weight calculation unit 401 knows in advance the properties of the signal such that the complex envelope of the received signal is constant, and sequentially calculates the complex weights that make the complex envelope of the signal obtained from the adder 413 constant. calculate.

  Further, as another example, the weight calculation unit 401 adds, to a signal whose content is known (for example, a UW signal in PHS communication), of a desired signal received from a communication The signal obtained from the unit 413 may be compared with each other, and a complex weight for reducing an error between the two may be sequentially calculated.

  By performing such control, reception directivity in which the reception gain is selectively increased in the arrival direction of the desired signal is formed.

  On the other hand, at the time of transmission, the distribution circuit 421 distributes the complex transmission signal of the baseband supplied from the baseband processing unit to the antennas 10a and 10b, and supplies the complex transmission signals to the phase and amplitude adjusters 422 and 423, respectively. .

  The phase and amplitude adjuster 422 adjusts the phase and amplitude of the I transmission signal and the Q transmission signal included in the complex transmission signal by complexly multiplying the complex transmission signal for the antenna 10a by the complex weight W1S. The adjusted signals are supplied to the modem 30.

  The phase and amplitude adjuster 423 adjusts the phase and amplitude of the I transmission signal and the Q transmission signal included in the complex transmission signal by complexly multiplying the complex transmission signal for the antenna 10b by the complex weight W2S. The adjusted signals are supplied to the modem 30. By setting the complex weights W1R and W2R obtained at the time of reception to the complex weights W1S and W2S, respectively, the same directivity as the directivity at the time of reception is formed at the time of transmission, and the transmission signal is selected in the arrival direction of the desired signal. Sent out.

  The baseband processing unit 50 includes a D / A converter and an A / D converter (not shown). The baseband processing unit 50 converts a baseband reception signal supplied from the directivity processing unit 40 into an audio signal. And converts the audio signal acquired from the microphone 70 into a baseband transmission signal and supplies it to the directivity processing unit 40.

  The control unit 80 controls the entire wireless communication apparatus, and particularly supplies an enable signal to the distribution circuit 342 and supplies a clear signal to each of the frequency-divided phase shift circuits 312a, 312b, 321a, and 321b.

As described above, the frequency dividing type phase shift circuit according to the present invention has the clear signal acquiring means for acquiring the clear signal for resetting the state of the frequency dividing FF.
In particular, when the frequency dividing type phase shift circuit is realized by a one-chip IC, the clear signal acquiring means is a clear pin drawn out of the one-chip IC.

  With this configuration, when a plurality of frequency-dividing type phase shift circuits operate in parallel, a clear signal is given to each frequency-dividing type phase shift circuit at the same time, and the states of all frequency-dividing FFs are made to coincide with each other. The peripheral phase shift circuit generates a quadrature signal having the same absolute phase.

  In the adaptive array device, the use of the frequency dividing type phase shift circuit for each antenna generates orthogonal carrier signals having the same absolute phase for each antenna. The problem that the directivity pattern cannot be formed is solved.

Moreover, in order to solve this problem, an expensive digital processing technique is not used to perform quadrature modulation and demodulation, so that it is possible to provide a communication device that is inexpensive and employs an adaptive array system.
Although the present invention has been described based on the above embodiment, it is needless to say that the present invention is not limited to the above embodiment. The following cases are also included in the present invention.
(1) The adaptive array device according to the embodiment may be applied to a wireless communication device that performs TDMA (Time Division Multiple Access) communication, or CDMA (Code Division Multiple Access). Access) -type communication may be applied to a wireless communication device that performs communication.

  When the adaptive array apparatus is applied to a TDMA wireless communication apparatus and transmission time slots and reception time slots are intermittently assigned, the control unit 80 A local signal may be distributed to each frequency-divided phase shifter by supplying an enable signal during the period, and a clear signal may be supplied prior to the start of each transmission / reception time slot.

According to this configuration, each frequency dividing type phase shift circuit stops operating in a time slot not used for communication, so that power consumption can be reduced.
In order to further reduce power consumption, power supply to each frequency-dividing phase shift circuit may be stopped during a period in which no enable signal is supplied.

  Each frequency dividing type phase shift circuit is reset before the start of each time slot used for communication, so that quadrature carrier signals with absolute phases aligned for each antenna can be reliably generated. Power saving is realized.

FIG. 3 is a timing chart showing an example of the relationship between transmission and reception time slots in mobile communication such as a mobile phone system, and the generation periods of the enable signal and the clear signal.
Here, the uplink slot refers to a time slot in which communication from the wireless mobile station to the wireless base station is performed, and the downlink slot refers to a time slot in which communication from the wireless base station to the wireless mobile station is performed.
(2) In the embodiment, a divide-by-4 type phase shift circuit has been illustrated, but a divide-by-2 type phase shift circuit may be configured.

  FIG. 4 is a functional block diagram illustrating a divide-by-2 phase shift circuit 350.

  In the phase shift circuit 350, the FF 351 divides the frequency of the clock signal by two, and the FF 352 at the subsequent stage latches the output of the FF 351 with the clock signal of the opposite phase to generate orthogonal signals φ1 and φ2.

This frequency dividing type phase shift circuit 350 may be realized by a one-chip IC in which a clear pin for acquiring a clear signal is drawn out, or a quadrature including this frequency dividing type phase shift circuit. The entire demodulation circuit may be realized by such a one-chip IC.
(3) In the embodiment, the frequency dividing type phase shift circuit using the frequency dividing circuit constituted by the flip-flop circuit is exemplified, but the present invention does not limit the configuration of the frequency dividing circuit. For example, a frequency dividing type phase shift circuit using a frequency dividing circuit constituted by a dynamic latch circuit is also included in the present invention.

  In the embodiment of the present invention, a phase shift circuit using passive components and an adaptive array device using the phase shift circuit will be described.

  FIGS. 7A and 7B are block diagrams showing a quadrature modulation circuit and a quadrature demodulation circuit each including a phase shift circuit using a capacitor or a resistor as a passive component.

  Compared with the frequency dividing type phase shift circuit shown in FIG. 1 according to the first embodiment, since the state of the frequency dividing FF does not need to be reset, a CLEAR signal is not required. Details will be described below.

  FIG. 7A shows a quadrature demodulation circuit, which includes a phase shift circuit 712 including resistors 700 and 703, capacitors 701 and 702, a distribution circuit 311, an analog mixer 313, and an analog mixer 314. Note that the distribution circuit 311, the analog mixer 313, and the analog mixer 314 are the same as those in FIG.

  The quadrature demodulation circuit is used in a communication device to quadrature demodulate a received signal.

  The phase shift circuit 712 shifts the phase by passing the input local signal LOCAL through an RC circuit including a resistor 700 and a capacitor 701 and a CR circuit including a capacitor 702 and a resistor 703, respectively, to shift the phase by π / 2 (90 The two orthogonal carriers OUT_A 706 and OUT_B 707 having a phase difference of (°) are generated.

FIG. 8 shows the local signal LOCAL and the orthogonal carriers OUT_A 706 and OUT_B 707.
Shows the phase relationship.

  The local signal LOCAL having the frequency ω undergoes a phase shift of −tan-1 (RCω) by the RC circuit and a phase shift of π / 2-tan-1 (RCω) by the CR circuit. The phase difference between the carriers OUT_A 706 and OUT_B 707 is π / 2.

  The phase shift circuit 712 may be integrated with the distribution circuit 311, the analog mixer 313, the analog mixer 314, and the like as an entire quadrature demodulation circuit, or may be integrated with the phase shift circuit alone or with other circuits. That is, any configuration may be used as long as it outputs a quadrature carrier to be used for demodulation with a phase difference of π / 2 as a phase shift circuit.

  FIG. 7B illustrates a quadrature modulation circuit, which includes a phase shift circuit 712 including resistors 700 and 703, capacitors 701 and 702, analog mixers 322 and 323, and an adder 324. The analog mixers 322 and 323 and the adder 324 are the same as those in FIG.

  The quadrature modulation circuit is used in a communication device to quadrature modulate a transmission signal.

  The configuration of the phase shift circuit 721 is the same as that of the phase shift circuit 712.

  Note that the phase shift circuit 721 may be integrated with the adder 324, the analog mixers 322, 323, and the like as an entire quadrature demodulation circuit, or may be integrated with the phase shift circuit alone or with other circuits. That is, any configuration may be used as long as the configuration is such that a quadrature carrier to be used for the modulation operation is output with a phase difference of π / 2 as the phase shift circuit.

  Next, a case where the above-described phase shift circuit is applied to the adaptive array device described with reference to FIG. 1 will be described.

  FIG. 9 is a functional block diagram showing a wireless communication device to which the phase shift circuit shown in FIG. 7 is applied.

  The wireless communication device includes two antennas 10a and 10b, a temperature-compensated crystal oscillator 15, a front-end unit 20, a modem unit 30, a directivity processing unit 40, a baseband processing unit 50, a speaker 60, a microphone 70, and a control unit 80. Consists of

  The difference from FIG. 2 is that the phase shift circuit in the quadrature modulation circuit and the quadrature demodulation circuit is a frequency-divided phase shift circuit (312a, 312b, 321a, 321b) using active components or a phase shift circuit (712a) using passive components. , 712b, 721a, and 721b), and the presence or absence of a reset signal by the control unit 80, which is a control signal of the phase shift circuit.

  The temperature-compensated crystal oscillator 15 generates a clock signal serving as a reference for the operation of the wireless communication device.

  The front end unit 20 includes an RF local oscillation circuit 241, a distribution circuit 242, transmission / reception changeover switches 231a and 231b, band pass filters 211a and 211b, low noise amplifiers 212a and 212b, analog mixers 213a and 213b, and variable gain amplifiers 214a, 214b and 221a. , 221b, analog mixers 222a and 222b, high power amplifiers 223a and 223b, and bandpass filters 224a and 224b.

In the front end unit 20, the RF local oscillation circuit 241 includes a PLL (Phase Locked Loop) circuit, and uses the PLL circuit based on the clock signal generated by the temperature-compensated crystal oscillator 15 to generate an RF local oscillation signal. And the distribution circuit 242 supplies the RF local oscillation signal to the analog mixers 213a, 213b, 222a, and 222b. The reception signal received by the antenna 10a is supplied to the analog mixer 213a via the transmission / reception changeover switch 231a, the bandpass filter 211a, and the low noise amplifier 212a, and after being frequency-converted to the IF band using the RF local oscillation signal. The amplitude is adjusted by the variable gain amplifier 214a and supplied to the modem 30.
The received signal received by the antenna 10b is processed in the same manner.

  On the other hand, the transmission signal in the IF band for the antenna 10a supplied from the modulation / demodulation unit 30 is subjected to amplitude adjustment by the variable gain amplifier 221a, and then supplied to the analog mixer 222a, where the frequency is changed to the RF band using the RF local oscillation signal. After the conversion, the signal is transmitted from the antenna 10a via the high power amplifier 223a, the bandpass filter 224a, and the transmission / reception switch 231a.

  The transmission signal in the IF band for the antenna 10b is processed in the same manner.

  The modulation / demodulation unit 30 includes an IF local oscillation circuit 341, a switch 343, distribution circuits 342, 311a, and 311b, a phase shift circuit (denoted by 90 ° in FIG. 2) 712a, 712b, 721a, and 721b, an analog mixer 313a, 313b, 314a, 314b, 322a, 322b, 323a, and 323b, and adders 324a and 324b.

  In the modulation / demodulation unit 30, the IF local oscillation circuit 341 is configured to include a PLL (Phase Locked Loop) circuit, and based on a clock signal generated by the temperature-compensated crystal oscillator 15, uses the PLL circuit to generate an IF local oscillation reference signal. And supplies the IF local oscillation reference signal to the distribution circuit 342 via the switch 343. The distribution circuit 342 supplies the IF local oscillation reference signal to the phase shift circuits 712a, 712b, 721a, and 721b.

  Each of the phase shift circuits 712a, 712b, 721a, and 721b inputs the IF local oscillation reference signal as a local signal LOCAL, and shifts the phase so that the in-phase IF local oscillation signal and the orthogonal IF local oscillation signal whose phases are orthogonal to each other. A signal is generated and supplied to a corresponding analog mixer.

  Here, the switch 343 stops the supply of the IF local oscillation reference signal during a period in which communication is not performed, in response to an enable signal supplied only from the control unit 80 during a communication execution period, and thereby controls the modulation / demodulation unit 30. Realize power saving.

  Further, each phase shift circuit may be realized by a different one-chip IC, or may be realized by an integrated IC. That is, any configuration may be used as long as it outputs a quadrature carrier to be used for demodulation with a phase difference of π / 2 as a phase shift circuit.

  The analog mixers 313a and 314a are supplied with the reception signal of the antenna 10a whose frequency has been converted to the IF band via the distribution circuit 711a, and convert the in-phase IF local signal and the quadrature IF local signal generated by the phase shift circuit 712a. Each of them is orthogonally demodulated into an I reception signal and a Q reception signal in the baseband of the antenna 10a, and then supplied to the directivity processing unit 40.

  The reception signal of the antenna 10b whose frequency has been converted to the IF band is processed in the same manner.

  On the other hand, the analog mixers 322a and 323a are supplied with the baseband I transmission signal and the Q transmission signal for the antenna 10a from the directivity processing unit 40, respectively, and generate the in-phase IF local oscillation signal and the quadrature quadrature signal generated by the phase shift circuit 721a. After orthogonally modulating the transmission signal in the IF band for the antenna 10 a using the IF local oscillation signal, the signal is supplied to the front end unit 20.

  The I transmission signal and the Q transmission signal in the baseband for the antenna 10b are similarly processed.

  The directivity processing unit 40 includes a complex weight calculation unit 401, phase amplitude adjustment units 411 and 412, an adder 413, a distribution circuit 421, and phase amplitude adjustment units 422 and 423.

  At the time of reception, weight calculation section 401 calculates complex weights W1R and W2R representing the amounts of adjustment of the phases and amplitudes of the received signals of antennas 10a and 10b, respectively.

  The phase and amplitude adjustment unit 411 adjusts the phase and amplitude by complexly multiplying the I reception signal and the Q reception signal of the antenna 10a by a complex weight W1R, and outputs a complex signal including both signal components after the phase and amplitude adjustment. I do.

  The phase and amplitude adjustment unit 412 adjusts the phase and the amplitude by complexly multiplying the I reception signal and the Q reception signal of the antenna 10b by a complex weight W2R, and outputs a complex signal including both the phase and amplitude adjusted signal components. Output.

  The adder 413 adds the respective complex signals and supplies the baseband complex reception signal of the baseband that is the result of the addition.

  At this time, as an example, the weight calculation unit 401 knows in advance the properties of the signal such that the complex envelope of the received signal is constant, and sequentially calculates complex weights that make the complex envelope of the signal obtained from the adder 413 constant. calculate.

  Further, as another example, the weight calculation unit 401 adds, to a signal whose content is known (for example, a UW signal in PHS communication), of a desired signal received from a communication The signal obtained from the unit 413 may be compared with each other, and a complex weight for reducing an error between the two may be sequentially calculated.

  By performing such control, reception directivity in which the reception gain is selectively increased in the arrival direction of the desired signal is formed.

  On the other hand, at the time of transmission, the distribution circuit 421 distributes the complex transmission signal of the baseband supplied from the baseband processing unit to the antennas 10a and 10b, and supplies the complex transmission signals to the phase and amplitude adjusters 422 and 423, respectively. .

  The phase and amplitude adjuster 422 adjusts the phase and amplitude of the I transmission signal and the Q transmission signal included in the complex transmission signal by complexly multiplying the complex transmission signal for the antenna 10a by the complex weight W1S. The adjusted signals are supplied to the modem 30.

  The phase amplitude adjuster 423 adjusts the phase and amplitude of the I transmission signal and the Q transmission signal included in the complex transmission signal by complexly multiplying the complex transmission signal for the antenna 10b by the complex weight W2S. The adjusted signals are supplied to the modem 30. By setting the complex weights W1R and W2R obtained at the time of reception to the complex weights W1S and W2S, respectively, the same directivity as the directivity at the time of reception is formed at the time of transmission, and the transmission signal is selected in the arrival direction of the desired signal. Sent out.

  The baseband processing unit 50 includes a D / A converter and an A / D converter (not shown). The baseband processing unit 50 converts a baseband reception signal supplied from the directivity processing unit 40 into an audio signal. And converts the audio signal acquired from the microphone 70 into a baseband transmission signal and supplies it to the directivity processing unit 40.

  The control unit 80 controls the entire wireless communication device.

  With this configuration, in the adaptive array device, the use of the phase shift circuit for each antenna generates a quadrature carrier signal having the same absolute phase for each antenna. Thus, the problem that a desired directivity pattern cannot be formed is solved.

  Moreover, in order to solve this problem, an expensive digital processing technique is not used to perform quadrature modulation and demodulation, so that it is possible to provide a communication device that is inexpensive and employs an adaptive array system.

  Further, in a phase shift circuit using passive components, frequency conversion such as frequency division is not performed, so that power consumption and noise floor level can be reduced.

  Although the present invention has been described based on the above embodiment, the present invention is not limited to the above embodiment. For example, the quadrature modulation / demodulation circuit is not limited to the one using the above-described phase shift circuit using a capacitor or a resistor, and may have a configuration shown in FIGS. 10 and 11 below.

  FIG. 10 shows an example of a quadrature demodulation circuit using a phase shift circuit including a capacitor, a coil, and a resistor.

  The phase shift circuit 1012 in FIG. 10 includes capacitors 1000 and 1001, a coil 1002, and a resistor 1003.

  Also in this circuit, two orthogonal carriers having a phase difference of π / 2 are generated with respect to the input local signal LOCAL and output to the analog mixers 313 and 314.

  FIG. 11 shows an example of a quadrature demodulation circuit using a phase shift circuit using a branch line type 90 ° hybrid coupler.

  The branch line type 90 ° hybrid coupler 1101 is a circuit that changes the phase of a signal using reflected power generated due to impedance mismatch, and generates a phase difference of π / 2 with respect to an input local signal LOCAL. It generates two orthogonal carriers having the same and outputs them to the analog mixers 313 and 314.

The embodiment of the present invention has been described with reference to the first and second embodiments. However, the present invention is not limited to the above description, and the following cases are also included in the present invention.
(1) In the embodiment, the adaptive array device including two antennas has been exemplified. However, it is needless to say that the number of antennas is not limited to two. An adaptive array device including three or more antennas and a frequency-divided phase shift circuit for generating a quadrature carrier signal for each antenna is also included in the present invention.
(2) In the embodiment, the configuration including the speaker 60 and the microphone 70 for a telephone call has been exemplified on the assumption that the adaptive array device of the present invention is applied to a mobile phone. However, the adaptive array device of the present invention can be widely applied to not only mobile phones but also wireless communication devices including mobile information terminals, wireless base stations, and the like.

For example, when the present adaptive array device is applied to a wireless base station, an interface with a public telephone network may be provided instead of the speaker 60 and the microphone 70 for a call.
(3) The adaptive array device can be applied to a wireless communication device that performs communication using a spatial multiplexing method.

In this case, a plurality of directivity processing units 40 may be provided, operate in parallel to form a plurality of different directivity patterns, and wirelessly communicate with communication partners in different directions through the respective directivity patterns.
(4) In the embodiment, a radio communication apparatus having a superheterodyne configuration having an RF stage and an IF stage and performing quadrature modulation and demodulation in the IF stage has been exemplified. However, a configuration in which the IF stage is not provided and direct quadrature modulation and demodulation is performed in the RF stage. The wireless communication device described above is also included in the present invention.
(5) In the embodiment, the phase / amplitude adjustment unit that adjusts the phase and the amplitude by using the complex multiplication is illustrated. However, the present invention does not limit the configuration for adjusting the phase and the amplitude to this example. Absent.

For example, a configuration in which the phase and amplitude of a transmission / reception signal are directly adjusted using a phase shifter and an amplitude adjuster is also included in the present invention.
(6) In the embodiment, the method of directly supplying the IF local oscillation reference signal from the distribution circuit 342 to the phase shift circuit (312, 321, 712, 721, 1012, 1112, etc.) is used. is not. For example, a driver circuit for amplifying the IF local oscillation reference signal, an equal length line in which the line length between the distribution circuit 342 and all the phase shift circuits are equal, and a line from the distribution circuit 342 to the phase shift circuit. May be configured as a line termination circuit that terminates at the input end of the phase shift circuit, and connected to each phase shift circuit. That is, any connection method may be used as long as the IF local oscillation reference signal output from the distribution circuit 342 is connected so as to be phase-synchronized at the input terminals of the plurality of phase shift circuits.

FIG. 2A is a functional block diagram showing an analog quadrature demodulation circuit using a frequency dividing type phase shift circuit of the present invention. FIG. 3B is a functional block diagram showing an analog quadrature modulation circuit using the frequency dividing type phase shift circuit of the present invention. FIG. 2 is a functional block diagram illustrating a wireless communication device including an adaptive array device using the quadrature demodulation circuit and the quadrature modulation circuit for each antenna. 4 is a timing chart illustrating operation timing of the wireless communication device. FIG. 9 is a functional block diagram showing another example of the frequency-dividing phase shift circuit of the present invention. FIG. 9 is a functional block diagram showing a conventional frequency-dividing phase shift circuit. (A) to (D) are phase variations of a quadrature signal output from a conventional frequency dividing type phase shift circuit. (A) is a functional block diagram showing an analog quadrature demodulation circuit using a phase shift circuit using passive components of the present invention.

(B) is a functional block diagram showing an analog quadrature modulation circuit using a phase shift circuit using passive components of the present invention.
FIG. 3 is a diagram illustrating a relationship between an input signal and an output signal in a phase shift circuit. FIG. 9 is a functional block diagram illustrating a wireless communication device in which the phase shift circuit of FIG. 8 is applied to the quadrature demodulation circuit and the quadrature modulation circuit. It is a functional block diagram showing other examples of a phase shift circuit by passive components of the present invention. It is a functional block diagram showing other examples of a phase shift circuit by passive components of the present invention.

Explanation of reference numerals

10a, 10b Antenna 20 Front end unit 30 Modulation / demodulation unit 40 Directivity processing unit 50 Baseband processing unit 60 Speaker 70 Microphone 80 Control unit 211a, 211b, 224a, 224b Bandpass filter 212a, 212b Low noise amplifier 213a, 213b, 222a, 222b Analog mixers 214a, 214b, 221a, 221b Variable gain amplifiers 223a, 223b High power amplifiers 231a, 231b Transmission / reception switch 241 RF local oscillation circuit 242 Distribution circuit 311, 311a, 311b Distribution circuit 312, 312a, 312b, 321, 321a, 321b Frequency dividing type phase shift circuits 313, 313a, 313b, 314, 314a, 314b analog mixers 315, 316, 325, 326 FF 322, 322a, 322b, 323, 323a, 323b Analog mixer 324, 324a, 324b Adder 341 IF local oscillation circuit 342 Distribution circuit 343 Switch 350 Frequency dividing type phase shift circuit 351, 352 FF
401 Complex weight calculator 411, 412, 422, 423 Phase amplitude adjuster 415 Adder 421 Distribution circuit 700, 703 Resistor 701, 702 Capacitor 706 Quadrature carrier OUT_A
707 Quadrature carrier OUT_B
712, 712a, 712b, 721, 721a, 721b Phase shift circuit 900 Frequency division type phase shift circuit 1000, 1001 Capacitor 1002 Coil 1003 Resistor 1012 Phase shift circuit 1101 Branch line 90 ° hybrid coupler 1102 Resistor 1112 Phase shift circuit

Claims (7)

A quadrature carrier signal generation circuit of an adaptive array device that includes a plurality of antennas and transmits and receives a quadrature modulation signal while forming a desired directivity,
A clock signal generating means for generating a clock signal serving as a reference of the carrier,
A plurality of orthogonal signal generating means for receiving the clock signal and generating two signals A and B having phases orthogonal to each other;
A quadrature carrier signal generating circuit, comprising: a synchronizing means for synchronizing the phases of the quadrature signals A and B output by the quadrature signal generating means among the plural quadrature signal generating means. The quadrature signal generation means includes a frequency divider to generate the signals A and B whose phases are orthogonal to each other by dividing the clock signal,
The quadrature carrier signal according to claim 1, wherein the synchronization unit clears the frequency dividers of the plurality of orthogonal signal generation units at the same time so that the phases of the plurality of orthogonal signal generation units are synchronized. Generation circuit. The orthogonal signal generation means generates signals A and B having phases orthogonal to each other by shifting the phase of the clock signal by a predetermined amount,
2. The apparatus according to claim 1, wherein the synchronizing means matches the phases of the clock signals at the input terminals of the plurality of orthogonal signal generating means so that the phases of the plurality of orthogonal signal generating means are synchronized. A quadrature carrier signal generation circuit. An adaptive array device that includes a plurality of antennas and transmits and receives a quadrature modulated signal while forming a desired directivity,
A clock signal generating means for generating a clock signal serving as a reference of the carrier,
Clear signal generating means for generating a clear signal;
Analog quadrature demodulation means provided corresponding to each of the plurality of antennas and quadrature-demodulating a reception signal received by the corresponding antenna into an I reception signal and a Q reception signal;
Analog quadrature modulation means provided corresponding to each of the plurality of antennas and quadrature-modulating an I transmission signal and a Q transmission signal for the corresponding antenna into a transmission signal;
The desired reception directivity is formed by adjusting the phase and amplitude of each of the I reception signal and Q reception signal of each antenna, and the phase and amplitude of each of the I transmission signal and Q transmission signal for each antenna. And directivity processing means for forming a desired transmission directivity by adjusting
Each analog quadrature demodulation means,
Clock signal acquisition means for acquiring the clock signal,
Clear signal acquisition means for acquiring the clear signal,
A frequency divider circuit that generates a quadrature carrier signal by dividing the obtained clock signal, and is reset to a predetermined internal state by the clear signal;
Using two orthogonal mixer circuits that orthogonally demodulate a received signal received by the corresponding antenna into an I received signal and a Q received signal using the orthogonal carrier signal generated by the frequency dividing circuit,
Each analog quadrature modulation means,
Clock signal acquisition means for acquiring the clock signal,
Clear signal acquisition means for acquiring the clear signal,
A frequency divider circuit that generates a quadrature carrier signal by dividing the obtained clock signal, and is reset to a predetermined internal state by the clear signal;
An adaptive array, comprising: two analog mixer circuits for orthogonally modulating the I and Q transmission signals for the corresponding antenna into transmission signals by using the orthogonal carrier signal generated by the frequency dividing circuit. apparatus. The adaptive array device is applied to communication of a time division multiple access method,
The adaptive signal according to claim 4, wherein the clear signal generating means generates the clear signal prior to the start of each transmission time slot and the start of each reception time slot in which the adaptive array apparatus performs communication. Array device. An adaptive array device that includes a plurality of antennas and transmits and receives a quadrature modulated signal while forming a desired directivity,
A clock signal generating means for generating a clock signal serving as a reference of the carrier,
Analog quadrature demodulation means provided corresponding to each of the plurality of antennas and quadrature-demodulating a reception signal received by the corresponding antenna into an I reception signal and a Q reception signal;
Analog quadrature modulation means provided corresponding to each of the plurality of antennas and quadrature-modulating an I transmission signal and a Q transmission signal for the corresponding antenna into a transmission signal;
The desired reception directivity is formed by adjusting the phase and amplitude of each of the I reception signal and Q reception signal of each antenna, and the phase and amplitude of each of the I transmission signal and Q transmission signal for each antenna. And directivity processing means for forming a desired transmission directivity by adjusting
Each analog quadrature demodulation means,
Clock signal acquisition means for acquiring the clock signal,
A phase shift circuit that generates a quadrature carrier signal by shifting the phase of the obtained clock signal,
Using a quadrature carrier signal generated by the phase shift circuit, comprising two analog mixer circuits for quadrature demodulating the reception signal received by the corresponding antenna into an I reception signal and a Q reception signal,
Each analog quadrature modulation means,
Clock signal acquisition means for acquiring the clock signal,
A phase shift circuit that generates a quadrature carrier signal by shifting the phase of the obtained clock signal,
An adaptive array, comprising: two analog mixer circuits that quadrature-modulate the corresponding I and Q transmission signals for the antenna into transmission signals using the quadrature carrier signals generated by the phase shift circuit. apparatus. The adaptive array apparatus according to claim 4, wherein each of the quadrature demodulation units and the quadrature modulation units directly modulate and directly demodulate a transmission / reception signal, respectively.

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