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JP2004247611A - Semiconductor device mounted board and manufacturing method of same - Google Patents

Semiconductor device mounted board and manufacturing method of same Download PDF

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Publication number
JP2004247611A
JP2004247611A JP2003037421A JP2003037421A JP2004247611A JP 2004247611 A JP2004247611 A JP 2004247611A JP 2003037421 A JP2003037421 A JP 2003037421A JP 2003037421 A JP2003037421 A JP 2003037421A JP 2004247611 A JP2004247611 A JP 2004247611A
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Japan
Prior art keywords
semiconductor element
circuit board
electrode
opening
sealing resin
Prior art date
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JP2003037421A
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Japanese (ja)
Inventor
Yoshiharu Sanagawa
佳治 佐名川
Shinobu Kida
忍 木田
Masao Kubo
雅男 久保
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Panasonic Electric Works Co Ltd
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Matsushita Electric Works Ltd
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Priority to JP2003037421A priority Critical patent/JP2004247611A/en
Publication of JP2004247611A publication Critical patent/JP2004247611A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/1134—Stud bumping, i.e. using a wire-bonding apparatus
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections

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  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
  • Wire Bonding (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device mounted board and its manufacturing method wherein sealing resin can be prevented from flowing into an opening of a circuit board which a light receiving surface or a light emission surface of a semiconductor device comprising an optical device faces, and electromagnetic waves are unlikely to suffer from irregular reflection at the opening. <P>SOLUTION: The circuit board 2 includes the opening 3 through which light passes, and a protruded part 8 integrally protruding so as to surround the entire periphery of the opening 3 is provided on the surface of the circuit board in the vicinity of the opening 3, and further an electrode part 5 is formed on the outside of a portion surrounded by the protruded part 8. The semiconductor device 3 such as a solid state imaging device is disposed upward the protruded part 8 of the circuit board 2 so as to permit an imaging face thereof to face the opening 3, and is electrically connected to an electrode 11 provided on an opposite face thereof on the side of the circuit board 2 through a gold bump 4 interposed between it and the electrode part 5. The sealing resin 7 seals a junction portion composed of the electrode 11, the gold bump 4, and the electrode part 5. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

【０００１】
【発明の属する技術分野】
本発明は、固体撮像素子等の光素子からなる半導体素子を実装した半導体素子実装基板及びその製造方法に関するものである。
【０００２】
【従来の技術】
従来、光素子の実装構造体としては、実装される半導体素子の受光面に対向するように回路基板に形成した開口部を囲むフィルム状の樹脂製隔離壁を形成し、この隔離壁で隔離壁で開口部周辺に注入する封止樹脂を開口部から流れ出るのを防ぐようにしたものがある。（例えば特許文献１）
【０００３】
【特許文献１】
特開２００１−２５０８８９号公報（段落番号００６１参照）
【０００４】
【発明が解決しようとする課題】
上記従来例の場合、隔離壁がフィルム状樹脂であるため、注入される封止樹脂の硬化時に開口部側に撓み、隔離壁で囲繞された空間の内径が狭くなったり、内周面に変形が生じ、そのため電磁波の乱反射が生じ易くなって光ノイズが増加するという問題があった。
【０００５】
本発明は、上記の点に鑑みて為されたもので、その目的とするところは、光素子からなる半導体素子の受光面や発光面が臨む回路基板の開口部に封止樹脂が流れ込むのを防ぐことができる上に、開口部での電磁波の乱反射が生じにくい半導体素子実装基板及びその半導体素子実装基板の製造方法を提供することにある。
【０００６】
【課題を解決するための手段】
上述の目的を達成するために、請求項１の半導体素子実装基板の発明では、電磁波が通過する開口部を備え、該開口部の近傍の表面に前記開口部の一部乃至全周を囲むように一体突出させた凸部を設けるとともに、該凸部が囲う部位の外側に電極部を形成した回路基板と、
前記開口部に受光面若しくは発光面が臨むように前記回路基板の凸部上方に配置され、前記回路基板側に対向する面に設けた電極と前記電極部との間にバンプを介在させて電気的に接合した光素子からなる半導体素子と、から成り、
前記電極、前記バンプ及び前記電極部からなる接合部位を封止樹脂で封止していることを特徴とする。
【０００７】
請求項２の半導体素子実装基板の発明では、請求項１の発明において、前記回路基板として、少なくとも前記封止樹脂が塗布硬化される部位に対応する前記凸部の上端部に前記半導体素子の対向面に圧接する緩衝部を設けている回路基板を用いていることを特徴とする。
【０００８】
請求項３の半導体素子実装基板の発明では、請求項２の発明において、前記緩衝部の材料として前記回路基板の樹脂材料の弾性率よりも小さい材料を用いていることを特徴とする。
【０００９】
請求項４の半導体素子実装基板の発明では、請求項２又は３の発明において、前記緩衝部の材料として熱膨張率が前記封止樹脂の熱膨張率よりも大きい材料を用いたことを特徴とする。
【００１０】
請求項５の半導体素子実装基板の発明では、請求項２乃至４の何れかの発明において、前記緩衝部の材料としてガラス転移温度が前記封止樹脂の硬化温度よりも低い樹脂材料を用いたことを特徴とする。
【００１１】
請求項６の半導体素子実装基板の発明では、請求項２又は３の発明において、前記緩衝部を下方にスライド可能に上記凸部の上端部に設けていることを特徴とする。
【００１２】
請求項７の半導体素子実装基板の発明では、請求項２乃至６の何れかの発明において、前記緩衝部の上面の高さ位置を塗布時の封止樹脂の上面の高さ位置より高くしていることを特徴とする。
【００１３】
請求項８の半導体素子実装基板の発明では、請求項２の発明において、前記記緩衝部を前記凸部の上端部に全周に亘って一体に上方へ突出形成するとともに、前記緩衝部の幅寸法を、前記凸部の幅寸法より小さく形成していることを特徴とする。
【００１４】
請求項９の半導体素子実装基板の発明では、請求項８の発明において、前記凸部及び前記緩衝部を含めた前記回路基板が射出成形されたものであって、その樹脂材料として、前記緩衝部の前記幅寸法より大きな径のフィラーを混入した樹脂材料を用いていることを特徴とする。
【００１５】
請求項１０の半導体素子実装基板の発明では、請求項８又は９の何れかの発明において、前記緩衝部を外側に傾斜させていることを特徴とする。
【００１６】
請求項１１の半導体素子実装基板の発明では、請求項８の発明において、前記緩衝部の突出位置より外側に位置する前記凸部の上端部に、前記緩衝部の高さと略同じ高さの別の緩衝部を全周に亘って一体に突出形成していることを特徴とする。
【００１７】
請求項１２の半導体素子実装基板の発明では、請求項８の発明において、前記緩衝部の下端から上端までの高さ寸法を、上記凸部の上端開口縁から前記緩衝部の下端までの最短距離より短い寸法としていることを特徴とする。
【００１８】
請求項１３の半導体素子実装基板の発明では、請求項８乃至１２の何れかの発明において、前記緩衝部の一部に上端より下端方向に切り欠いた切欠部を形成していることを特徴とする。
【００１９】
請求項１４の半導体素子実装基板の発明では、請求項８乃至１３の何れかの発明において、前記緩衝部の幅寸法を略１０乃至略５０μｍとしていることを特徴する。
【００２０】
請求項１５の半導体素子実装基板の発明では、請求項１乃至１４の何れかの発明において、前記電極部を回路基板の表面より上方へ突出せる凸形状に形成していることを特徴とする。
【００２１】
請求項１６の半導体素子実装基板の発明では、請求項１乃至１５の何れかの発明において、前記緩衝部の少なくとも上端近傍の内周面を黒色としていることを特徴とする。
【００２２】
請求項１７の半導体素子実装基板の製造方法の発明では、電磁波が通過する開口部を備え、該開口部の近傍の表面に前記開口部の一部乃至全周を囲むように一体突出させた凸部を設けるとともに、該凸部が囲う部位の外側に電極部を形成した回路基板と、
前記開口部に受光面若しくは発光面が臨むように前記回路基板の凸部上方に配置され、前記回路基板側に対向する面に設けた電極と前記電極部との間にバンプを介在させて電気的に接合した光素子からなる半導体素子と、から成り、
前記電極、前記バンプ及び前記電極部からなる接合部位を封止樹脂で封止している半導体素子実装基板の製造方法において、
前記凸部の外側周辺で且つ前記電極部を内包するように前記回路基板表面に封止樹脂を塗布する工程と、
前記凸部の上端部に突出形成した緩衝部に前記半導体素子を圧接させて前記開口部に半導体素子の受光面若しくは発光面が臨むように半導体素子を配置し、且つ前記電極部に前記半導体素子の電極をバンプを介して圧接させる工程と、
前記封止樹脂を硬化させ、前記半導体素子の電極、バンプ、回路基板の電極部による接合部位を封止樹脂で封止する工程とから成ることを特徴とする。
【００２３】
請求項１８の半導体素子実装基板の製造方法の発明では、電磁波が通過する開口部を備え、該開口部の近傍の表面に前記開口部の一部乃至全周を囲むように一体突出させた凸部を設けるとともに、該凸部が囲う部位の外側に電極部を形成した回路基板と、
前記開口部に受光面若しくは発光面が臨むように前記回路基板の凸部上方に配置され、前記回路基板側に対向する面に設けた電極と前記電極部との間にバンプを介在させて電気的に接合した光素子からなる半導体素子と、から成り、
前記電極、前記バンプ及び前記電極部からなる接合部位を前記半導体素子と前記回路基板との間で塗布させた封止樹脂により封止する半導体素子実装基板の製造方法において、
前記電極部の外側に位置する回路基板の表面に前記電極部の外側部に沿うように第１の封止樹脂を塗布する工程と、
この塗布後に前記半導体素子を前記凸部の上部に接しないように前記電極をバンプを介して前記電極部に圧接させながら第１の封止樹脂を硬化させて半導体素子を仮実装する工程と、
この仮実装の後、前記電極部と前記凸部との間の前記回路基板表面に前記電極部に沿うように第２の封止樹脂を塗布して硬化させ半導体素子を本実装する工程とから成ることを特徴とする。
【００２４】
請求項１９の半導体素子実装基板の製造方法の発明では、請求項１８の発明において、前記本実装の工程における封止樹脂注入時に前記開口部内を加圧することを特徴とする。
【００２５】
請求項２０の半導体素子実装基板の製造方法の発明では、請求項１８の発明において、前記加圧は、前記開口部を密閉状態とした後、前記開口部内の空気を加熱して空気を膨張させることで行うことを特徴とする。
【００２６】
請求項２１の半導体素子実装基板の製造方法の発明では、請求項１８乃至２０の何れかの発明において、前記回路基板として、凸部と前記電極部との間の表面に凹溝を形成している回路基板を用いることを特徴とする。
【００２７】
請求項２２の半導体素子実装基板の製造方法の発明では、請求項１８乃至２１の何れかの発明において、前記回路基板として、前記凸部と前記電極部との間の表面に前記凸部と並行するように別の凸部を形成している回路基板を用いることを特徴とする。
【００２８】
請求項２３の半導体素子実装基板の製造方法の発明では、電磁波が通過する開口部を備え、該開口部の近傍の表面に前記開口部の一部乃至全周を囲むように一体突出させた凸部を設けるとともに、該凸部が囲う部位の外側に電極部を形成した回路基板と、
前記開口部に受光面若しくは発光面が臨むように前記回路基板の凸部上方に配置され、前記回路基板側に対向する面に設けた電極と前記電極部との間にバンプを介在させて電気的に接合した光素子からなる半導体素子と、から成り、
前記電極、前記バンプ及び前記電極部からなる接合部位を樹脂で封止する半導体素子実装基板の製造方法において、
前記凸部の外側周辺の前記回路基板表面に、前記電極部を内包するように載置するとともに加圧・加熱により異方性導電フィルムを前記回路基板表面に貼り付ける工程と、
この工程後に、前記半導体素子の前記電極に形成しているバンプを異方性導電フィルムを貫通させて前記電極部に圧接させながら半導体素子を異方性導電フィルム上に載置し、加圧・加熱により異方性導電フィルムの上面に半導体素子を貼り付け固定し且つ異方性導電フィルムで前記電極、バンプ、電極部からなる接合部を封止する工程と、から成ることを特徴とする。
【００２９】
【発明の実施の形態】
以下本発明を実施形態により説明する。
【００３０】
（実施形態１）
本実施形態は、本発明の基本となるものであって、半導体素子実装基板１０の製造工程を概説する。
【００３１】
図１は光素子、例えば撮像素子からなるフェースダウンタイプの半導体素子（半導体チップ）１を樹脂成形された立体回路基板（ＭＩＤ；Ｍｏｌｄｅｄ Ｉｎｔｅｒｃｏｎｅｃｔｉｏｎ Ｄｅｖｉｃｅ）からなる回路基板２に実装して半導体素子実装基板１０を得るまでの製造工程を示しており、この図示例ではまず図１（ａ）は、回路基板２に対して実装する半導体素子１を整列させ、半導体素子１の受光部側を回路基板２の開口部３に対置するとともに、受光部側の面（以後下面という）に設けた各電極（図示せず）に形成してある金バンプ４を、回路基板２の表面（以下上面という）側に設けた電極部５に対向させる整列工程を示す。尚電極部５は回路基板２の上面に形成した回路パターン６の一部で構成される。
【００３２】
この整列工程を経た後、電極部５を内包する形で開口部３の周辺に封止樹脂７を塗布し（図１（ｂ））、この塗布後に上記金バンプ４を電極部５に圧接させて電極部５と半導体素子１の電極とを電気的に接続するように半導体素子１を回路基板２上に載置実装する（図１（ｃ））。この実装後封止樹脂７を硬化させて封止樹脂７で電極部５と金バンプ４との接合部位を内包し封止することで、所望の半導体素子実装基板１０が完成することになる。
【００３３】
このような製造工程において半導体素子１を回路基板２の表面に載置実装する際に、硬化前の封止樹脂７が半導体素子１の下面に押されて周辺へ広がることになる。この際に開口部３内に封止樹脂７が流れ込む恐れがある。
【００３４】
そこで本実施形態に用いる回路基板２は、開口部３を囲むように環状の凸部８を一体に形成し、この凸部８が堰となって、封止樹脂７が開口部３側へ流れ込むのを防ぐようになっている。
【００３５】
また凸部８は回路基板２と同じ樹脂材料で成形されたものであって、その剛性は高く、そのため半導体素子１の回路基板２への実装時や封止樹脂７の硬化時に生じる凸部８への応力によって凸部８の内周面が変形することも殆どなく、それにより電磁波の乱反射などが生じ難く、そのために光ノイズの増加も殆どない。
【００３６】
尚本実施形態の回路基板２及び凸部８の樹脂材料としては、芳香族ポリアミド系樹脂（例えば線膨張率が２５ｐｐｍ／℃、弾性率が１３ＧＰａ、ガラス転移温度が１２０℃のポリフタルアミド）を用いている。
【００３７】
（実施形態２）
上記実施形態１では実装される半導体素子１の下面と凸部８との間に微小な隙間があるため封止樹脂７の塗布量によっては開口部３側へ漏洩する恐れがある。そこで、本実施形態に用いる回路基板２としては図２（ａ）（ｂ）に示すように上記の凸部８の上端面に緩衝部９を突出形成したものを用いる。
【００３８】
この緩衝部９は例えば回路基板２の樹脂材料とは異なる別の樹脂材料を用いられ、二色成形によりで凸部８の上端部に一体的に突出形成されている。
【００３９】
而して本実施形態では半導体素子実装基板３を製造するに当たっては、封止樹脂塗布工程において、図３（ａ）及び図４（ａ）に示すように環状の凸部８の各辺近傍の回路基板２上面に封止樹脂７を塗布する。
【００４０】
次に受光部周辺の半導体素子１の下面を緩衝部９の上端面に密接させて、半導体素子１を押し下げる。これにより半導体素子１の下面に緩衝部９が圧接した状態で緩衝部９が撓みながら各電極１１に形成してある金バンプ４が回路基板２の上面の対応する電極部５に圧接して電極１１と対応する電極部５との間を電気的に接合する。半導体基板１の押し下げにより半導体素子１の下面により凸部８の周辺に塗布した封止樹脂７が押し流されて凸部８周辺の回路基板２の表面に広がり、凸部８周辺の半導体基板１と回路基板２との間に充満し、電極１１、金バンプ４、電極部５からなる接合部位を封止樹脂７に内包させる。
【００４１】
この状態で２１０℃で１０秒間加熱して封止樹脂７を硬化させることで、回路基板２の上面と半導体素子１の下面との間で硬化した封止樹脂７により上記接合部位を封止した所定の半導体素子実装基板１０が完成することになる（図３（ｂ）、４（ｂ）参照）。
【００４２】
尚金バンプ４一個当たりの荷重の大きさを４０ｇ〜１５０ｇとしている。
【００４３】
本実施形態では、緩衝部９が半導体素子１の下面に密接するため、半導体素子１を押し下げながら金バンプ４を電極部５に圧接させる際に、封止樹脂７が凸部８を乗り越えて開口部３側へ流れ込むことがない。
【００４４】
例１
凸部８を含む回路基板２の樹脂材料として弾性率が１３Ｇｐａの芳香族ポリイミド系樹脂（例えばポリフタルアミド）を用い、他方緩衝部９の樹脂材料として弾性率が５Ｇｐａのエポキシ系樹脂を用いた。
【００４５】
これにより半導体素子１の下面に緩衝部９が弾接して密着度を高め封止樹脂７の開口部３側への漏洩を確実に防止でき、また半導体素子１の実装時の緩衝能力が高くなり半導体素子１が傷つけくのを防止することができた。
【００４６】
例２
上記例１では回路基板２の樹脂材料として用いる樹脂の弾性率に比して弾性率が小さい樹脂を緩衝部９の樹脂材料として用いたが、本実施例では、凸部８を含む回路基板２の樹脂材料として熱膨張率が２５ｐｐｍ／℃の芳香族ポリイミド系樹脂（例えばポリフタルアミド）を用い、他方緩衝部９の樹脂材料として熱膨張率が３５ｐｐｍ／℃のエポキシ系樹脂を用いた。
【００４７】
これにより緩衝部９が半導体素子１に負荷する応力が、封止樹脂７の硬化後の冷却時の温度加工による緩衝部９と封止樹脂７との間の熱膨張差により緩和されるので、応力の半導体素子１へ影響を軽減して信頼性が向上させることができた。
【００４８】
例３
上記例１では弾性率に、また実施例２では熱膨張率に着目して、凸部８を含めた回路基板２の樹脂材料と、緩衝部９の樹脂材料とを選定しているが、本実施例では、ガラス転移温度に着目し、凸部８を含む回路基板２の樹脂材料としてガラス転移温度が１２０℃の芳香族ポリイミド系樹脂（例えばポリフタルアミド）を、また緩衝部９の樹脂材料としてガラス転移温度が１３８℃のエポキシ系樹脂を用いた。
【００４９】
これにより封止樹脂７を硬化させるときに、同時に半導体素子１、緩衝部９間の応力が緩和され、応力の半導体素子１へ影響を軽減して信頼性が向上させることができた。
【００５０】
尚上記例１〜３の夫々の特性を全て持つを芳香族ポリイミド系樹脂を用いて凸部８を含む回路基板２を、また例１〜３の夫々の特性を全て持つエポキシ系樹脂を用いて緩衝部９を夫々形成すれば、例１〜３の全ての特徴を有する半導体素子実装基板１０を得ることができる。
【００５１】
また上記各例１〜３において回路基板２の下面から緩衝部９の上端面までの高さ寸法Ｌ２を、図５に示すように回路基板２の上面に塗布する封止樹脂７の上端の回路基板２の下面からの高さ寸法Ｌ１より高くすると、封止樹脂７が回路基板２の実装時に押し流されても、開口部３側へ流れ込むのを確実に防止できる。
【００５２】
更に図６に示すように緩衝部９の内周面に黒色のフィルムＦを貼り付け内周面での乱反射を抑制し、光ノイズの増加を防ぐようにしても良い。このフィルムＦを貼り付ける構成は、上記実施形態１は勿論のこと、後述する実施形態３以降に適用できる構成であるので、図６の例に限定されるものではない。
【００５３】
（実施形態３）
上記実施形態１では、凸部８に緩衝部９を二色成形により一体的に突出形成した回路基板２を用いているが、本実施形態では図７（ａ）に示すように凸部８の上端部の周方向に全周に亘るように例えば上向き開口の環状の凹溝１２を形成し、この溝１２に環状の緩衝部９を嵌合して凸部８の上端部に取り付けた回路基板２を用いる。
【００５４】
この場合緩衝部９としては、例えばシリコン系ゴムのような弾性材料を用いて、図７（ｂ）に示すように直径０．３ｍｍという微小なものを用い、半導体素子１の実装前は凸部８の上方に高さｈの略２／３程度を突出させた状態で溝１２に保持させる。
【００５５】
而して本実施形態では、半導体素子１を実装する工程では半導体素子１の下面が緩衝部９を押圧して、緩衝部９を凹溝１２内に押し下げ金バンプ５を回路基板２側の電極部５に圧接させる。
【００５６】
従って、半導体素子１と緩衝部９との間の応力の発生を防止でき、そのため応力の半導体素子１へ影響がなく信頼性が向上させることができるのである。
【００５７】
尚封止樹脂７の塗布、硬化の夫々工程は実施形態２に準ずるので、ここでの説明は省略する。
【００５８】
（実施形態４）
上記実施形態２に用いる回路基板２では緩衝部９を凸部８とは異なる樹脂材料で形成しているが、本実施形態では、図８（ａ）に示すように凸部８，緩衝部９を、同じ樹脂材料（上記実施形態１，２と同様な芳香族ポリイミド系樹脂＜ポリフタルアミド＞）を用いて一体に形成した回路基板２を用い、例えば図８（ｂ）で示すように凸部８の幅ａを０．１ｍｍ、厚さｄを０．１ｍｍとし、緩衝部９の厚さ（幅）ｂを０．０５ｍｍ、緩衝部９の高さｅを０．１ｍｍ〜０．２ｍｍとし、更に回路基板２の下面から緩衝部９の上端までの高さｃを１．３ｍｍとし、凸部８には剛性を、緩衝部９には可撓性を持たせている。
【００５９】
而して本実施形態によれば、緩衝部９は、上記実施形態１乃至３の緩衝部９と同様に半導体素子１の実装工程時に半導体素子１を傷つけることなく、半導体素子１の下面に圧接し、封止樹脂７の開口部３側への漏洩を防止する。
【００６０】
尚封止樹脂７の塗布、硬化の夫々工程は実施形態２に準ずるので、ここでの説明は省略する。
【００６１】
また凸部８，回路基板２と同じ樹脂で成形できるため、緩衝部９，凸部８を含む回路基板２の成形が容易に行える。
【００６２】
また一体形成する緩衝部９の厚さ（幅）としては、略０．０１ｍｍ〜略０．０５ｍｍであれば、半導体素子１の実装時に押し流される封止樹脂７からの圧力によっても割れが生じず、しかも半導体素子１を傷つけることがないことを本発明者らは確認しており、そのため上述の０．０５ｍｍには限定されるものではない。
【００６３】
（実施形態５）
上記実施形態４では同じ樹脂材料を用いて緩衝部９，凸部８とともに射出成形により形成された回路基板２を用いているが、本実施形態では、図９に示すように樹脂材料に混入する例えばシリカ等のフィラー１３（図では●により示す）に緩衝部９の幅以上の粒径を持つものを使用して成形した回路基板２を用いる点に特徴があり、この回路基板２は緩衝部９，凸部８を含む回路基板２を射出成形する際に緩衝部９にフィラー１３が入らず、緩衝部９の剛性が小さくて可撓性が富んでいる。
【００６４】
而して本実施形態によれば、半導体素子１の実装工程において、半導体素子１の下面を緩衝部９の上端に圧接させたときに、緩衝部９の剛性が小さいため半導体素子１を傷つけることがなく、また半導体素子１の下面に密接し、封止樹脂７の開口部３側への漏洩を防止するという役割を果たす。
【００６５】
尚封止樹脂７の塗布、硬化の夫々工程は実施形態２に準ずるので、ここでの説明は省略する。
【００６６】
また凸部８，回路基板２と同じ樹脂で成形できるため、緩衝部９，凸部８を含む回路基板２の成形が容易に行える。
【００６７】
（実施形態６）
上記実施形態４，５に用いる回路基板２は緩衝部９を凸部８の上面に垂立させているが、本実施形態に用いる回路基板２は図１０（ａ）（ｂ）に示すよう下端から上端にかけて外方向へ傾斜させて緩衝部９を形成している。尚傾斜角度θとしては例えば３０°程度としている。
【００６８】
緩衝部９の幅寸法などは実施形態５の回路基板２に準ずるものとする。またフィラー１３を樹脂材料に混入する場合には、粒径が緩衝部９の幅寸法より大きなフィラーを用いる。
【００６９】
而して本実施形態によれば、半導体素子１の実装工程において、半導体素子１の下面を緩衝部９の上端に圧接させたときに、緩衝部９が内側に倒れることがなく、そのため封止樹脂７が緩衝部９を越えて内側へ漏出するのを確実に防止できる。
【００７０】
尚封止樹脂７の塗布、硬化の夫々工程は実施形態２に準ずるので、ここでの説明は省略する。
【００７１】
（実施形態７）
上記実施形態４〜６に用いる回路基板２は緩衝部９はその内周面が凸部８の内周面と連続するように一体形成しているが、本実施形態では図１１（ａ）に示すように緩衝部９の外側に位置する凸部８の上端面に緩衝部９と同様な環状の緩衝部９’を一体に形成した回路基板２を用いる。つまり緩衝部９，９’で二重の緩衝部を構成したもの回路基板２を用いる。尚両緩衝部９，９’は例えば図１１（ｂ）に示すように夫々の厚み（幅）寸法ａ，ａ’を０．０５ｍｍ、両緩衝部９，９’間の距離ｂを０．１ｍｍ、高さ寸法ｃを０．１ｍｍ〜０．２ｍｍとしている。
【００７２】
而して本実施形態によれば、半導体素子１の実装工程において、半導体素子１の下面を緩衝部９の上端に圧接させる際に、半導体素子１の下面により押し流される封止樹脂７を外側の緩衝部９’によって規制する。
【００７３】
更に万が一封止樹脂９’を越えて内側へ封止樹脂７が漏れ出たとしても両緩衝部９’，９間に滞留させることで、緩衝部９を越えて内側へ封止樹脂７が漏れ出るのを防ぐ。これにより封止樹脂７が開口部３側へ漏れ出るのを確実に防止できるのである。また半導体素子実装基板の製造生産性を向上させることもできる。
【００７４】
尚封止樹脂７の塗布、硬化の夫々工程は実施形態２に準ずるので、ここでの説明は省略する。
【００７５】
（実施形態８）
上記実施形態４に用いる回路基板２は緩衝部９の内周面が凸部８の内周面と同一面となるように緩衝部９を突出形成しているが、本実施形態では図１２（ａ）に示すように凸部８の上端面の内縁から離れた位置から一体突出させ、半導体素子１を緩衝部９に圧接したときに、緩衝部９が万が一に内側へ倒れてもその先部が開口部３側へはみ出さないようにした回路基板２を用いる。
【００７６】
図１２（ｂ）は本実施形態に用いる回路基板２の一例を示しており、凸部８の内縁から緩衝部９の外縁までの距離Ｌ２を、緩衝部９の高さＬ１の寸法より大きくし、緩衝部９が内側に倒れても凸部８の内縁より、緩衝部９の先部がはみ出さないようにしてある。尚本例ではＬ１＝０．２ｍｍ、Ｌ２＝１．５ｍｍとし、緩衝部９自体の厚さＬ３を０．０５ｍｍとしている。
【００７７】
而して本実施形態によれば、半導体素子１の実装工程において、半導体素子１の下面を緩衝部９の上端に圧接させたときに、半導体素子１の下面で押し流される封止樹脂７を緩衝部９により規制して、内側へ漏れ出るの防ぐ。
【００７８】
また緩衝部９が内側に倒れてもその先部が凸部８の内縁より内側にはみ出すことがない。従って緩衝部９の開口部３側へのはみ出しが、光ノイズの原因となるのを防ぐことができる。
【００７９】
尚封止樹脂７の塗布、硬化の夫々工程は実施形態２に準ずるので、ここでの説明は省略する。
【００８０】
（実施形態９）
上記実施形態２乃至８に用いる回路基板２は緩衝部９（及び９’）を環状に形成しているが、本実施形態に用いる回路基板２は、図１３に示すように実施形態４の構成において、緩衝部９に適宜間隔で上下方向の切欠いた切欠部１４を形成している。
【００８１】
尚図１３の例では実施形態４の回路基板２と同様に緩衝部９を、凸部８，回路基板２と同じ樹脂を用いて一体成形したものであるが、実施形態２、３の回路基板２のように別の樹脂材料を用いて二色成形により緩衝部９を形成した回路基板２の場合にも本実施形態に用いる回路基板２のように切欠部１４を設けても良い。また実施形態５〜８の構成にも適用しても良いの勿論である。
【００８２】
尚半導体素子実装基板の製造工程については実施形態２に準ずるので、ここでの説明は省略する。
【００８３】
（実施形態１０）
上記実施形態２乃至９の実施形態では、緩衝部９（及び９’）に、半導体素子１の下面を圧接させて半導体素子１を実装することで、封止樹脂７が凸部８を越えて開口部３側へ漏れ出るのを防いでいる。一方実施形態１では、半導体素子１を実装する際に、先に塗布されている封止樹脂７が押し流されて開口部３側へ漏れ出るのを凸部８のみで堰き止めるので、実施形態２〜９に比して封止樹脂７の漏れ出るのを防ぐ能力はやや劣る。
【００８４】
そこで本実施形態は、実施形態１と同様に開口部３を囲むように凸部８を形成しているが緩衝部９を設けていない回路基板２を用いながら確実に封止樹脂７が開口部３側へ漏れ出ないようにした製造方法にかかる。
【００８５】
つまり本実施形態は、図１４（ａ）、図１５（ａ）に示すように凸部８を一体成形した回路基板２を用い、まず半導体素子１を実装する前の工程において、両側に設けた電極部５よりも外側の回路基板２上面に一部の電極部５上に乗るように第１の封止樹脂７ａ（例えば粘度が４０Ｐａ・ｓのエポキシ系樹脂）を夫々塗布する。この塗布工程終了後に半導体素子１の各電極１１に形成した金バンプ４を対応する電極部５に圧接させる。このとき半導体素子１の両側の下面に封止樹脂７ａが広がるように接することになる。この状態で２１０℃で１０秒間加熱し封止樹脂７ａを硬化させ、図１４（ｂ）、図１５（ｂ）に示すように半導体基板１を金バンプ４と電極部５の接合部位の外側から仮封止する。
【００８６】
この仮封止の工程が終了した後接合部位と凸部８の間の空間に図１４（ｃ）、図１５（ｃ）に示すように第２の封止樹脂７ｂ（例えば粘度が１５Ｐａ・ｓのエポキシ系樹脂）を注入塗布する。この注入塗布後に１００℃で１時間加熱した後、更に１５０℃で３時間加熱して第２の封止樹脂７ｂを硬化させ、接合部位を内側から封止する。この際第２の封止樹脂７ｂが第１の封止樹脂７ａに接する部分は第２の封止樹脂７ｂが硬化することで一体となる。
【００８７】
これにより半導体素子１を金バンプ４と電極部５の接合部位が第１，第２の封止樹脂７ａ、７ｂにより本封止されて所定の半導体素子実装基板３が完成することになる。
【００８８】
以上のように本実施形態の製造方法によれば、内側に塗布する第２の封止材料７ｂは半導体素子１からの圧力を受けることがないため、押し流されて凸部８を越えて開口部３側へ漏れ出ることがなく、また緩衝部を形成する必要がないため、生産性が向上する。
【００８９】
（実施形態１１）
本実施形態は、上記実施形態１０において、第２の封止樹脂７ｂを注入塗布する際に、図１６に示すように開口部３を介して加圧空気Ａを回路基板２の下面側から開口部３内に送り込んで開口部３内を加圧するとともに、更に凸部８で囲まれた空間の上面開口より加圧空気Ａを半導体素子１と回路基板２との間に噴出させて第２の封止樹脂７ｂが凸部８を越えて開口部３内へ流れ込むのを防ぐことができる。
【００９０】
尚仮封止までの工程及び、第２の封止樹脂７ｂの塗布後の硬化工程は実施形態１０に準ずるものとする。
【００９１】
（実施形態１２）
上記実施形態１１では、第２の封止樹脂７ｂを注入塗布する際に、開口部３内に加圧空気を送り込んでいたが、本実施形態では、図１７に示すように第２の封止樹脂７ｂを注入塗布する前に開口部３の下面開口を例えばポリイミド製のシール１５で閉塞して１００℃で１時間程度加熱して開口部３内の空気を加熱膨張させて、開口部３を大気に対して正圧とする。従って実施形態１１の場合と同様に、半導体素子１と回路基板２との間に第２の封止樹脂７ｂを注入塗布する際に、第２の封止樹脂７ｂが凸部８を越えて開口部３内へ流れ込むのを防ぐことができる。
【００９２】
尚仮封止までの工程及び、第２の封止樹脂７ｂの塗布後の硬化工程は実施形態１０に準ずるものとする。
【００９３】
（実施形態１３）
本実施形態では、図１８に示すように凸部８の基部、特に第２の封止樹脂７ｂを注入塗布する部位に対応する基部に少なくとも凹溝１６（例えば０．１ｍｍの深さの溝）を形成した回路基板２を用い、第２の封止樹脂７ｂを注入塗布させる際に、凸部８側へ流れようとうする第２の封止樹脂７ｂを凹溝１６で滞留させることで、第２の封止樹脂７ｂが凸部８を越えて開口部３内へ流れ込むのを防止するのである。
【００９４】
尚この回路基板２１を用いる製造方法は、上記実施形態１０〜１２の何れでも良い。
【００９５】
勿論この凹溝１６を設ける構成は、実施形態１〜９の何れにも適用できる。
【００９６】
（実施形態１４）
本実施形態では、図１９に示すように回路基板２１の凸部８と電極部５との間の上面、特に第２の封止樹脂７ｂを注入塗布する部位に対応する上面に少なくとも別の凸部８’を形成した回路基板２を用い、第２の封止樹脂７ｂを注入塗布さする際にこの凸部８’で封止樹脂７ｂの流れを規制し、仮に凸部８’を越えても両凸部８，８’間で第２の封止樹脂７ｂを滞留させて凸部８を越えるのを防止するようになっている。尚本実施形態においては凸部８，８’間の距離を０．０５ｍｍとしている。またこの回路基板２１を用いる製造方法は、上記実施形態１０〜１２の何れでも良い。
【００９７】
勿論この凹溝１６を設ける構成は、実施形態１〜９の何れにも適用できる。
【００９８】
（実施形態１５）
上記実施形態１〜１４は半導体素子１の電極１１に形成した金バンプ４と回路基板２１側の電極部５との接合部位を封止するのにエポキシ系の封止樹脂を用いているが、本実施形態はＡＣＦ（異方性導電フィルム）１７を封止樹脂として用いて接合部位を封止するものである。
【００９９】
この場合図２０（ａ）に示すようにまず中央部に凸部８が嵌り込む貫通孔１８を穿設し、厚さが凸部８の高さより大きなＡＣＦ１７を回路基板２上に載置した上で、押圧板１９を介して１００℃の雰囲気下で、１．０ＭＰａの圧力で３．０秒間加圧し、ＡＣＦ１７を回路基板２上に貼り付ける。この貼り付け工程が終了した後、半導体素子１を図２０（ｂ）に示すように電極１１に形成した金バンプ４が回路基板２の上面の電極部５に金バンプ一個当たり４０ｇ〜１５０ｇの荷重で圧接するよう加圧しながら回路基板２上に載置する。この際金バンプ４がＡＣＦ１７を突き抜ける。そしてその後２５０℃で１００秒間加熱してＡＣＦ１７で接合部位を封止するのである。
【０１００】
ここでＡＣＦ１７に圧力が加わることでＡＣＦ１７が側方へ膨らもうとするが、凸部８側では凸部８で規制されるため開口部３へははみ出ない。また凸部８の剛性により凸部８が開口部３側に変形することがなく、内周面の変形による光ノイズの増加もない。
【０１０１】
（実施形態１６）
上記実施形態１乃至１５の何れの電極部５も平坦な回路基板２の表面に形成しているが本実施形態は、図２１（ａ）に示すように断面が台形の凸状部２０を回路基板２の表面に一体形成し、この凸状部２０の表面に電極部５を形成することで、回路基板２の表面より上方へ電極部５を突出させて凸形状とした点に特徴がある。
【０１０２】
而して本実施形態では電極部５を凸状部２０の表面に形成して凸形状とすることで、封止樹脂７の厚みを増加させることができ、そのため封止樹脂７が硬化収縮時に電極部５と電極１１との接合部位に押し付ける力が増加して接合の信頼性が向上し、また半導体素子１と回路基板２との間の熱膨張差による電極剥離を防止することができる。
【０１０３】
図２１（ｂ）に示す凸状部２０の各辺ａ〜ｃの寸法は、実施例として、例えばａ＝０．１５ｍｍ、ｂ＝０．２ｍｍ、ｃ＝０．１５ｍｍに設定した。
【０１０４】
本実施形態１６の電極部５の構成は封止樹脂としてＡＣＦを用いる場合にも適用できるのは勿論である。
【０１０５】
上記各実施形態では凸部８を開口部３の全周を囲むように形成しているが、この凸部８は少なくとも封止樹脂７の塗布位置やＡＣＦ１７の貼り付け位置に対応する部位に突出形成すればよい。
【０１０６】
【発明の効果】
請求項１の半導体素子実装基板の発明では、電磁波が通過する開口部を備え、該開口部の近傍の表面に前記開口部の一部乃至全周を囲むように一体突出させた凸部を設けるとともに、該凸部が囲う部位の外側に電極部を形成した回路基板と、
前記開口部に受光面若しくは発光面が臨むように前記回路基板の凸部上方に配置され、前記回路基板側に対向する面に設けた電極と前記電極部との間にバンプを介在させて電気的に接合した光素子からなる半導体素子と、から成り、
前記電極、前記バンプ及び前記電極部からなる接合部位を封止樹脂で封止しているので、凸部が回路基板と同様にに硬くて剛性を持つことになって、凸部の形成位置周辺の強度が向上し、そのため半導体素子実装時や封止樹脂硬化時などにおいて生じる凸部への応力による変形が少なくなり、開口部の内周面の表面形状が維持され、そのため光ノイズの原因である開口部の内周面における電磁波の乱反射などが生じにくいという効果がある。
【０１０７】
請求項２の半導体素子実装基板の発明では、請求項１の発明において、前記回路基板として、少なくとも前記封止樹脂が塗布硬化される部位に対応する前記凸部の上端部に前記半導体素子の対向面に圧接する緩衝部を設けている回路基板を用いているので、半導体素子と緩衝部との密接により封止樹脂が開口部側に漏洩するのを確実に防ぐことができ、そのため生産性が向上するという効果がある。
【０１０８】
請求項３の半導体素子実装基板の発明では、請求項２の発明において、前記緩衝部の材料として前記回路基板の樹脂材料の弾性率よりも小さい材料を用いているので、半導体素子と緩衝部との密接により封止樹脂が開口部側に漏洩するのを一層確実に防ぐことができ、しかも緩衝部が半導体素子に圧接する際に半導体素子に傷が付かないという効果がある。
【０１０９】
請求項４の半導体素子実装基板の発明では、請求項２又は３の発明において、前記緩衝部の材料として熱膨張率が前記封止樹脂の熱膨張率よりも大きい材料を用いたので、緩衝部が半導体素子に負荷を加える応力が、封止樹脂の硬化後の冷却時の温度下降による緩衝部と封止樹脂との間の熱膨張差により緩和されるので、応力の影響を半導体素子に与えず、半導体素子の信頼性が向上する
請求項５の半導体素子実装基板の発明では、請求項２乃至４の何れかの発明において、前記緩衝部の材料としてガラス転移温度が前記封止樹脂の硬化温度よりも低い樹脂材料を用いたので、封止樹脂を硬化させるときに、同時に半導体素子、と緩衝部との間の応力が緩和され、そのため応力の影響を半導体素子に与えず、半導体素子の信頼性が向上するという効果がある。
【０１１０】
請求項６の半導体素子実装基板の発明では、請求項２又は３の発明において、前記緩衝部を下方にスライド可能に上記凸部の上端部に設けているので、フリップチップ実装時において半導体素子と緩衝部との間の応力の発生を防止でき、そのため応力の影響を半導体素子に与えず、半導体素子の信頼性が向上するという効果がある。
【０１１１】
請求項７の半導体素子実装基板の発明では、請求項２乃至６の何れかの発明において、前記緩衝部の上面の高さ位置を塗布時の封止樹脂の上面の高さ位置より高くしているので、封止樹脂が半導体素子に押し流された際に緩衝部の高さ位置に封止樹脂が至ることがなく、そのため封止樹脂の開口部側への漏洩を確実に防止でき、その結果生産性が向上するという効果がある。
【０１１２】
請求項８の半導体素子実装基板の発明では、請求項２の発明において、前記記緩衝部を前記凸部の上端部に全周に亘って一体に上方へ突出形成するとともに、前記緩衝部の幅寸法を、前記凸部の幅寸法より小さく形成しているので、緩衝部によって請求項２の発明と同様に封止樹脂の開口部側への漏洩を防ぐことができるのは勿論のこと、回路基板の成形時に凸部及び緩衝部も同時に同じ樹脂成形材料で成形することが可能となって回路基板の生産性が向上し、しかも緩衝部に可撓性を持たせることができるから、半導体素子が緩衝部に圧接したときにも半導体基板に傷を付けることがないという効果がある。
【０１１３】
請求項９の半導体素子実装基板の発明では、請求項８の発明において、前記凸部及び前記緩衝部を含めた前記回路基板が射出成形されたものであって、その樹脂材料として、前記緩衝部の前記幅寸法より大きな径のフィラーを混入した樹脂材料を用いているので、射出成形時に緩衝部にはフィラーが入らず、そのため凸部や回路基板の剛性を維持しながら緩衝部の剛性を弱くして可撓性を持たせることができ、そのため半導体素子が圧接したときにも半導体素子に傷を付けることがない緩衝部を回路基板の成形と同時により形成することができる。
【０１１４】
請求項１０の半導体素子実装基板の発明では、請求項８又は９の何れかの発明において、前記緩衝部を外側に傾斜させているので、半導体素子が緩衝部に圧接するときに、緩衝部が内側に倒れることがなく、そのため封止樹脂が開口部側に漏洩するのを確実に防止でき、生産性が向上するという効果がある。
【０１１５】
請求項１１の半導体素子実装基板の発明では、請求項８の発明において、前記緩衝部の突出位置より外側に位置する前記凸部の上端部に、前記緩衝部の高さと略同じ高さの別の緩衝部を全周に亘って一体に突出形成しているので、緩衝部が二重となることにより、封止樹脂が開口部側に漏洩するのを確実に防止でき、生産性が向上するという効果がある。
【０１１６】
請求項１２の半導体素子実装基板の発明では、請求項８の発明において、前記緩衝部の下端から上端までの高さ寸法を、上記凸部の上端開口縁から前記緩衝部の下端までの最短距離より短い寸法としているので、半導体素子を緩衝部に圧接させたときに、緩衝部が開口部側へはみ出すことがなく、そのため緩衝部のはみ出しが光ノイズの原因となるのを防ぐことができるという効果がある。
【０１１７】
請求項１３の半導体素子実装基板の発明では、請求項８乃至１２の何れかの発明において、前記緩衝部の一部に上端より下端方向に切り欠いた切欠部を形成ているので、半導体素子が緩衝部に圧接したときに緩衝部の切欠部間の部位が開くことになり、そのため半導体素子を緩衝部に小さな力で圧接させることで、所定の高さに半導体素子を実装可能となり、半導体素子の信頼性が向上するという効果がある。
【０１１８】
請求項１４の半導体素子実装基板の発明では、請求項８乃至１３の何れかの発明において、前記緩衝部の幅寸法を略１０乃至略５０μｍとしているので、半導体素子を緩衝部に圧接させる際に押し流される封止樹脂からの圧力によって割れが報じず、また半導体素子にも傷つけることなく半導体素子の実装ができるという効果がある。
【０１１９】
請求項１５の半導体素子実装基板の発明では、請求項１乃至１４の何れかの発明において、前記電極部を回路基板の表面より上方へ突出せる凸形状に形成しているので、封止樹脂７の厚みを増加させることができ、そのため封止樹脂７が硬化収縮時に電極部５と電極１１との接合部位に押し付ける力が増加して接合の信頼性が向上し、また半導体素子と回路基板２との間の熱膨張差による電極剥離を防止することができるという効果がある。
【０１２０】
請求項１６の半導体素子実装基板の発明では、請求項１乃至１５の何れかの発明において、前記緩衝部の少なくとも上端近傍の内周面を黒色としているので、乱反射等が生じにくくなり、ノイズの発生を防止できるという効果がある。
【０１２１】
請求項１７の半導体素子実装基板の製造方法の発明では、電磁波が通過する開口部を備え、該開口部の近傍の表面に前記開口部の一部乃至全周を囲むように一体突出させた凸部を設けるとともに、該凸部が囲う部位の外側に電極部を形成した回路基板と、
前記開口部に受光面若しくは発光面が臨むように前記回路基板の凸部上方に配置され、前記回路基板側に対向する面に設けた電極と前記電極部との間にバンプを介在させて電気的に接合した光素子からなる半導体素子と、から成り、
前記電極、前記バンプ及び前記電極部からなる接合部位を封止樹脂で封止している半導体素子実装基板の製造方法において、
前記凸部の外側周辺で且つ前記電極部を内包するように前記回路基板表面に封止樹脂を塗布する工程と、
前記凸部の上端部に突出形成した緩衝部に前記半導体素子を圧接させて前記開口部に半導体素子の受光面若しくは発光面が臨むように半導体素子を配置し、且つ前記電極部に前記半導体素子の電極をバンプを介して圧接させる工程と、
前記封止樹脂を硬化させ、前記半導体素子の電極、バンプ、回路基板の電極部による接合部位を封止樹脂で封止する工程とから成るので、請求項２の発明の効果を奏する半導体素子実装基板を得ることができる。
【０１２２】
請求項１８の半導体素子実装基板の製造方法の発明では、電磁波が通過する開口部を備え、該開口部の近傍の表面に前記開口部の一部乃至全周を囲むように一体突出させた凸部を設けるとともに、該凸部が囲う部位の外側に電極部を形成した回路基板と、
前記開口部に受光面若しくは発光面が臨むように前記回路基板の凸部上方に配置され、前記回路基板側に対向する面に設けた電極と前記電極部との間にバンプを介在させて電気的に接合した光素子からなる半導体素子と、から成り、
前記電極、前記バンプ及び前記電極部からなる接合部位を前記半導体素子と前記回路基板との間で塗布させた封止樹脂により封止する半導体素子実装基板の製造方法において、
前記電極部の外側に位置する回路基板の表面に前記電極部の外側部に沿うように第１の封止樹脂を塗布する工程と、
この塗布後に前記半導体素子を前記凸部の上部に接しないように前記電極をバンプを介して前記電極部に圧接させながら第１の封止樹脂を硬化させて半導体素子を仮実装する工程と、
この仮実装の後、前記電極部と前記凸部との間の前記回路基板表面に前記電極部に沿うように第２の封止樹脂を塗布して硬化させ半導体素子を本実装する工程とから成るので、開口部への封止樹脂の漏洩を防止しながら半導体素子を実装することができ、特に回路基板の凸部側に半導体素子に圧接させる緩衝部などを設ける必要がなく、そのため半導体素子が傷つけく恐れが全くなく、生産性が向上するという効果がある。
【０１２３】
請求項１９の半導体素子実装基板の製造方法の発明では、請求項１８の発明において、前記本実装の工程における封止樹脂注入時に前記開口部内を加圧するので第２の封止樹脂の開口部への漏洩を確実に防止することができ、生産性を一層向上させることができるという効果がある。
【０１２４】
請求項２０の半導体素子実装基板の製造方法の発明では、請求項１８の発明において、前記加圧は、前記開口部を密閉状態とした後、前記開口部内の空気を加熱して空気を膨張させるので、請求項１９と同様な効果があり、しかも実施するのも容易であるという効果がある。
【０１２５】
請求項２１の半導体素子実装基板の製造方法の発明では、請求項１８乃至２０の何れかの発明において、前記回路基板として、凸部と前記電極部との間の表面に凹溝を形成している回路基板を用いるので、第２の封止樹脂が開口部側へ漏洩するのを一層確実に防止できるという効果がある。
【０１２６】
請求項２２の半導体素子実装基板の製造方法の発明では、請求項１８乃至２１の何れかの発明において、前記回路基板として、前記凸部と前記電極部との間の表面に前記凸部と並行するように別の凸部を形成している回路基板を用いるので、半導体素子を傷つけることなく、第２の封止樹脂が開口部側へ漏洩するのを一層確実に防止できるという効果がある。
【０１２７】
請求項２３の半導体素子実装基板の製造方法の発明では、電磁波が通過する開口部を備え、該開口部の近傍の表面に前記開口部の一部乃至全周を囲むように一体突出させた凸部を設けるとともに、該凸部が囲う部位の外側に電極部を形成した回路基板と、
前記開口部に受光面若しくは発光面が臨むように前記回路基板の凸部上方に配置され、前記回路基板側に対向する面に設けた電極と前記電極部との間にバンプを介在させて電気的に接合した光素子からなる半導体素子と、から成り、
前記電極、前記バンプ及び前記電極部からなる接合部位を樹脂で封止する半導体素子実装基板の製造方法において、
前記凸部の外側周辺の前記回路基板表面に、前記電極部を内包するように載置するとともに加圧・加熱により異方性導電フィルムを前記回路基板表面に貼り付ける工程と、
この工程後に、前記半導体素子の前記電極に形成しているバンプを異方性導電フィルムを貫通させて前記電極部に圧接させながら半導体素子を異方性導電フィルム上に載置し、加圧・加熱により異方性導電フィルムの上面に半導体素子を貼り付け固定し且つ異方性導電フィルムで前記電極、バンプ、電極部からなる接合部を封止する工程と、から成るので、封止樹脂液のような漏洩が全く発生する余地がないので、生産性が向上し、しかも凸部で異方性導電フィルムが開口部側へはみ出すことがないため、光ノイズの増加もないという効果がある。
【図面の簡単な説明】
【図１】本発明の実施形態１の製造方法の工程説明図である。
【図２】（ａ）は本発明の実施形態２に用いる回路基板の正面断面図である。
（ｂ）は同上に用いる回路基板の上面図である。
【図３】同上の製造方法の工程説明図である。
【図４】同上の製造方法の工程説明図である。
【図５】同上に用いる回路基板例を示す半導体素子実装基板の製造における封止樹脂塗布工程での半導体素子及び回路基板の正面断面図である。
【図６】同上に用いる別の回路基板例を示す半導体素子実装基板の製造における封止樹脂塗布工程での半導体素子及び回路基板の正面断面図である。
【図７】（ａ）は本発明の実施形態３に対応する半導体素子実装基板の製造における封止樹脂塗布工程での半導体素子及び回路基板の正面断面図である。
（ｂ）は同上に用いる回路基板の要部説明用の一部省略せる断面図である。
【図８】（ａ）は本発明の実施形態４に対応する半導体素子実装基板の製造における封止樹脂塗布工程での半導体素子及び回路基板の正面断面図である。
（ｂ）は同上に用いる回路基板の要部説明用の一部省略せる断面図である。
【図９】本発明の実施形態５に対応する半導体素子実装基板の製造における封止樹脂塗布工程での半導体素子及び回路基板の正面断面図である。
【図１０】（ａ）は本発明の実施形態６に対応する半導体素子実装基板の製造における封止樹脂塗布工程での半導体素子及び回路基板の正面断面図である。
（ｂ）は同上に用いる回路基板の要部説明用の一部省略せる正面断面図である。
【図１１】（ａ）は本発明の実施形態７に対応する半導体素子実装基板の製造における封止樹脂塗布工程での半導体素子及び回路基板の正面断面図である。
（ｂ）は同上に用いる回路基板の要部説明用の一部省略せる断面図である。
【図１２】（ａ）は本発明の実施形態８に対応する半導体素子実装基板の製造における封止樹脂塗布工程での半導体素子及び回路基板の正面断面図である。
（ｂ）は同上に用いる回路基板の要部説明用の一部省略せる正面断面図である。
【図１３】本発明の実施形態９に用いる回路基板の上面図である。
【図１４】本発明の実施形態１０の製造方法の工程説明図である。
【図１５】同上の製造方法の工程説明図である。
【図１６】本発明の実施形態１１の第２の封止樹脂の塗布時の工程説明図である。
【図１７】本発明の実施形態１２の第２の封止樹脂の塗布時の工程説明図である。
【図１８】本発明の実施形態１３における第１の封止樹脂の塗布工程での半導体素子及び回路基板の正面断面図である。
【図１９】本発明の実施形態１４における第１の封止樹脂の塗布工程での半導体素子及び回路基板の正面断面図である。
【図２０】本発明の実施形態１５の製造方法の工程説明図である。
【図２１】（ａ）は本発明の実施形態１６に対応する半導体素子実装基板の製造における封止樹脂塗布工程での半導体素子及び回路基板の正面断面図である。
（ｂ）は同上に用いる回路基板の要部説明用の一部省略せる正面断面図である
【符号の説明】
１ 半導体素子
２ 回路基板
３ 開口部
４ 金バンプ
５ 電極部
６ 回路パターン
７ 封止樹脂
８ 凸部
１０ 半導体素子実装基板[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor device mounting substrate on which a semiconductor device including an optical device such as a solid-state imaging device is mounted, and a method for manufacturing the same.
[0002]
[Prior art]
Conventionally, as a mounting structure for an optical element, a film-shaped resin isolation wall surrounding an opening formed in a circuit board is formed so as to face a light receiving surface of a semiconductor element to be mounted, and the isolation wall is formed by the isolation wall. In some cases, the sealing resin injected around the opening is prevented from flowing out of the opening. (For example, Patent Document 1)
[0003]
[Patent Document 1]
JP 2001-250889 A (see paragraph 0061)
[0004]
[Problems to be solved by the invention]
In the case of the above conventional example, since the isolation wall is a film-shaped resin, it is bent toward the opening when the injected sealing resin is cured, and the inner diameter of the space surrounded by the isolation wall is reduced or the inner peripheral surface is deformed. This causes a problem that irregular reflection of an electromagnetic wave is likely to occur and optical noise increases.
[0005]
The present invention has been made in view of the above points, and an object of the present invention is to prevent a sealing resin from flowing into an opening of a circuit board facing a light receiving surface or a light emitting surface of a semiconductor element including an optical element. It is another object of the present invention to provide a semiconductor element mounting board which can prevent the electromagnetic wave from being diffused at the opening, and a method for manufacturing the semiconductor element mounting board.
[0006]
[Means for Solving the Problems]
In order to achieve the above object, according to the first aspect of the present invention, an opening through which an electromagnetic wave passes is provided, and a surface near the opening surrounds a part or the entire periphery of the opening. And a circuit board having an electrode portion formed outside the portion surrounded by the projection portion.
The light-receiving surface or the light-emitting surface faces the opening, and is disposed above the convex portion of the circuit board, and an electrical connection is provided by interposing a bump between the electrode provided on the surface facing the circuit board and the electrode portion. A semiconductor element comprising an optical element which has been bonded together,
A joint portion including the electrode, the bump, and the electrode portion is sealed with a sealing resin.
[0007]
According to the second aspect of the present invention, in the first aspect of the present invention, the semiconductor element faces the circuit board at least at an upper end portion of the convex portion corresponding to a portion where the sealing resin is applied and cured. The present invention is characterized in that a circuit board provided with a buffer portion which is in pressure contact with the surface is used.
[0008]
According to a third aspect of the present invention, in the invention of the second aspect, a material having a smaller elastic modulus than a resin material of the circuit board is used as a material of the buffer portion.
[0009]
According to a fourth aspect of the present invention, in the second or third aspect, a material having a coefficient of thermal expansion larger than that of the sealing resin is used as a material of the buffer portion. I do.
[0010]
According to a fifth aspect of the present invention, in the invention of any one of the second to fourth aspects, a resin material having a glass transition temperature lower than a curing temperature of the sealing resin is used as the material of the buffer portion. It is characterized by.
[0011]
According to a sixth aspect of the present invention, in the second or third aspect of the present invention, the buffer portion is provided at an upper end portion of the convex portion so as to be slidable downward.
[0012]
According to a seventh aspect of the present invention, in the invention of any one of the second to sixth aspects, the height position of the upper surface of the buffer portion is higher than the height position of the upper surface of the sealing resin at the time of application. It is characterized by having.
[0013]
According to an eighth aspect of the present invention, in the invention of the second aspect, the buffer portion is integrally formed on an upper end portion of the convex portion so as to protrude upward over the entire circumference, and the width of the buffer portion is formed. The size is formed smaller than the width of the projection.
[0014]
According to a ninth aspect of the present invention, in the invention of the eighth aspect, the circuit board including the protruding portion and the buffer portion is injection-molded, and as the resin material, the buffer portion is provided. Characterized in that a resin material mixed with a filler having a diameter larger than the width is used.
[0015]
According to a tenth aspect of the invention, there is provided a semiconductor device mounting board according to the eighth aspect, wherein the buffer portion is inclined outward.
[0016]
According to the eleventh aspect of the present invention, in the invention of the eighth aspect, an upper end portion of the convex portion located outside the projecting position of the buffer portion has a height substantially equal to the height of the buffer portion. Is formed so as to protrude integrally over the entire circumference.
[0017]
In a twelfth aspect of the present invention, the height dimension from the lower end to the upper end of the buffer portion is set to be the shortest distance from the upper end opening edge of the convex portion to the lower end of the buffer portion. It is characterized by having shorter dimensions.
[0018]
According to a thirteenth aspect of the present invention, in any one of the eighth to twelfth aspects of the present invention, a cutout is formed in a part of the buffer in a direction from the upper end to the lower end. I do.
[0019]
According to a fourteenth aspect of the invention, there is provided a semiconductor device mounting board according to any one of the eighth to thirteenth aspects, wherein the buffer has a width dimension of about 10 to about 50 μm.
[0020]
According to a fifteenth aspect of the present invention, in any one of the first to fourteenth aspects, the electrode portion is formed in a convex shape protruding above the surface of the circuit board.
[0021]
According to a sixteenth aspect of the present invention, in any one of the first to fifteenth aspects, at least the inner peripheral surface near the upper end of the buffer is black.
[0022]
In the method for manufacturing a semiconductor element mounting board according to the seventeenth aspect of the present invention, an opening through which an electromagnetic wave passes is provided, and a projection is formed integrally on a surface near the opening so as to surround a part or the entire circumference of the opening. And a circuit board having an electrode portion formed outside a portion surrounded by the convex portion,
The light-receiving surface or the light-emitting surface faces the opening, and is disposed above the convex portion of the circuit board, and an electrical connection is provided by interposing a bump between the electrode provided on the surface facing the circuit board and the electrode portion. A semiconductor element comprising an optical element which has been bonded together,
In the method for manufacturing a semiconductor element mounting substrate, wherein a bonding portion formed of the electrode, the bump, and the electrode portion is sealed with a sealing resin,
A step of applying a sealing resin to the surface of the circuit board so as to include the electrode portion around the outer periphery of the convex portion,
The semiconductor element is pressed into contact with a buffer portion formed at the upper end of the convex portion so that the light receiving surface or the light emitting surface of the semiconductor element faces the opening, and the semiconductor element is disposed on the electrode portion. Press-contacting the electrodes via bumps;
Curing the sealing resin and sealing the joints between the electrodes of the semiconductor element, the bumps, and the electrode portions of the circuit board with the sealing resin.
[0023]
In the method for manufacturing a semiconductor element mounting substrate according to the eighteenth aspect of the present invention, there is provided an opening through which an electromagnetic wave passes, and a projection integrally projecting from a surface near the opening so as to surround a part or the entire circumference of the opening. And a circuit board having an electrode portion formed outside a portion surrounded by the convex portion,
The light-receiving surface or the light-emitting surface faces the opening, and is disposed above the convex portion of the circuit board, and an electrical connection is provided by interposing a bump between the electrode provided on the surface facing the circuit board and the electrode portion. A semiconductor element comprising an optical element which has been bonded together,
In the method for manufacturing a semiconductor element mounting board, wherein a bonding portion including the electrode, the bump and the electrode portion is sealed with a sealing resin applied between the semiconductor element and the circuit board,
Applying a first sealing resin to the surface of the circuit board located outside the electrode portion along the outside portion of the electrode portion;
A step of temporarily mounting the semiconductor element by curing the first sealing resin while pressing the electrode against the electrode part via a bump so that the semiconductor element does not contact the upper part of the projection after the application,
After the provisional mounting, a step of applying and curing a second sealing resin along the electrode portion on the circuit board surface between the electrode portion and the convex portion to completely mount the semiconductor element. It is characterized by comprising.
[0024]
According to a nineteenth aspect of the invention, there is provided a method of manufacturing a semiconductor element mounting substrate according to the eighteenth aspect, wherein the inside of the opening is pressurized when the sealing resin is injected in the main mounting step.
[0025]
According to a twentieth aspect of the present invention, in the invention of the eighteenth aspect, the pressurizing causes the air in the opening to expand by heating the air in the opening after closing the opening. It is characterized by doing.
[0026]
According to a twenty-first aspect of the present invention, in the method of any one of the eighteenth to twentieth aspects, a concave groove is formed as a surface of the circuit board between the convex part and the electrode part. Is used.
[0027]
In the invention of the method for manufacturing a semiconductor element mounting board according to claim 22, in the invention according to any one of claims 18 to 21, the circuit board is provided on a surface between the projection and the electrode portion in parallel with the projection. In this case, a circuit board having another convex portion is used.
[0028]
In the invention of the method for manufacturing a semiconductor element mounting board according to claim 23, an opening through which an electromagnetic wave passes is provided, and a projection integrally formed on a surface near the opening so as to surround a part or the entire circumference of the opening. And a circuit board having an electrode portion formed outside a portion surrounded by the convex portion,
The light-receiving surface or the light-emitting surface faces the opening, and is disposed above the convex portion of the circuit board, and an electrical connection is provided by interposing a bump between the electrode provided on the surface facing the circuit board and the electrode portion. A semiconductor element comprising an optical element which has been bonded together,
In a method for manufacturing a semiconductor element mounting substrate for sealing a bonding portion formed of the electrode, the bump and the electrode portion with a resin,
Attaching an anisotropic conductive film to the surface of the circuit board by pressing and heating while placing the electrode portion on the surface of the circuit board around the outer periphery of the convex portion,
After this step, the semiconductor element is placed on the anisotropic conductive film while the bumps formed on the electrodes of the semiconductor element are passed through the anisotropic conductive film and pressed against the electrode portion, and the Bonding the semiconductor element to the upper surface of the anisotropic conductive film by heating, and sealing the joint comprising the electrodes, bumps, and electrode portions with the anisotropic conductive film.
[0029]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, the present invention will be described with reference to embodiments.
[0030]
(Embodiment 1)
The present embodiment is the basis of the present invention and outlines a manufacturing process of the semiconductor element mounting substrate 10.
[0031]
FIG. 1 shows a semiconductor element mounting substrate in which an optical element, for example, a face-down type semiconductor element (semiconductor chip) 1 composed of an imaging element is mounted on a circuit board 2 composed of a resin-molded three-dimensional circuit board (MID; Molded Interconnection Device). FIG. 1 (a) shows that the semiconductor element 1 to be mounted is aligned with the circuit board 2 and the light receiving portion side of the semiconductor element 1 is connected to the circuit board 2. The gold bumps 4 formed on the electrodes (not shown) provided on the surface (hereinafter referred to as the lower surface) on the light-receiving unit side are disposed opposite to the openings 3 of the circuit board 2 on the surface (hereinafter referred to as the upper surface) of the circuit board 2. 5 shows an alignment step of facing the electrode unit 5 provided in the first embodiment. The electrode portion 5 is constituted by a part of the circuit pattern 6 formed on the upper surface of the circuit board 2.
[0032]
After this alignment step, a sealing resin 7 is applied around the opening 3 so as to include the electrode 5 (FIG. 1B). After this application, the gold bump 4 is pressed against the electrode 5. The semiconductor element 1 is placed and mounted on the circuit board 2 so as to electrically connect the electrode portion 5 to the electrode of the semiconductor element 1 (FIG. 1C). After the mounting, the sealing resin 7 is cured, and the sealing resin 7 encloses and seals the joint portion between the electrode portion 5 and the gold bump 4, whereby a desired semiconductor element mounting substrate 10 is completed.
[0033]
When the semiconductor element 1 is placed and mounted on the surface of the circuit board 2 in such a manufacturing process, the sealing resin 7 before being cured is pushed by the lower surface of the semiconductor element 1 and spreads to the periphery. At this time, the sealing resin 7 may flow into the opening 3.
[0034]
Therefore, the circuit board 2 used in the present embodiment integrally forms the annular convex portion 8 so as to surround the opening 3, and the convex portion 8 functions as a weir, and the sealing resin 7 flows into the opening 3 side. It is designed to prevent
[0035]
The protrusion 8 is formed of the same resin material as the circuit board 2 and has high rigidity. Therefore, the protrusion 8 generated when the semiconductor element 1 is mounted on the circuit board 2 or when the sealing resin 7 is cured. The inner peripheral surface of the convex portion 8 is hardly deformed by the stress applied thereto, so that irregular reflection of the electromagnetic wave is unlikely to occur, and therefore, there is almost no increase in optical noise.
[0036]
As the resin material of the circuit board 2 and the protrusions 8 of the present embodiment, an aromatic polyamide resin (for example, polyphthalamide having a linear expansion coefficient of 25 ppm / ° C., an elastic modulus of 13 GPa, and a glass transition temperature of 120 ° C.) is used. Used.
[0037]
(Embodiment 2)
In the first embodiment, since there is a small gap between the lower surface of the semiconductor element 1 to be mounted and the projection 8, there is a possibility that the semiconductor element 1 may leak to the opening 3 depending on the amount of the sealing resin 7 applied. Therefore, as the circuit board 2 used in the present embodiment, the one in which the buffer portion 9 is formed so as to protrude from the upper end surface of the convex portion 8 as shown in FIGS. 2A and 2B is used.
[0038]
The buffer portion 9 is made of, for example, another resin material different from the resin material of the circuit board 2, and is formed integrally with the upper end of the convex portion 8 by two-color molding.
[0039]
Thus, in the present embodiment, in manufacturing the semiconductor element mounting substrate 3, in the sealing resin application step, as shown in FIGS. 3A and 4A, the vicinity of each side of the annular convex portion 8 is determined. A sealing resin 7 is applied on the upper surface of the circuit board 2.
[0040]
Next, the lower surface of the semiconductor element 1 around the light receiving unit is brought into close contact with the upper end surface of the buffer unit 9 and the semiconductor element 1 is pushed down. As a result, the gold bumps 4 formed on the respective electrodes 11 are pressed against the corresponding electrode portions 5 on the upper surface of the circuit board 2 while the buffer portions 9 are bent while the buffer portions 9 are pressed against the lower surface of the semiconductor element 1. 11 and the corresponding electrode unit 5 are electrically connected. When the semiconductor substrate 1 is pushed down, the sealing resin 7 applied around the protrusion 8 is pushed down by the lower surface of the semiconductor element 1 and spreads on the surface of the circuit board 2 around the protrusion 8, and the semiconductor substrate 1 around the protrusion 8 and The sealing resin 7 is filled with the space between the circuit board 2 and the electrode 11, the gold bump 4, and the electrode portion 5.
[0041]
In this state, by heating at 210 ° C. for 10 seconds to cure the sealing resin 7, the above-described joint portion was sealed with the sealing resin 7 cured between the upper surface of the circuit board 2 and the lower surface of the semiconductor element 1. A predetermined semiconductor element mounting substrate 10 is completed (see FIGS. 3B and 4B).
[0042]
The size of the load per four gold bumps is set to 40 g to 150 g.
[0043]
In the present embodiment, since the buffer portion 9 is in close contact with the lower surface of the semiconductor element 1, when the gold bump 4 is pressed against the electrode section 5 while the semiconductor element 1 is being pressed down, the sealing resin 7 passes over the convex section 8 and is opened. It does not flow to the part 3 side.
[0044]
Example 1
An aromatic polyimide resin having an elastic modulus of 13 Gpa (for example, polyphthalamide) was used as a resin material of the circuit board 2 including the convex portions 8, and an epoxy resin having an elastic modulus of 5 Gpa was used as a resin material of the buffer portion 9. .
[0045]
As a result, the buffer portion 9 resiliently contacts the lower surface of the semiconductor element 1 to increase the degree of adhesion, so that it is possible to reliably prevent the sealing resin 7 from leaking to the opening 3 side, and to increase the buffer capacity when the semiconductor element 1 is mounted. It was possible to prevent the semiconductor element 1 from being damaged.
[0046]
Example 2
In the first embodiment, a resin having a smaller elastic modulus than the resin used as the resin material of the circuit board 2 is used as the resin material of the buffer portion 9. An aromatic polyimide-based resin (for example, polyphthalamide) having a thermal expansion coefficient of 25 ppm / ° C. was used as the resin material, and an epoxy-based resin having a thermal expansion coefficient of 35 ppm / ° C. was used as the resin material of the buffer section 9.
[0047]
As a result, the stress applied to the semiconductor element 1 by the buffer 9 is reduced by the difference in thermal expansion between the buffer 9 and the sealing resin 7 due to the temperature processing during cooling after the sealing resin 7 is cured. The influence of the stress on the semiconductor element 1 was reduced, and the reliability was improved.
[0048]
Example 3
Although the resin material of the circuit board 2 including the convex portions 8 and the resin material of the buffer portion 9 are selected by focusing on the elastic modulus in Example 1 and the thermal expansion coefficient in Example 2, In the embodiment, focusing on the glass transition temperature, an aromatic polyimide resin (for example, polyphthalamide) having a glass transition temperature of 120 ° C. as a resin material of the circuit board 2 including the protrusions 8, and a resin material of the buffer unit 9. An epoxy resin having a glass transition temperature of 138 ° C. was used.
[0049]
As a result, when the sealing resin 7 is cured, the stress between the semiconductor element 1 and the buffer portion 9 is reduced at the same time, and the influence of the stress on the semiconductor element 1 is reduced, thereby improving the reliability.
[0050]
Note that the circuit board 2 including the convex portions 8 using the aromatic polyimide resin having all the properties of the above Examples 1 to 3 and the epoxy resin having all the properties of the Examples 1 to 3 are used. If the buffer portions 9 are respectively formed, the semiconductor element mounting substrate 10 having all the features of Examples 1 to 3 can be obtained.
[0051]
In each of the above Examples 1 to 3, the height L2 from the lower surface of the circuit board 2 to the upper end surface of the buffer portion 9 is set at the upper end of the sealing resin 7 applied to the upper surface of the circuit board 2 as shown in FIG. When the height L1 is higher than the height L1 from the lower surface of the substrate 2, it is possible to reliably prevent the sealing resin 7 from flowing into the opening 3 side even when the sealing resin 7 is flushed when the circuit substrate 2 is mounted.
[0052]
Further, as shown in FIG. 6, a black film F may be adhered to the inner peripheral surface of the buffer section 9 to suppress irregular reflection on the inner peripheral surface and prevent an increase in optical noise. The configuration of attaching the film F is not limited to the example of FIG. 6 since it is a configuration that can be applied not only to the first embodiment but also to a third embodiment and later described later.
[0053]
(Embodiment 3)
In the first embodiment, the circuit board 2 in which the buffer portion 9 is integrally formed and protruded by two-color molding is used as the convex portion 8, but in the present embodiment, as shown in FIG. An annular concave groove 12 having, for example, an upward opening is formed so as to cover the entire circumference in the circumferential direction of the upper end portion, and a circuit board mounted on the upper end portion of the convex portion 8 by fitting an annular buffer portion 9 into the groove 12. 2 is used.
[0054]
In this case, as the buffer section 9, for example, an elastic material such as silicon rubber is used, and as shown in FIG. 7B, a minute one having a diameter of 0.3 mm is used. 8 is held in the groove 12 so as to protrude approximately ２ of the height h above the groove 8.
[0055]
Thus, in the present embodiment, in the step of mounting the semiconductor element 1, the lower surface of the semiconductor element 1 presses the buffer 9, which pushes the buffer 9 into the concave groove 12 and pushes the gold bump 5 to the electrode on the circuit board 2 side. It is pressed against the part 5.
[0056]
Therefore, generation of stress between the semiconductor element 1 and the buffer section 9 can be prevented, so that the stress does not affect the semiconductor element 1 and reliability can be improved.
[0057]
Since the respective steps of applying and curing the sealing resin 7 are the same as those in the second embodiment, description thereof will be omitted.
[0058]
(Embodiment 4)
In the circuit board 2 used in the second embodiment, the buffer portion 9 is formed of a resin material different from that of the convex portion 8, but in the present embodiment, as shown in FIG. Is integrally formed using the same resin material (the same aromatic polyimide resin <polyphthalamide> as in the first and second embodiments), and for example, as shown in FIG. The width a of the portion 8 is 0.1 mm, the thickness d is 0.1 mm, the thickness (width) b of the buffer portion 9 is 0.05 mm, and the height e of the buffer portion 9 is 0.1 mm to 0.2 mm. Further, the height c from the lower surface of the circuit board 2 to the upper end of the buffer portion 9 is 1.3 mm, the convex portion 8 has rigidity, and the buffer portion 9 has flexibility.
[0059]
Thus, according to the present embodiment, the buffer section 9 presses against the lower surface of the semiconductor element 1 without damaging the semiconductor element 1 during the mounting process of the semiconductor element 1 as in the buffer sections 9 of the first to third embodiments. Then, leakage of the sealing resin 7 to the opening 3 side is prevented.
[0060]
Since the respective steps of applying and curing the sealing resin 7 are the same as those in the second embodiment, description thereof will be omitted.
[0061]
In addition, since the protrusion 8 and the circuit board 2 can be formed of the same resin, the circuit board 2 including the buffer 9 and the protrusion 8 can be easily formed.
[0062]
If the thickness (width) of the integrally formed buffer portion 9 is approximately 0.01 mm to approximately 0.05 mm, no crack is generated even by the pressure from the sealing resin 7 that is flushed when the semiconductor element 1 is mounted. In addition, the present inventors have confirmed that the semiconductor element 1 will not be damaged, and thus the present invention is not limited to the above-described 0.05 mm.
[0063]
(Embodiment 5)
In the fourth embodiment, the circuit board 2 formed by injection molding together with the buffer portion 9 and the convex portion 8 using the same resin material is used, but in the present embodiment, the circuit board 2 is mixed into the resin material as shown in FIG. For example, the circuit board 2 is formed by using a filler 13 such as silica (indicated by a circle in the figure) having a particle size larger than the width of the buffer section 9. When the circuit board 2 including the projections 9 is injection-molded, the filler 13 does not enter the buffer 9 and the buffer 9 has low rigidity and high flexibility.
[0064]
According to this embodiment, when the lower surface of the semiconductor element 1 is pressed against the upper end of the buffer section 9 in the mounting step of the semiconductor element 1, the semiconductor element 1 may be damaged due to the low rigidity of the buffer section 9. And has a role of preventing leakage of the sealing resin 7 to the opening 3 side because of being in close contact with the lower surface of the semiconductor element 1.
[0065]
Since the respective steps of applying and curing the sealing resin 7 are the same as those in the second embodiment, description thereof will be omitted.
[0066]
In addition, since the protrusion 8 and the circuit board 2 can be formed of the same resin, the circuit board 2 including the buffer 9 and the protrusion 8 can be easily formed.
[0067]
(Embodiment 6)
The circuit board 2 used in the fourth and fifth embodiments has the buffer portion 9 suspended from the upper surface of the projection 8, but the circuit board 2 used in the present embodiment has a lower end as shown in FIGS. The buffer portion 9 is formed by inclining outward from the upper end to the upper end. The inclination angle θ is, for example, about 30 °.
[0068]
The width and the like of the buffer section 9 conform to the circuit board 2 of the fifth embodiment. When the filler 13 is mixed into the resin material, a filler having a particle size larger than the width of the buffer portion 9 is used.
[0069]
According to the present embodiment, when the lower surface of the semiconductor element 1 is pressed against the upper end of the buffer section 9 in the mounting process of the semiconductor element 1, the buffer section 9 does not fall inward, so that the sealing is performed. It is possible to reliably prevent the resin 7 from leaking inward beyond the buffer portion 9.
[0070]
Since the respective steps of applying and curing the sealing resin 7 are the same as those in the second embodiment, description thereof will be omitted.
[0071]
(Embodiment 7)
In the circuit board 2 used in the fourth to sixth embodiments, the buffer portion 9 is integrally formed so that the inner peripheral surface thereof is continuous with the inner peripheral surface of the convex portion 8, but in this embodiment, FIG. As shown, a circuit board 2 is used in which an annular buffer 9 'similar to the buffer 9 is integrally formed on the upper end surface of the projection 8 located outside the buffer 9. In other words, the circuit board 2 in which the buffer portions 9 and 9 'form a double buffer portion is used. For example, as shown in FIG. 11 (b), each of the buffer portions 9, 9 'has a thickness (width) dimension a, a' of 0.05 mm and a distance b between the buffer portions 9, 9 'of 0.1 mm. , And the height c is 0.1 mm to 0.2 mm.
[0072]
Thus, according to the present embodiment, when the lower surface of the semiconductor element 1 is pressed against the upper end of the buffer section 9 in the mounting process of the semiconductor element 1, the sealing resin 7 that is flushed by the lower surface of the semiconductor element 1 is moved outward. It is regulated by the buffer 9 '.
[0073]
Furthermore, even if the sealing resin 7 leaks inward beyond the sealing resin 9 ′, the sealing resin 7 leaks inward beyond the buffering part 9 by staying between the buffer portions 9 ′ and 9. Prevent leaving. Thereby, it is possible to reliably prevent the sealing resin 7 from leaking to the opening 3 side. Further, it is possible to improve the manufacturing productivity of the semiconductor element mounting substrate.
[0074]
Since the respective steps of applying and curing the sealing resin 7 are the same as those in the second embodiment, description thereof will be omitted.
[0075]
(Embodiment 8)
In the circuit board 2 used in the fourth embodiment, the buffer portion 9 is formed so as to protrude such that the inner peripheral surface of the buffer portion 9 is flush with the inner peripheral surface of the convex portion 8, but in the present embodiment, FIG. As shown in a), when the semiconductor element 1 is pressed against the buffer section 9 when the semiconductor element 1 is pressed against the buffer section 9, even if the buffer section 9 falls down inward by any chance, the tip portion is protruded. The circuit board 2 is used so as not to protrude toward the opening 3 side.
[0076]
FIG. 12B shows an example of the circuit board 2 used in the present embodiment. The distance L2 from the inner edge of the projection 8 to the outer edge of the buffer 9 is set to be larger than the height L1 of the buffer 9. The tip of the buffer 9 does not protrude from the inner edge of the projection 8 even if the buffer 9 falls down. In this example, L1 = 0.2 mm, L2 = 1.5 mm, and the thickness L3 of the buffer 9 itself is 0.05 mm.
[0077]
According to the present embodiment, when the lower surface of the semiconductor element 1 is pressed against the upper end of the buffer section 9 in the mounting step of the semiconductor element 1, the sealing resin 7 that is flushed down on the lower surface of the semiconductor element 1 is buffered. It is regulated by the part 9 to prevent leakage to the inside.
[0078]
Further, even if the buffer portion 9 falls down, the tip portion does not protrude inside the inner edge of the convex portion 8. Therefore, it is possible to prevent the protrusion of the buffer section 9 toward the opening section 3 from causing optical noise.
[0079]
Since the respective steps of applying and curing the sealing resin 7 are the same as those in the second embodiment, description thereof will be omitted.
[0080]
(Embodiment 9)
The circuit board 2 used in the second to eighth embodiments has the buffer portion 9 (and 9 ′) formed in a ring shape. The circuit board 2 used in the present embodiment has the configuration of the fourth embodiment as shown in FIG. In the above, notches 14 which are notched in the vertical direction are formed in the buffer 9 at appropriate intervals.
[0081]
In the example of FIG. 13, the buffer 9 is integrally formed using the same resin as the protrusion 8 and the circuit board 2, similarly to the circuit board 2 of the fourth embodiment. In the case of the circuit board 2 in which the buffer portion 9 is formed by two-color molding using another resin material as in 2, the cutout portion 14 may be provided as in the circuit board 2 used in the present embodiment. Further, it is needless to say that the present invention may be applied to the configurations of the fifth to eighth embodiments.
[0082]
Note that the manufacturing process of the semiconductor element mounting board is the same as that of the second embodiment, and the description is omitted here.
[0083]
(Embodiment 10)
In the second to ninth embodiments, the lower surface of the semiconductor element 1 is pressed against the buffer section 9 (and 9 ′) to mount the semiconductor element 1, so that the sealing resin 7 extends beyond the protrusion 8. Leakage to the opening 3 side is prevented. On the other hand, in the first embodiment, when the semiconductor element 1 is mounted, the sealing resin 7 previously applied is prevented from being pushed out and leaking to the opening 3 side only by the projection 8, and thus the second embodiment is used. The ability to prevent the sealing resin 7 from leaking out is slightly inferior to that of Nos. 9 to 9.
[0084]
Therefore, in the present embodiment, the convex portion 8 is formed so as to surround the opening portion 3 as in the first embodiment, but the sealing resin 7 is securely used while using the circuit board 2 without the buffer portion 9. The present invention relates to a manufacturing method that does not leak to the third side.
[0085]
That is, in the present embodiment, as shown in FIGS. 14 (a) and 15 (a), the circuit board 2 in which the protrusions 8 are integrally formed is used, and is first provided on both sides in a process before the semiconductor element 1 is mounted. A first sealing resin 7a (for example, an epoxy resin having a viscosity of 40 Pa · s) is applied on the upper surface of the circuit board 2 outside the electrode portion 5 so as to cover a part of the electrode portion 5. After the application step, the gold bumps 4 formed on the respective electrodes 11 of the semiconductor element 1 are pressed against the corresponding electrode portions 5. At this time, the sealing resin 7a comes into contact with the lower surface on both sides of the semiconductor element 1 so as to spread. In this state, the sealing resin 7a is cured by heating at 210 ° C. for 10 seconds. As shown in FIGS. 14B and 15B, the semiconductor substrate 1 is moved from the outside of the bonding portion between the gold bump 4 and the electrode portion 5. Temporarily seal.
[0086]
After the temporary sealing step is completed, a second sealing resin 7b (for example, having a viscosity of 15 Pa · s) is provided in the space between the joint portion and the convex portion 8 as shown in FIGS. 14 (c) and 15 (c). Epoxy resin). After heating at 100 ° C. for 1 hour after the injection coating, the substrate is further heated at 150 ° C. for 3 hours to cure the second sealing resin 7b, and the joint is sealed from the inside. At this time, the portion where the second sealing resin 7b is in contact with the first sealing resin 7a is integrated by the curing of the second sealing resin 7b.
[0087]
As a result, the bonding portion of the semiconductor element 1 between the gold bump 4 and the electrode portion 5 is completely sealed by the first and second sealing resins 7a and 7b, and the predetermined semiconductor element mounting substrate 3 is completed.
[0088]
As described above, according to the manufacturing method of the present embodiment, since the second sealing material 7b applied to the inside does not receive the pressure from the semiconductor element 1, the second sealing material 7b is swept away and exceeds the convex portion 8 to form the opening. Since there is no leakage to the third side and there is no need to form a buffer, productivity is improved.
[0089]
(Embodiment 11)
In the tenth embodiment, when the second sealing resin 7b is injected and applied in the tenth embodiment, the pressurized air A is opened from the lower surface side of the circuit board 2 through the opening 3 as shown in FIG. The pressurized air A is sent into the portion 3 to pressurize the inside of the opening 3, and the pressurized air A is blown out between the semiconductor element 1 and the circuit board 2 from the upper surface opening of the space surrounded by the convex portion 8 to form the second It is possible to prevent the sealing resin 7b from flowing into the opening 3 beyond the projection 8.
[0090]
The steps up to temporary sealing and the curing step after the application of the second sealing resin 7b are based on those in Embodiment 10.
[0091]
(Embodiment 12)
In the eleventh embodiment, when the second sealing resin 7b is injected and applied, the pressurized air is sent into the opening 3. However, in the present embodiment, as shown in FIG. Before injecting and applying the resin 7b, the lower surface opening of the opening 3 is closed with, for example, a polyimide seal 15 and heated at 100 ° C. for about 1 hour to heat and expand the air in the opening 3, thereby opening the opening 3 A positive pressure is applied to the atmosphere. Accordingly, as in the case of Embodiment 11, when the second sealing resin 7b is injected and applied between the semiconductor element 1 and the circuit board 2, the second sealing resin 7b It can be prevented from flowing into the section 3.
[0092]
The steps up to temporary sealing and the curing step after the application of the second sealing resin 7b are based on those in Embodiment 10.
[0093]
(Embodiment 13)
In the present embodiment, as shown in FIG. 18, at least a groove 16 (for example, a groove having a depth of 0.1 mm) is formed at the base of the convex portion 8, particularly, at the base corresponding to the portion where the second sealing resin 7 b is injected and applied. When the second sealing resin 7b is injected and applied by using the circuit board 2 on which the second sealing resin 7b is formed, the second sealing resin 7b which is about to flow toward the convex portion 8 is retained in the concave groove 16 so that This prevents the second sealing resin 7b from flowing into the opening 3 beyond the projection 8.
[0094]
The manufacturing method using the circuit board 21 may be any of the above-described embodiments 10 to 12.
[0095]
Of course, the configuration in which the concave groove 16 is provided can be applied to any of the first to ninth embodiments.
[0096]
(Embodiment 14)
In the present embodiment, as shown in FIG. 19, at least another protrusion is provided on the upper surface between the convex portion 8 and the electrode portion 5 of the circuit board 21, particularly, on the upper surface corresponding to the portion where the second sealing resin 7b is applied. Using the circuit board 2 on which the portion 8 'is formed, when the second sealing resin 7b is applied by injection, the flow of the sealing resin 7b is regulated by the convex portion 8'. Also, the second sealing resin 7b stays between the two convex portions 8, 8 'to prevent the second sealing resin 7b from passing over the convex portions 8. In this embodiment, the distance between the projections 8 and 8 'is 0.05 mm. The manufacturing method using the circuit board 21 may be any of the above-described embodiments 10 to 12.
[0097]
Of course, the configuration in which the concave groove 16 is provided can be applied to any of the first to ninth embodiments.
[0098]
(Embodiment 15)
In the first to 14th embodiments, an epoxy-based sealing resin is used to seal the joint between the gold bump 4 formed on the electrode 11 of the semiconductor element 1 and the electrode portion 5 on the circuit board 21 side. In the present embodiment, the joining portion is sealed using an ACF (anisotropic conductive film) 17 as a sealing resin.
[0099]
In this case, as shown in FIG. 20A, first, a through hole 18 into which the convex portion 8 is fitted is formed in the center, and an ACF 17 having a thickness larger than the height of the convex portion 8 is placed on the circuit board 2. Then, under the atmosphere of 100 ° C. through the pressing plate 19, a pressure of 1.0 MPa is applied for 3.0 seconds, and the ACF 17 is attached on the circuit board 2. After the bonding step is completed, the gold bump 4 formed on the electrode 11 of the semiconductor element 1 is applied to the electrode portion 5 on the upper surface of the circuit board 2 by a load of 40 g to 150 g per gold bump as shown in FIG. It is placed on the circuit board 2 while applying pressure so as to be pressed. At this time, the gold bump 4 penetrates the ACF 17. Then, it is heated at 250 ° C. for 100 seconds, and the joint is sealed with ACF17.
[0100]
Here, when pressure is applied to the ACF 17, the ACF 17 tries to expand to the side, but does not protrude into the opening 3 because the ACF 17 is restricted by the convex 8 on the convex 8 side. Further, the rigidity of the convex portion 8 does not cause the convex portion 8 to be deformed toward the opening 3 side, and there is no increase in optical noise due to deformation of the inner peripheral surface.
[0101]
(Embodiment 16)
Although the electrode portions 5 in any of the first to fifteenth embodiments are formed on the flat surface of the circuit board 2, in this embodiment, as shown in FIG. The electrode portion 5 is formed integrally on the surface of the substrate 2 and the electrode portion 5 is formed on the surface of the convex portion 20, so that the electrode portion 5 protrudes upward from the surface of the circuit board 2 to form a convex shape. .
[0102]
Thus, in the present embodiment, the thickness of the sealing resin 7 can be increased by forming the electrode portion 5 on the surface of the convex portion 20 to have a convex shape. The force pressing against the joint portion between the electrode portion 5 and the electrode 11 is increased, so that the reliability of the joint is improved, and the separation of the electrode due to the difference in thermal expansion between the semiconductor element 1 and the circuit board 2 can be prevented.
[0103]
The dimensions of each side a to c of the convex portion 20 shown in FIG. 21B are set to, for example, a = 0.15 mm, b = 0.2 mm, and c = 0.15 mm as an example.
[0104]
The configuration of the electrode section 5 of the sixteenth embodiment can of course be applied to the case where ACF is used as the sealing resin.
[0105]
In each of the above embodiments, the convex portion 8 is formed so as to surround the entire circumference of the opening 3, but the convex portion 8 projects at least at a position corresponding to the application position of the sealing resin 7 or the ACF 17 attachment position. It may be formed.
[0106]
【The invention's effect】
According to the first aspect of the present invention, the semiconductor device mounting substrate is provided with an opening through which an electromagnetic wave passes, and a projection integrally protruding on a surface near the opening so as to surround a part or the entire circumference of the opening. Together with a circuit board having an electrode portion formed outside a portion surrounded by the convex portion,
The light-receiving surface or the light-emitting surface faces the opening, and is disposed above the convex portion of the circuit board, and an electrical connection is provided by interposing a bump between the electrode provided on the surface facing the circuit board and the electrode portion. A semiconductor element comprising an optical element which has been bonded together,
Since the bonding portion composed of the electrode, the bump and the electrode portion is sealed with a sealing resin, the convex portion is hard and rigid like the circuit board, and the vicinity of the position where the convex portion is formed And the deformation due to the stress on the projections that occurs when mounting the semiconductor element or curing the sealing resin is reduced, and the surface shape of the inner peripheral surface of the opening is maintained. There is an effect that irregular reflection of electromagnetic waves on the inner peripheral surface of a certain opening is unlikely to occur.
[0107]
According to the second aspect of the present invention, in the first aspect of the present invention, the semiconductor element faces the circuit board at least at an upper end portion of the convex portion corresponding to a portion where the sealing resin is applied and cured. Since the circuit board is provided with a buffer portion that is in pressure contact with the surface, it is possible to reliably prevent the sealing resin from leaking to the opening side due to the close contact between the semiconductor element and the buffer portion. There is an effect of improving.
[0108]
According to a third aspect of the present invention, in the second aspect of the present invention, since the material of the buffer portion is smaller than the elastic modulus of the resin material of the circuit board, the semiconductor device and the buffer portion are not used. The sealing resin can more reliably prevent the sealing resin from leaking to the opening side, and has the effect that the semiconductor element is not damaged when the buffer section is pressed against the semiconductor element.
[0109]
According to the fourth aspect of the present invention, in the second or third aspect of the present invention, a material having a coefficient of thermal expansion higher than that of the sealing resin is used as a material of the buffer. However, the stress that applies a load to the semiconductor element is reduced by the difference in thermal expansion between the buffer section and the sealing resin due to the temperature drop during cooling after the sealing resin is hardened, so that the stress is exerted on the semiconductor element. The reliability of the semiconductor device is improved
In the invention of the semiconductor element mounting substrate according to claim 5, in any one of claims 2 to 4, a resin material having a glass transition temperature lower than a curing temperature of the sealing resin is used as a material of the buffer portion. In addition, when the sealing resin is cured, the stress between the semiconductor element and the buffer portion is relaxed at the same time, so that the effect of the stress is not exerted on the semiconductor element, and the reliability of the semiconductor element is improved.
[0110]
In the invention of the semiconductor element mounting board of claim 6, in the invention of claim 2 or 3, the buffer portion is provided at the upper end of the convex portion so as to be slidable downward. It is possible to prevent the generation of stress between the buffer portion and the semiconductor device, so that the effect of the stress is not exerted on the semiconductor device, thereby improving the reliability of the semiconductor device.
[0111]
According to a seventh aspect of the present invention, in the invention of any one of the second to sixth aspects, the height position of the upper surface of the buffer portion is higher than the height position of the upper surface of the sealing resin at the time of application. Since the sealing resin does not reach the height position of the buffer when the sealing resin is flushed to the semiconductor element, it is possible to reliably prevent the sealing resin from leaking to the opening side. This has the effect of improving productivity.
[0112]
According to an eighth aspect of the present invention, in the invention of the second aspect, the buffer portion is integrally formed on an upper end portion of the convex portion so as to protrude upward over the entire circumference, and the width of the buffer portion is formed. Since the size is formed to be smaller than the width of the convex portion, it is possible to prevent the sealing resin from leaking to the opening side similarly to the second aspect of the invention by the buffer portion. When the substrate is formed, the convex portion and the buffer portion can be formed simultaneously with the same resin molding material, thereby improving the productivity of the circuit board and, furthermore, allowing the buffer portion to have flexibility. Has the effect that the semiconductor substrate is not damaged even when pressed against the buffer.
[0113]
According to a ninth aspect of the present invention, in the invention of the eighth aspect, the circuit board including the protruding portion and the buffer portion is injection-molded, and as the resin material, the buffer portion is provided. Since the resin material mixed with a filler having a diameter larger than the width dimension is used, the filler does not enter the buffer portion during injection molding, so that the rigidity of the buffer portion is reduced while maintaining the rigidity of the convex portion and the circuit board. Thus, a buffer portion that does not damage the semiconductor element even when the semiconductor element is pressed against the semiconductor element can be formed simultaneously with the formation of the circuit board.
[0114]
In the invention of the semiconductor element mounting board of claim 10, in any one of the inventions of claims 8 and 9, the buffer section is inclined outward, so that when the semiconductor element is pressed against the buffer section, the buffer section is It does not fall inward, so that the sealing resin can be reliably prevented from leaking to the opening side, and there is an effect that productivity is improved.
[0115]
According to the eleventh aspect of the present invention, in the invention of the eighth aspect, an upper end portion of the convex portion located outside the projecting position of the buffer portion has a height substantially equal to the height of the buffer portion. Is integrally formed so as to protrude over the entire circumference, so that the double buffer portion can reliably prevent the sealing resin from leaking to the opening side, thereby improving the productivity. This has the effect.
[0116]
In a twelfth aspect of the present invention, the height dimension from the lower end to the upper end of the buffer portion is set to be the shortest distance from the upper end opening edge of the convex portion to the lower end of the buffer portion. Since the dimensions are shorter, when the semiconductor element is pressed against the buffer, the buffer does not protrude to the opening side, so that it is possible to prevent the protrusion of the buffer from causing optical noise. effective.
[0117]
In the invention of the semiconductor element mounting board of claim 13, in any of the inventions of claims 8 to 12, the notch portion cut out from the upper end toward the lower end is formed in a part of the buffer portion. When the semiconductor device is pressed against the buffer portion, the portion between the cutout portions of the buffer portion is opened. Therefore, by pressing the semiconductor device against the buffer portion with a small force, the semiconductor device can be mounted at a predetermined height, and the semiconductor device can be mounted. This has the effect of improving the reliability of the device.
[0118]
In the invention of the semiconductor element mounting board of claim 14, in any of the inventions of claims 8 to 13, the width of the buffer is set to about 10 to about 50 μm, so that when the semiconductor element is pressed against the buffer, There is an effect that a semiconductor element can be mounted without reporting a crack due to the pressure from the sealing resin that is swept away and without damaging the semiconductor element.
[0119]
In the invention of a semiconductor element mounting board according to a fifteenth aspect, in the invention according to any one of the first to fourteenth aspects, the electrode portion is formed in a convex shape protruding upward from the surface of the circuit board. Therefore, the force of the sealing resin 7 pressing against the joint portion between the electrode portion 5 and the electrode 11 at the time of curing shrinkage is increased, and the reliability of the joining is improved. This has the effect of preventing electrode peeling due to a difference in thermal expansion between the electrodes.
[0120]
In the invention of the semiconductor device mounting board of claim 16, in any one of the inventions of claims 1 to 15, at least the inner peripheral surface near the upper end of the buffer portion is black, so that irregular reflection and the like hardly occur, and noise is reduced. There is an effect that generation can be prevented.
[0121]
In the method for manufacturing a semiconductor element mounting board according to the seventeenth aspect of the present invention, an opening through which an electromagnetic wave passes is provided, and a projection is formed integrally on a surface near the opening so as to surround a part or the entire circumference of the opening. And a circuit board having an electrode portion formed outside a portion surrounded by the convex portion,
The light-receiving surface or the light-emitting surface faces the opening, and is disposed above the convex portion of the circuit board, and an electrical connection is provided by interposing a bump between the electrode provided on the surface facing the circuit board and the electrode portion. A semiconductor element comprising an optical element which has been bonded together,
In the method for manufacturing a semiconductor element mounting substrate, wherein a bonding portion formed of the electrode, the bump, and the electrode portion is sealed with a sealing resin,
A step of applying a sealing resin to the surface of the circuit board so as to include the electrode portion around the outer periphery of the convex portion,
The semiconductor element is pressed into contact with a buffer portion formed at the upper end of the convex portion so that the light receiving surface or the light emitting surface of the semiconductor element faces the opening, and the semiconductor element is disposed on the electrode portion. Press-contacting the electrodes via bumps;
A step of curing the sealing resin and sealing a joint portion of the electrode of the semiconductor element, the bump, and the electrode portion of the circuit board with the sealing resin. A substrate can be obtained.
[0122]
In the method for manufacturing a semiconductor element mounting substrate according to the eighteenth aspect of the present invention, there is provided an opening through which an electromagnetic wave passes, and a projection integrally projecting from a surface near the opening so as to surround a part or the entire circumference of the opening. And a circuit board having an electrode portion formed outside a portion surrounded by the convex portion,
The light-receiving surface or the light-emitting surface faces the opening, and is disposed above the convex portion of the circuit board, and an electrical connection is provided by interposing a bump between the electrode provided on the surface facing the circuit board and the electrode portion. A semiconductor element comprising an optical element which has been bonded together,
In the method for manufacturing a semiconductor element mounting board, wherein a bonding portion including the electrode, the bump and the electrode portion is sealed with a sealing resin applied between the semiconductor element and the circuit board,
Applying a first sealing resin to the surface of the circuit board located outside the electrode portion along the outside portion of the electrode portion;
A step of temporarily mounting the semiconductor element by curing the first sealing resin while pressing the electrode against the electrode part via a bump so that the semiconductor element does not contact the upper part of the projection after the application,
After the provisional mounting, a step of applying and curing a second sealing resin along the electrode portion on the circuit board surface between the electrode portion and the convex portion to completely mount the semiconductor element. Therefore, the semiconductor element can be mounted while preventing the sealing resin from leaking into the opening. In particular, it is not necessary to provide a buffer portion for press-contacting the semiconductor element on the projecting side of the circuit board. However, there is no danger of damage, and there is an effect that productivity is improved.
[0123]
In the method for manufacturing a semiconductor element mounting board according to the nineteenth aspect, in the invention according to the eighteenth aspect, the inside of the opening is pressurized at the time of injecting the sealing resin in the main mounting step. Leakage can be reliably prevented, and the productivity can be further improved.
[0124]
According to a twentieth aspect of the present invention, in the invention of the eighteenth aspect, the pressurizing causes the air in the opening to expand by heating the air in the opening after closing the opening. Therefore, the present invention has the same effect as that of the nineteenth aspect, and also has the effect of being easy to implement.
[0125]
According to a twenty-first aspect of the present invention, in the method of any one of the eighteenth to twentieth aspects, a concave groove is formed as a surface of the circuit board between the convex part and the electrode part. Since the second circuit board is used, it is possible to more reliably prevent the second sealing resin from leaking to the opening side.
[0126]
In the invention of the method for manufacturing a semiconductor element mounting board according to claim 22, in the invention according to any one of claims 18 to 21, the circuit board is provided on a surface between the projection and the electrode portion in parallel with the projection. Since the circuit board having another convex portion is used, the second sealing resin can be more reliably prevented from leaking to the opening without damaging the semiconductor element.
[0127]
In the invention of the method for manufacturing a semiconductor element mounting board according to claim 23, an opening through which an electromagnetic wave passes is provided, and a projection integrally formed on a surface near the opening so as to surround a part or the entire circumference of the opening. And a circuit board having an electrode portion formed outside a portion surrounded by the convex portion,
The light-receiving surface or the light-emitting surface faces the opening, and is disposed above the convex portion of the circuit board, and an electrical connection is provided by interposing a bump between the electrode provided on the surface facing the circuit board and the electrode portion. A semiconductor element comprising an optical element which has been bonded together,
In a method for manufacturing a semiconductor element mounting substrate for sealing a bonding portion formed of the electrode, the bump and the electrode portion with a resin,
Attaching an anisotropic conductive film to the surface of the circuit board by pressing and heating while placing the electrode portion on the surface of the circuit board around the outer periphery of the convex portion,
After this step, the semiconductor element is placed on the anisotropic conductive film while the bumps formed on the electrodes of the semiconductor element are passed through the anisotropic conductive film and pressed against the electrode portion, and the A process in which a semiconductor element is adhered and fixed on the upper surface of the anisotropic conductive film by heating, and a joint portion composed of the electrodes, bumps, and electrode portions is sealed with the anisotropic conductive film. Since there is no room for such leakage as described above, the productivity is improved, and the anisotropic conductive film does not protrude toward the opening at the convex portion, so that there is no increase in optical noise.
[Brief description of the drawings]
FIG. 1 is a process explanatory view of a manufacturing method according to a first embodiment of the present invention.
FIG. 2A is a front sectional view of a circuit board used in a second embodiment of the present invention.
(B) is a top view of the circuit board used for the same.
FIG. 3 is a process explanatory view of the manufacturing method.
FIG. 4 is a process explanatory view of the manufacturing method.
FIG. 5 is a front sectional view of the semiconductor element and the circuit board in a sealing resin applying step in the manufacture of the semiconductor element mounting board showing the example of the circuit board used in the above.
FIG. 6 is a front sectional view of a semiconductor element and a circuit board in a sealing resin applying step in the manufacture of a semiconductor element mounting board showing another example of a circuit board used in the above.
FIG. 7A is a front sectional view of a semiconductor element and a circuit board in a sealing resin application step in manufacturing a semiconductor element mounting board corresponding to Embodiment 3 of the present invention.
(B) is a partially omitted cross-sectional view for explaining a main part of the circuit board used in the above.
FIG. 8A is a front sectional view of a semiconductor element and a circuit board in a sealing resin applying step in manufacturing a semiconductor element mounting board corresponding to Embodiment 4 of the present invention.
(B) is a partially omitted cross-sectional view for explaining a main part of the circuit board used in the above.
FIG. 9 is a front sectional view of a semiconductor element and a circuit board in a sealing resin applying step in manufacturing a semiconductor element mounting board corresponding to Embodiment 5 of the present invention.
FIG. 10A is a front sectional view of a semiconductor element and a circuit board in a sealing resin applying step in manufacturing a semiconductor element mounting board corresponding to Embodiment 6 of the present invention.
(B) is a partially omitted front cross-sectional view for explaining a main part of the circuit board used in the above.
FIG. 11A is a front sectional view of a semiconductor element and a circuit board in a sealing resin applying step in manufacturing a semiconductor element mounting board corresponding to Embodiment 7 of the present invention.
(B) is a partially omitted cross-sectional view for explaining a main part of the circuit board used in the above.
FIG. 12A is a front sectional view of a semiconductor element and a circuit board in a sealing resin applying step in manufacturing a semiconductor element mounting board corresponding to Embodiment 8 of the present invention;
(B) is a partially omitted front cross-sectional view for explaining a main part of the circuit board used in the above.
FIG. 13 is a top view of a circuit board used in Embodiment 9 of the present invention.
FIG. 14 is an explanatory diagram showing steps of the manufacturing method according to the tenth embodiment of the present invention.
FIG. 15 is a process explanatory view of the manufacturing method.
FIG. 16 is an explanatory diagram of a process when applying a second sealing resin according to the eleventh embodiment of the present invention.
FIG. 17 is an explanatory diagram of a step during application of a second sealing resin according to the twelfth embodiment of the present invention.
FIG. 18 is a front sectional view of a semiconductor element and a circuit board in a step of applying a first sealing resin in Embodiment 13 of the present invention.
FIG. 19 is a front sectional view of a semiconductor element and a circuit board in a step of applying a first sealing resin in Embodiment 14 of the present invention.
FIG. 20 is an explanatory diagram showing steps of the manufacturing method according to the fifteenth embodiment of the present invention.
FIG. 21A is a front sectional view of a semiconductor element and a circuit board in a sealing resin applying step in manufacturing a semiconductor element mounting board corresponding to Embodiment 16 of the present invention;
(B) is a partially omitted front sectional view for explaining a main part of the circuit board used in the above.
[Explanation of symbols]
1 Semiconductor element
2 Circuit board
3 opening
4 Gold bump
5 Electrode section
6 Circuit pattern
7 sealing resin
8 convex part
10. Semiconductor element mounting board

Claims (23)

電磁波が通過する開口部を備え、該開口部の近傍の表面に前記開口部の一部乃至全周を囲むように一体突出させた凸部を設けるとともに、該凸部が囲う部位の外側に電極部を形成した回路基板と、
前記開口部に受光面若しくは発光面が臨むように前記回路基板の凸部上方に配置され、前記回路基板側に対向する面に設けた電極と前記電極部との間にバンプを介在させて電気的に接合した光素子からなる半導体素子と、から成り、
前記電極、前記バンプ及び前記電極部からなる接合部位を封止樹脂で封止していることを特徴とする半導体素子実装基板。An opening through which the electromagnetic wave passes is provided, and a projection integrally protruding so as to surround a part or the entire periphery of the opening is provided on a surface near the opening, and an electrode is provided outside a portion surrounded by the projection. A circuit board formed with a part,
The light-receiving surface or the light-emitting surface faces the opening, and is disposed above the convex portion of the circuit board, and an electrical connection is provided by interposing a bump between the electrode provided on the surface facing the circuit board and the electrode portion. A semiconductor element comprising an optical element which has been bonded together,
A semiconductor element mounting board, wherein a joint portion formed of the electrode, the bump, and the electrode portion is sealed with a sealing resin. 前記回路基板として、少なくとも前記封止樹脂が塗布硬化される部位に対応する前記凸部の上端部に前記半導体素子の対向面に圧接する緩衝部を設けている回路基板を用いていることを特徴とする請求項１記載の半導体素子実装基板。As the circuit board, a circuit board provided with a buffer portion at least at an upper end portion of the convex portion corresponding to a portion where the sealing resin is applied and cured, which is in pressure contact with the facing surface of the semiconductor element, is used. The semiconductor element mounting board according to claim 1. 前記緩衝部の材料として前記回路基板の樹脂材料の弾性率よりも小さい材料を用いていることを特徴とする請求項２記載の半導体素子実装基板。3. The semiconductor element mounting board according to claim 2, wherein a material smaller than an elastic modulus of a resin material of the circuit board is used as a material of the buffer portion. 前記緩衝部の材料として熱膨張率が前記封止樹脂の熱膨張率よりも大きな材料を用いたことを特徴とする請求項２又は３記載の半導体素子実装基板。4. The semiconductor element mounting board according to claim 2, wherein a material having a coefficient of thermal expansion higher than that of the sealing resin is used as a material of the buffer portion. 前記緩衝部の材料としてガラス転移温度が前記封止樹脂の硬化温度よりも低い材料を用いたことを特徴とする請求項２乃至４の何れか記載の半導体素子実装基板。5. The semiconductor element mounting substrate according to claim 2, wherein a material having a glass transition temperature lower than a curing temperature of said sealing resin is used as a material of said buffer portion. 前記緩衝部を下方にスライド可能に上記凸部の上端部に設けていることを特徴とする請求項２又は３記載の半導体素子実装基板。4. The semiconductor element mounting board according to claim 2, wherein said buffer portion is slidably provided at an upper end portion of said convex portion. 前記緩衝部の上面の高さ位置を塗布時の封止樹脂の上面の高さ位置より高くしていることを特徴とする請求項２乃至６の何れか記載の半導体素子実装基板。The semiconductor element mounting substrate according to claim 2, wherein a height position of an upper surface of the buffer portion is higher than a height position of an upper surface of the sealing resin at the time of application. 前記記緩衝部を前記凸部の上端部に全周に亘って一体に上方へ突出形成するとともに、前記緩衝部の幅寸法を、前記凸部の幅寸法より小さく形成していることを特徴とする請求項２記載の半導体素子実装基板。The buffer portion is integrally formed at the upper end portion of the convex portion so as to protrude upward over the entire circumference, and the width of the buffer portion is formed to be smaller than the width of the convex portion. The substrate for mounting a semiconductor element according to claim 2. 前記凸部及び前記緩衝部を含めた前記回路基板が射出成形されたものであって、その樹脂材料として、前記緩衝部の前記幅寸法より大きな径のフィラーを混入した樹脂材料を用いていることを特徴とする請求項８記載の半導体素子実装基板。The circuit board including the projections and the buffer portion is injection-molded, and as the resin material, a resin material mixed with a filler having a diameter larger than the width dimension of the buffer portion is used. The semiconductor element mounting board according to claim 8, wherein: 前記緩衝部を外側に傾斜させていることを特徴とする請求項８又は９の何れか記載の半導体素子実装基板。10. The semiconductor element mounting board according to claim 8, wherein the buffer is inclined outward. 前記緩衝部の突出位置より外側に位置する前記凸部の上端部に、前記緩衝部の高さと略同じ高さの別の緩衝部を全周に亘って一体に突出形成していることを特徴とする請求項８記載の半導体素子実装基板。At the upper end portion of the convex portion located outside the projecting position of the buffer portion, another buffer portion having substantially the same height as the buffer portion is integrally formed so as to protrude over the entire circumference. The semiconductor element mounting board according to claim 8, wherein 前記緩衝部の下端から上端までの高さ寸法を、上記凸部の上端開口縁から前記緩衝部の下端までの最短距離より短い寸法としていることを特徴とする請求項８記載の半導体素子実装基板。9. The semiconductor element mounting board according to claim 8, wherein the height from the lower end to the upper end of the buffer is shorter than the shortest distance from the upper edge of the opening to the lower end of the buffer. . 前記緩衝部の一部に上端より下端方向に切り欠いた切欠部を形成していることを特徴とする請求項８乃至１２の何れか記載の半導体素子実装基板。13. The semiconductor element mounting board according to claim 8, wherein a cutout portion cut out from an upper end to a lower end direction is formed in a part of the buffer portion. 前記緩衝部の幅寸法を略１０乃至略５０μｍとしていることを特徴する請求項８乃至１３の何れか記載の半導体素子実装基板。14. The semiconductor element mounting board according to claim 8, wherein a width dimension of said buffer portion is set to be about 10 to about 50 μm. 前記電極部を回路基板の表面より上方へ突出せる凸形状に形成していることを特徴とする請求項１乃至１４の何れか記載の半導体素子実装基板。15. The semiconductor element mounting board according to claim 1, wherein the electrode portion is formed in a convex shape protruding above a surface of the circuit board. 前記緩衝部の少なくとも上端近傍の内周面を黒色としていることを特徴とする請求項１乃至１５の何れか記載の半導体素子実装基板。16. The semiconductor element mounting board according to claim 1, wherein at least an inner peripheral surface near an upper end of said buffer portion is black. 電磁波が通過する開口部を備え、該開口部の近傍の表面に前記開口部の一部乃至全周を囲むように一体突出させた凸部を設けるとともに、該凸部が囲う部位の外側に電極部を形成した回路基板と、
前記開口部に受光面若しくは発光面が臨むように前記回路基板の凸部上方に配置され、前記回路基板側に対向する面に設けた電極と前記電極部との間にバンプを介在させて電気的に接合した光素子からなる半導体素子と、から成り、
前記電極、前記バンプ及び前記電極部からなる接合部位を封止樹脂で封止している半導体素子実装基板の製造方法において、
前記凸部の外側周辺で且つ前記電極部を内包するように前記回路基板表面に封止樹脂を塗布する工程と、
前記凸部の上端部に突出形成した緩衝部に前記半導体素子を圧接させて前記開口部に半導体素子の受光面若しくは発光面が臨むように半導体素子を配置し、且つ前記電極部に前記半導体素子の電極をバンプを介して圧接させる工程と、
前記封止樹脂を硬化させ、前記半導体素子の電極、バンプ、回路基板の電極部による接合部位を封止樹脂で封止する工程とから成ることを特徴とする半導体素子実装基板の製造方法。An opening through which the electromagnetic wave passes is provided, and a projection integrally protruding so as to surround a part or the entire periphery of the opening is provided on a surface near the opening, and an electrode is provided outside a portion surrounded by the projection. A circuit board formed with a part,
The light-receiving surface or the light-emitting surface faces the opening, and is disposed above the convex portion of the circuit board, and an electrical connection is provided by interposing a bump between the electrode provided on the surface facing the circuit board and the electrode portion. A semiconductor element comprising an optical element which has been bonded together,
In the method for manufacturing a semiconductor element mounting substrate, wherein a bonding portion formed of the electrode, the bump, and the electrode portion is sealed with a sealing resin,
A step of applying a sealing resin to the surface of the circuit board so as to include the electrode portion around the outer periphery of the convex portion,
The semiconductor element is pressed into contact with a buffer portion formed at the upper end of the convex portion so that the light receiving surface or the light emitting surface of the semiconductor element faces the opening, and the semiconductor element is disposed on the electrode portion. Press-contacting the electrodes via bumps;
Curing the sealing resin, and sealing the joint of the semiconductor element electrodes, bumps, and electrode portions of the circuit board with the sealing resin. 電磁波が通過する開口部を備え、該開口部の近傍の表面に前記開口部の一部乃至全周を囲むように一体突出させた凸部を設けるとともに、該凸部が囲う部位の外側に電極部を形成した回路基板と、
前記開口部に受光面若しくは発光面が臨むように前記回路基板の凸部上方に配置され、前記回路基板側に対向する面に設けた電極と前記電極部との間にバンプを介在させて電気的に接合した光素子からなる半導体素子と、から成り、
前記電極、前記バンプ及び前記電極部からなる接合部位を前記半導体素子と前記回路基板との間で塗布させた封止樹脂により封止する半導体素子実装基板の製造方法において、
前記電極部の外側に位置する回路基板の表面に前記電極部の外側部に沿うように第１の封止樹脂を塗布する工程と、
この塗布後に前記半導体素子を前記凸部の上部に接しないように前記電極をバンプを介して前記電極部に圧接させながら第１の封止樹脂を硬化させて半導体素子を仮実装する工程と、
この仮実装の後、前記電極部と前記凸部との間の前記回路基板表面に前記電極部に沿うように第２の封止樹脂を塗布して硬化させ半導体素子を本実装する工程とから成ることを特徴とする半導体素子実装基板の製造方法。An opening through which the electromagnetic wave passes is provided, and a projection integrally protruding so as to surround a part or the entire periphery of the opening is provided on a surface near the opening, and an electrode is provided outside a portion surrounded by the projection. A circuit board formed with a part,
The light-receiving surface or the light-emitting surface faces the opening, and is disposed above the convex portion of the circuit board, and an electrical connection is provided by interposing a bump between the electrode provided on the surface facing the circuit board and the electrode portion. A semiconductor element comprising an optical element which has been bonded together,
In the method for manufacturing a semiconductor element mounting board, wherein a bonding portion including the electrode, the bump and the electrode portion is sealed with a sealing resin applied between the semiconductor element and the circuit board,
Applying a first sealing resin to the surface of the circuit board located outside the electrode portion along the outside portion of the electrode portion;
A step of temporarily mounting the semiconductor element by curing the first sealing resin while pressing the electrode against the electrode part via a bump so that the semiconductor element does not contact the upper part of the projection after the application,
After the provisional mounting, a step of applying and curing a second sealing resin along the electrode portion on the circuit board surface between the electrode portion and the convex portion to completely mount the semiconductor element. A method for manufacturing a semiconductor element mounting substrate, comprising: 前記本実装の工程における封止樹脂注入時に前記開口部内を加圧することを特徴とする請求項１８記載の半導体素子実装基板の製造方法。19. The method according to claim 18, wherein the inside of the opening is pressurized when the sealing resin is injected in the main mounting step. 前記加圧は、前記開口部を密閉状態とした後、前記開口部内の空気を加熱して空気を膨張させることで行うことを特徴とする請求項１８記載の半導体素子実装基板の製造方法。19. The method according to claim 18, wherein the pressurizing is performed by heating the air in the opening to expand the air after the opening is sealed. 前記回路基板として、凸部と前記電極部との間の表面に凹溝を形成している回路基板を用いることを特徴とする請求項１８乃至２０の何れか記載の記載の半導体素子実装基板の製造方法。21. The semiconductor element mounting board according to claim 18, wherein a circuit board having a concave groove formed on a surface between the convex portion and the electrode portion is used as the circuit board. Production method. 前記回路基板として、前記凸部と前記電極部との間の表面に前記凸部と並行するように別の凸部を形成している回路基板を用いることを特徴とする請求項１８乃至２１の何れか記載の記載の半導体素子実装基板の製造方法。22. The circuit board according to claim 18, wherein a circuit board having another projecting portion formed on the surface between the projecting portion and the electrode portion so as to be parallel to the projecting portion is used as the circuit board. A method for manufacturing a semiconductor element mounting board according to any one of the preceding claims. 電磁波が通過する開口部を備え、該開口部の近傍の表面に前記開口部の一部乃至全周を囲むように一体突出させた凸部を設けるとともに、該凸部が囲う部位の外側に電極部を形成した回路基板と、
前記開口部に受光面若しくは発光面が臨むように前記回路基板の凸部上方に配置され、前記回路基板側に対向する面に設けた電極と前記電極部との間にバンプを介在させて電気的に接合した光素子からなる半導体素子と、から成り、
前記電極、前記バンプ及び前記電極部からなる接合部位を樹脂で封止する半導体素子実装基板の製造方法において、
前記凸部の外側周辺の前記回路基板表面に、前記電極部を内包するように載置するとともに加圧・加熱により異方性導電フィルムを前記回路基板表面に貼り付ける工程と、
この工程後に、前記半導体素子の前記電極に形成しているバンプを異方性導電フィルムを貫通させて前記電極部に圧接させながら半導体素子を異方性導電フィルム上に載置し、加圧・加熱により異方性導電フィルムの上面に半導体素子を貼り付け固定し且つ異方性導電フィルムで前記電極、バンプ、電極部からなる接合部を封止する工程と、から成ることを特徴とする半導体素子実装基板の製造方法。An opening through which the electromagnetic wave passes is provided, and a projection integrally protruding so as to surround a part or the entire periphery of the opening is provided on a surface near the opening, and an electrode is provided outside a portion surrounded by the projection. A circuit board formed with a part,
The light-receiving surface or the light-emitting surface faces the opening, and is disposed above the convex portion of the circuit board, and an electrical connection is provided by interposing a bump between the electrode provided on the surface facing the circuit board and the electrode portion. A semiconductor element comprising an optical element which has been bonded together,
In a method for manufacturing a semiconductor element mounting substrate for sealing a bonding portion formed of the electrode, the bump and the electrode portion with a resin,
Attaching an anisotropic conductive film to the surface of the circuit board by pressing and heating while placing the electrode portion on the surface of the circuit board around the outer periphery of the convex portion,
After this step, the semiconductor element is placed on the anisotropic conductive film while the bumps formed on the electrodes of the semiconductor element are passed through the anisotropic conductive film and pressed against the electrode portion, and the Bonding a semiconductor element to the upper surface of the anisotropic conductive film by heating and sealing the joint comprising the electrodes, bumps, and electrode portions with the anisotropic conductive film. A method for manufacturing an element mounting board.
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