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JP2004134653A - Substrate connecting structure and fabricating process of electronic parts therewith - Google Patents

Substrate connecting structure and fabricating process of electronic parts therewith Download PDF

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Publication number
JP2004134653A
JP2004134653A JP2002299061A JP2002299061A JP2004134653A JP 2004134653 A JP2004134653 A JP 2004134653A JP 2002299061 A JP2002299061 A JP 2002299061A JP 2002299061 A JP2002299061 A JP 2002299061A JP 2004134653 A JP2004134653 A JP 2004134653A
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JP
Japan
Prior art keywords
substrate
conductive particles
electrodes
bump
connection structure
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Pending
Application number
JP2002299061A
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Japanese (ja)
Inventor
Takashi Matsui
松井 隆司
Masayuki Matsumoto
松本 将之
Motoji Shioda
塩田 素二
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Sharp Corp
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Sharp Corp
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Priority to JP2002299061A priority Critical patent/JP2004134653A/en
Publication of JP2004134653A publication Critical patent/JP2004134653A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To make it possible to contribute to heightening an added value of a liquid crystal display by enhancing its sophistication and narrowing its picture frame due to enabling application to reduction in electrode pitch with reliability ensured in both connection and insulation resistance, with regard to a substrate connecting structure of the liquid crystal display in which conductive particles ACF 10 are intervened between a display substrate 8b of a liquid crystal panel 1 and a driving IC 4, the display substrate 8b and the drive IC 4 are connected mechanically to each other by an insulative adhesive agent 12 within the ACF 10, and pads 7 on the display substrate 8b and bump electrodes 9 on the drive IC 4 are connected electrically by the conductive particles 11 within the ACF 10. <P>SOLUTION: Insulation bodies 13 with much the same heights as those of the bump electrodes 9 are arranged between the bump electrodes 9 and 9 that are juxtaposed to each other on the drive IC 4. <P>COPYRIGHT: (C)2004,JPO

Description

【0001】
【発明の属する技術分野】
本発明は、バンプ電極を有するICチップやLEDチップなどの半導体基板と電極を有する回路基板とを異方性導電接着剤を用いてフェイスダウンボンディング接続するようにした基板接続構造に関し、特に、異方性導電接着剤中の導電性粒子によるバンプ電極間の短絡を防止する対策に関する。
【0002】
【従来の技術】
一般に、携帯電話などの表示装置として、液晶表示装置が用いられていることは広く知られている。この液晶表示装置は、一対の基板の間に液晶層が挟持されてなる液晶パネルを有しており、一対の基板のうち、IC搭載部を有する表示基板(回路基板)には、表示信号および走査信号を供給するための半導体基板としての液晶駆動用IC回路基板(半導体基板。以下、駆動用ICという)が実装されている。
【0003】
上記駆動用ICの実装構造としては、TCP(Tape Carrier Package)を用いた構造が一般に知られているが、近年では、低コスト,高信頼性,薄形化などの観点から、駆動用ICを表示基板にベアチップ実装するようにしたCOG(ChipOn Glass )方式が見られるようになってきており、このCOG方式の中でも、駆動用ICの電極を突起状のバンプ電極に形成し、このバンプ電極と、表示基板のIC搭載部上に形成されたパッド(ボンディングパッド)とをフェイスダウンボンディング接続するようにした接続構造が一般的である。そして、COG方式の接続構造としては、駆動用ICのバンプ電極を半田にて形成し、これを溶融してIC搭載部のパッドと接続するようにしたものなどもあるが、近年では、バンプ電極をAuなどの金属により形成し、異方性導電接着剤によりパッドと接続するようにした接続構造が主流となっている。
【0004】
異方性導電接着剤とは、絶縁性接着剤中に導電性粒子を拡散させてなるものであって、異方性導電接着剤中の導電性粒子が、バンプ電極とパッドとの間に挟み込まれることで、駆動用ICと液晶パネルとの間に導通が得られるようになっている。したがって、異方性導電接着剤を用いた接続構造では、両基板間の接続ピッチが駆動用ICにおけるバンプ電極の高さのみに依存し、また、相隣るバンプ電極間に絶縁性接着剤が充填されるため、バンプ電極間に十分な絶縁性を容易に確保できるなどの利点を有している。
【0005】
ここで、液晶パネルの表示基板に駆動用ICをフェイスダウンボンディング接続するようにした従来の基板接続構造について具体的に説明する。
【0006】
図6は、バンプ電極59,59,…を有する従来の駆動用IC54の平面図を示している。また、図7〜図8は、異方性導電接着剤として、絶縁性接着剤62に均一サイズの導電性粒子61,61,…が混在されてなるACF60(Anisotoropic Conductive Film)と呼ばれる異方性導電膜を用いてフェイスダウンボンディング接続するようにした表示基板58と駆動用IC54との従来の接続構造を示しており、表示基板58と駆動用IC54との間に、ACF60が介在している。表示基板58上のパッド57と、駆動用IC54上のバンプ電極59との間には、このACF60に含まれる導電性粒子61,61,…が挟まれており、各導電性粒子61の周囲には、絶縁性接着剤62が充填されている。
【0007】
このようなACF60を用いた基板接続構造では、まず、表示基板58にACF60が圧着され、次いで、表示基板58と駆動用IC54との位置合わせが行われ、その後、圧着ツール56にて、駆動用IC54側より加熱圧着が施される。このように加熱圧着されることで、パッド57とバンプ電極59との間の導電性粒子61,61,…は、パッド57およびバンプ電極59間に挟まれて厚み方向に弾性変形(扁平)し、その周りの絶縁性接着剤62が硬化することで、変形状態を保持したまま固定されることとなる。その結果、パッド57とバンプ電極59との導通が確保され、電気的接続が実現される。また、硬化した絶縁性接着剤62にて、表示基板58と駆動用IC54との機械的接続も実現される。
【0008】
尚、このような導電性粒子を弾性変形させて両電極間の導通を確保するようにした接続構造は、例えば、特許文献1に記載されている。
【0009】
【特許文献1】
特開平10−206874号公報(第1頁、図1)
【特許文献2】
特開平5−74850号公報(第1頁、図1)
【0010】
【発明が解決しようとする課題】
ところで、近年では、液晶表示装置の高精細化ないし狭額縁化に伴い、電極の配設ピッチを縮小化することが進んでおり、このことから、上記従来の接続構造では、図9に模式的に示すように、相隣るバンプ電極59,59間において、導電性粒子61、61,…が繋がるような現象が生じ、その結果、電極59,59同士が短絡してしまうという問題がある。
【0011】
尚、これに対しては、例えば、特許文献2に記載されているように、TAB式半導体装置とガラス基板との接続に当り、半導体装置上のバンプ電極(リード)周りに、バンプ電極の高さよりも高い凸部を設け、これにより、半導体装置表面のバンプ電極部分に所定深さ(5〜10μm)の凹部が形成されるようにする一方、ガラス基板上の電極を上記凹部の深さと同じ寸法の厚さに形成しておき、凹部内にのみ異方性導電接着剤が充填されるようにすることで、導電性粒子がバンプ電極間に分散してバンプ電極同士がショートするのを防止するようにした技術が知られているが、このものでは、ガラス基板を半導体装置に加圧する際に、凸部が邪魔になって両電極間にギャップを生じる虞れがあり、そのような場合には、導電性粒子を十分に弾性変形させることができないために相対向する電極間の確実な電気的接続が得られにくいという別の問題がある。
【0012】
本発明は、斯かる点に鑑みて成されたものであり、その主な目的は、異方性導電接着剤により回路基板と半導体基板とを機械的に接続するとともに回路基板上の電極と半導体基板上のバンプ電極とを電気的に接続するようにした液晶表示装置などにおける基板接続構造において、半導体基板上の隣り合うバンプ電極同士が、異方性導電接着剤中の導電性粒子により短絡するのを回避できるようにし、もって、相隣る電極間における絶縁抵抗信頼性と、相対向する電極間の電気的接続の確実性とを損なうことなく、電極ピッチの縮小化に対応できるようにすることにある。
【0013】
【課題を解決するための手段】
上記の目的を達成すべく、本発明では、半導体基板上のバンプ電極間に、該バンプ電極と略同じ高さの絶縁体を配置し、このことで、両電極間に介在する導電性粒子の分散を防止するとともに、該導電性粒子を弾性変形させる際に絶縁体が邪魔にならないようにした。
【0014】
具体的には、請求項1の発明では、電極を有する回路基板と、突起状のバンプ電極を有する半導体基板との間に、絶縁性接着剤中に導電性粒子が分散されてなる異方性導電接着剤を介在させ、上記絶縁性接着剤により回路基板と半導体基板とを機械的に接続するとともに、上記導電性粒子により回路基板上の電極と半導体基板上のバンプ電極とを電気的に接続するようにした基板接続構造を前提としている。
【0015】
そして、上記半導体基板上のバンプ電極間には、該バンプ電極と略同じ高さの絶縁体が配置されているものとする。
【0016】
これにより、回路基板と半導体基板とが互いに圧着される際に、回路基板上の電極と半導体基板上のダンプ電極との間に介在する導電性粒子は、絶縁体により分散が抑制され、しかも、絶縁体の邪魔を受けずに弾性変形できることとなる。
【0017】
請求項2の発明では、請求項1の発明において、絶縁体の硬度が、導電性粒子の硬度よりも小さくされているものとする。
【0018】
これにより、絶縁体と回路基板との間に介在する導電性粒子は、該絶縁体および回路基板間に挟まれたときに、絶縁体の硬度が導電性粒子の硬度と同じないしそれよりも高い場合に比べて、扁平状に変形しにくく、よって、複数の導電性粒子が扁平化して繋がることによるバンプ電極間の短絡は生じにくくなる。
【0019】
請求項3の発明では、請求項1および2の発明において、導電性粒子の硬度が、バンプ電極の硬度よりも小さくされているものとする。
【0020】
これにより、回路基板上の電極と、半導体基板上のバンプ電極との間に介在する導電性粒子は、該両電極間に挟まれたときに、導電性粒子の硬度がバンプ電極の硬度と同じないしそれよりも高い場合に比べて、扁平状に変形しやすく、よって、両電極間の電気的接続が確実化する。
【0021】
請求項4の発明では、請求項1〜3の発明において、絶縁体は、隣接するバンプ電極間を横切る方向に長い平面形状をなしているものとする。
【0022】
これにより、回路基板上の電極と半導体基板上のバンプ電極との間に介在する導電性粒子が該バンプ電極に隣接するバンプ電極との間に分散することが効率よく抑制される。
【0023】
請求項5の発明では、電子部品として、請求項1〜4の発明に係る基板接続構造を備えているものとする。
【0024】
これにより、導電性粒子によるバンプ電極間の短絡の少ない高集積度の電子部品が得られる。
【0025】
請求項6の発明では、液晶表示装置として、請求項1〜4の発明に係る基板接続構造を備えているものとする。
【0026】
これにより、導電性粒子によるバンプ電極間の短絡の少ない高精細ないし狭額縁の液晶表示装置が得られる。
【0027】
請求項7の発明では、電子部品の製造方法として、電極を有する回路基板と、バンプ電極を有する半導体基板との間に、絶縁性接着剤中に導電性粒子が分散されてなる異方性導電接着剤を介在させ、回路基板と半導体基板とを電極同士を対向させて挟圧することで、絶縁性接着剤により回路基板と半導体基板とを機械的に接続するとともに、導電性粒子により回路基板上の電極と半導体基板上のバンプ電極とを電気的に接続する接続工程を備えていることを前提としている。
【0028】
そして、上記の接続工程において、半導体基板として、バンプ電極間に該バンプ電極と略同じ高さの絶縁体が配置されてなる半導体基板を用いるようにする。
【0029】
これにより、請求項1の発明の場合と同様の作用効果が得られる。
【0030】
【発明の実施の形態】
以下、本発明の実施形態を、図面に基づいて説明する。
【0031】
図2は、本発明の実施形態に係る液晶表示装置の要部の構成を模式的に示す平面図であり、この液晶表示装置では、COG方式にて液晶パネルにベアチップ実装される駆動用IC(液晶駆動用IC回路基板)を、該駆動用ICの有する突起状のボンディング用バンプ電極(以下、バンプ電極という)と、液晶パネル側の表示回路基板(以下、表示基板という)上のボンディングパッド(以下、パッドという)とがフェイスダウンボンディング接続されている。
【0032】
液晶パネル1は、大小一対の基板8a,8b間に図外の液晶層が封入されてなっていて、小さい方の基板8aの形状に合わせるように表示部2が形成されている。大きい方の基板8bは、上記の表示基板であり、この表示基板8bにおいて、表示部2の領域からはみ出した部分は、液晶駆動用IC搭載部3(以下、IC搭載部という)とされており、駆動用IC4は、このIC搭載部3に実装されている。また、IC搭載部3には、データ信号線および走査信号線を生成する基になる信号や電源を外部回路から供給するためのフレキシブル配線基板5(以下、FPCという)も接続されている。
【0033】
IC搭載部3には、図示は省略するが、上記の信号配線に接続された複数のパッドと、駆動用IC4に信号および電源を入力するための複数の入力配線と、これら入力配線の信号出力端に電気的に接続された複数のパッドと、上記入力配線の信号入力端に電気的に接続された複数のFPC入力端子とがそれぞれ形成されており、上記のFPC5は、FPC入力端子に電気的に接続されている。
【0034】
一方、駆動用IC4には、IC搭載部3上の信号配線に接続するパッドおよび入力配線の各信号出力端に接続するパッドにそれぞれ対応するように、図3の平面図に示す如く、複数のバンプ電極9が形成されている。また、表示基板8bのIC搭載部3と駆動用IC4との間には、絶縁性接着剤12に導電性粒子11が混合されてなる異方性導電接着剤としてのACF10が介在しており、絶縁性接着剤12により駆動用IC4と表示基板8bとが機械的に接続されているとともに、導電性粒子11により駆動用IC4上のバンプ電極9と該バンプ電極9に対応するIC搭載部3上のパッド7とが電気的に接続されている。
【0035】
そして、本実施形態では、図1に示すように、駆動用IC4上の各バンプ電極9,9間には、それぞれ、該バンプ電極9と略同じ高さの絶縁体13が配置されている。
【0036】
具体的には、各絶縁体13は、図4(a)〜同図(c)の各平面図にそれぞれ一例を示すように、矩形状,菱形状および楕円状など、相隣るバンプ電極9,9間を横切る方向(同各図の上下方向)に延びる平面形状をなしていて、バンプ電極状の突起物に形成されている。
【0037】
絶縁体13としては、一例として、絶縁材バンプ電極と同じ導電材料からなる突起物の表面を樹脂などの絶縁材により覆うようにしたものや、絶縁材のみからなるものであってもよく、そのような絶縁材の例としては、耐熱性のあるポリスルホンポリフェニレンサルファイド,ポリエーテルスルホン,ポリエーテルイミド,ポリイミド系の樹脂などが挙げられる。
【0038】
また、上記各絶縁体13の硬度は、表示基板8b上のパッド7の硬度よりも低くなされており、さらに、ACF10中の各導電性粒子11の硬度は、駆動用IC4上の各バンプ電極9の硬度よりも小さくなされている。
【0039】
上記のように構成された基板接続構造の作用を説明する。まず、表示基板8b上にACF10を圧着し、次いで、表示基板8bと駆動用IC4との位置合わせを行い、その後、図5の側面図に模式的に示すように、圧着ツール6にて、駆動用IC4を表示基板8b側に押圧しつつ加熱して該表示基板8bに加熱圧着し、この加熱圧着により、パッド7とバンプ電極9との間に介在する導電性粒子11のうちの一部は、樹脂流動に伴って分散しようとし、残部は、パッド7およびバンプ電極9間に挟まれて扁平状に変形しようとする。
【0040】
このとき、上記一部の導電性粒子11,11,…は、絶縁体13により、該バンプ電極9に隣接するバンプ電極9との間に分散することが抑制されるので、バンプ電極9,9間における導電性粒子11,11,…の繋がりは生じにくい。
【0041】
また、絶縁体13の硬度がバンプ電極9の硬度よりも低く、しかも、絶縁体13の高さがバンプ電極9の高さと略同じであるので、バンプ電極9とパッド7との間にギャップが生じにくい。よって、上記残部の導電性粒子11,11,…は、十分に変形してバンプ電極9とパッド7とを電気的に接続する。
【0042】
一方、バンプ電極9およびパッド7間以外の領域のうち、絶縁体13と表示基板8bとの間では、絶縁体13の硬度が導電性粒子11の硬度よりも低いので、導電性粒子11,11,…は、絶縁体13と表示基板8bとの間に挟まれても変形しにくい。よって、絶縁体13および表示基板8b間の導電性粒子11,11,…がバンプ電極9,9同士を短絡させるという事態は抑えられる。
【0043】
以上のようにして、絶縁性接着剤12が硬化することにより、図1に示したように、表示基板8bと駆動用IC4とが機械的に接続するとともに、パッド7とバンプ電極9との電気的に接続が固定されることとなる。
【0044】
したがって、本実施形態によれば、液晶パネル1の表示基板8bと駆動用IC4との間にACF10を介在させ、ACF10中の絶縁性接着剤12により表示基板8bと駆動用IC4とを機械的に接続するとともに、ACF10中の導電性粒子11,11,…により表示基板8b上のパッド7,7,…と駆動用IC4上のバンプ電極9,9,…とを電気的に接続するようにした液晶表示装置の基板接続構造として、駆動用IC4上の相隣る各バンプ電極9,9間に、該バンプ電極9と略同じ高さの絶縁体13を配置するようにしたので、導電性粒子11,11,…によるパッド7とバンプ電極9との間の電気的接続の確実性を維持しつつ、それら導電性粒子11,11,…によるバンプ電極9,9間の短絡を低減することができる。この結果、接続信頼性と絶縁抵抗信頼性とを共に確保しながら、高精細化および狭額縁化を図る上で不可欠な電極ピッチの縮小化に対応することが可能となり、よって、高付加価値を有する液晶表示装置の実現に寄与することができる。
【0045】
尚、上記の実施形態では、液晶表示装置における液晶パネル1の表示基板8bと駆動用IC4との接続構造について説明しているが、本発明は、種々の電子部品における基板接続構造に適用することができる。
【0046】
【発明の効果】
以上説明したように、請求項1の発明に係る基板接続構造、および請求項7の発明に係る電子部品の製造方法によれば、異方性導電接着剤を用いて回路基板と半導体基板とを接続するようにした基板接続構造において、バンプ電極間における異方性導電接着剤中の導電性粒子が繋がってバンプ電極同士を短絡させるのを抑えることができ、しかも、電極とバンプ電極との間の導電性粒子を絶縁体に邪魔されることなく扁平状に変形させることができ、よって、バンプ電極間における絶縁抵抗信頼性と、相対向する電極間の電気的接続の確実性とを損なうことなく、電極ピッチの縮小化にすることが対応できる。
【0047】
請求項2の発明によれば、導電性粒子が絶縁体および回路基板により挟まれたときに扁平状に弾性変形するのを回避することができるので、該導電性粒子がバンプ電極同士を短絡させるように繋がるのを防止することができ、よって、バンプ電極間における絶縁抵抗信頼性を高めることができる。
【0048】
請求項3の発明によれば、導電性粒子が電極およびバンプ電極に挟まれた導電性粒子を扁平状に容易に弾性変形させることができるので、両電極間の電気的接続のさらなる確実化を図ることができる。
【0049】
請求項4の発明によれば、電極およびバンプ電極間の導電性粒子が、隣接するバンプ電極との間に分散するのを効率よく抑制することができ、よって、請求項1の発明による効果を効率よく得ることができる。
【0050】
請求項5の発明に係る電子部品によれば、バンプ電極間における絶縁抵抗信頼性と、相対向する電極間の電気的接続の確実性とを損なうことなく、電極ピッチの縮小化による高集積化に対応することができる。
【0051】
請求項6の発明に係る液晶表示装置によれば、バンプ電極間における絶縁抵抗信頼性と、相対向する電極間の電気的接続の確実性とを損なうことなく、高精細化および狭額縁化を図る上で不可欠な電極ピッチの縮小化にすることができ、よって、液晶表示装置の高付加価値化に寄与することができる。
【図面の簡単な説明】
【図1】本発明の実施形態に係る液晶表示装置における液晶パネルの表示基板と駆動用ICとの接続構造を模式的に示す側面図である。
【図2】液晶表示装置の要部の構成を示す平面図である。
【図3】駆動用ICのバンプ電極側の面を示す平面図である。
【図4】矩形状(a),菱形状(b)および楕円状(c)の各絶縁体の平面形状を示す平面図である。
【図5】駆動用ICが表示基板に押圧されるときの状態を模式的に示す側面図である。
【図6】液晶表示装置において液晶パネルの表示基板に接続される従来の駆動用ICのダンプ電極側の面を示す平面図である。
【図7】従来の接続構造において駆動用ICが表示基板に押圧されるときの状態を模式的に示す図5相当図である。
【図8】表示基板と駆動用ICとの従来の接続構造を模式的に示す図1相当図である。
【図9】電極ピッチの縮小化に伴う従来の接続構造の問題を模式的に示す図1相当図である。
【符号の説明】
4 液晶駆動用IC回路基板(半導体基板)
7 ボンディングパッド(電極)
8 表示回路基板(回路基板)
9 ボンディング用バンプ電極(バンプ電極)
10 ACF(異方性導電接着剤)
11 導電性粒子
12 絶縁性接着剤
13 絶縁体
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a substrate connection structure in which a semiconductor substrate such as an IC chip or LED chip having a bump electrode and a circuit substrate having an electrode are connected by face-down bonding using an anisotropic conductive adhesive. The present invention relates to a measure for preventing a short circuit between bump electrodes due to conductive particles in an anisotropic conductive adhesive.
[0002]
[Prior art]
In general, it is widely known that a liquid crystal display device is used as a display device such as a mobile phone. This liquid crystal display device has a liquid crystal panel in which a liquid crystal layer is sandwiched between a pair of substrates. Among the pair of substrates, a display substrate (circuit substrate) having an IC mounting portion has display signals and A liquid crystal driving IC circuit board (semiconductor substrate, hereinafter referred to as a driving IC) is mounted as a semiconductor substrate for supplying scanning signals.
[0003]
As the mounting structure of the driving IC, a structure using TCP (Tape Carrier Package) is generally known. However, in recent years, from the viewpoint of low cost, high reliability, thinning, etc. A COG (Chip On Glass) system in which a bare chip is mounted on a display substrate has come to be seen. Among these COG systems, a driving IC electrode is formed as a protruding bump electrode. In general, a connection structure in which a pad (bonding pad) formed on the IC mounting portion of the display substrate is face-down bonded. In addition, as a connection structure of the COG method, there is a structure in which a bump electrode of a driving IC is formed by solder, and this is melted and connected to a pad of an IC mounting portion. A connection structure in which a metal is formed of a metal such as Au and is connected to a pad by an anisotropic conductive adhesive has become the mainstream.
[0004]
An anisotropic conductive adhesive is formed by diffusing conductive particles in an insulating adhesive, and the conductive particles in the anisotropic conductive adhesive are sandwiched between a bump electrode and a pad. As a result, conduction is obtained between the driving IC and the liquid crystal panel. Therefore, in the connection structure using the anisotropic conductive adhesive, the connection pitch between the two substrates depends only on the height of the bump electrode in the driving IC, and there is an insulating adhesive between adjacent bump electrodes. Since it is filled, there is an advantage that sufficient insulation can be easily secured between the bump electrodes.
[0005]
Here, a conventional substrate connection structure in which the driving IC is connected to the display substrate of the liquid crystal panel by face-down bonding will be specifically described.
[0006]
FIG. 6 shows a plan view of a conventional driving IC 54 having bump electrodes 59, 59,... 7 to 8 show an anisotropic called ACF60 (Anisotropic Conductive Film) in which uniform-sized conductive particles 61, 61,... Are mixed in an insulating adhesive 62 as an anisotropic conductive adhesive. 2 shows a conventional connection structure between a display substrate 58 and a driving IC 54 which are connected by face-down bonding using a conductive film, and an ACF 60 is interposed between the display substrate 58 and the driving IC 54. The conductive particles 61, 61,... Included in the ACF 60 are sandwiched between the pads 57 on the display substrate 58 and the bump electrodes 59 on the driving IC 54. Is filled with an insulating adhesive 62.
[0007]
In such a substrate connection structure using the ACF 60, the ACF 60 is first crimped to the display substrate 58, and then the alignment between the display substrate 58 and the driving IC 54 is performed. Heat compression is applied from the IC 54 side. As a result of the thermocompression bonding, the conductive particles 61, 61,... Between the pad 57 and the bump electrode 59 are sandwiched between the pad 57 and the bump electrode 59 and elastically deformed (flattened) in the thickness direction. Since the surrounding insulating adhesive 62 is cured, the insulating adhesive 62 is fixed while maintaining the deformed state. As a result, conduction between the pad 57 and the bump electrode 59 is ensured, and electrical connection is realized. Further, mechanical connection between the display substrate 58 and the driving IC 54 is realized by the cured insulating adhesive 62.
[0008]
Note that a connection structure in which such conductive particles are elastically deformed to ensure conduction between both electrodes is described in Patent Document 1, for example.
[0009]
[Patent Document 1]
Japanese Patent Laid-Open No. 10-206874 (first page, FIG. 1)
[Patent Document 2]
Japanese Patent Laid-Open No. 5-74850 (first page, FIG. 1)
[0010]
[Problems to be solved by the invention]
Incidentally, in recent years, with the high definition or narrowing of the frame of the liquid crystal display device, it has been progressed to reduce the arrangement pitch of the electrodes. From this, the conventional connection structure is schematically shown in FIG. As shown in FIG. 5, there is a problem that conductive particles 61, 61,... Are connected between adjacent bump electrodes 59, 59, and as a result, the electrodes 59, 59 are short-circuited.
[0011]
Incidentally, for example, as described in Patent Document 2, when connecting the TAB type semiconductor device and the glass substrate, the bump electrode height is increased around the bump electrode (lead) on the semiconductor device. A recess having a predetermined depth (5 to 10 μm) is formed in the bump electrode portion on the surface of the semiconductor device, and the electrode on the glass substrate is made the same as the depth of the recess. By forming it to the thickness of the dimension and filling the anisotropic conductive adhesive only in the recesses, it is possible to prevent the conductive particles from being dispersed between the bump electrodes and causing the bump electrodes to short-circuit. In this case, when the glass substrate is pressed to the semiconductor device, there is a possibility that the convex portion may interfere with the gap between the electrodes. For the conductive particles There is another problem that reliable electrical connection is hardly obtained between opposing electrodes due to the inability to sexual deformed.
[0012]
The present invention has been made in view of such points, and its main object is to mechanically connect the circuit board and the semiconductor substrate with an anisotropic conductive adhesive and to connect the electrodes on the circuit board and the semiconductor. In a substrate connection structure in a liquid crystal display device or the like in which a bump electrode on a substrate is electrically connected, adjacent bump electrodes on a semiconductor substrate are short-circuited by conductive particles in an anisotropic conductive adhesive. Therefore, it is possible to cope with the reduction in the electrode pitch without impairing the insulation resistance reliability between the adjacent electrodes and the reliability of the electrical connection between the opposing electrodes. There is.
[0013]
[Means for Solving the Problems]
In order to achieve the above object, in the present invention, an insulator having a height substantially the same as that of the bump electrode is disposed between the bump electrodes on the semiconductor substrate. Dispersion was prevented and the insulator was not disturbed when the conductive particles were elastically deformed.
[0014]
Specifically, in the invention of claim 1, anisotropy in which conductive particles are dispersed in an insulating adhesive between a circuit board having electrodes and a semiconductor substrate having protruding bump electrodes. A conductive adhesive is interposed, the circuit board and the semiconductor substrate are mechanically connected by the insulating adhesive, and the electrode on the circuit board and the bump electrode on the semiconductor substrate are electrically connected by the conductive particles. This is based on the substrate connection structure.
[0015]
It is assumed that an insulator having substantially the same height as the bump electrodes is disposed between the bump electrodes on the semiconductor substrate.
[0016]
Thereby, when the circuit board and the semiconductor substrate are pressure-bonded to each other, the conductive particles interposed between the electrode on the circuit board and the dump electrode on the semiconductor substrate are suppressed from being dispersed by the insulator, It can be elastically deformed without being disturbed by the insulator.
[0017]
In the invention of claim 2, in the invention of claim 1, the hardness of the insulator is made smaller than the hardness of the conductive particles.
[0018]
Thereby, when the conductive particles interposed between the insulator and the circuit board are sandwiched between the insulator and the circuit board, the hardness of the insulator is equal to or higher than the hardness of the conductive particles. Compared to the case, it is difficult to deform into a flat shape, and therefore, a short circuit between the bump electrodes due to the flattened connection of the plurality of conductive particles is less likely to occur.
[0019]
In the invention of claim 3, in the inventions of claims 1 and 2, the hardness of the conductive particles is made smaller than the hardness of the bump electrode.
[0020]
As a result, when the conductive particles interposed between the electrode on the circuit board and the bump electrode on the semiconductor substrate are sandwiched between the two electrodes, the hardness of the conductive particles is the same as the hardness of the bump electrode. Compared with the case where it is higher than that, it is easily deformed into a flat shape, so that the electrical connection between both electrodes is ensured.
[0021]
According to a fourth aspect of the present invention, in the first to third aspects of the invention, the insulator has a long planar shape in a direction crossing between adjacent bump electrodes.
[0022]
Thereby, it is efficiently suppressed that the conductive particles interposed between the electrode on the circuit board and the bump electrode on the semiconductor substrate are dispersed between the bump electrode adjacent to the bump electrode.
[0023]
In the fifth aspect of the present invention, the electronic component is provided with the substrate connection structure according to the first to fourth aspects of the present invention.
[0024]
Thereby, a highly integrated electronic component with few short circuits between the bump electrodes due to the conductive particles can be obtained.
[0025]
According to a sixth aspect of the present invention, the liquid crystal display device includes the substrate connection structure according to the first to fourth aspects of the present invention.
[0026]
As a result, a high-definition or narrow-frame liquid crystal display device with few short-circuits between the bump electrodes due to the conductive particles can be obtained.
[0027]
In the invention of claim 7, as a method for manufacturing an electronic component, an anisotropic conductive material in which conductive particles are dispersed in an insulating adhesive between a circuit substrate having electrodes and a semiconductor substrate having bump electrodes. By interposing an adhesive and sandwiching the circuit board and the semiconductor substrate with the electrodes facing each other, the circuit board and the semiconductor substrate are mechanically connected by the insulating adhesive and the conductive particles are used on the circuit board. It is premised that a connection step for electrically connecting the electrode and the bump electrode on the semiconductor substrate is provided.
[0028]
In the above connection step, a semiconductor substrate in which an insulator having a height substantially the same as that of the bump electrode is arranged between the bump electrodes is used as the semiconductor substrate.
[0029]
Thus, the same effect as that of the first aspect of the invention can be obtained.
[0030]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0031]
FIG. 2 is a plan view schematically showing a configuration of a main part of the liquid crystal display device according to the embodiment of the present invention. In this liquid crystal display device, a driving IC (bare chip mounted on a liquid crystal panel by a COG method) A liquid crystal driving IC circuit board) is formed with a bump bonding bump electrode (hereinafter referred to as a bump electrode) having the driving IC and a bonding pad (hereinafter referred to as a display board) on the liquid crystal panel side. The pads are hereinafter referred to as face-down bonding connections.
[0032]
In the liquid crystal panel 1, a liquid crystal layer (not shown) is sealed between a pair of large and small substrates 8a and 8b, and the display unit 2 is formed so as to match the shape of the smaller substrate 8a. The larger substrate 8b is the display substrate described above, and the portion of the display substrate 8b that protrudes from the area of the display unit 2 is the liquid crystal driving IC mounting unit 3 (hereinafter referred to as an IC mounting unit). The driving IC 4 is mounted on the IC mounting portion 3. The IC mounting unit 3 is also connected to a flexible wiring board 5 (hereinafter referred to as FPC) for supplying a signal and a power source for generating a data signal line and a scanning signal line from an external circuit.
[0033]
Although not shown in the figure, the IC mounting section 3 has a plurality of pads connected to the signal wiring, a plurality of input wirings for inputting signals and power to the driving IC 4, and signal outputs of these input wirings. A plurality of pads electrically connected to the ends and a plurality of FPC input terminals electrically connected to the signal input ends of the input wiring are respectively formed. The FPC 5 is electrically connected to the FPC input terminals. Connected.
[0034]
On the other hand, the driving IC 4 has a plurality of pads as shown in the plan view of FIG. Bump electrodes 9 are formed. Further, between the IC mounting portion 3 and the driving IC 4 of the display substrate 8b, an ACF 10 as an anisotropic conductive adhesive obtained by mixing the conductive particles 11 with the insulating adhesive 12 is interposed, The driving IC 4 and the display substrate 8 b are mechanically connected by the insulating adhesive 12, and the bump electrode 9 on the driving IC 4 and the IC mounting portion 3 corresponding to the bump electrode 9 are connected by the conductive particles 11. The pad 7 is electrically connected.
[0035]
In this embodiment, as shown in FIG. 1, insulators 13 having substantially the same height as the bump electrodes 9 are arranged between the bump electrodes 9 on the driving IC 4.
[0036]
Specifically, the insulators 13 are adjacent to the bump electrodes 9 such as a rectangular shape, a rhombus shape, and an oval shape, as shown in the respective plan views of FIGS. 4A to 4C. , 9 has a planar shape extending in a direction crossing the vertical direction (vertical direction in each figure), and is formed as a bump electrode-like protrusion.
[0037]
As an example, the insulator 13 may be one in which the surface of a protrusion made of the same conductive material as the insulating material bump electrode is covered with an insulating material such as a resin, or only made of an insulating material. Examples of such an insulating material include heat-resistant polysulfone polyphenylene sulfide, polyether sulfone, polyether imide, and polyimide resin.
[0038]
Further, the hardness of each insulator 13 is lower than the hardness of the pad 7 on the display substrate 8b, and the hardness of each conductive particle 11 in the ACF 10 is equal to each bump electrode 9 on the driving IC 4. It has been made smaller than the hardness.
[0039]
The operation of the board connecting structure configured as described above will be described. First, the ACF 10 is pressure-bonded on the display substrate 8b, and then the display substrate 8b and the driving IC 4 are aligned, and then driven by the pressure-bonding tool 6 as schematically shown in the side view of FIG. The IC 4 is heated while being pressed toward the display substrate 8b, and is thermocompression bonded to the display substrate 8b. By this thermocompression bonding, some of the conductive particles 11 interposed between the pad 7 and the bump electrode 9 are The resin tends to be dispersed as the resin flows, and the remaining portion is sandwiched between the pad 7 and the bump electrode 9 and tends to be deformed into a flat shape.
[0040]
At this time, since some of the conductive particles 11, 11,... Are suppressed by the insulator 13 from being dispersed between the bump electrodes 9 adjacent to the bump electrodes 9, the bump electrodes 9, 9. The connection of the conductive particles 11, 11,.
[0041]
Further, since the hardness of the insulator 13 is lower than the hardness of the bump electrode 9 and the height of the insulator 13 is substantially the same as the height of the bump electrode 9, there is a gap between the bump electrode 9 and the pad 7. Hard to occur. Therefore, the remaining conductive particles 11, 11,... Are sufficiently deformed to electrically connect the bump electrode 9 and the pad 7.
[0042]
On the other hand, in the region other than between the bump electrode 9 and the pad 7, between the insulator 13 and the display substrate 8b, the hardness of the insulator 13 is lower than the hardness of the conductive particles 11, so that the conductive particles 11, 11 ,... Are not easily deformed even when sandwiched between the insulator 13 and the display substrate 8b. Therefore, the situation where the conductive particles 11, 11,... Between the insulator 13 and the display substrate 8b short-circuit the bump electrodes 9, 9 can be suppressed.
[0043]
As described above, when the insulating adhesive 12 is cured, as shown in FIG. 1, the display substrate 8b and the driving IC 4 are mechanically connected, and the electrical connection between the pad 7 and the bump electrode 9 is achieved. Therefore, the connection is fixed.
[0044]
Therefore, according to the present embodiment, the ACF 10 is interposed between the display substrate 8 b of the liquid crystal panel 1 and the driving IC 4, and the display substrate 8 b and the driving IC 4 are mechanically connected by the insulating adhesive 12 in the ACF 10. Are electrically connected to the pads 7, 7,... On the display substrate 8b and the bump electrodes 9, 9,. As the substrate connection structure of the liquid crystal display device, the insulator 13 having substantially the same height as the bump electrode 9 is disposed between the adjacent bump electrodes 9 on the driving IC 4. It is possible to reduce the short circuit between the bump electrodes 9, 9 due to the conductive particles 11, 11,... While maintaining the reliability of the electrical connection between the pad 7 and the bump electrode 9 due to 11, 11,. it can. As a result, while ensuring both connection reliability and insulation resistance reliability, it is possible to cope with the reduction in electrode pitch, which is indispensable for achieving high definition and narrowing of the frame, and therefore, high added value can be achieved. This can contribute to the realization of the liquid crystal display device.
[0045]
In the above embodiment, the connection structure between the display substrate 8b of the liquid crystal panel 1 and the driving IC 4 in the liquid crystal display device has been described. However, the present invention is applied to the substrate connection structure in various electronic components. Can do.
[0046]
【The invention's effect】
As described above, according to the substrate connection structure according to the invention of claim 1 and the electronic component manufacturing method according to the invention of claim 7, the circuit substrate and the semiconductor substrate are bonded using the anisotropic conductive adhesive. In the substrate connection structure designed to be connected, it is possible to prevent the conductive particles in the anisotropic conductive adhesive between the bump electrodes from being connected to each other and to short-circuit the bump electrodes, and between the electrodes and the bump electrodes. The conductive particles can be deformed into a flat shape without being obstructed by the insulator, so that the insulation resistance reliability between the bump electrodes and the reliability of the electrical connection between the opposing electrodes are impaired. It is possible to reduce the electrode pitch.
[0047]
According to the invention of claim 2, since it can be avoided that the conductive particles are elastically deformed flat when sandwiched between the insulator and the circuit board, the conductive particles short-circuit the bump electrodes. Thus, it is possible to prevent the connection, and thus it is possible to improve the insulation resistance reliability between the bump electrodes.
[0048]
According to the invention of claim 3, since the conductive particles sandwiched between the electrode and the bump electrode can be easily elastically deformed in a flat shape, the electrical connection between both electrodes can be further ensured. Can be planned.
[0049]
According to the invention of claim 4, it is possible to efficiently suppress the conductive particles between the electrode and the bump electrode from being dispersed between the adjacent bump electrodes. Therefore, the effect of the invention of claim 1 can be obtained. It can be obtained efficiently.
[0050]
According to the electronic component of the fifth aspect of the present invention, high integration is achieved by reducing the electrode pitch without impairing the insulation resistance reliability between the bump electrodes and the reliability of the electrical connection between the opposing electrodes. It can correspond to.
[0051]
According to the liquid crystal display device of the invention of claim 6, high definition and narrow frame can be achieved without impairing the insulation resistance reliability between the bump electrodes and the reliability of electrical connection between the opposing electrodes. Therefore, it is possible to reduce the electrode pitch, which is indispensable for achieving this, and thus contribute to high added value of the liquid crystal display device.
[Brief description of the drawings]
FIG. 1 is a side view schematically showing a connection structure between a display substrate of a liquid crystal panel and a driving IC in a liquid crystal display device according to an embodiment of the present invention.
FIG. 2 is a plan view showing a configuration of a main part of the liquid crystal display device.
FIG. 3 is a plan view showing a surface of a driving IC on a bump electrode side.
FIG. 4 is a plan view showing a planar shape of each insulator having a rectangular shape (a), a rhombus shape (b), and an elliptical shape (c).
FIG. 5 is a side view schematically showing a state when the driving IC is pressed against the display substrate.
FIG. 6 is a plan view showing a surface on a dump electrode side of a conventional driving IC connected to a display substrate of a liquid crystal panel in a liquid crystal display device.
FIG. 7 is a view corresponding to FIG. 5 schematically showing a state when the driving IC is pressed against the display substrate in the conventional connection structure.
8 is a view corresponding to FIG. 1 schematically showing a conventional connection structure between a display substrate and a driving IC. FIG.
FIG. 9 is a view corresponding to FIG. 1 schematically showing a problem of the conventional connection structure accompanying the reduction of the electrode pitch.
[Explanation of symbols]
4 Liquid crystal driving IC circuit board (semiconductor substrate)
7 Bonding pads (electrodes)
8 Display circuit board (circuit board)
9 Bump electrodes for bonding (Bump electrodes)
10 ACF (anisotropic conductive adhesive)
11 Conductive Particles 12 Insulating Adhesive 13 Insulator

Claims (7)

電極を有する回路基板と、突起状のバンプ電極を有する半導体基板との間に、絶縁性接着剤中に導電性粒子が分散されてなる異方性導電接着剤を介在させ、上記絶縁性接着剤により上記回路基板と上記半導体基板とを機械的に接続するとともに、上記導電性粒子により上記回路基板上の電極と上記半導体基板上のバンプ電極とを電気的に接続するようにした基板接続構造であって、
上記半導体基板上の相隣るバンプ電極間に、該バンプ電極と略同じ高さの絶縁体が配置されていることを特徴とする基板接続構造。
An insulating conductive adhesive in which conductive particles are dispersed in an insulating adhesive is interposed between a circuit board having electrodes and a semiconductor substrate having protruding bump electrodes, and the insulating adhesive The circuit board and the semiconductor substrate are mechanically connected to each other, and the electrode on the circuit board and the bump electrode on the semiconductor substrate are electrically connected by the conductive particles. There,
A substrate connection structure, wherein an insulator having a height substantially the same as that of the bump electrode is disposed between adjacent bump electrodes on the semiconductor substrate.
請求項1記載の基板接続構造において、
絶縁体の硬度が、導電性粒子の硬度よりも小さいことを特徴とする基板接続構造。
The board connection structure according to claim 1,
A substrate connection structure, wherein the hardness of the insulator is smaller than the hardness of the conductive particles.
請求項1又は2記載の基板接続構造において、
導電性粒子の硬度が、バンプ電極の硬度よりも小さいことを特徴とする基板接続構造。
The board connection structure according to claim 1 or 2,
A substrate connection structure, wherein the hardness of the conductive particles is smaller than the hardness of the bump electrode.
請求項1,2又は3記載の基板接続構造において、
絶縁体は、相隣るバンプ電極間を横切る方向に長い平面形状をなしていることを特徴とする基板接続構造。
In the substrate connection structure according to claim 1, 2, or 3,
The substrate connection structure, wherein the insulator has a long planar shape in a direction crossing between adjacent bump electrodes.
請求項1,2,3又は4記載の基板接続構造を備えたことを特徴とする電子部品。An electronic component comprising the substrate connection structure according to claim 1, 2, 3 or 4. 請求項1,2,3又は4記載の基板接続構造を備えたことを特徴とする液晶表示装置。5. A liquid crystal display device comprising the substrate connection structure according to claim 1, 2, 3 or 4. 電極を有する回路基板と、突起状のバンプ電極を有する半導体基板との間に、絶縁性接着剤中に導電性粒子が分散されてなる異方性導電接着剤を介在させ、上記回路基板と上記半導体基板とを電極同士を対向させて挟圧することで、上記絶縁性接着剤により上記回路基板と上記半導体基板とを機械的に接続するとともに、上記導電性粒子により上記回路基板上の電極と上記半導体基板上のバンプ電極とを電気的に接続する接続工程を備えた電子部品の製造方法であって、
上記接続工程において、上記半導体基板として、相隣る上記バンプ電極間に該バンプ電極と略同じ高さの絶縁体が配置されてなる半導体基板を用いることを特徴とする電子部品の製造方法。
An anisotropic conductive adhesive in which conductive particles are dispersed in an insulating adhesive is interposed between a circuit board having electrodes and a semiconductor substrate having protruding bump electrodes, and the circuit board and the above By sandwiching the electrodes with the semiconductor substrate facing each other, the circuit board and the semiconductor substrate are mechanically connected by the insulating adhesive, and the electrodes on the circuit board and the above are formed by the conductive particles. A method of manufacturing an electronic component comprising a connection step of electrically connecting a bump electrode on a semiconductor substrate,
In the connecting step, a method of manufacturing an electronic component, wherein a semiconductor substrate in which an insulator having substantially the same height as the bump electrode is disposed between the adjacent bump electrodes is used as the semiconductor substrate.
JP2002299061A 2002-10-11 2002-10-11 Substrate connecting structure and fabricating process of electronic parts therewith Pending JP2004134653A (en)

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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7041589B2 (en) * 2000-08-29 2006-05-09 Au Optronics Corp. Metal bump with an insulating sidewall and method of fabricating thereof
WO2007039959A1 (en) * 2005-10-05 2007-04-12 Sharp Kabushiki Kaisha Wiring board and display device provided with same
WO2007039960A1 (en) * 2005-10-05 2007-04-12 Sharp Kabushiki Kaisha Wiring board and display device provided with same
JP2007324418A (en) * 2006-06-01 2007-12-13 Fujitsu Ltd Semiconductor device, manufacturing method for solder bump connection board, and manufacturing method for semiconductor device
WO2008041486A1 (en) * 2006-09-28 2008-04-10 Sanyo Electric Co., Ltd. Solar battery module
KR101344345B1 (en) * 2012-02-03 2013-12-24 아이엘아이 테크놀로지 코포레이션 Bonding pad structure and integrated circuit comprising a plurality of bonding pad structures
WO2018150809A1 (en) * 2017-02-17 2018-08-23 ソニーセミコンダクタソリューションズ株式会社 Semiconductor device, chip-like semiconductor element, electronic device equipped with semiconductor device, and semiconductor device manufacturing method

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7041589B2 (en) * 2000-08-29 2006-05-09 Au Optronics Corp. Metal bump with an insulating sidewall and method of fabricating thereof
WO2007039959A1 (en) * 2005-10-05 2007-04-12 Sharp Kabushiki Kaisha Wiring board and display device provided with same
WO2007039960A1 (en) * 2005-10-05 2007-04-12 Sharp Kabushiki Kaisha Wiring board and display device provided with same
US8013454B2 (en) 2005-10-05 2011-09-06 Sharp Kabushiki Kaisha Wiring substrate and display device including the same
JP2007324418A (en) * 2006-06-01 2007-12-13 Fujitsu Ltd Semiconductor device, manufacturing method for solder bump connection board, and manufacturing method for semiconductor device
WO2008041486A1 (en) * 2006-09-28 2008-04-10 Sanyo Electric Co., Ltd. Solar battery module
KR101344345B1 (en) * 2012-02-03 2013-12-24 아이엘아이 테크놀로지 코포레이션 Bonding pad structure and integrated circuit comprising a plurality of bonding pad structures
WO2018150809A1 (en) * 2017-02-17 2018-08-23 ソニーセミコンダクタソリューションズ株式会社 Semiconductor device, chip-like semiconductor element, electronic device equipped with semiconductor device, and semiconductor device manufacturing method
JPWO2018150809A1 (en) * 2017-02-17 2019-12-12 ソニーセミコンダクタソリューションズ株式会社 Semiconductor device, chip-like semiconductor element, electronic device including semiconductor device, and method for manufacturing semiconductor device

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