JP2004118212A5 - - Google Patents
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- JP2004118212A5 JP2004118212A5 JP2003353089A JP2003353089A JP2004118212A5 JP 2004118212 A5 JP2004118212 A5 JP 2004118212A5 JP 2003353089 A JP2003353089 A JP 2003353089A JP 2003353089 A JP2003353089 A JP 2003353089A JP 2004118212 A5 JP2004118212 A5 JP 2004118212A5
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- voltage
- circuit
- gradation
- display
- liquid crystal
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Claims (11)
前記階調電圧生成回路で生成された前記複数の階調電圧から、入力表示データに応じた階調電圧であって表示パネルへ出力するための階調電圧を選択する階調電圧選択回路と、
前記可変抵抗の抵抗値を設定する設定レジスタとを備えたことを特徴とする表示駆動回路。 A gradation voltage generating circuit that includes a variable resistor and generates a plurality of gradation voltages by dividing a reference voltage by the variable resistor;
A gradation voltage selection circuit that selects a gradation voltage corresponding to input display data and output to the display panel from the plurality of gradation voltages generated by the gradation voltage generation circuit;
A display drive circuit comprising a setting register for setting a resistance value of the variable resistor.
前記表示データの表示画像がコンピュータグラフィックス又はテキストである場合に、前記表示データに対する輝度特性が前記輝度の小さい点と前記輝度の大きい点を結んだ直線を基準として凹形状となるように、前記設定レジスタに設定される前記可変抵抗の抵抗値が変化することを特徴とする請求項3記載の表示駆動回路。 When the display image of the display data is a natural image, the setting register is configured so that the luminance characteristic for the display data has a convex shape with reference to a straight line connecting the point having the low luminance and the point having the high luminance. The resistance value of the variable resistor to be set changes,
When the display image of the display data is computer graphics or text, the luminance characteristic for the display data is a concave shape with reference to a straight line connecting the low luminance point and the high luminance point. 4. The display driving circuit according to claim 3, wherein a resistance value of the variable resistor set in the setting register changes.
前記表示駆動回路に接続されたデータラインと走査ラインを備えた表示パネルと、
前記走査ラインを選択するための走査ドライバとを備えたことを特徴とする表示装置。 A display driving circuit according to any one of claims 1 to 6;
A display panel having a data line and a scanning line connected to the display driving circuit;
A display device comprising: a scan driver for selecting the scan line.
表示データを取り込むラッチ信号を順次生成するラッチアドレス制御回路と、A latch address control circuit for sequentially generating latch signals for fetching display data;
前記表示データを前記ラッチ信号に従って出力データ線分取り込んで保持する第1の保持回路と、A first holding circuit for fetching and holding the display data according to the latch signal;
前記第1の保持回路が保持する表示データをさらに水平同期信号に従って出力データ線分同時に取り込んで保持する第2の保持回路と、A second holding circuit for further capturing and holding the display data held by the first holding circuit at the same time according to a horizontal synchronizing signal for the output data line;
複数の異なる基準電圧を入力し、前記複数の異なる基準電圧を複数の可変抵抗からなる分圧抵抗により分圧し、複数の階調電圧を生成する階調電圧生成回路と、A gradation voltage generation circuit that inputs a plurality of different reference voltages, divides the plurality of different reference voltages by a voltage dividing resistor including a plurality of variable resistors, and generates a plurality of gradation voltages;
前記階調電圧生成回路で生成された前記複数の階調電圧から、前記第2の保持回路の保持する表示データに応じた階調電圧を選択する階調電圧選択回路と、A gradation voltage selection circuit that selects a gradation voltage corresponding to display data held by the second holding circuit from the plurality of gradation voltages generated by the gradation voltage generation circuit;
前記階調電圧選択回路の選択した階調電圧とオフセット電圧を入力する演算増幅器と、An operational amplifier for inputting the gradation voltage and the offset voltage selected by the gradation voltage selection circuit;
前記演算増幅器の出力電圧を分圧して前記演算増幅器に入力する1つあるいは複数の可変抵抗からなる分圧抵抗を備え、前記階調電圧選択回路の選択した階調電圧を増幅して出力するアンプ回路と、An amplifier that divides an output voltage of the operational amplifier and includes a voltage dividing resistor composed of one or a plurality of variable resistors to be input to the operational amplifier, and amplifies and outputs the gradation voltage selected by the gradation voltage selection circuit Circuit,
前記階調電圧生成回路内の前記分圧抵抗の分圧比を制御する設定データ、および前記アンプ回路内の前記分圧抵抗の分圧比を制御する設定データが設定される設定レジスタとを有し、Setting data for controlling a voltage dividing ratio of the voltage dividing resistor in the gradation voltage generating circuit and a setting register for setting setting data for controlling the voltage dividing ratio of the voltage dividing resistor in the amplifier circuit;
前記階調電圧生成回路内の前記分圧抵抗の分圧比を制御する設定データにより、階調対電圧特性の中間階調部分を調整可能で、With the setting data for controlling the voltage dividing ratio of the voltage dividing resistor in the gradation voltage generating circuit, it is possible to adjust the intermediate gradation part of the gradation-voltage characteristic,
前記アンプ回路内の前記分圧抵抗の分圧比を制御する設定データにより、片側端階調を固定して前記階調対電圧特性全体の傾きを調整可能で、By setting data for controlling the voltage dividing ratio of the voltage dividing resistor in the amplifier circuit, it is possible to adjust the slope of the entire gradation-to-voltage characteristic by fixing one-side end gradation,
前記オフセット電圧により、前記階調対電圧特性全体を上下にシフト可能で、With the offset voltage, the entire gradation versus voltage characteristic can be shifted up and down,
前記設定レジスタは、前記ラッチアドレス制御回路からのラッチ信号と設定イネーブル信号の積からなるクロックによって設定データが設定されることを特徴とする液晶駆動回路。2. A liquid crystal driving circuit according to claim 1, wherein setting data is set in the setting register by a clock comprising a product of a latch signal from the latch address control circuit and a setting enable signal.
データラインと走査ラインを備えて液晶に電圧を印加する液晶パネルと、A liquid crystal panel having a data line and a scanning line and applying a voltage to the liquid crystal;
前記液晶パネルの走査ラインを駆動する走査ドライバと、A scan driver for driving a scan line of the liquid crystal panel;
前記液晶駆動回路の出力する階調電圧を設定し、前記液晶駆動回路および前記走査ドライバを制御する制御回路と、A control circuit for setting a gradation voltage output from the liquid crystal driving circuit and controlling the liquid crystal driving circuit and the scan driver;
前記液晶駆動回路の参照電圧を生成する参照電圧生成回路とを有し、A reference voltage generation circuit for generating a reference voltage of the liquid crystal driving circuit,
前記液晶駆動回路は前記アンプ回路からの階調電圧を前記液晶パネルに出力することを特徴とする液晶表示装置。The liquid crystal display device, wherein the liquid crystal driving circuit outputs a gradation voltage from the amplifier circuit to the liquid crystal panel.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003353089A JP2004118212A (en) | 2003-10-14 | 2003-10-14 | Display driving circuit and display device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003353089A JP2004118212A (en) | 2003-10-14 | 2003-10-14 | Display driving circuit and display device |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9336769A Division JPH11175027A (en) | 1997-12-08 | 1997-12-08 | Liquid crystal driving circuit and liquid crystal display device |
Publications (2)
Publication Number | Publication Date |
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JP2004118212A JP2004118212A (en) | 2004-04-15 |
JP2004118212A5 true JP2004118212A5 (en) | 2005-06-16 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2003353089A Pending JP2004118212A (en) | 2003-10-14 | 2003-10-14 | Display driving circuit and display device |
Country Status (1)
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JP (1) | JP2004118212A (en) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4442455B2 (en) * | 2005-02-17 | 2010-03-31 | セイコーエプソン株式会社 | Reference voltage selection circuit, reference voltage generation circuit, display driver, electro-optical device, and electronic apparatus |
JP2006227272A (en) * | 2005-02-17 | 2006-08-31 | Seiko Epson Corp | Reference voltage generation circuit, display driver, electro-optical device, and electronic apparatus |
JP4810840B2 (en) * | 2005-03-02 | 2011-11-09 | セイコーエプソン株式会社 | Reference voltage generation circuit, display driver, electro-optical device, and electronic apparatus |
JP2006243233A (en) * | 2005-03-02 | 2006-09-14 | Seiko Epson Corp | Reference voltage generation circuit, display driver, electro-optical device, and electronic apparatus |
JP2006243232A (en) * | 2005-03-02 | 2006-09-14 | Seiko Epson Corp | Reference voltage generation circuit, display driver, electro-optical device, and electronic apparatus |
KR20070054802A (en) * | 2005-11-24 | 2007-05-30 | 삼성전자주식회사 | Driving device of liquid crystal display |
JP4889397B2 (en) * | 2006-07-26 | 2012-03-07 | アルパイン株式会社 | Voltage converter |
JP2007183670A (en) * | 2007-03-19 | 2007-07-19 | Seiko Epson Corp | Reference voltage generation circuit, display driver, electro-optical device, and electronic apparatus |
JP2007171997A (en) * | 2007-03-19 | 2007-07-05 | Seiko Epson Corp | Reference voltage generation circuit, display driver, electro-optical device, and electronic apparatus |
JP2009157169A (en) * | 2007-12-27 | 2009-07-16 | Casio Comput Co Ltd | Display |
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2003
- 2003-10-14 JP JP2003353089A patent/JP2004118212A/en active Pending
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