JP2004095620A - Semiconductor substrate, method of manufacturing semiconductor substrate, electrooptic device, and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor substrate provided with a semiconductor layer having a stable structure and partially different thicknesses. <P>SOLUTION: In this semiconductor substrate 600, a semiconductor layer which is identical to a semiconductor layer 230 formed as the active layer of a first semiconductor layer 610 is formed in a second semiconductor device 620, and at the same time, divided into upper and lower semiconductor layers 220 and 240 by forming an insulating layer 210 in the semiconductor layer. Of the semiconductor layers 220 and 240, the upper semiconductor layer 220 is formed as the active layer of the second semiconductor device 620. Therefore, the thickness of the semiconductor layer 220 formed in the second semiconductor device 620 becomes thinner than that of the semiconductor layer 230 formed in the first semiconductor device 610. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor substrate, a method of manufacturing a semiconductor substrate, an electro-optical device including the semiconductor substrate, and an electronic apparatus including the electro-optical device, and particularly to a configuration of a semiconductor device formed on the semiconductor substrate. is there.
[0002]
[Prior art]
SOI (silicon on insulator) technology, which uses a silicon layer provided on an insulator layer for forming a semiconductor device, uses a normal single crystal silicon substrate such as an α-ray resistance, a latch-up characteristic, or a short channel suppression effect. In order to exhibit excellent characteristics that cannot be achieved, development has been promoted for the purpose of high integration of semiconductor devices.
[0003]
Recently, an excellent short channel suppression effect has been found by forming a device on an SOI layer thinned to a thickness of 100 nm or less. In addition, the SOI device formed in this way has excellent features such as high reliability due to excellent radiation resistance and high speed and low power consumption of the element due to reduction of parasitic capacitance. .
[0004]
As a method for forming such an SOI structure, there is a method for manufacturing an SOI substrate by bonding a single crystal silicon substrate. In this method, which is generally called a bonding method, after bonding a single crystal silicon substrate and a supporting substrate, the bonding strength is enhanced by a heat treatment at about 700 to 1200 ° C., and then the single crystal silicon substrate is ground or polished. Alternatively, a single crystal silicon layer is formed over a supporting substrate by thinning the film by etching. In this method, a single-crystal silicon substrate is directly thinned, so that a silicon thin film having excellent crystallinity and a high-performance device can be produced.
[0005]
In addition, as an application of this bonding method, hydrogen ions are implanted into a single crystal silicon substrate, bonded to a supporting substrate, and then heat-treated at about 400 to 600 ° C. to form a thin film silicon layer on the single crystal silicon substrate. Separation from the hydrogen implanted region, and then increasing the bonding strength by heat treatment up to about 1100 ° C. (M. Bruel et al., Electrochem. Soc. Proc. Vol. 97-27, p. 3) A single-crystal silicon layer is epitaxially grown on a porous silicon substrate, the silicon substrate is removed after bonding the single-crystal silicon layer to a support substrate, and the porous silicon layer is etched to form an epitaxial single-crystal silicon thin film on the support substrate. A forming method (Japanese Unexamined Patent Publication No. 4-346418) is known.
[0006]
The SOI substrate formed by the bonding method can be used for manufacturing various devices as in the case of a normal bulk semiconductor substrate (semiconductor integrated circuit), but differs from the conventional bulk substrate in that various materials are used for the support substrate. Can be done. That is, as the support substrate, not only a normal silicon substrate but also a transparent quartz substrate or a glass substrate can be used. Therefore, by forming a single-crystal silicon thin film on a transparent substrate, even in a device requiring light transmissivity, for example, an electro-optical device such as a transmissive liquid crystal device, the crystal becomes thin on the active matrix substrate. A high-performance transistor element can be formed using an excellent single crystal silicon layer. That is, by forming a MIS transistor for pixel switching for driving a pixel electrode or a MIS transistor for a driving circuit constituting a driving circuit in a peripheral region of an image display region on an SOI layer which is a single crystal silicon layer, fine display can be achieved. Speed and speed can be improved.
[0007]
[Problems to be solved by the invention]
Here, the single crystal silicon layer forming the MIS transistor for pixel switching in the image display region is preferably formed thin in order to suppress a light leakage current. On the other hand, since a high-speed operation is required for the MIS transistor for the driving circuit, it is preferable to reduce the sheet resistance of the single crystal silicon layer forming the MIS transistor for the driving circuit. It is preferable that the single crystal silicon layer be formed thick in the peripheral region of the region.
[0008]
However, according to the conventional manufacturing method, only a semiconductor substrate having a constant thickness of the single crystal silicon layer can be manufactured. For this reason, if the entire single crystal silicon layer is formed to a thickness of, for example, about 100 nm or less required in the image display area, the operating speed of the peripheral driver circuit decreases. Conversely, when the entire single-crystal silicon layer is formed to have a thickness of, for example, about 200 nm in order to achieve high-speed operation in the driver circuit, the influence of the light leakage current increases in the MIS transistor for pixel switching.
[0009]
Therefore, a method (selective oxidation method) in which the surface of the single crystal silicon substrate is selectively oxidized and then the oxide film formed by the surface oxidation is removed by wet etching is considered. According to this method, in the state after the oxide film is removed, the single crystal silicon layer remains thin in the region where the oxide film has been formed, whereas in the region where the oxide film has not been formed, The single crystal silicon layer will remain thick.
[0010]
However, when a method using surface oxidation and wet etching is applied to a bonded substrate, the etchant used for wet etching enters between the single crystal semiconductor substrate and the support substrate, and the single crystal semiconductor substrate and the support substrate are bonded. As a result of etching away the combined oxide film, there is a problem that the single crystal silicon substrate is peeled off from the supporting substrate. In addition, when such surface oxidation and wet etching are used, the support substrate needs to be subjected to a heat treatment at a very high temperature for a long period of time, so that the support substrate is warped and the display quality is deteriorated. In some cases, the manufacturing process becomes extremely complicated, for example, an abnormal stage adsorption of an exposure apparatus or the like is caused, or the number of manufacturing steps is significantly increased.
[0011]
In view of such a problem, an object of the present invention is to provide a semiconductor substrate including a semiconductor layer having a stable structure and partially different thicknesses, a manufacturing method capable of easily and effectively manufacturing the semiconductor substrate, An object of the present invention is to provide an electro-optical device having a substrate and an electronic apparatus.
[0012]
[Means for Solving the Problems]
In order to solve the above problems, a semiconductor substrate according to the present invention is a semiconductor substrate including a semiconductor device provided on a substrate, wherein the semiconductor device includes a first semiconductor device and a second semiconductor device. The first semiconductor device includes a semiconductor layer formed on the substrate as an active layer, while the second semiconductor device includes a semiconductor layer included in the same layer as a semiconductor layer included in the first semiconductor device. A stacked film including an insulating layer, and an upper semiconductor layer formed on the insulating layer as an active layer of the second semiconductor device.
[0013]
According to such a semiconductor substrate, the same semiconductor layer as the active layer (the first semiconductor layer) of the first semiconductor device is formed with an insulating layer formed therein, and the upper semiconductor layer is formed with the insulating layer as a boundary. And a lower semiconductor layer, and the upper semiconductor layer (second semiconductor layer) of these semiconductor layers is formed as an active layer of the second semiconductor device. Has a thin film structure. Therefore, the first semiconductor device having a relatively thick semiconductor layer has a relatively small sheet resistance and can conduct a relatively large current. Can be applied to a driving circuit transistor and the like around the pixel. On the other hand, the second semiconductor device having a relatively thin semiconductor layer is unlikely to generate light leakage current in the semiconductor layer, and can be applied to, for example, a pixel switching transistor in an electro-optical device or the like. That is, in the present invention, among semiconductor devices formed on a semiconductor substrate, a semiconductor device driven at a high current and a high frequency is formed on a thick first semiconductor layer, and a semiconductor device driven at a low voltage is a thin semiconductor device. It is possible to design such that the semiconductor device is formed in two semiconductor layers, and it is possible to provide a semiconductor layer having an optimum thickness for each semiconductor device formed in the semiconductor layer. It can be used to the fullest.
[0014]
Further, in the configuration of the semiconductor substrate of the present invention, in the manufacturing process, a common semiconductor layer is formed for the first semiconductor device and the second semiconductor device, and oxygen ions are formed only in the semiconductor layer of the second semiconductor device. And / or by implanting nitrogen ions or the like, an insulating layer made of an oxide and / or a nitride can be formed at a predetermined position of the semiconductor layer of the second semiconductor device. The semiconductor layer formed on the upper side can be used as the second semiconductor layer. In this case, if the formation position and the thickness of the insulating layer are controlled by the conditions of ion implantation of oxygen ions and / or nitrogen ions, the thickness of the upper semiconductor layer can be controlled, and thus the second semiconductor layer can be controlled. It is also possible to control the characteristics of the device. Further, in such a manufacturing process, heat treatment is not required to cause a large damage to the substrate, and the display quality is hardly deteriorated due to the occurrence of warpage in the substrate.
[0015]
When the semiconductor device is a transistor, the active layer forms a channel region. In this case, by adjusting the thickness of the semiconductor layer forming the channel region, a CMOS circuit can be formed by mounting fully depleted and partially depleted MIS transistors. Further, this CMOS circuit can be applied to an electro-optical device, and the first semiconductor device can be used as a transistor for driving a peripheral circuit, and the second semiconductor device can be used as a transistor for switching pixels. In this case, in the pixel display region including the pixel switching transistor, the semiconductor layer forming the channel region is thinned, so that the generation of electron-hole pairs due to light leakage can be suppressed, which results in a potential change in the channel portion. Flicker and the like are less likely to occur, and excellent display quality can be provided. In the peripheral circuit driving transistor, the semiconductor layer forming the channel region is made thicker, so that the withstand voltage is increased and a larger current can be conducted than the pixel switching transistor.
[0016]
In the present invention, the stacked film may have a layer thickness substantially equal to a semiconductor layer (first semiconductor layer) formed in the first semiconductor device. In this case, as described above, a semiconductor layer is formed on the substrate, and the above-described ion implantation is performed only in a region corresponding to the second semiconductor device to form an insulating layer (an oxide layer and / or a nitride layer). The first semiconductor device and the second semiconductor device can be obtained by patterning the ion-implanted region and the non-implanted region, and the separation of the thickness of the semiconductor layer can be realized by a very simple method. Note that the insulating layer formed in the stacked film mainly includes an oxide and / or nitride of a semiconductor material included in the semiconductor layer. In the present invention, the semiconductor layer may be made of, for example, single crystal silicon, and may be made of, for example, single crystal germanium.
[0017]
Further, the lower semiconductor layer formed below the insulating layer functions as a light-blocking layer. In the second semiconductor device provided in the semiconductor substrate of the present invention, the semiconductor layer (upper semiconductor layer) is made thinner than the first semiconductor layer, so that the occurrence of light leakage can be suppressed. A semiconductor layer is formed on the lower side through the layer, and the lower semiconductor layer can function as a light-shielding layer, so that the occurrence of light leakage can be further suppressed. Further, since the light-shielding function largely depends on the film thickness, and as described above, the layer thickness of the lower semiconductor layer can be controlled by the ion implantation conditions, the light-shielding property can be controlled in the present invention. It is possible.
[0018]
Next, the semiconductor substrate of the present invention can also be applied as a bonded semiconductor substrate which is disposed on a supporting substrate with an insulator layer interposed therebetween. Alternatively, a transparent substrate such as a transparent quartz substrate or a glass substrate can be used. Therefore, by forming a semiconductor layer such as a single crystal silicon layer on a transparent substrate, even in a device requiring light transmission, for example, an electro-optical device such as a transmission type liquid crystal device, the active matrix substrate can be formed. In addition, a high-performance transistor element can be formed using a single-crystal silicon layer having excellent crystallinity as a semiconductor layer.
[0019]
That is, a MIS transistor for pixel switching for driving a pixel electrode in an electro-optical device and a MIS transistor for a drive circuit forming a drive circuit in a peripheral region of an image display region are formed in an SOI layer which is a single crystal silicon layer. Thereby, miniaturization and high-speed display can be achieved. Further, even when a semiconductor substrate is formed on a supporting substrate via an insulator layer as described above to form an SOI structure, the selective oxidation method of performing surface oxidation and wet etching on the semiconductor substrate is also used. For example, there is a problem that the etchant used for wet etching enters between the semiconductor substrate and the support substrate and also removes an oxide film that bonds the semiconductor substrate and the support substrate by etching. It is unlikely to occur. Therefore, in the bonded substrate, the problem that the semiconductor substrate is separated from the supporting substrate can be avoided.
[0020]
Next, in order to solve the above problems, a method for manufacturing a semiconductor substrate according to the present invention is a method for manufacturing a semiconductor substrate including a semiconductor device provided on a substrate, wherein a semiconductor layer is formed on the substrate. A film forming step, an ion implantation step of selectively implanting oxygen ions and / or nitrogen ions into the semiconductor layer, and a patterning step of patterning the semiconductor layer after the ion implantation. Note that a heat treatment step of heat-treating the semiconductor layer after performing the ion implantation may be included.
[0021]
According to such a manufacturing method, the semiconductor layer not ion-implanted and the semiconductor layer provided with the insulating layer ion-implanted can be patterned, and the semiconductor layer not ion-implanted can be patterned into the first semiconductor of the semiconductor substrate. It can be applied as an active layer of the device, and the ion-implanted semiconductor layer can be applied as an active layer of the second semiconductor device of the semiconductor substrate. In the case where heat treatment is performed for the purpose of recovering crystallinity or the like, the treatment time is shorter than the heat treatment time in the selective oxidation method shown in the related art, and damage to the substrate is reduced, and Since the method is simpler than the selective oxidation method, a highly reliable semiconductor substrate can be easily and inexpensively provided by the manufacturing method of the present invention.
[0022]
Next, as described above, the semiconductor substrate of the present invention can be applied to an electro-optical device. That is, the MIS transistor for pixel switching is formed in a matrix using the second semiconductor device, and the MIS transistor for a driving circuit for driving the MIS transistor for pixel switching using the first semiconductor device is formed. Can be formed. With this configuration, the MIS transistor for pixel switching has a thin semiconductor layer, so that a leak current generated by a photoelectric effect due to light incidence can be suppressed. Since the sheet resistance can be kept low, the characteristics are hardly deteriorated even under the condition of high current driving or high frequency driving. Therefore, the reliability of the MIS transistor for a driving circuit can be improved.
[0023]
Further, the electro-optical device of the present invention can be used for various electronic devices. That is, an electronic device of the present invention includes an electro-optical device including the semiconductor substrate as a display portion, and such an electronic device can provide a display with excellent display characteristics in the display portion. It becomes possible.
[0024]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0025]
[Embodiment 1]
1A to 1E are process cross-sectional views illustrating a method for manufacturing a semiconductor substrate according to the first embodiment of the present invention.
[0026]
In this embodiment, first, as shown in FIG. 1A, after preparing a single crystal silicon substrate 200 (single crystal semiconductor substrate), a photosensitive resist, a metal film, a metal oxide film, or After the ion shielding material 300 is formed from the metal silicide film, patterning is performed using a photolithography technique, and as shown in FIG. 1B, an ion shielding mask 300a having a predetermined pattern shape is formed.
[0027]
Next, as shown in FIG. 1B, oxygen ions 400 are implanted into the single crystal silicon substrate 200 from the surface side of the single crystal silicon substrate 200 through the ion shielding mask 300a. At this time, the reaching peak position of the oxygen ions 400 in the single crystal silicon substrate 200 is adjusted by the acceleration voltage for the oxygen ions 400. In this embodiment, the arrival peak position of the oxygen ion 400 is set at the position indicated by the solid line L1 in FIG.
[0028]
Specifically, the conditions for the ion implantation are as follows: an acceleration voltage of about 10 KeV to 200 KeV (35 KeV in the present embodiment); ¹⁷ ions / cm ² ~ 1.8 × 10 ¹⁸ ions / cm ² Degree (in this embodiment, 4 × 10 ¹⁷ ions / cm ² ).
[0029]
As a result, as shown in FIG. 1C, a silicon oxide film (insulating layer) 210 is formed in the single crystal silicon substrate 200 around the peak position of the oxygen ion 400, and the silicon oxide film 210 A thin first single crystal semiconductor layer (upper semiconductor layer) 220 remains on the upper layer side, and a lower semiconductor layer 240 remains on the lower layer side of the silicon oxide film 210. In this case, the arrival peak position is determined by the acceleration voltage of the ion implantation, and the film thickness of the silicon oxide film 210 and the film thickness of the first single crystal semiconductor layer (upper semiconductor layer) 220 formed by the ion implantation amount are lower. The thickness of the side semiconductor layer 240 is determined.
[0030]
On the other hand, in the portion covered with the ion-shielding mask 300a (the region into which oxygen ions are not introduced), oxidation by the implanted oxygen ions does not occur. The thickness remains the same as that of the single crystal silicon substrate 200 and is considerably thicker than that of the first single crystal semiconductor layer 220.
[0031]
Next, as shown in FIG. 1D, when the ion shielding mask 300a is removed, the semiconductor substrate 450 including the thin first single crystal semiconductor layer 220 and the thick second single crystal semiconductor layer 230 is removed. Can be formed. Note that high-temperature annealing can be performed for the purpose of crystallinity recovery. For example, heat treatment at 800 ° C. to 1500 ° C. (about 1350 ° C. in this embodiment) for 1 hour to 6 hours (about 4 hours in this embodiment) is performed. You can do it.
[0032]
Here, when oxygen ions 400 are implanted into the single crystal silicon substrate 200 to form the silicon oxide film 210, a portion where the first single crystal semiconductor layer 220 is formed expands toward the surface due to the volume expansion. Therefore, if the surface of the semiconductor substrate 450 is cleaned and flattened by a method such as a CMP (Chemical Mechanical Polishing) process, the semiconductor substrate 450 having a smooth surface can be formed as illustrated in FIG. As a result, the characteristics of the semiconductor device are improved. The surface treatment method is not limited to the above-described CMP treatment, and various methods capable of cleaning or flattening the surface can be adopted.
[0033]
Note that depending on the material forming the ion shielding mask 300a, the oxygen ions 400 are decelerated by the ion shielding mask 300a and the oxygen ions 400 do not reach the single crystal silicon substrate 200, and the dashed line in FIG. Oxygen ions 400 may enter the single crystal silicon substrate 200 with the position indicated by L2 as a peak. In the latter case, the silicon oxide film 210 is formed near the surface of the single crystal silicon substrate 200 even in the portion covered with the ion shielding mask 300a. There is no problem because it is removed by the CMP process.
[0034]
As described above, in the present embodiment, the silicon oxide film (insulating layer) 210 is formed in the predetermined region by selectively introducing the oxygen ions 400 into the single crystal silicon substrate 200 from the predetermined region on the surface side of the single crystal silicon substrate 200. Thus, a thin first single crystal semiconductor layer 220 and a thick second single crystal semiconductor layer 230 are formed. Therefore, a semiconductor substrate having an SOI structure and having single crystal semiconductor layers 220 and 230 partially different in thickness without employing a method of performing surface oxidation and wet etching on single crystal silicon substrate 200 450 can be manufactured. In addition, since the method is simpler than the method of performing surface oxidation and wet etching and does not require a long heat treatment time, a highly reliable semiconductor substrate 450 can be provided.
[0035]
Therefore, in a semiconductor device using the semiconductor substrate 450, for example, among semiconductor devices formed in the single crystal semiconductor layers 220 and 230, a semiconductor device driven at high current and high frequency has a thick second single crystal semiconductor. A semiconductor device formed in the layer 230 and driven at a low voltage can be designed to be formed in the thin first single crystal semiconductor layer 220 or the like. Further, the thickness of the single crystal semiconductor layer can be optimized with an N-channel MIS transistor, a P-channel MIS transistor, or the like. That is, since the single crystal semiconductor layers 220 and 230 having an optimum thickness can be provided for each semiconductor device formed on the surface of the semiconductor substrate 450, the characteristics of the semiconductor device can be utilized to the maximum.
[0036]
When a semiconductor device using the semiconductor substrate 450 is used in, for example, a transmissive liquid crystal device, a semiconductor device including the first single crystal semiconductor layer 220 as a pixel switching element is replaced with a peripheral circuit driving element. For example, a semiconductor device including the second single crystal semiconductor layer 230 can be used. Note that, in this case, the lower semiconductor layer 240 can function as a light shielding layer in the pixel display region.
[0037]
In addition, the penetration depth of the single crystal silicon substrate 200 into the single crystal silicon substrate 200 can be reliably controlled by the acceleration voltage of the oxygen ions 400, so that the thickness or the formation position of the first single crystal semiconductor layer 220 can be set arbitrarily. . Here, in this embodiment, an example in which oxygen ions are implanted is shown, but nitrogen ions can be implanted instead, and oxygen ions and nitrogen ions can be implanted respectively. .
[0038]
Further, the region into which the oxygen ions 400 are introduced into the single crystal silicon substrate 200 can be set at an arbitrary position depending on the pattern shape of the ion shielding mask 300a. One single crystal semiconductor layer 220 and the second single crystal semiconductor layer 230 can be formed.
[0039]
[Embodiment 2]
2 (A) to 2 (D) and 3 (A) to 3 (C) are process cross-sectional views illustrating a method for manufacturing a semiconductor substrate according to the second embodiment of the present invention.
[0040]
In this embodiment, as shown in FIG. 2A, a single crystal silicon substrate 200 having a thickness of, for example, 750 μm and a supporting substrate 500 such as a quartz substrate or a glass substrate are prepared.
[0041]
Here, the support substrate 500 is subjected to annealing at a high temperature of about 850 to 1300 ° C., more preferably 1000 ° C., preferably in an inert gas atmosphere such as nitrogen gas, so that no distortion occurs in a high-temperature process performed later. It is desirable to pre-process as described above. That is, it is desirable that the support substrate 500 be heat-treated at the same temperature or higher in accordance with the highest temperature to be processed in the manufacturing process.
[0042]
A silicon oxide film, NSG (non-doped silicate glass), PSG (phosphorus silicate glass), BSG (boron silicate glass), BPSG ( After an insulating film 510 such as boron phosphorus silicate glass is formed, the surface of the insulating film 510 is polished by a method such as a CMP method to planarize the surface. Here, the thickness of the insulating film 510 is, for example, about 400 to 1000 nm, and more preferably about 800 nm.
[0043]
On the other hand, the insulating film 260 is also formed on the single crystal silicon substrate 200. The method for forming the insulating film 260 is not particularly limited, and includes, for example, a method of thermally oxidizing the single crystal silicon substrate 200 and a method of forming an oxide film by a CVD method. Here, if the single crystal silicon substrate 200 has a thickness of 300 μm to 900 μm, the insulating film 260 has a thickness of, for example, 400 nm to 800 nm.
[0044]
Next, as shown in FIG. 2B, in a state where the single crystal silicon substrate 200 and the supporting substrate 500 are stacked so that the insulating films 260 and 510 serve as bonding surfaces, for example, at room temperature to 200 ° C. for 2 hours. By heat treatment to a certain degree, the single crystal silicon substrate 200 and the supporting substrate 500 are attached to each other as shown in FIG. 2C, and the single crystal silicon substrate 200 and the supporting substrate 500 are bonded to the first insulating film 550 (the insulating film 260). , 510) to form a bonded substrate 601 (semiconductor substrate). Thereafter, if necessary, the single-crystal silicon layer is thinned by a known technique.
[0045]
Here, the insulating films 260 and 510 are provided to ensure adhesion between the single crystal silicon substrate 200 and the supporting substrate 500. Note that a film of molybdenum, tungsten, or the like may be formed below the insulating film 510 on the surface of the supporting substrate 500. Since such a film functions as, for example, a heat conductive film, the temperature distribution of the supporting substrate 500 can be improved. Accordingly, in the step of bonding the supporting substrate 500 and the single-crystal silicon substrate 200, the temperature distribution at the bonding interface is made uniform by the heat conductive film, so that the bonding at this interface becomes uniform, and the bonding is performed. Strength can be improved. Further, when used for a transmission type liquid crystal device or the like, a film of molybdenum, tungsten, or the like functions as a light-blocking layer. Materials that can be used for such a film include, in addition to those described above, tantalum, cobalt, titanium, and other high-melting metals or alloys containing them, or polycrystalline silicon, tungsten silicide, molybdenum silicide, or the like. A representative silicide film or the like may be used.
[0046]
After forming the bonded substrate 601 in this manner, as in FIG. 1, the entire surface of the single-crystal silicon substrate 200 is covered with a photosensitive resist, a metal film, a metal oxide film, or a metal silicide film using the ion shielding material 300. Is formed, patterning is performed using a photolithography technique, and as shown in FIG. 1B, an ion shielding mask 300a having a predetermined pattern shape is formed. Hereinafter, the steps of FIGS. 1B to 1E are performed, and as shown in FIG. 3A, the semiconductor substrate 450 shown in FIG. 1E is formed on the supporting substrate 500 with the insulating layer 550 interposed therebetween. Formed.
[0047]
The semiconductor substrate (bonded substrate) 460 shown in FIG. 3A formed in this manner is, for example, a MIS type for pixel switching using the thin first single crystal semiconductor layer (upper semiconductor layer) 220. A transistor is formed, and a MIS transistor for a driver circuit can be formed using the thick second single crystal semiconductor layer 230.
[0048]
Specifically, as shown in FIG. 3B, the semiconductor layer 450 of the semiconductor substrate 460 is patterned into a predetermined shape by a photolithography process, and further, as shown in FIG. Then, a gate insulating film 2 made of a silicon oxide film is formed on the surfaces of the semiconductor layers 230 and 220.
[0049]
Next, a polycrystalline silicon film for forming a gate electrode and a conductive film formed of a molybdenum film, a tungsten film, a titanium film, a cobalt film, or a silicide film of these metals are formed to a thickness of, for example, about 350 nm by a sputtering method or the like. After the formation, the gate electrode 3a is formed by patterning using photolithography as shown in FIG. Through the above steps, as shown in FIG. 3C, a semiconductor substrate including a MIS transistor for driving circuit (first semiconductor device) 610 and a MIS transistor for pixel switching (second semiconductor device) 620 in particular 600 can be obtained.
[0050]
[Embodiment 3]
Next, an example in which an active matrix substrate used for a liquid crystal device as a typical electro-optical device is formed using the semiconductor substrate 600 described in Embodiment 2 will be described.
[0051]
(Overall configuration of liquid crystal device)
FIG. 4 is a plan view of the liquid crystal device together with the components formed thereon viewed from the counter substrate side, and FIG. 5 is a cross-sectional view taken along line HH ′ of FIG. 4 including the counter substrate. .
[0052]
In FIG. 4, a sealing material 52 is provided along an edge of the active matrix substrate 10 of the liquid crystal device 100, and a frame 53 made of a light-shielding material is formed in an inner region thereof. In a region outside the sealing material 52, a data line driving circuit 101 and mounting terminals 102 are provided along one side of the active matrix substrate 10, and a scanning line driving circuit 104 is provided along two sides adjacent to this one side. It is formed.
[0053]
Here, if the delay of the scanning signal supplied to the scanning line does not matter, it goes without saying that the scanning line driving circuit 104 may be provided on only one side. Further, the data line driving circuits 101 may be arranged on both sides along the sides of the image display area 10a. For example, an odd-numbered data line supplies an image signal from a data line driving circuit arranged along one side of the image display area 10a, and an even-numbered data line is connected to the opposite side of the image display area 10a. An image signal may be supplied from a data line driving circuit disposed along the line.
[0054]
If the data lines are driven in a comb-tooth shape as described above, the formation area of the data line driving circuit 101 can be expanded, so that a complicated circuit can be formed. Further, on the remaining side of the active matrix substrate 10, a plurality of wirings 105 for connecting between the scanning line driving circuits 104 provided on both sides of the image display area 10a are provided. Then, a precharge circuit or an inspection circuit may be provided. In at least one of the corners of the opposing substrate 20, an upper / lower conductive material 106 for establishing electric conduction between the active matrix substrate 10 and the opposing substrate 20 is formed.
[0055]
Then, as shown in FIG. 5, the opposing substrate 20 having substantially the same contour as the sealing material 52 shown in FIG. 4 is fixed to the active matrix substrate 10 by the sealing material 52. Note that the sealing material is an adhesive made of a photocurable resin, a thermosetting resin, or the like for bonding the active matrix substrate 10 and the opposing substrate 20 around the periphery thereof, and the distance between the two substrates is set to a predetermined value. And a gap material such as glass fiber or glass beads.
[0056]
On the active matrix substrate 10, pixel electrodes 9a are formed in a matrix. On the other hand, a light-shielding film 23 called a black matrix or a black stripe is formed on the counter substrate 20 in a region facing the vertical and horizontal boundary regions of the pixel electrodes formed on the active matrix substrate 10. On the upper layer side, a counter electrode 21 made of an ITO film is formed.
[0057]
The electro-optical device thus formed is used, for example, in a projection display device (liquid crystal projector) described later. In this case, three liquid crystal devices 100 are each used as a light valve for RGB, and each of the liquid crystal devices 100 receives light of each color separated through a dichroic mirror for RGB color separation as projection light. Will be incident. Therefore, no color filter is formed in the liquid crystal device 100 of each of the above embodiments.
[0058]
However, by forming an RGB color filter together with its protective film in a region facing each pixel electrode 9a on the opposing substrate 20, electronic devices such as a mobile computer, a mobile phone, and a liquid crystal television, which will be described later, besides the projection display device. It can be used as a color display device of equipment.
[0059]
Furthermore, by forming microlenses on the opposing substrate 20 so as to correspond to each pixel, the efficiency of condensing incident light on the pixel electrode 9a can be increased, so that bright display can be performed. Furthermore, a dichroic filter that creates RGB colors by utilizing the interference effect of light may be formed by stacking a number of interference layers having different refractive indexes on the counter substrate 20. According to the counter substrate with the dichroic filter, a brighter color display can be performed.
[0060]
(Configuration and operation of liquid crystal device)
Next, the electrical configuration and operation of an active matrix liquid crystal device (electro-optical device) will be described with reference to FIGS.
[0061]
FIG. 6 is an equivalent circuit diagram of various elements and wiring in a plurality of pixels formed in a matrix to form the image display area 10a of the liquid crystal device 100. FIG. 7 is a plan view of adjacent pixels on an active matrix substrate on which data lines, scanning lines, pixel electrodes, and the like are formed. FIG. 8 is an explanatory diagram showing a cross section at a position corresponding to line AA ′ in FIG. 7 and a cross section in a state where liquid crystal as an electro-optical material is sealed between the active matrix substrate and the counter substrate. In these drawings, the scale of each layer and each member is different for each layer and each member in order to make the size recognizable in the drawings.
[0062]
6, in the image display area 10a of the liquid crystal device 100, each of a plurality of pixels formed in a matrix has a pixel electrode 9a and a MIS transistor 30 for pixel switching for controlling the pixel electrode 9a. The data line 6 a that is formed and supplies a pixel signal is electrically connected to the source of the MIS transistor 30. The pixel signals S1, S2,... Sn to be written to the data line 6a are supplied line-sequentially in this order. A scanning line 3a is electrically connected to the gate of the MIS transistor 30. At predetermined timing, scanning signals G1, G2... Gm are pulsed to the scanning line 3a in a line-sequential order. It is configured to apply. The pixel electrode 9a is electrically connected to the drain of the MIS transistor 30. By turning on the MIS transistor 30 as a switching element for a certain period of time, the pixel signal S1 supplied from the data line 6a is turned on. , S2... Sn are written into each pixel at a predetermined timing. The pixel signals S1, S2,... Sn of a predetermined level written in the liquid crystal through the pixel electrode 9a in this manner are held for a certain period between the pixel electrodes S1, S2,...
[0063]
Here, a storage capacitor 70 (capacitor) may be added in parallel with a liquid crystal capacitor formed between the pixel electrode 9a and the counter electrode for the purpose of preventing the held pixel signal from leaking. The storage capacitor 70 holds the voltage of the pixel electrode 9a for a time that is, for example, three orders of magnitude longer than the time during which the source voltage is applied. Thereby, the charge retention characteristics are improved, and a liquid crystal device capable of performing display with a high contrast ratio can be realized. The method of forming the storage capacitor 70 may be either the case where the storage capacitor 70 is formed between the capacitor line 3b which is a wiring for forming a capacitor, or the case where the storage capacitor 70 is formed between the storage line 70 and the preceding scanning line 3a. Is also good.
[0064]
In FIG. 7, a plurality of transparent pixel electrodes 9a (regions surrounded by dotted lines) are formed in a matrix on the active matrix substrate 10 of the liquid crystal device 100 for each pixel, and the vertical and horizontal boundary regions of the pixel electrodes 9a are formed. A data line 6a (indicated by a dashed line), a scanning line 3a (indicated by a solid line), and a capacitance line 3b (indicated by a solid line) are formed along.
[0065]
Further, as shown in FIG. 8, the liquid crystal device 100 includes an active matrix substrate 10 and an opposing substrate 20 arranged to oppose the active matrix substrate 10. In the present embodiment, the base of the active matrix substrate 10 is made of the semiconductor substrate 600 described in Embodiment 2, and the base of the opposing substrate 20 is made of a transparent substrate 20b such as a quartz substrate or a heat-resistant glass plate. A pixel electrode 9a is formed on the active matrix substrate 10, and an alignment film 16 made of a polyimide thin film or the like on which a predetermined alignment process such as a rubbing process is performed is formed above the pixel electrode 9a. The pixel electrode 9a is made of a transparent conductive thin film such as an ITO (Indium Tin Oxide) film. The alignment film 16 is formed by performing a rubbing process on an organic thin film such as a polyimide thin film. In the counter substrate 20, an alignment film 22 made of a polyimide film is also formed on the upper layer side of the counter electrode 21, and this alignment film 22 is also a film obtained by performing a rubbing process on the polyimide film.
[0066]
In the image display region 10a of the active matrix substrate 10, a MIS transistor 30 for pixel switching for controlling switching of each pixel electrode 9a is formed at a position adjacent to each pixel electrode 9a. Further, inside the semiconductor substrate 600, a light-shielding film 11a made of a chromium film or the like is formed in a region overlapping the MIS transistor 30 in a plane. An interlayer insulating film 12 is formed on the surface of the light-shielding film 11a, and an MIS transistor 30 is formed on the surface of the interlayer insulating film 12. That is, the interlayer insulating film 12 is provided to electrically insulate the semiconductor layer 1a constituting the MIS transistor 30 from the light shielding film 11a. The light-shielding film 11a is electrically connected to a capacitance line 3b described later via a contact hole 13 formed in the interlayer insulating film 12.
[0067]
As shown in FIGS. 7 and 8, the MIS transistor 30 for pixel switching has an LDD (Lightly Doped Drain) structure, and a channel is formed in the semiconductor layer 1a by an electric field from the scanning line 3a. A channel region 1a ', a low concentration source region 1b, a low concentration drain region 1c, a high concentration source region 1d, and a high concentration drain region 1e are formed. On the upper layer side of the semiconductor layer 1a, a gate insulating film 2 for insulating the semiconductor layer 1a from the scanning lines 3a is formed. Here, the semiconductor layer 1a is composed of the thin single crystal silicon layer (first single crystal semiconductor layer) 220 described above, and an insulating layer 210 and a lower semiconductor A layer 240 is formed, and the lower semiconductor layer 240 also has a function as a light shielding layer. The lower semiconductor layer 240 is in contact with a predetermined constant potential line, has a fixed potential, and prevents or suppresses the influence of a potential change on the MIS transistor 30 formed on the upper side.
[0068]
On the surface side of the MIS transistor 30 thus configured, interlayer insulating films 4 and 7 made of a silicon oxide film are formed. A data line 6a is formed on the surface of the interlayer insulating film 4, and the data line 6a is electrically connected to the high-concentration source region 1d via a contact hole 5 formed in the interlayer insulating film 4. On the surface of the interlayer insulating film 7, a pixel electrode 9a made of an ITO film is formed. The pixel electrode 9a is electrically connected to the high-concentration drain region 1e via the contact holes 8 formed in the interlayer insulating films 4, 7 and the gate insulating film 2. An alignment film 16 made of a polyimide film is formed on the surface side of the pixel electrode 9a.
[0069]
Further, the capacitance of the same layer as the scanning line 3a is provided to the extension 1f (lower electrode) from the high-concentration drain region 1e via an insulating film (dielectric film) formed simultaneously with the gate insulating film 2a. The storage capacitor 70 is formed by the line 3b facing the upper electrode.
[0070]
The MIS transistor 30 preferably has an LDD structure as described above, but has an offset structure in which impurity ions are not implanted into regions corresponding to the low-concentration source region 1b and the low-concentration drain region 1c. You may. The MIS transistor 30 is a self-aligned TFT in which high-concentration source and drain regions are formed in a self-aligned manner by implanting high-concentration impurity ions using the gate electrode (part of the scanning line 3a) as a mask. You may. Further, in the present embodiment, the MIS transistor 30 has a single gate structure in which only one gate electrode (scanning line 3a) is arranged between the source and drain regions. It may be arranged. At this time, the same signal is applied to each gate electrode. When the MIS transistor 30 is formed of a dual gate (double gate) or triple gate or more as described above, a leak current at a junction between a channel and a source-drain region can be prevented, and a current at the time of off can be reduced. I can do it. If at least one of these gate electrodes has an LDD structure or an offset structure, the off-state current can be further reduced and a stable switching element can be obtained.
[0071]
The active matrix substrate 10 and the opposing substrate 20 thus configured are arranged so that the pixel electrode 9a and the opposing electrode 21 face each other, and the sealing material 53 (see FIGS. A liquid crystal 50 as an electro-optical material is sealed and sandwiched in a space surrounded by (see FIG. 7). The liquid crystal 50 assumes a predetermined alignment state by the alignment film in a state where no electric field is applied from the pixel electrode 9a. The liquid crystal 50 is composed of, for example, one or a mixture of several types of nematic liquid crystals.
[0072]
The type of liquid crystal 50 to be used, that is, an operation mode such as a TN (twisted nematic) mode, an STN (super TN) mode, or the like, is provided on the light incident side surface or the light emission side of the counter substrate 20 and the active matrix substrate 10. A polarizing film, a retardation film, a polarizing plate, and the like are arranged in a predetermined direction according to the normally white mode / normally black mode.
[0073]
(Configuration of drive circuit)
Returning to FIG. 4, in the liquid crystal device 100 of the present embodiment, the data line driving circuit 101 and the scanning line driving circuit 104 are formed using the peripheral area of the image display area 10 a on the front side of the active matrix substrate 10. I have. Such a data line driving circuit 101 and a scanning line driving circuit 104 are basically constituted by an N-channel MIS transistor and a P-channel MIS transistor shown in FIGS.
[0074]
FIG. 9 is a plan view showing a configuration of a MIS transistor which forms a peripheral circuit such as the scanning line driving circuit 104 and the data line driving circuit 101. FIG. 10 is a cross-sectional view of the MIS transistor constituting the peripheral circuit taken along the line BB 'in FIG. FIG. 10 also shows a pixel switching MIS transistor 30 formed in the image display area 10a of the active matrix substrate 10.
[0075]
9 and 10, the MIS transistor constituting the peripheral circuit is configured as a complementary MIS transistor including a P-channel MIS transistor 80 and an N-channel MIS transistor 90. The semiconductor layer 60 (the outline is shown by a dotted line in FIG. 9) forming the MIS transistors 80 and 90 for these drive circuits is formed in an island shape via the base film 12 formed on the semiconductor substrate 600. And is formed of the thick single crystal silicon layer (second single crystal semiconductor layer) 230 described above.
[0076]
In the MIS transistors 80 and 90, a high potential line 71 and a low potential line 72 are electrically connected to the source region of the semiconductor layer 60 via contact holes 63 and 64, respectively. The input wiring 66 is connected to a common gate electrode 65, and the output wiring 67 is electrically connected to the drain region of the semiconductor layer 60 via contact holes 68 and 69, respectively.
[0077]
Since such a peripheral circuit region is also formed through the same process as that of the image display region 10a, the interlayer insulating films 4, 7 and the gate insulating film 2 are also formed in the peripheral circuit region. The MIS transistors 80 and 90 for the driving circuit also have an LDD structure, like the MIS transistor 30 for pixel switching, and the high concentration source regions 82 and The semiconductor device includes a source region 92 and low-concentration source regions 83 and 93, and a drain region including high-concentration drain regions 84 and 94 and low-concentration drain regions 85 and 95.
[0078]
(Difference between image display area and peripheral circuit area)
In the image display region 10a and the peripheral circuit region configured as described above, as can be seen from FIG. 10, the semiconductor layer 1a forming the MIS transistor 30 for pixel switching includes the MIS transistors 80 and 90 for the drive circuit. The semiconductor layer 60 is formed thinner than the constituent semiconductor layer 60. For example, the semiconductor layer 1a constituting the MIS transistor 30 for pixel switching is a single crystal silicon layer having a thickness of 100 nm or less, and the semiconductor layer 60 constituting the MIS transistors 80 and 90 for the driving circuit has a thickness of 100 nm. Is a single crystal silicon layer having a thickness of about 200 to 500 nm.
[0079]
For this reason, in the MIS transistor 30 for pixel switching, the semiconductor layer 1a constituting the MIS transistor 30 is thin, so that light leakage current can be suppressed. On the other hand, in the MIS transistors 80 and 90 for the drive circuit, since the semiconductor layer 60 constituting the MIS transistors 80 and 90 is thick, a high current operation can be performed, for example, a large current can flow because the sheet resistance is low.
[0080]
[Application to electronic equipment]
Next, an example of an electronic apparatus including the electro-optical device will be described with reference to FIGS. First, FIG. 11 is a block diagram illustrating a configuration of an electronic apparatus including the liquid crystal device 100 configured similarly to the electro-optical device according to the above-described embodiment.
[0081]
In FIG. 11, an electronic device includes a display information output source 1000, a display information processing circuit 1002, a driving circuit 1004, a liquid crystal device 100, a clock generation circuit 1008, and a power supply circuit 1010. The display information output source 1000 includes a ROM (Read Only Memory), a RAM (Random Access Memory), a memory such as an optical disk, a tuning circuit that tunes and outputs an image signal of a television signal, and the like, and a clock generation circuit 1008. , And processes the image signal in a predetermined format on the basis of the clock signal from the display control circuit 1002.
[0082]
The display information output circuit 1002 includes various known processing circuits such as an amplification / polarity inversion circuit, a phase expansion circuit, a rotation circuit, a gamma correction circuit, and a clamp circuit, and is input based on a clock signal. Digital signals are sequentially generated from the display information and output to the drive circuit 1004 together with the clock signal CLK. The drive circuit 1004 drives the liquid crystal device 100. The power supply circuit 1010 supplies a predetermined power to each of the above-described circuits. Note that the driver circuit 1004 may be formed over an active matrix substrate included in the liquid crystal device 100. In addition, the display information processing circuit 1002 may be formed over the active matrix substrate.
[0083]
Examples of the electronic device having such a configuration include a projection type liquid crystal display device (liquid crystal projector) shown in FIG. 12, a multimedia-compatible personal computer (PC), an engineering workstation (EWS), a pager, a mobile phone, Examples include a word processor, a television, a viewfinder type or a monitor direct-view type video tape recorder, an electronic organizer, an electronic desk calculator, a car navigation device, a POS terminal, and a touch panel.
[0084]
In the projection type liquid crystal display device 1100 shown in FIG. 12, three liquid crystal modules including the liquid crystal device 100 in which the drive circuit 1004 is mounted on an active matrix substrate are prepared, and each of the RGB light valves 100R, 100G, and 100B. It is configured as a projector used as a projector. In this liquid crystal projector 1100, when light is emitted from a lamp unit 1102 of a white light source such as a metal halide lamp, light corresponding to the three primary colors of R, G, and B is generated by three mirrors 1106 and two dichroic mirrors 1108. The components are separated into components R, G, and B (light separating means) and guided to corresponding light valves 100R, 100G, and 100B (liquid crystal device 100 / liquid crystal light valve).
[0085]
At this time, since the light component B has a long optical path, the light component B is guided through a relay lens system 1121 including an input lens 1122, a relay lens 1123, and an output lens 1124 in order to prevent light loss. The light components R, G, and B corresponding to the three primary colors modulated by the light valves 100R, 100G, and 100B are incident on a dichroic prism 1112 (light combining means) from three directions, are combined again, and then are formed into a projection lens. The image is projected as a color image on a screen 1120 or the like via 1114.
[0086]
FIG. 13 shows a mobile personal computer which is an embodiment of the electronic apparatus according to the present invention. The personal computer shown here has a main body 82 having a keyboard 81 and a liquid crystal display unit 83. The liquid crystal display unit 83 includes the liquid crystal device 100 described above.
[0087]
FIG. 14 shows a mobile phone as another embodiment of the electronic apparatus according to the present invention. The mobile phone 90 shown here has a plurality of operation buttons 91 and a liquid crystal device 100.
[0088]
It should be noted that the present invention is not limited to the above-described embodiments, but can be appropriately modified without departing from the spirit and spirit of the invention which can be read from the claims and the entire specification. Semiconductor substrates, semiconductor substrate manufacturing methods, electro-optical devices, and electronic devices are also included in the technical scope of the present invention.
Further, in the above description, a liquid crystal device has been described as an example of the electro-optical device, but the present invention is not limited to this, and electroluminescence (EL), digital micromirror device (DMD), or plasma It is needless to say that the present invention can be applied to an electro-optical device using various electro-optical elements using fluorescence or the like due to light emission or electron emission, and an electronic apparatus equipped with the electro-optical device.
[0089]
【The invention's effect】
As described above, according to the semiconductor substrate of the present invention, the same semiconductor layer as the active layer of the first semiconductor device is formed in the second semiconductor device, and the insulating layer is formed inside the second semiconductor device. An upper semiconductor layer and a lower semiconductor layer are formed with an insulating layer as a boundary, and the upper semiconductor layer among these semiconductor layers is formed as an active layer of the second semiconductor device. The semiconductor layer in the second semiconductor device has a thin film configuration. Therefore, the first semiconductor device having a relatively thick semiconductor layer has a relatively small sheet resistance and can conduct a relatively large current. Can be applied to a driving circuit transistor and the like around the pixel. On the other hand, the second semiconductor device having a relatively thin semiconductor layer is unlikely to generate light leakage current in the semiconductor layer, and can be applied to, for example, a pixel switching transistor in an electro-optical device or the like.
[0090]
Among the semiconductor devices formed on the semiconductor substrate in this manner, a semiconductor device driven at a high current and a high frequency is formed on a thick first semiconductor layer, and a semiconductor device driven at a low voltage is formed on a thin second semiconductor layer. In this way, it is possible to provide a semiconductor layer having an optimum thickness for each semiconductor device formed on the semiconductor layer, thereby maximizing the characteristics of the semiconductor device formed on the semiconductor layer. It can be used.
[Brief description of the drawings]
FIG. 1 is a process sectional view illustrating a method for manufacturing a semiconductor substrate according to a first embodiment of the present invention.
FIG. 2 is a process sectional view illustrating the method for manufacturing the semiconductor substrate according to the second embodiment of the present invention.
FIG. 3 is a process sectional view illustrating a method for manufacturing the semiconductor substrate according to the second embodiment of the present invention, following FIG. 2;
FIG. 4 is a plan view of a liquid crystal device according to a third embodiment of the present invention, together with components formed thereon, as viewed from a counter substrate side.
FIG. 5 is a sectional view taken along line HH ′ of FIG. 4;
FIG. 6 is an equivalent circuit diagram of various elements, wirings, and the like formed in a plurality of pixels arranged in a matrix in an image display area of a liquid crystal device.
FIG. 7 is a plan view showing a configuration of each pixel formed on an active matrix substrate in the liquid crystal device.
8 is a cross-sectional view when a part of an image display area of the liquid crystal device shown in FIGS. 4 and 5 is cut at a position corresponding to line AA 'in FIG.
9 is a plan view of a circuit formed in a peripheral area of an image display area of the liquid crystal device shown in FIGS. 4 and 5. FIG.
10 is a cross-sectional view of the MIS transistor for the drive circuit shown in FIG.
FIG. 11 is a block diagram illustrating a circuit configuration of an electronic apparatus using the liquid crystal device according to the present invention as a display unit.
FIG. 12 is a cross-sectional view illustrating a configuration of an optical system of a projection electro-optical device as an example of an electronic apparatus using the liquid crystal device according to the invention.
FIG. 13 is an explanatory diagram showing a mobile personal computer as one embodiment of an electronic apparatus using the liquid crystal device according to the present invention.
FIG. 14 is an explanatory diagram of a mobile phone as one embodiment of an electronic device using the liquid crystal device according to the present invention.
[Explanation of symbols]
Reference Signs List 10 active matrix substrate, 30 MIS transistor for pixel switching (second semiconductor device), 81, 91 MIS transistor for drive circuit (first semiconductor device), 100 liquid crystal device (electro-optical device), 200 single crystal silicon Substrate (substrate), 210 silicon oxide film (insulating layer), 220 first single crystal semiconductor layer (upper semiconductor layer), 230 second single crystal semiconductor layer (semiconductor layer), 240 lower semiconductor layer, 400 oxygen ions , 450 semiconductor substrate, 500 support substrate, 600 semiconductor substrate

Claims (11)

A semiconductor substrate comprising a semiconductor device disposed on a substrate,
The semiconductor device includes a first semiconductor device and a second semiconductor device,
The first semiconductor device includes a semiconductor layer formed on the substrate as an active layer,
The second semiconductor device includes a stacked film including an insulating layer inside a semiconductor layer of the same layer as a semiconductor layer included in the first semiconductor device, and an upper layer formed on an upper layer of the insulating layer. A semiconductor substrate comprising a semiconductor layer as an active layer of the second semiconductor device. 2. The semiconductor substrate according to claim 1, wherein said semiconductor device is a transistor, and said active layer forms a channel region. The semiconductor substrate according to claim 1, wherein the stacked film has a thickness substantially equal to a thickness of a semiconductor layer formed on the first semiconductor device. The semiconductor substrate according to claim 1, wherein the insulating layer mainly includes an oxide and / or nitride of a semiconductor material forming the semiconductor layer. The semiconductor substrate according to claim 1, wherein a lower semiconductor layer formed below the insulating layer functions as a light-shielding layer. A method for manufacturing a semiconductor substrate comprising a semiconductor device disposed on a substrate,
A film forming step of forming a semiconductor layer on a substrate,
An ion implantation step of selectively implanting oxygen ions and / or nitrogen ions into the semiconductor layer;
After the ion implantation, a patterning step of patterning the semiconductor layer,
A method for manufacturing a semiconductor substrate, comprising: 7. The method according to claim 6, further comprising a heat treatment step of performing a heat treatment after the ion implantation. 8. The method according to claim 6, wherein the patterning step divides the semiconductor layer into at least an implanted region into which the ions are implanted and a non-implanted region. An electro-optical device comprising the semiconductor substrate according to claim 1. The electro-optical device according to claim 9, wherein the second semiconductor device is provided as a semiconductor device for a pixel, and the first semiconductor device is provided as a semiconductor device for a peripheral circuit. An electronic apparatus comprising the electro-optical device according to claim 9.

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