JP2004087523A - Method of manufacturing semiconductor wafer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor wafer by which the warping of the rear surface of the outer peripheral section of a semiconductor wafer can be reduced and the flatness of the outer peripheral section of the wafer can be improved. <P>SOLUTION: The warping of a whole slide wafer W is measured by means of a non-contact wafer shape measuring instrument and the projecting-side surface of the wafer W decided from the measured result is used as the front surface (device forming surface) of the wafer W. Then the front surface of the wafer W is finished to a mirror surface by performing prescribed flattening work on the front surface. Therefore, the warping of the outer peripheral section of the wafer W can be reduced at working time and, consequently, the warping of the outer peripheral section of a manufactured silicon wafer W can be reduced as compared with the case where the recessed-side surface of the slide wafer W is used as the device forming surface. In addition, the flatness of the outer peripheral section of the wafer W can be improved. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor wafer, and more particularly, to a method for manufacturing a semiconductor wafer in which warpage of a semiconductor wafer is suppressed.
[0002]
[Prior art]
An example of a conventional method for manufacturing a silicon wafer will be described with reference to FIGS.
As shown in the flow sheet of FIG. 4, in the slicing step (S401), a silicon wafer is sliced from a silicon single crystal ingot pulled up by the CZ method. In the next chamfering step (S402), the outer peripheral portion of the wafer is chamfered into a predetermined shape. In the following lapping step (S403), the front and back surfaces of the silicon wafer are wrapped by a pair of lap plates arranged vertically to increase the parallelism of the wafer. In the next etching step (S404), the wrapped wafer is immersed in a predetermined etching solution to remove distortion and the like during lapping. Thereafter, the wafer surface is finish-polished (S405), and is subjected to final finish cleaning (S406).
[0003]
[Problems to be solved by the invention]
By the way, in the plasma etching step in the device process, an electrostatic chuck plate is used to hold the silicon wafer W. In the electrostatic chuck plate, a coolant channel is internally formed in order to reduce heat generation of the silicon wafer W due to plasma etching and to suppress thermal damage to the wafer. Then, at the time of plasma etching, a helium gas is caused to flow through the coolant channel to cool the silicon wafer W via the electrostatic chuck plate.
However, it is difficult to form the coolant flow path to the vicinity of the outer peripheral edge of the electrostatic chuck plate in the processing of the coolant flow path.
The diameter of the electrostatic chuck plate is smaller than that of the silicon wafer W. For this reason, unless the outer peripheral portion of the silicon wafer W is brought into close contact with the outer peripheral portion of the electrostatic chuck plate as much as possible, it is not possible to sufficiently suppress a rise in temperature during etching of the outer peripheral portion of the wafer. That is, this problem is largely related to the warpage of the silicon wafer, particularly the warpage of the outer peripheral portion of the wafer protruding from the electrostatic chuck plate.
[0004]
Accordingly, the inventor of the present invention has conducted extensive research and, as a result, measured the entire warpage of the sliced wafer with a non-contact type wafer shape measuring instrument, and based on the measurement results, determined the surface determined to be the convex side as the device forming surface. If the wafer is flattened, for example, it is found that the warpage of the semiconductor wafer, particularly the warpage of the outer peripheral portion thereof can be suppressed, as compared with the case where the surface determined as the concave side is used as the device forming surface, and completed the present invention. Was. This is because, in the case of a warped wafer, the warpage d2 of the concave surface is generally smaller than the warpage d1 of the convex surface of the sliced wafer as shown in FIG. Is used. As a result, during plasma etching, the outer peripheral portion of the wafer easily adheres to the electrostatic chuck plate, and thermal damage to the outer peripheral portion of the wafer can be reduced.
[0005]
[Object of the invention]
Accordingly, an object of the present invention is to provide a method of manufacturing a semiconductor wafer capable of reducing the warpage of the outer peripheral portion of the wafer and improving the flatness of the outer peripheral portion of the wafer.
Another object of the present invention is to provide a method for manufacturing a semiconductor wafer, which can reduce thermal damage to the outer peripheral portion of the wafer during plasma etching.
[0006]
[Means for Solving the Problems]
According to the first aspect of the present invention, there is provided a process of measuring the entire warpage of a sliced semiconductor wafer by a non-contact type wafer shape measuring device, and a step of determining a convex side of the semiconductor wafer based on the measurement result. And flattening the semiconductor wafer using the device as a device formation surface.
As the semiconductor wafer, for example, a silicon wafer, a gallium arsenide wafer, or the like is used.
As the non-contact type wafer shape measuring device, for example, a flatness measuring device utilizing capacitance can be adopted. When the semiconductor wafer is held on the measurement stage, for example, a jig comes into contact with and holds a part of the semiconductor wafer.
In addition, for evaluation of the warpage of the outer peripheral portion of the wafer, for example, a laser reflection type shape measuring instrument or the like can be adopted.
Examples of the type of wafer flattening include grinding, etching, lapping, plasma etching, polishing, and the like.
[0007]
In the invention according to claim 2, the step of flattening the semiconductor wafer includes a step of wrapping the semiconductor wafer between a pair of upper and lower lap plates, and in this lapping step, The method for manufacturing a semiconductor wafer according to claim 1, wherein the determined surface is wrapped toward a lower lap surface plate.
[0008]
According to a third aspect of the present invention, the step of flattening the semiconductor wafer includes a step of immersing the semiconductor wafer in an etchant to perform etching, and in this etching step, a plurality of semiconductor wafers are determined to be convex. 2. The method for manufacturing a semiconductor wafer according to claim 1, wherein the semiconductor wafer is moved in an etchant with the surfaces facing in the same direction.
When a plurality of semiconductor wafers are arranged side by side in an etchant and rotated about a central axis, the convex side faces are aligned, for example, in one direction. As the etching solution, a mixed acid, an alkali or the like is used.
[0009]
According to a fourth aspect of the present invention, the step of flattening the semiconductor wafer includes a step of grinding the semiconductor wafer, and in this grinding step, grinding the surfaces of the semiconductor wafers which are determined to be convex sides one by one. Item 2. A method for manufacturing a semiconductor wafer according to item 1.
Grinding is performed, for example, with a surface grinding wheel. For example, resinoid grinding wheels # 300 to # 3000, particularly # 150 to # 3000 can be used.
The step of grinding a semiconductor wafer may not necessarily be included. Even if the polishing step is omitted, the effects of the present invention can be obtained.
[0010]
According to a fifth aspect of the present invention, the step of flattening the semiconductor wafer includes a step of polishing the semiconductor wafer, and in the polishing step, the surface of the semiconductor wafer determined to be convex is polished. It is a manufacturing method of the semiconductor wafer of description.
For example, a semiconductor wafer is mounted on a polishing head of a polishing apparatus, and while a polishing agent (slurry) containing free abrasive grains is supplied onto a polishing cloth, the wafer surface is pressed against a polishing cloth spread on a polishing platen to perform polishing. . The polishing apparatus may be a single wafer type or a batch type for simultaneously polishing a plurality of wafers.
[0011]
In the invention according to claim 6, the step of flattening the semiconductor wafer includes a step of sandwiching a plurality of semiconductor wafers between a pair of upper and lower polishing platens and simultaneously polishing both surfaces thereof. 2. The method of manufacturing a semiconductor wafer according to claim 1, wherein the surface of the semiconductor wafer determined to be convex is polished toward an upper polishing platen.
In a general double-side polishing apparatus, a semiconductor wafer is polished with the device forming surface facing upward. Therefore, polishing is performed with the convex side surface arranged upward. The slurry is supplied from above.
[0012]
[Action]
According to the present invention, the entire warpage of the sliced wafer is measured by a non-contact type wafer shape measuring instrument, and the surface determined to be convex based on the measurement result is used as the device formation surface of the semiconductor wafer. Then, a predetermined flattening process is performed on the device forming surface, and for example, it is mirror-finished.
Thereby, warpage of the outer peripheral portion of the wafer during wafer processing is suppressed. As a result, the warpage of the outer peripheral portion of the manufactured semiconductor wafer can be reduced as compared with, for example, the case where the concave surface of the sliced wafer is used as the device forming surface. In addition, the flatness of the outer peripheral portion of the wafer can be increased.
[0013]
In particular, when performing plasma etching on the device forming surface (convex surface), the semiconductor wafer is attracted to a small-diameter electrostatic chuck plate. At this time, since the amount of warpage of the back surface of the outer peripheral portion of the wafer is small, the outer peripheral portion of the wafer is easily brought into close contact with the outer peripheral portion of the electrostatic chuck plate. This makes it possible to suppress a rise in the temperature of the outer peripheral portion of the wafer due to the heat generated during the plasma etching by using the cooling means provided in the electrostatic chuck plate. As a result, it is possible to reduce thermal damage on the outer peripheral portion of the wafer.
[0014]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, a method for manufacturing a semiconductor wafer according to an embodiment of the present invention will be described.
FIG. 1 is a flow sheet showing a method for manufacturing a semiconductor wafer according to one embodiment of the present invention. FIG. 2 is an enlarged view of a main part of a non-contact type wafer shape measuring instrument used in the method of manufacturing a semiconductor wafer according to one embodiment of the present invention. FIG. 3A is an enlarged cross-sectional view of a main part showing a state in which a semiconductor wafer is held on an electrostatic chuck plate of a plasma etching apparatus with a concave surface serving as a device forming surface. FIG. 3B is an enlarged sectional view of a main part showing a state where the semiconductor wafer is held on an electrostatic chuck plate of a plasma etching apparatus with the convex surface as a device forming surface.
[0015]
As shown in FIG. 1, in this embodiment, the silicon having a mirror-finished surface through the steps of slicing, measuring warpage, chamfering, lapping, etching, polishing, evaluating the warpage of the wafer outer peripheral portion, and cleaning. A wafer W is manufactured.
Hereinafter, each step will be described in detail.
The silicon ingot pulled up by the CZ method is sliced into an 8-inch wafer having a thickness of about 860 μm in a slicing step (S101).
[0016]
In the obtained sliced wafer, the warpage of the entire wafer is measured in a subsequent warpage measurement step (S102). Here, a capacitance-type non-contact wafer shape measuring device 20 as shown in FIG. 2 is employed.
In the measurement of wafer warpage by the wafer shape measuring device 20, first, a sliced wafer W is disposed between a pair of capacitance sensors 21 and 21 arranged opposite to each other, and thereafter, the capacitance sensors 21 and 21 are scanned along the wafer surface in the same direction and at the same speed. During this scanning, the distance from each of the capacitance sensors 21 and 21 to the front surface or back surface of the wafer is measured, and the entire warp of the sliced wafer W is obtained based on the measurement result. Also, the thickness of the wafer is measured simultaneously with the measurement. The convex surface of the sliced wafer W is determined based on the warpage data. Hereinafter, various wafer processes are performed using this convex surface as the wafer surface (device formation surface).
[0017]
The sliced wafer W after the warpage measurement is chamfered by a chamfering grindstone in the next chamfering step (S103). A # 600 metal-bonded cylindrical grindstone is adopted as the chamfering grindstone. Thus, the outer periphery of the silicon wafer W is processed into a predetermined round shape such as a MOS type.
Next, a lapping process (S104) is performed. Here, the silicon wafer W is arranged between lapping plates parallel to each other, and a lapping liquid, which is a mixture of alumina abrasive grains, a dispersant, and water, is poured into the lapping plate. Then, both sides of the wafer are mechanically wrapped by rotating and sliding under pressure. The lap amount is about 40 to 100 μm, including the front and back surfaces of the wafer.
Next, the wrapped wafer W is etched (S105). For example, when using an acid, the silicon wafer W is immersed for a predetermined time in a mixed acid solution (normal temperature to 50 ° C.) in which hydrofluoric acid and nitric acid are mixed. After this etching, the outer peripheral portion of the silicon wafer W may be subjected to PCR processing. At the time of this processing, a well-known PCR processing apparatus is used. For example, there is a device for rotating a cylindrical urethane buff with a motor.
[0018]
Next, single-side polishing or double-side polishing is performed (S106).
Specifically, in the case of single-side polishing, the surface of the silicon wafer is polished by using a polishing apparatus having a polishing head and a lower platen arranged opposite to each other, and a polishing cloth spread only on the upper surface of the lower platen. . That is, the surface of the silicon wafer is fixed to the carrier plate with the surface facing downward, and a slurry containing free abrasive grains is supplied, while a suede-type polishing cloth in which urethane resin is foamed on a base cloth for finishing is used. Is mirror-polished. The polishing amount is about 2 to 30 μm.
Subsequently, the amount of warpage of the outer peripheral portion of the wafer is measured (S107). Here, a laser reflection shape measuring instrument is used. That is, the measurement is performed by irradiating the laser beam to the outer peripheral portion of the silicon wafer W from both the front and back surfaces and receiving the reflected light.
Next, the silicon wafer is finish-cleaned (S108). This cleaning is RCA cleaning based on two types of cleaning liquids, SC-1 and SC-2.
[0019]
As described above, since the silicon wafer W is flattened with the convex surface as the wafer surface (device formation surface) based on the warpage data of the sliced wafer W measured in advance, the warpage of the outer peripheral portion of the wafer during the wafer processing is suppressed. As a result, it is possible to reduce the amount of warpage of the back surface of the outer peripheral portion of the manufactured silicon wafer W, for example, as compared with the case where the concave surface of the sliced wafer W is used as the device formation surface. In addition, the flatness of the outer peripheral portion of the wafer can be improved.
Thus, as shown in FIG. 3, during the plasma etching of the device process, the case where the concave surface is adsorbed (FIG. 3B) is more than the case where the convex surface of the wafer is adsorbed (FIG. 3A). However, a gap a is unlikely to appear between the back surface of the wafer outer peripheral portion and the outer peripheral edge of the electrostatic chuck plate 11. Thereby, the adhesiveness of the outer peripheral portion of the wafer to the electrostatic chuck plate 11 is increased, and the cooling action of the helium gas flowing through the coolant channel 11 a provided in the electrostatic chuck plate 11 causes the temperature of the outer peripheral portion of the wafer during plasma etching to increase. The rise is well suppressed. As a result, it is possible to reduce thermal damage to the outer peripheral portion of the wafer during plasma etching.
[0020]
Here, actually, the convex side surface of the sliced wafer having a warp is defined as a device forming surface, and for a silicon wafer obtained by the manufacturing method of one embodiment, the warpage amount of the back surface of the wafer outer peripheral portion and the wafer outer peripheral portion The result of measuring the flatness of the sample is reported. "Wafer com" manufactured by Doi Precision Wrap Co., Ltd. was used for measuring the amount of warpage. The measurement of the flatness is based on “ADE Ultra Gauge 9700E +” manufactured by ADE Japan.
As a result of the measurement, when the surface determined to be concave at the time of the warpage measurement was used as the device forming surface, the amount of warpage of the back surface of the peripheral portion of the wafer after the finish polishing was 1.1 μm, and the flatness was 0.20 μm in SBIR. Was. On the other hand, when the surface determined to be convex at the time of the measurement of the warp according to the present invention is used as the device forming surface, the amount of warpage of the back surface of the outer peripheral portion of the wafer is 0.4 μm, and the flatness is 0. A good result of 19 μm was obtained.
[0021]
【The invention's effect】
According to the present invention, the entire warpage of the sliced wafer is measured by a non-contact type wafer shape measuring instrument, and based on the measurement result, the surface determined as the convex side is flattened as the device forming surface. This makes it possible to reduce the amount of warpage of the back surface of the outer peripheral portion of the wafer during processing, and also to increase the flatness of the outer peripheral portion of the wafer.
[Brief description of the drawings]
FIG. 1 is a flow sheet showing a method for manufacturing a semiconductor wafer according to one embodiment of the present invention.
FIG. 2 is an enlarged view of a main part of a non-contact type wafer shape measuring instrument used in a method of manufacturing a semiconductor wafer according to one embodiment of the present invention.
FIG. 3A is an essential part enlarged cross-sectional view showing a state where a semiconductor wafer is held on an electrostatic chuck plate of a plasma etching apparatus using a concave surface as a device formation surface. (B) is an essential part enlarged sectional view showing a state where a semiconductor wafer is held on an electrostatic chuck plate of a plasma etching apparatus with a convex surface as a device formation surface.
FIG. 4 is a flow sheet showing a method for manufacturing a semiconductor wafer according to a conventional means.
FIG. 5 is an enlarged sectional view of an outer peripheral portion of a warped semiconductor wafer.
[Explanation of symbols]
20 Wafer shape measuring instrument,
W Silicon wafer (semiconductor wafer).

Claims (6)

The step of measuring the entire warp of the sliced semiconductor wafer by a non-contact wafer shape measuring instrument,
Flattening the semiconductor wafer using the surface of the semiconductor wafer determined to be convex on the basis of the measurement result as a device formation surface. The step of flattening the semiconductor wafer includes a step of wrapping the semiconductor wafer between a pair of upper and lower lap plates,
The method of claim 1, wherein in the lapping step, the surface of the semiconductor wafer determined to be convex is wrapped toward a lower lapping plate. The step of flattening the semiconductor wafer includes a step of immersing the semiconductor wafer in an etchant to perform etching,
2. The method of manufacturing a semiconductor wafer according to claim 1, wherein in the etching step, the plurality of semiconductor wafers are moved in an etchant with the surfaces determined to be convex sides facing in the same direction. The step of flattening the semiconductor wafer includes a step of grinding the semiconductor wafer,
2. The method according to claim 1, wherein in the grinding step, the surfaces of the semiconductor wafers determined to be convex sides are ground one by one. The step of flattening the semiconductor wafer includes a step of polishing the semiconductor wafer,
The method according to claim 1, wherein in the polishing step, a surface of the semiconductor wafer determined to be convex is polished. The step of flattening the semiconductor wafer includes a step of sandwiching a plurality of semiconductor wafers between a pair of upper and lower polishing platens and simultaneously polishing both sides thereof.In this simultaneous double-side polishing step, the semiconductor wafer is determined to be a convex side. 2. The method for manufacturing a semiconductor wafer according to claim 1, wherein the surface is polished toward the upper polishing platen.

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