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JP2004079606A5 - - Google Patents

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Publication number
JP2004079606A5
JP2004079606A5 JP2002234487A JP2002234487A JP2004079606A5 JP 2004079606 A5 JP2004079606 A5 JP 2004079606A5 JP 2002234487 A JP2002234487 A JP 2002234487A JP 2002234487 A JP2002234487 A JP 2002234487A JP 2004079606 A5 JP2004079606 A5 JP 2004079606A5
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JP
Japan
Prior art keywords
dielectric constant
film
high dielectric
manufacturing
semiconductor device
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Pending
Application number
JP2002234487A
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Japanese (ja)
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JP2004079606A (en
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Priority to JP2002234487A priority Critical patent/JP2004079606A/en
Priority claimed from JP2002234487A external-priority patent/JP2004079606A/en
Publication of JP2004079606A publication Critical patent/JP2004079606A/en
Publication of JP2004079606A5 publication Critical patent/JP2004079606A5/ja
Pending legal-status Critical Current

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Claims (6)

半導体基板上に誘電率が１０未満で複数膜厚の絶縁膜を形成するとともに、前記半導体基板の一部を露出させたのち、全面に均一な膜厚で誘電率が１０〜４０の高誘電率膜を成膜し、前記誘電率が１０未満の絶縁膜と誘電率が１０〜４０の高誘電率膜との積層構造からなる互いに膜厚が異なる複数の絶縁膜を各素子部に設けることを特徴とする高誘電率膜を有する半導体装置の製造方法。An insulating film having a dielectric constant of less than 10 and having a plurality of film thicknesses is formed on a semiconductor substrate, and after exposing a part of the semiconductor substrate, a high dielectric constant having a uniform film thickness and a dielectric constant of 10 to 40 over the entire surface. Forming a film, and providing each element portion with a plurality of insulating films each having a different film thickness comprising a laminated structure of an insulating film having a dielectric constant of less than 10 and a high dielectric constant film having a dielectric constant of 10 to 40 A method of manufacturing a semiconductor device having a high dielectric constant film. 半導体基板上に誘電率が１０〜４０の高誘電率膜を成膜した後、酸化によって前記半導体基板との界面に膜厚を部分的に制御して酸化膜を形成することを特徴とする高誘電率膜を有する半導体装置の製造方法。  A high dielectric constant film having a dielectric constant of 10 to 40 is formed on a semiconductor substrate, and then the oxide film is formed by partially controlling the film thickness at the interface with the semiconductor substrate by oxidation. A method of manufacturing a semiconductor device having a dielectric constant film. 上記酸化工程において、上記高誘電率膜の上に形成した窒化シリコン膜パターンを選択酸化膜として用いることを特徴とする請求項２記載の高誘電率膜を有する半導体装置の製造方法。 3. The method of manufacturing a semiconductor device having a high dielectric constant film according to claim 2 , wherein a silicon nitride film pattern formed on the high dielectric constant film is used as a selective oxide film in the oxidation step. 上記窒化シリコン膜のパターニング工程において、燐酸ボイルを用いることを特徴とする請求項３記載の高誘電率膜を有する半導体装置の製造方法。4. The method of manufacturing a semiconductor device having a high dielectric constant film according to claim 3, wherein phosphoric acid boil is used in the patterning step of the silicon nitride film. 上記酸化工程を、２５０〜６００℃の温度で行うことを特徴とする請求項２乃至４のいずれか１項に記載の高誘電率膜を有する半導体装置の製造方法。5. The method of manufacturing a semiconductor device having a high dielectric constant film according to claim 2 , wherein the oxidation step is performed at a temperature of 250 to 600 ° C. 6. 上記高誘電率膜の成膜方法として、原子層−化学気相成長方法を用いたことを特徴とする請求項１乃至５のいずれか１項に記載の高誘電率膜を有する半導体装置の製造方法。6. The method of manufacturing a semiconductor device having a high dielectric constant film according to claim 1, wherein an atomic layer-chemical vapor deposition method is used as the method for forming the high dielectric constant film. Method.
JP2002234487A 2002-08-12 2002-08-12 Semiconductor device having high dielectric constant film and its manufacturing method Pending JP2004079606A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002234487A JP2004079606A (en) 2002-08-12 2002-08-12 Semiconductor device having high dielectric constant film and its manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002234487A JP2004079606A (en) 2002-08-12 2002-08-12 Semiconductor device having high dielectric constant film and its manufacturing method

Publications (2)

Publication Number Publication Date
JP2004079606A JP2004079606A (en) 2004-03-11
JP2004079606A5 true JP2004079606A5 (en) 2005-10-27

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JP2002234487A Pending JP2004079606A (en) 2002-08-12 2002-08-12 Semiconductor device having high dielectric constant film and its manufacturing method

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Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006025350A1 (en) 2004-08-30 2006-03-09 The University Of Tokyo Semiconductor device and method for manufacturing the same
US7518145B2 (en) 2007-01-25 2009-04-14 International Business Machines Corporation Integrated multiple gate dielectric composition and thickness semiconductor chip and method of manufacturing the same
KR101003452B1 (en) 2008-12-30 2010-12-28 한양대학교 산학협력단 Multi-bit ferroelectric memory device and method for manufacturing the same
JP5444176B2 (en) 2010-09-14 2014-03-19 パナソニック株式会社 Semiconductor device
JP2014053571A (en) 2012-09-10 2014-03-20 Toshiba Corp Ferroelectric memory and method of manufacturing the same
US11120884B2 (en) 2015-09-30 2021-09-14 Sunrise Memory Corporation Implementing logic function and generating analog signals using NOR memory strings
WO2021127218A1 (en) 2019-12-19 2021-06-24 Sunrise Memory Corporation Process for preparing a channel region of a thin-film transistor
US11675500B2 (en) 2020-02-07 2023-06-13 Sunrise Memory Corporation High capacity memory circuit with low effective latency
TW202310429A (en) 2021-07-16 2023-03-01 美商日升存儲公司 3-dimensional memory string array of thin-film ferroelectric transistors

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