JP2003332279A - Method of manufacturing electronic component - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of slicing a semiconductor wafer with which releasing is facilitated and cracking or the like is remarkably eliminated even after a high temperature treatment process. <P>SOLUTION: After a circuit component forming process including an impurity introduction is applied to one side (side A) of the semiconductor wafer, the side A is adhered on a base plate (BP), an exposed side (side B) is made into sliced wafer formed with electronic components by applying a backing process which requires polishing into ≤1 μm, and the sliced wafer is released from the base plate (BP). In such a method of manufacturing the electronic component, the side A to which an organic protecting film (RC) is used and the base plate are adhered by arranging a film formed with an organic film on its surface to be used as the side A between them. Accordingly, even in the case of a semiconductor with the high temperature treatment process exceeding 400°C, slicing is realized by using the organic protecting film. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing thin-walled electronic components, and more specifically, to a method for directly using a circuit protective film of a semiconductor substrate as an adhesive layer to a holding substrate,
Peeling is facilitated even after the high temperature treatment step, and the occurrence of cracks in the high temperature step is largely eliminated.

[0002]

2. Description of the Related Art In recent years, electronic devices have been required to be thin and lightweight, and have become thinner and thinner, as represented by mobile phones and IC cards. Further, it is required to make the semiconductor thin in terms of high speed and low power consumption. If an electronic circuit is formed on only one side using a semiconductor / wafer or ceramics substrate that has been thinned in advance,
There is a difference in the coefficient of thermal expansion of materials such as aluminum, copper, gold, etc., from the coefficient of thermal expansion of silicon wafers and ceramics substrates for circuit formation of about 5 to 15 × 10 ^-6 K ^-1, which causes warpage and distortion. Occurs. Therefore, not only it becomes impossible to form a circuit on the back surface, but also all the steps on the front surface cannot be performed. For this reason, it has been virtually impossible to use a pre-thinned substrate.

Therefore, conventionally, even when an electronic circuit is formed only on one side, a substrate having a thickness sufficient to maintain its shape, usually a substrate having a thickness of 200 μm or more is used, and one side (front surface) is mainly used. After performing the electronic circuit formation process that requires high temperature,
A method has been adopted in which the opposite surface (back surface) is polished to make it thin while adhering and protecting the surface to a holding substrate. Conventionally,
As a thinning method, a method of fixing with wax or tape has been proposed. When wax is used, the wax is applied to a dummy wafer (holding substrate) by heating, bonded to the wafer, polished, and further polished, and then the wax is melted by heating and slipped off to peel it off, or when the wax becomes brittle by cooling. A method of impact-damaging and peeling is proposed. However, fixing the wax had problems in thickness accuracy, parallelism, and flatness. As a method for fixing the tape, there is a method in which the back grind tape is also attached to the surface side and the opposite surface is polished to make it thin.

When a thin metal film is required on the back surface of a thin wafer or the back surface of a substrate, a pretreatment such as hydrofluoric acid or nitric acid, a metal vapor deposition such as aluminum or gold, and a baking treatment thereof are usually performed at a temperature of 250. It requires a high temperature treatment step at ~ 450 ° C for 30 minutes to 1 hour. However, these steps cannot be performed in the state where they are adhered to the holding substrate with wax or back grinding tape. In the method of using wax or tape for thinning, after thinning, the thin film is peeled from the holding substrate and used for the high temperature treatment step. The thinned wafer is extremely fragile, and because it has a semiconductor circuit on one side whose coefficient of thermal expansion is different from that of the substrate, there is a large increase in the defect rate due to distortion and damage, and the thickness is about 50 μm. When it becomes thin, it is difficult to apply it to the high temperature treatment process.

[0005]

An electronic circuit using a semiconductor substrate or a ceramic substrate can be mounted on a large work size.
If it can be produced efficiently as a thin sheet, it will be thin,
It is possible to practically manufacture electronic parts with high speed and power saving. Therefore, by holding and adhering the semiconductor substrate to the holding substrate,
A method of thinning the film, applying it to a high-temperature treatment process in that state, and peeling it off with water after the completion of these processes (Japanese Patent Application
2000-194077, 2001-30746, 2000-401077, 20
00-401078 and others).

However, in this method, if there is a treatment step at a temperature of 400 ° C. or higher, peeling cannot be substantially achieved. Also, even when there is no high temperature treatment step,
In the case where an organic protective film is used as the surface protective film of a semiconductor circuit, it is possible to find an adhesive resin composition that has adhesive reliability that can withstand the processing step of the back surface and that can be easily peeled off after the step is completed. It was extremely difficult in some cases. Then, even if the adhesion is strengthened in the high temperature treatment step or it is difficult to find a resin composition for adhesion which can be easily peeled off, it is necessary to find a method capable of withstanding the backside treatment step and peeling.

[0007]

That is, according to the present invention, after a circuit component forming step including impurity introduction is performed on one surface (A surface) of a semiconductor substrate, the A surface side is bonded to a holding substrate (BP). ,
An electronic component in which a thinned substrate on which an electronic component is formed by performing a back surface treatment step in which the exposed surface (B-side) must be polished to a thickness of 100 μm or less is formed, and the thinned substrate is peeled from a holding substrate (BP) In the manufacturing method of 1., a film having an inorganic film formed on the surface to be the A surface side is arranged and adhered between the A surface using the organic protective film (RC) and the holding substrate. It is a manufacturing method of electronic parts.

In the present invention, the inorganic film of the film on which the inorganic film is formed is SiO ₂ , Si ₃ N ₄ or SiON, and the thickness of the inorganic film is selected from 20 to 100 nm. There is. The organic protective film (RC) is formed without gaps at least on the entire outer periphery of the A surface, and the holding substrate (BP) has an average pore diameter of 0.1 to 10
There is also an inorganic continuous pore sintered body having 2 to 35 vol% of continuous pores of μm impregnated with a heat resistant resin and cured,
In particular, the inorganic continuous pore sintered body is aluminum nitride-boron nitride (AlN-h-BN), silicon carbide (SiC), aluminum nitride-silicon carbide-boron nitride (AlN-SiC-h-BN), alumina- Boron Nitride (Al ₂ O ₃ -h-BN), Silicon Nitride-Boron Nitride (Si ₃ N ₄ -h-BN),
Zirconia - aluminum nitride - boron nitride (ZrO ₃ -Al
₂ O ₃ -h-BN) or alumina-titanium oxide-boron nitride (Al ₂
O ₃ -TiO-h-BN) is a selected method of manufacturing electronic components.

The structure of the present invention will be described below. In the present invention, an organic protective film (RC) which is a protective film for the circuit component on the A side is used as an adhesive layer. Examples of such an organic protective film (RC) include polyimide, photosensitive polyimide, silicone imide, photosensitive silicone imide, fluorine compound modified polyimide, silicone resin, benzocyclobutene polymer, polyarylene ether, polyquinoline, perfluorohydrocarbon. Examples thereof include polymers. These are usually spin-coated, dried, appropriately exposed and developed to form a protective film having a thickness of about 0.2 to 10 μm. Further, as another method, there is a method of appropriately activating with plasma or the like in a reduced pressure atmosphere and depositing while polymerizing on a desired portion. Examples of this are polyparaxylylenes.

Further, the holding substrate (BP) of the present invention is appropriately selected depending on the conditions of the processing step of the back surface, but it is required that it has high heat resistance and chemical resistance, and the thermal expansion coefficient of the semiconductor substrate is high. Closeness is necessary to reduce warpage after bonding. Usually, inorganic-based materials such as aluminum nitride, silicon carbide, silicon nitride, sapphire, alumina, zirconia, wollastonite, amorphous carbon, glassy carbon, and silicon carbide composite C / C composites are used. Silicon wafer is also applicable. I can.

Further, continuous pores are preferably 2 to 35 vol%.
An inorganic continuous pore sintered body having an average pore diameter of 0.1 to 10 μm impregnated with a heat resistant resin and cured can also be suitably used. As the inorganic continuous pore sintered body used, aluminum nitride-boron nitride (AlN-h-BN), silicon carbide (SiC), aluminum nitride-silicon carbide-boron nitride (AlN-SiC-h-BN), alumina-nitride Boron (Al ₂ O ₃ -h-BN), Silicon Nitride-Boron Nitride (S
i ₃ N ₄ -h-BN), zirconia oxide-aluminum nitride-boron nitride (ZrO ₃ -Al ₂ O ₃ -h-BN), alumina-titanium oxide-boron nitride (Al ₂ O ₃ -TiO-h-BN) ), Amorphous carbon, etc., and those described in JP-A 2000-344587 can be preferably used.

In order to improve adhesion and workability in adhesion, it is preferable that the surface roughness Ra be 0.1-5 μm. If the surface smoothness is too high, gas may easily remain in the central portion of the adhesive surface, resulting in poor workability.
If the adhesiveness with the adhesive layer deteriorates, the semiconductor substrate and the adhesive layer are not separated during peeling, but the holding substrate and the adhesive layer are separated from each other. If the means is not devised, warpage and, in some cases, cracking may occur, which is not preferable. Surface roughness Ra ＝
If it exceeds 5 μm, the unevenness cannot be absorbed by the adhesive layer, which may cause wrinkles in the adhesive layer or cracks in the semiconductor substrate. The surface of the semiconductor substrate used is 5μ
Unevenness exceeding m should be avoided, and when such unevenness is essential, it is preferable to use a smoothed protective film formed with unevenness.

In the present invention, the organic protective film (R
A film having an inorganic film formed on the surface on the A side is arranged and bonded between the circuit surface (the A surface) of the semiconductor substrate using C) and the holding substrate (BP). First, as the base material film for forming the inorganic film, polyimide is preferable, and those having similar heat resistance can be appropriately used, but in the case of being limited to use in a lower temperature step, they are limited to these. However, engineering plastics and other general-purpose resins can also be used.

The inorganic film is preferably one which is electrically insulating and has a low dielectric constant and a low dielectric loss tangent.
Specific examples include Si, SiO ₂ , SiC, Si ₃ N ₄ , SiON, BN, BC or BCN and, where appropriate, a composite inorganic film in which two or more of these are used in combination. SiO ₂ , Si ₃ N ₄ or SiON Is more preferable. The thickness of the inorganic film is selected from the range of 20 to 1,000 nm, more preferably 20 to 100 nm. The formation of the inorganic film is not limited to the method of uniformly forming the same material on the entire surface. For example, it is possible to change the physical properties such as chemical resistance by forming a film made of a different inorganic material around the bonding portion.
Examples of the method for forming the inorganic film include vapor deposition, sputtering, ion plating and CVD. In forming the inorganic film, usually the surface treatment of the base film,
Although a treatment for improving the adhesion to the inorganic film is performed, this treatment is not always necessary in the case of the present invention.

By the way, the thinned semiconductor chip manufactured through this manufacturing process is usually bonded to the electrode of the substrate at the electrode portion and packaged into individual products. Since this package is typically a thin chip size package (CSP), if it does not cause any harm in the packaging process, the adhered substances on the surface of the thinned semiconductor chip produced are particularly troublesome. I won't. Therefore, even when the inorganic film formed above is transferred to the thinned semiconductor circuit surface in a state of covering the organic protective film (RC),
If it does not cause electrode contamination, it does not cause any trouble.

From this point of view, it is preferable to design the adhesive peeling step on the premise of peeling between the inorganic film and the base film, and it can be said that the formation of the inorganic film in consideration of the step is a preferable method. That is, the adhesive force between the inorganic film and the base film controls the surface treatment method of the base film to be performed before forming the inorganic film, and by selecting it, the conditions for withstanding the thinning step are set. Then, regarding those bonded under these conditions, grasping the difference in the adhesive strength between the inorganic film and the base film and the releasability after the change due to the difference in the back surface treatment process, especially the maximum treatment temperature and the time. By doing so, it is possible to roughly determine the adhesion peeling condition, and it is possible to realize peeling with higher reproducibility, which is an advantage.

As a method for peeling the thinned semiconductor substrate of the present invention from the holding substrate, Japanese Patent Application Nos. 2000-194077 and 2001-3 can be used.
The methods described in 0746, 2000-401077, 2000-401078, etc. can be applied as they are. Further, after cutting into individual chip sizes, peeling is promoted to peel the thinned semiconductor substrate from the holding substrate, and the thinned semiconductor substrate is sucked and held, and peeled from the holding substrate with an adhesive layer, and then further. Alternatively, a method of peeling off the adhesive layer by performing a peeling-accelerating treatment can be appropriately applied. Note that the selection of the peeling acceleration method may be limited depending on the state of the semiconductor circuit formed on the holding surface (surface), for example, its corrosion due to exposure of aluminum metal.In this case, corrosion prevention should be considered. The peeling is promoted.

[0018]

EXAMPLES The present invention will be specifically described below with reference to examples. Example 1 Polyimide film (trade name: Kapton 200H, Toray
DuPont Co., Ltd. (hereinafter referred to as "200H")
A SiO ₂ film is formed by sputtering for 1 hour,
200H with ₂ membranes was prepared. In addition, a thermoplastic polyimide film (trade name; Kapton 100KJ, Toray DuPont
Manufactured by K.K., hereinafter referred to as "100KJ") was prepared. above
200H and 100KJ with SiO ₂ film, diameter 149mm, notch 4
It was cut into a predetermined size using a 7.5 mm Thomson blade.

As a holding substrate, thickness 0.625 mm, diameter 150.3
mm surface of aluminum nitride-boron nitride continuous pore sintered body, surface treatment by impregnation and thermal decomposition of aluminum compound, ladder silicone resin impregnation and curing, surface roughness Ra = 0.3 μm, Parallelism 2 μm, flatness 2
A micrometer (hereinafter referred to as "AN1") was prepared. Also,
After forming an aluminum sputter film as a circuit model on one side of a silicon wafer with a thickness of 0.625 mm and a diameter of 150.0 mm as a semiconductor substrate, apply a silicone-modified imide resin with a spin coater and nitrogen gas in a high temperature inert oven. A silicone wafer (hereinafter referred to as "SW1") having a silicone-modified imide resin having a thickness of 4 μm, which was cured at 250 ° C./1 hour + 350 ° C./2 hours under an atmosphere, was prepared.

[0020] A concave type having a hole of 150.8 mm in diameter at the center of an aluminum alloy plate having a thickness of 9 mm and 200 mm x 200 mm, and the bottom surface of which is a partially spherical surface having a difference of 0.65 mm between both ends and the center,
The central part of one side of a disk with a thickness of 4.086 mm and a diameter of 150.3 mm
An adhesive mold composed of a convex mold having a spherical surface of 0.646 mm high was prepared. A 0.4 mm thick aluminum alloy plate / Zylon felt cushion (trade name: Zylon, manufactured by Toyobo Co., Ltd., processed by Ichikawa Kaori Co., Ltd.) / A stack of aluminum alloy plates was prepared as a laminated auxiliary plate.

Immediately before use, the holding substrate (AN1) was aged in a clean oven at 120 ° C. for 1 hour and cooled to room temperature. On the stacked auxiliary plate, place the凹接Chakkin type, in its bore, AN1, cutout 100 kJ, the SW1 SiO ₂ film with a 200H as top SiO ₂ film surface, the silicone-modified imide resin with surface as the lower this Stack in order, on top of that,
The convex adhesive mold was placed, and the one on which the lamination auxiliary plate was placed was placed between the hot plates of the air plunger pressurization type depressurizing press. After reducing the press atmosphere to 1 kPa or less, contact pressure
It was pressed at 0.3 MPa, heated at 10 ° C./min and held at 330 ° C. for 10 minutes, opened to the atmosphere and allowed to cool, and a silicon wafer was attached to a holding substrate. When the warp was measured on the surface plate,
The amount of warpage was 250 μm. The amount of warp is set on the surface plate with the holding substrate side as the bottom surface, and the height difference (μm) between the periphery and the center of the back surface of the semiconductor wafer (diameter, 15 points in diameter perpendicular to this are measured. ), And the convex on the semiconductor wafer side is + and the opposite is −.

A horizontal precision surface grinder (made by Okamoto Machine Tool Co., Ltd., model name; GRIND)
-X SRG-200, each rotation speed 300 rpm) was attached to the adsorption plate on the holding plate side. This was ground with a # 320 diamond grindstone at a processing speed of 20 μm / min until the wafer became 95 μm thick. Next, it was ground to a thickness of 75 μm with a No. 2000 diamond grindstone. Finally, using colloidal silica, CM
P machine (Okamoto Machine Tool Co., Ltd. model name; GRIND-X SPL
At 15 T, rotation speed 35 rpm, load 7.0 kg), chemical mechanical polishing was performed to a thickness of 70 μm and a surface roughness Ra = 0.02 μm to obtain a thin wafer / holding substrate.

The thinned wafer surface is kept at 25 ° C. for 20 minutes for 5 minutes.
% Hydrofluoric acid solution, spray-clean with pure water at 25 ° C for 1 minute, and dry with hot air at 120 ° C for 3 minutes.
It was dried at 150 ° C for 10 minutes. The thin wafer / holding substrate was placed in a high temperature inert oven, heated from a temperature of 150 ° C. to 400 ° C. in 25 minutes in a nitrogen gas atmosphere having an oxygen concentration of 1 ppm or less, and held at 400 ° C. for 1 hour. Then the furnace is 5 ℃
The thin wafer / holding substrate was taken out and cooled to room temperature by cooling to 50 ° C. at a rate of / min.

70 μm thick thin wafer / holding substrate
After dipping in 28% ammonia water at room temperature for 5 hours, the thin wafer was peeled from the holding substrate by a peeling machine. The thickness variation of the thinned wafer was ± 2 μm. Peeling
It occurred between the SiO ₂ film and 200H, and no SiO ₂ film remained at 200H after peeling. Also, 200H and 100KJ were integrated, and could be collectively peeled from the holding substrate by hand.
Further, the holding substrate can be reused by washing with water and drying.

Example 2 In Example 1, the method of forming the SiO ₂ film on 200H was changed from sputtering to vapor deposition. SiO ₂ film thickness 20 nm 200
H was obtained. The same results as in Example 1 were obtained except that this film was used. Example 3 The vapor deposition conditions of Example 2 were changed, and the SiO ₂ film thickness was 100 nm and 200H.
Got The same results as in Example 1 were obtained except that this film was used.

Example 4 In the same manner as in Example 3, 200H having a SiO ₂ film thickness of 100 nm was obtained.
Using this film, in Example 1, the heat treatment conditions for the thinned wafer / holding substrate were raised from a temperature of 150 ° C. to 450 ° C. in 30 minutes and held at 450 ° C. for 1 hour, and then the furnace was heated to 5 ° C. The procedure was the same except that the thinned wafer / holding substrate was taken out and cooled to room temperature at a cooling rate of 150 ° C./min. As a result, the same result as in Example 1 was obtained.

Example 5 In the same manner as in Example 1, except that 200H was replaced with 100KJ, 100KJ with a SiO ₂ film was prepared. Using this film, when laying the laminated material on the auxiliary lamination plate,
"Crop 100 kJ, 20 with the SiO ₂ film as a top SiO ₂ film surface
0H "is cut out with the SiO ₂ film side facing up 100KJ with SiO ₂ film
It was the same except that it was changed to ". As a result, Example 1
Similar results were obtained.

Example 6 In Example 1, after forming an aluminum sputtered film as a circuit model as a semiconductor substrate, a part of the aluminum sputtered film was masked and a silicone-modified imide resin was applied by a spin coater and cured. Then, the same procedure was performed except that a silicon wafer in which a part of the aluminum sputtered film was exposed was prepared. As a result, observation of the silicone wafer surface after peeling, is on the silicone-modified imide resin is SiO ₂ film had been transferred, the absence of transfer of the SiO ₂ film on the exposed aluminum was confirmed.

[0029] In the arrangement of the laminate in on the stacked auxiliary plate of Comparative Example 1 Example 1, "Crop 100 kJ, SiO ₂ film with a 200H as top SiO ₂ film surface" a "cutout 100 kJ, SiO ₂ film None except 200H ”was the same. As a result, the thinning and heat treatment steps could be suitably performed. However, peeling after the final peeling step could not be performed. Then, further immersion in 28% ammonia water was carried out for 20 hours, but in the normal peeling operation, peeling could not be carried out even with a peeling machine. Then, when a stronger peeling operation was performed, the wafer was broken by the peeling operation.

[0030]

As described above, according to the method for manufacturing an electronic circuit of the present invention, thinning can be realized even in the case of a semiconductor having an organic protective film and having a high temperature treatment step of more than 400 ° C. , Its industrial significance is extremely high.

Claims (6)

[Claims] 1. A semiconductor substrate is subjected to a circuit component forming step including introduction of impurities on one surface (A surface), and then the A surface side is adhered to a holding substrate (BP), and an exposed surface (B surface) is formed to a thickness. A thinned substrate on which electronic parts are formed by performing a back surface treatment process that requires polishing to 100 μm or less, and the thinned substrate is a holding substrate (B
In the manufacturing method of electronic parts peeled from P), an organic protective film
A method for manufacturing an electronic component, characterized in that a film having an inorganic film formed on a surface to be the A surface side is arranged and bonded between the A surface using (RC) and the holding substrate. 2. The organic protective film (RC) is formed without gaps on at least the entire outer circumference of the A surface.
Manufacturing method of the described electronic component. 3. The method for producing an electronic component according to claim 1, wherein the inorganic film of the film having an inorganic film formed on the surface is SiO ₂ , Si ₃ N ₄ or SiON. 4. The method for producing an electronic component according to claim 1, wherein the inorganic film of the film having an inorganic film formed on the surface thereof is selected from a thickness of 20 to 100 nm. 5. The holding substrate (BP) has an average pore diameter of 0.1 to
2. The method for manufacturing an electronic component according to claim 1, wherein an inorganic continuous pore sintered body having 2 to 35 vol% of continuous pores of 10 μm is impregnated with a heat resistant resin and cured. 6. The inorganic continuous pore sintered body comprises aluminum nitride-boron nitride (AlN-h-BN), silicon carbide (SiC), aluminum nitride-silicon carbide-boron nitride (AlN-SiC-h-BN). , Alumina-boron nitride (Al ₂ O ₃ -h-BN), silicon nitride-boron nitride (Si ₃ N ₄
-h-BN), zirconia oxide-aluminum nitride-boron nitride
The method for producing an electronic component according to claim 5, wherein the selected material is (ZrO ₃ -Al ₂ O ₃ -h-BN) or alumina-titanium oxide-boron nitride (Al ₂ O ₃ -TiO-h-BN). .