JP2003316316A - Semiconductor device for data driving and display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a data driving semiconductor device in which high luminance is obtained in a display section, a memory capacity is effectively used without any loss while divided display and non-divided display are commonly conducted, cost is reduced and high versatility is secured. <P>SOLUTION: Data drivers 20A and 20B are respectively provided with frame memories 21A and 21B each of which is capable of storing image data equivalent to the number of the pixels whose number is obtained by multiplying two to the value that is computed by dividing the total number of all pixels of a display section 12 by the number of divided displays. Moreover, the drivers 20A and 20B are respectively provided with data driving circuits 22A and 22B which are used to output currents corresponding to the image data read from the memories 21a and 21B to data electrodes 14. Furthermore, the drivers 20A and 20B are respectively provided with controllers 23A and 23B which generate synchronization signals for scanning driving circuits 18A and 18B so as to provide synchronization for the driving. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data driving semiconductor device connected to a data electrode of a display device capable of displaying an image by a pixel formed of an element provided at an intersection of a data electrode and a scanning electrode, And a display device provided with the same.

[0002]

2. Description of the Related Art As a display device of this type, for example, FIG.
There is known a two-division display type as shown in FIG.
That is, the display panel 91 has the display unit 92. The display unit 92 is formed by arranging organic EL elements 95 (pixels) provided at intersections of the scanning electrodes 93 and the data electrodes 94 in a matrix. The display unit 92 is divided into two, a first divided display unit 92A on the upper side and a second divided display unit 92B on the lower side in FIG.

Scan electrode drivers (scan driving semiconductor devices) 96A and 96B are provided for each of the divided display portions 92A and 92B, and the corresponding divided display portions 92A and 92B are provided.
Of the scan electrodes 93A and 93B. Data electrode driver (data driving semiconductor device) 97A, 97B
Is provided for each of the divided display portions 92A and 92B,
Data electrodes 94 of corresponding divided display portions 92A and 92B
It is connected to A and 94B.

In the display device, the length of each data electrode with respect to the size of the display portion is shorter than that of the non-divided display type, and it is easy to obtain high brightness in the entire display portion.

The display device includes a control semiconductor device 98.
Are provided separately from the scan electrode drivers 96A and 96B and the data electrode drivers 97A and 97B. The control semiconductor device 98 transmits data based on image data input from the outside, control signals, and the like to the drivers 96A and 96A.
It outputs to B, 97A, and 97B. The control semiconductor device 98 includes a memory 98A capable of storing the image data input from the outside. Further, the control semiconductor device 98 includes the drivers 96A, 96B, 97A, 97B.
A controller 98B for generating a synchronization signal for synchronizing driving between the two is provided.

Further, the controller 98B controls writing of the image data from the outside into the memory 98A and reading of image data output to the data electrode drivers 97A and 97B from the memory 98A. This control is performed, for example, at the timing shown in the explanatory diagram of FIG.

As shown in FIG. 5, the memory area of the memory 98A can be divided into four areas having the same memory capacity. That is, the memory 98A is a memory area M for storing image data corresponding to the image displayed in the upper half portion of the first split display unit 92A in FIG.
1 and the same lower half portion of the first divided display portion 92A have corresponding memory areas M2. The memory 98A has a memory area M3 that similarly corresponds to the upper half portion and the lower half portion of the second split display portion 92B.
It has M4.

The controller 98B switches the memory area in which the image data is written for each period. That is, FIG.
As shown in FIG. 3, in the period (hereinafter, simply referred to as t) 1, the controller 98B has the first screen from the outside with respect to the memory area M1 (hereinafter, simply referred to as M1. The same applies to other memory areas). Image data (image data for 1/4 screen) is written (indicated as IN in FIG. 5).
Next, the controller 98B causes M2 to t2 at t2.
The image data of the first screen is sequentially written into M3 at 3, and at M4 at t4. Similarly, in the subsequent period, the controller 98B sets the image data of the second and subsequent screens to M
1 to M4 are sequentially written.

Next, the controller 98B simultaneously reads the image data to both the data electrode drivers 97A and 97B. That is, at t4, the controller 98B
Reads the image data of the first screen stored in M1 and M3 (shown as OUT in FIG. 5) and outputs it to the corresponding data electrode drivers 97A and 97B. Then, at t5, the controller 98B
The image data of the first screen stored in M2 and M4 is read out, and the corresponding data electrode driver 9 is read out.
Output to 7A and 97B. Due to the outputs at t4 and t5, the display unit 92 displays an image as shown in FIG. That is, in the display unit 92,
An image display corresponding to the image data of the first screen is displayed on both split display units 92A and 92B. Similarly, in the subsequent period, the controller 98B alternately reads the image data from M1 and M3 and the image data from M2 and M4.

Therefore, at the next t6, the controller 98B reads the image data from M1 and M3.
At this time, the writing of the image data of the second screen is completed only for M1. Therefore, the image data read from M1 is the image data of the second screen, and the image data read from M3 is the image data of the first screen. Similarly, at t7, the image data read from M2 by the controller 98B is the image data of the second screen, and the image data read from M4 is the image data of the first screen. Due to the outputs at t6 and t7, an image display as shown in FIG. 6B is made on the display unit 92. That is, in the display unit 92, the first split display unit 92A displays the image corresponding to the image data of the second screen, and the second split display unit 92B displays the image corresponding to the image data of the first screen. It

Next, the controller 98B reads the image data of the second screen stored in M1 and M3 at t8, and reads the image data of the second screen stored in M2 and M4 at t9. This t8
6 and the output at t9.
The image is displayed as shown in (c). That is, in the display unit 92, the split display units 92A and 92B have
In both cases, the image display corresponding to the image data of the second screen is performed.

That is, as described above, when the memory 98A has a memory capacity capable of storing only one screen of image data, when the image display on the display unit 92 is switched,
In the two divided display portions 92A and 92B, images are displayed with a time-sequential shift.

Therefore, in order to avoid the above-mentioned time-series deviation of the image display, for example, a memory having a capacity more than twice the data capacity corresponding to the total number of pixels of the display unit 92 is provided in the control semiconductor device 98. It may be installed.

The control by the controller 98B in this case is performed, for example, at the timing shown in the explanatory view of FIG. That is, writing and reading of image data are complementarily performed with respect to the first image area including M1 to M4 and the second image area including M1 ′ to M4 ′. As a result, the image data is read out from the first or second image area in which the image data for one screen is surely written.

More specifically, as shown in FIG.
The 8A memory area can be considered by dividing it into eight areas having the same memory capacity. That is, the memory 98A
Has memory areas M1 and M1 ′ for storing image data corresponding to the image displayed in the upper half portion of the first split display portion 92A in FIG. Also, the memory 9
8A has corresponding memory areas M2 and M2 ′ similarly in the lower half of the first divided display portion 92A. Further, the memory 98A includes memory areas M3 and M3 ′ similarly corresponding to the upper half of the second split display section 92B, and a memory area M4 similarly corresponding to the lower half of the second split display section 92B. , M4 ′.

As shown in FIG. 8, at t1, the controller 98B writes the image data of the first screen from the outside into M1. Next, at t2 and t3, the controller 98B sequentially sets the image data of the first screen to M
2 and M3 respectively.

Next, at t4, the controller 98B
Reads the image data of the first screen stored in M1 and M3, outputs it to the corresponding data electrode drivers 97A and 97B, and writes the image data of the first screen in M4. Then, at t5, the controller 98B reads the image data of the first screen stored in M2 and M4 and outputs it to the corresponding data electrode drivers 97A and 97B, respectively.
The image data of the second screen is written in M1 '. Due to the outputs at t4 and t5, the display unit 92 is displayed in FIG.
The image display as shown in FIG. That is, in the display unit 92, the split display units 92A and 92B have
In both cases, the image display corresponding to the image data of the first screen is performed.

Next, at t6, the controller 98B
Reads the image data of the first screen stored in M1 and M3, outputs it to the corresponding data electrode drivers 97A and 97B, and writes the image data of the second screen in M2 '. Then, at t7, the controller 98B reads the image data of the first screen stored in M2 and M4, outputs the image data to the corresponding data electrode drivers 97A and 97B, and the image data of the second screen in M3 ′. Write. This t
By the outputs at 6 and t7, an image display as shown in FIG. 7B is made on the display unit 92. That is,
In the display unit 92, both split display units 92A and 92B display images corresponding to the image data of the first screen, as in the case of t4 and t5.

Next, at t8, the controller 98B
Reads the image data of the second screen stored in M1 'and M3', outputs the image data to the corresponding data electrode drivers 97A and 97B, and outputs it to M4 '.
Write the screen image data. Then, at t9, the controller 98B reads the image data of the second screen stored in M2 ′ and M4 ′ and outputs the image data to the corresponding data electrode drivers 97A and 97B, respectively, and the image of the third screen is displayed in M1. Write the data.
By the outputs at t8 and t9, the image display as shown in FIG. 7C is performed on the display unit 92. That is, in the display unit 92, both split display units 92A, 92
In B, an image display corresponding to the image data of the second screen is displayed.

Therefore, by setting the memory capacity of the memory 98A equal to twice the data capacity corresponding to the total number of pixels of the display section 92, both split display sections 92A at the time of switching the image display on the display section 92. , 92B, it is possible to avoid time-sequential image display shifts.

[0021]

However, in the above display device, the control semiconductor device 98 includes the scan electrode drivers 96A and 96B and the data electrode drivers 97A and 9A.
Since it is provided separately from 7B, it is difficult to reduce the arrangement space and cost. Further, each driver 96A, 96B, 97A, 97B and the control semiconductor device 9
There is a problem that it is difficult to arrange the wiring between the wirings 8 and the like.

When the control semiconductor device 98 in which the memory capacity of the memory 98A is set equal to twice the data capacity corresponding to the total number of pixels of the display section 92 is adopted in a non-divided display type display device, There is a possibility that the memory capacity of the memory 98A becomes excessively large with respect to the memory capacity actually required. That is, it becomes difficult to reduce the cost and to secure high versatility of the control semiconductor device 98.

A first object of the present invention is to be able to obtain high brightness in the display section, and to waste memory capacity when sharing the case of performing split display and non-split display. It is an object of the present invention to provide a data driving semiconductor device that is free from cost and can ensure high versatility. Another object of the present invention is to provide a data driving semiconductor device capable of reducing the number of semiconductor devices in a display device.

A second object is to provide a display device capable of obtaining high brightness in the display portion, reducing the number of semiconductor devices, and reducing the cost. It is in.

[0025]

In order to solve the above-mentioned problems, the invention according to claim 1 can display an image by means of a pixel composed of an element provided at the intersection of a data electrode and a scanning electrode. It is intended for a data driving semiconductor device connected to the data electrode of the display device. Then, in the data driving semiconductor device, a value obtained by dividing the total number of pixels of the display unit of the display device by the number of divided displays of the display unit in the extending direction of the data electrode is multiplied by a natural number of at least 2 or more. It has a memory capable of storing image data of several pixels. In addition, the data driving semiconductor device,
A data driving circuit for outputting a current corresponding to the image data read from the memory to the data electrode is provided. Further, the data driving semiconductor device is configured such that a scanning driving circuit connected to the scanning electrodes is
A controller for generating a synchronization signal for synchronizing the drive of the scan drive circuit and the data drive circuit is provided.

According to the present invention, the number of semiconductor devices in the display device can be reduced as compared with the case where the controller and the memory and the data driving circuit are contained in separate semiconductor devices.

Further, when the data driving semiconductor device is commonly used in the case of performing the split display and the non-split display in the display unit, the surplus of the capacity of the memory is caused when the non-split display is performed. It does not occur and is advantageous in cost. Therefore, it can be said that the data driving semiconductor device has high versatility in common use in the case of performing the split display and the case of performing the non-split display.

According to a second aspect of the present invention, in the first aspect of the present invention, the controller can switch the display control of the display unit between a split display and a non-split display.

According to the present invention, as compared with the data driving semiconductor device in which the display control cannot be switched, it becomes easier to share the data driving semiconductor device in the divided display and the non-divided display.

According to a third aspect of the present invention, in the first or second aspect of the invention, the data driving semiconductor device can be installed corresponding to each divided display section in the divided display of the display section. . Further, the data driving semiconductor device includes a data selection unit for selecting the image data of the corresponding divided display section.

According to the present invention, the image data of each divided display section corresponding to each data driving semiconductor device is selected by each data selecting means. That is, when a plurality of data driving semiconductor devices are used in the display device, it is possible to write only the image data of each corresponding divided display unit into each memory of each data driving semiconductor device. Therefore, the configuration including the data selecting unit is suitable for the split display using a plurality of data driving semiconductor devices.

According to a fourth aspect of the present invention, in the third aspect of the present invention, the data selection means selects the image data of the divided display section corresponding to the data selection means based on a chip select signal from the outside. To do.

According to the present invention, the image data of each divided display portion in the divided display is selected based on the chip select signal from the outside. According to the invention of claim 5,
In the invention according to claim 3, the data selection means selects the corresponding image data of the divided display unit based on the data amount of the image data written in the memory.

According to the present invention, the image data of each divided display portion in the divided display is selected based on the data amount of the image data written in the memory. According to a sixth aspect of the present invention, in the invention according to any one of the first to fifth aspects, the number of divided displays of the display unit is 2, and the memory has a total number of pixels of the display unit. The image data for the same number of pixels can be stored.

According to the present invention, since the memory can store the image data for the two images which are arranged one after another in a time series when performing the two-division display of the display unit, when the two images are switched. It is possible to prevent the images in the two split display units from being displaced in time series from each other.

According to a seventh aspect of the present invention, a data driving semiconductor device connected to the data electrode of a display device capable of displaying an image by a pixel formed of an element provided at an intersection of a data electrode and a scanning electrode. Is intended for. The data driving semiconductor device includes a memory capable of storing image data for at least the total number of pixels of the display section of the display device. Further, the data driving semiconductor device includes a data driving circuit for outputting a current corresponding to the image data read from the memory to the data electrode. Further, the data driving semiconductor device includes a controller that generates a synchronization signal for synchronizing the driving of the scan driving circuit and the data driving circuit with respect to the scan driving circuit connected to the scan electrodes. ing. Then, the controller controls input from the memory of the image data according to the divided display number, and input control for controlling a writing amount and a writing area of the image data to the memory according to the divided display number of the display unit. And the output control for controlling the read area and the read amount. The controller also performs signal control for controlling the synchronization signal according to the read amount.

According to the present invention, the number of semiconductor devices in the display device can be reduced as compared with the case where the controller and the memory and the data driving circuit are contained in separate semiconductor devices. Further, when the data driving semiconductor device is commonly used in the case of performing the split display and the non-split display in the display unit, the surplus of the capacity of the memory does not occur when the non-split display is performed. It is cost effective.

According to an eighth aspect of the present invention, there is provided a display section having a plurality of divided display sections, a data driving semiconductor device for driving an element forming a pixel via a data electrode,
It is intended for a display device including a scan driving semiconductor device for driving the element via a scan electrode. In the display device, the data driving semiconductor device multiplies a value obtained by dividing the total number of pixels of the display unit by the number of divided displays of the display unit in the extending direction of the data electrode by at least a natural number of 2 or more. It has a memory capable of storing image data for the number of pixels. Further, the data driving semiconductor device includes a data driving circuit for outputting a current corresponding to the image data read from the memory to the data electrode. Further, the data driving semiconductor device includes a controller for generating a synchronization signal for synchronizing the driving of the scan driving circuit and the data driving circuit to the scan driving circuit of the scan driving semiconductor device. ing. The data driving semiconductor device is provided corresponding to each of the divided display portions.

According to the present invention, the number of semiconductor devices in the display device can be reduced as compared with the case where the controller and the memory and the data driving circuit are contained in separate semiconductor devices.

According to a ninth aspect of the invention, in the eighth aspect of the invention, the number of divided displays of the display section is two, and the memory has a number of pixels equal to the total number of pixels of the display section. Minute image data can be stored.

According to the present invention, when performing two-divided display on the display unit, the memory can store two images which are arranged in chronological order, so that when the two stored images are switched. It is possible to prevent the images on the two divided display units from being displaced in time series.

[0042]

BEST MODE FOR CARRYING OUT THE INVENTION (First Embodiment) An embodiment in which the present invention is embodied in an organic EL display device will be described below with reference to FIG.

As shown in FIG. 1, an organic EL (electroluminescence) display device 11 as a display device includes
A display panel 13 having a display unit 12 is provided.
The display panel 13 is provided with a plurality of data electrodes 14 and scan electrodes 15, respectively.

The data electrodes 14 are formed in a plurality of parallel stripes extending in the vertical direction of FIG. The data electrode 14 is made of a transparent material such as ITO (indium tin oxide). The scanning electrodes 15 are formed in a plurality of parallel stripes extending in the left-right direction in FIG. The data electrode 14 and the scan electrode 15 are arranged so as to intersect with each other.

Further, in the display section 12, both electrodes 14, 1
At the intersection of 5, the organic E as an element that constitutes a pixel
The L element 16 is provided. Both electrodes 14 and 15 are in a state of being connected to each other through the organic EL element 16. A plurality of organic EL elements 16 are arranged in a matrix. That is, the organic EL display device 11 is a passive matrix type.

The display section 12 is divided into two in the extending direction of the data electrodes 14. That is, the display unit 12 includes the first divided display unit 12A as the upper divided display unit and the second divided display unit 12 as the lower divided display unit in FIG.
It is divided into two parts. That is, the scan electrodes 15 are divided into an upper group corresponding to the first divided display section 12A and a lower group corresponding to the second divided display section 12B.
Hereinafter, the scanning electrode 15 corresponding to the first divided display portion 12A is referred to as a scanning electrode 15A, and the scanning electrode 15 corresponding to the second divided display portion 12B is referred to as a scanning electrode 15B.

Further, the data electrode 14 constituting one data line of the display section 12 is divided into the divided display sections 12A and 12A.
Corresponding to B, they are arranged above and below in FIG. Hereinafter, the first split display unit 12
The data electrode 14 corresponding to A is the data electrode 14A, the second
The data electrode 14 corresponding to the divided display portion 12B is referred to as a data electrode 14B.

As shown in FIG. 1, the organic EL display device 11
Is a first scan driver 17A as a scan driving semiconductor device connected to the scan electrode 15A, and the scan electrode 15
A second scan driver 17B as a scan driving semiconductor device connected to B is provided. Each scan driver 17A,
17B includes a scan drive circuit 1 including a switching element.
8A and 18B are provided, respectively. Corresponding scan electrodes 15A and 15B are connected to the scan drive circuits 18A and 18B, respectively.

In the organic EL display device 11, the first data driver 20A as a data driving semiconductor device connected to the data electrode 14A and the second data driver 20A as a data driving semiconductor device connected to the data electrode 14B. The data driver 20B is provided. Each data driver 20
Each of A and 20B has a one-chip structure.

Each of the data drivers 20A and 20B has a frame memory 21 as a memory capable of storing image data from the outside (a CPU (not shown) in this embodiment).
A and 21B are provided so as to correspond to each other.
Each of the frame memories 21A and 21B has a memory capacity capable of storing image data of two screens of the corresponding divided display sections 12A and 12B, which are located one behind the other in time series. That is, each of the frame memories 21A and 21B has the image data of the number of pixels obtained by multiplying the value obtained by dividing the total number of pixels of the display unit 12 by the number of divided displays of the display unit 12 (2 in this embodiment) by 2. Has a memory capacity capable of storing That is, in the present embodiment, each frame memory 21
Each of A and 21B has a memory capacity equal to the data capacity corresponding to the total number of pixels of the display unit 12. Furthermore, the sum of the memory capacities of the two frame memories 21A and 21B is equal to twice the data capacity corresponding to the total number of pixels of the display unit 12.

Further, the data drivers 20A and 20B are provided with corresponding data drive circuits 22A and 22B, respectively. Each data drive circuit 22A, 2
2B respectively have corresponding data electrodes 14A, 1A.
4B is connected. Each data drive circuit 22A, 22
B outputs currents corresponding to the image data read from the corresponding frame memories 21A and 21B, respectively, to the data electrodes 14A and 14B, respectively.

The data drivers 20A and 20B correspond to the controllers 23A and 20B, respectively.
23B is provided. The controller 23A outputs the image data corresponding to the first divided display section 12A to the data drive circuit 22A, and the scan drive circuit 18
For A, a synchronization signal for synchronizing the drive of both drive circuits 18A and 22A is generated. Also, the controller 2
3B outputs image data corresponding to the second divided display section 12B to the data drive circuit 22B, and a synchronization signal for synchronizing the drive of both drive circuits 18B and 22B to the scan drive circuit 18B. To occur. The control operation between the controllers 23A and 23B is synchronized with each other by a clock pulse or the like input to the controllers 23A and 23B from the outside.

The controllers 23A and 23B are
It respectively controls writing of image data from the outside to the corresponding frame memories 21A and 21B, and reading of image data output to the corresponding data drive circuits 22A and 22B from the frame memories 21A and 21B.

As shown in FIG. 1, image data from the outside is input to both data drivers 20A and 20B. In the present embodiment, a chip select signal is input to both data drivers 20A and 20B together with the image data. As the chip select signal, the above-mentioned image data from the outside is obtained by dividing the first divided display unit 12A and the second divided display unit 1 into one.
It is a signal indicating which one of 2B corresponds. Each controller 23A, 23B writes only the corresponding image data in each corresponding frame memory 21A, 21B based on the chip select signal. That is, each of the controllers 23A and 23B constitutes data selection means.

The above-mentioned control relating to the writing and reading by the controllers 23A and 23B is performed at the same timing as that of the conventional one, for example, as shown in the explanatory view of FIG. That is, the frame memory 21A is provided with memory regions corresponding to the memory regions M1, M2, M1 ', M2' shown in FIG. 8, and the frame memory 21B is similarly provided with memory regions M3, M4, M3 ', M4'. A memory area corresponding to is provided.

In this embodiment, the controller 2
3A controls the respective memory areas corresponding to the memory areas M1, M2, M1 ', M2'. Also,
The controller 23B has memory areas M3, M4, M
The control is performed on the respective memory areas corresponding to 3'and M4 '. That is, the controller 23A performs input control for controlling the amount of image data to be written in the frame memory 21A and the write area (memory area to be written) according to the number of divided displays on the display unit 12. Further, the controller 23A carries out output control for controlling the read area (memory area to be read) and the read amount of the image data from the frame memory 21A according to the display division number. Also, the controller 23B
Performs the same input control and output control as described above for the frame memory 21B.

Then, each controller 23A, 23B
Performs signal control for controlling the synchronization signal according to the read amount. That is, each controller 23A,
23B outputs the synchronization signal to the corresponding scan drive circuits 18A and 18B in accordance with the read amount. The scanning drivers 17A and 17B respectively perform sequential scanning in the corresponding divided display sections 12A and 12B based on the synchronization signal. Then, the current output from each data driver 20A, 20B to each data electrode 14A, 14B and each scan driver 17A synchronized with this current output.
By the sequential scanning of 17B, the corresponding organic EL element 16 emits light. As a result, each controller 23
Image display according to the image data output controlled by A and 23B is performed in the corresponding divided display sections 12A and 12B.

The controllers 23A and 23B are
The display control on the display unit is configured to be switchable between split display and non-split display. As the display control,
In this embodiment, the frame memories 21A and 21B described above are used.
Control for writing and reading, image data output control for each data driver 20A, 20B, synchronization signal output control for each scan driver 17A, 17B, and the like. That is, each controller 23A, 2
3B is configured to be capable of canceling drive synchronization among a plurality of data drivers in the display control regarding the non-divided display type display unit that employs one data driver and one scanning driver. ing.
That is, in this case, each of the controllers 23A and 23B can perform the display control by a single data driver (controller).

When performing non-divided display using the conventional control semiconductor device 98, it is necessary to use a controller equipped with a memory having a capacity capable of storing image data for two screens. Memory is wasted. However, in this embodiment, one data driver (20A, 20B) is used for non-split display, and two data drivers (20A, 20B) are used for two-split display.
A, 20B) is used, there is no waste in using the memory.

In this embodiment, the following effects can be obtained. (1) Frame memory (21A, 21B), data drive circuit (22A, 22B), controller (23
A, 23B) and a common data driver (20A, 20B)
B). According to this, for example, the number of semiconductor devices in the display device can be reduced as compared with the case where the controller and the memory and the data driving circuit are accommodated in different semiconductor devices.

(2) Frame memories 21A and 21B
Are each configured to be able to store image data of a number of pixels obtained by multiplying a value obtained by dividing the total number of pixels of the display unit 12 by the number of divided displays by 2. That is, the frame memory 21
Each of A and 21B has a memory capacity equal to the data capacity corresponding to the total number of pixels of the display unit 12. According to this, when the data driver (one of 20A and 20B) is used in the organic EL display device 11 in which the display unit 12 is the non-divided display type, it corresponds to the total number of pixels of the display unit 12 in the non-divided display type. Since it suffices to secure the memory capacity for the data capacity to be used, there is no surplus in the capacity of the frame memory. That is, there is no waste of cost due to excess memory capacity. Therefore, it can be said that each of the data drivers 20A and 20B has high versatility in common use in the case of performing the split display and the case of performing the non-split display.

(3) The controllers 23A and 23B are
The display control on the display unit is switchable between a split display and a non-split display. Therefore, in comparison with the data driver whose display control cannot be switched,
Since it may not be necessary to switch the external control between the split display and the non-split display, it becomes easy to share the data driver in the split display and the non-split display.

(4) Each data driver 20A, 20B
Is a data selection unit (controller 23) for selecting the corresponding image data of the divided display sections 12A and 12B.
A, 23B). According to this, it becomes possible to write only the image data of the corresponding divided display sections 12A and 12B to the frame memories 21A and 21B. In this case, the data amount of the image data written in each frame memory 21A, 21B is the memory capacity of each frame memory 21A, 21B divided by the number of divided displays. That is, at this point, a memory capacity capable of writing image data corresponding to the image to be displayed next remains in each of the frame memories 21A and 21B. Therefore, the configuration including the data selecting means is suitable for the split display using a plurality of data drivers.

(5) The controllers 23A and 23B (data selection means) are associated with the corresponding divided display sections 12A and 12B.
Image data is selected based on a chip select signal from the outside. Therefore, by the chip select signal, it becomes possible to write only the image data of the corresponding divided display sections 12A and 12B into the frame memories 21A and 21B.

(6) The number of divided displays on the display unit 12 is two, and each of the frame memories 21A and 21B can store the image data of the same number of pixels as the total number of pixels of the display unit 12. It is said that. According to this
When performing two-division display on the display unit 12, each frame memory 21A, 21B can store image data for two images that are sequentially arranged in time series. Therefore, when the two images are switched, each division is performed. It is possible to prevent the images on the display units 12A and 12B from being displaced from each other in time series.

(Second Embodiment) This second embodiment is the same as the controller 23A in the first embodiment.
The method of selecting the image data by 23B (data selecting means) is changed, and the other configurations are the same as those of the first embodiment. Therefore, the same components as those in the first embodiment are designated by the same reference numerals in the drawings, and duplicated description will be omitted.

As shown in FIG. 2, in this embodiment, a signal corresponding to the chip select signal of the first embodiment is not input to each data driver 20A, 20B.
Further, in the present embodiment, image data from the outside (CPU not shown) is input only to the first data driver 20A. As the image data, image data corresponding to the first divided display section 12A and image data corresponding to the second divided display section 12B are alternately input to the first data driver 20A from the outside.

The controller 23A of the first data driver 20A counts the alternately input image data from the start of inputting the image data, and writes the image data in the frame memory 21A. Data amount information indicating the data amount of image data corresponding to an image to be displayed on the first split display unit 12A is stored in the controller 23A in advance. Then, when all the image data (image data having a data amount equal to the data amount information) corresponding to the first split display unit 12A is counted, the controller 23A counts the frame memory 21 of the image data.
The writing to A is completed.

Then, it is judged that the image data inputted thereafter is the image data corresponding to the second divided display section 12B, and the image data is outputted to the second data driver 20B, and at the same time, the second data driver is outputted. The counting of the image data output to 20B is started. That is, the controller 23A selects the image data of the first split display unit 12A based on the data amount of the image data written in the frame memory 21A.

The controller 23B of the second data driver 20B writes the image data input from the first data driver 20A in the frame memory 21B. Further, the controller 23A stores in advance data amount information indicating the data amount of image data corresponding to the image to be displayed on the second split display unit 12B. Then, the controller 23A outputs the image data to the second data driver 20B when all the image data corresponding to the second divided display unit 12B (image data having a data amount equal to the data amount information) are counted. To finish. Then, it is determined that the image data input from the outside thereafter is the image data corresponding to the first split display unit 12A, and the image data is written in the frame memory 21A,
The counting of the image data to be written in the frame memory 21A is started. That is, the controller 23A uses the second
Output to the data driver 20B (that is,
By the controller 23B, the frame memory 2
The image data of the second split display unit 12B is selected based on the data amount of the image data (written in 1B).

In the present embodiment, the controller 23A of the first data driver 20A constitutes the data selection means. In the present embodiment, the following effects can be obtained in addition to the effects similar to the above (1) to (3) and (6).

(7) The data driver 20A has a data selection means (controller 23A) for selecting the image data of the divided display sections 12A and 12B. According to this, it becomes possible to write only the image data of the corresponding divided display sections 12A and 12B to the frame memories 21A and 21B. In this case, the data amount of the image data written in each frame memory 21A, 21B is the memory capacity of each frame memory 21A, 21B divided by the number of divided displays. That is, at this point, a memory capacity capable of writing image data corresponding to the image to be displayed next remains in each of the frame memories 21A and 21B. Therefore, the configuration including the data selecting means is suitable for the split display using a plurality of data drivers.

(8) The controller 23A (data selection means) outputs the image data of the divided display sections 12A and 12B to the data amount of the image data written in the frame memory 21A and the second data driver 20B. Selected based on the amount of image data to be processed. Therefore, on the basis of both the data amounts, the corresponding divided display sections 12 for the respective frame memories 21A and 21B are provided.
Only the image data of A and 12B can be written.

The embodiment is not limited to the above, and the following modes may be adopted, for example. In the above-described embodiment, one data driver (20A, 20B) is provided for each divided display section 12A, 12B, but a plurality of data drivers may be provided for each divided display section 12A, 12B. In this case, for example, the configuration is as shown in FIG. That is, in the organic EL display device 11,
Two data drivers 20A and 20B,
The scanning electrodes 15 are arranged side by side in the extending direction. That is, the data electrode 14A provided on the first split display portion 12A has two
Power from the two first data drivers 20A,
The data electrode 14B provided in the divided display portion 12B receives power from the two second data drivers 20B. Each of the data drivers 20A and 20B has a display unit 12
Since the frame memories 21A and 21B corresponding to the image data of the corresponding display portion are provided in the above, according to the above configuration, by providing a plurality of each data driver 20A and 20B, the display in the extending direction of the scanning electrode 15 is performed. The extension of the part 12 can be easily performed.

In the above embodiment, the frame memories 21A and 21B each have a memory capacity equal to the data capacity corresponding to the total number of pixels of the display unit 12, but a memory capacity slightly larger than the data capacity. It may be configured to have each of the above.

In the above embodiment, each of the frame memories 21A and 21B is configured to be able to store image data regarding two images that are sequentially arranged in time series, but the present invention is not limited to this. That is, each frame memory 21A, 21
N before and after B in chronological order (n is a natural number of 3 or more)
The image data regarding the above images may be stored. In this case, each frame memory 21A, 21B
Is configured to be able to store image data for a number of pixels obtained by multiplying a value obtained by dividing the total number of pixels of the display unit 12 by the number of divided displays by n.

The data selecting means may not be provided in each of the data drivers 20A and 20B.
In this case, only the corresponding image data is externally input to the data driver corresponding to each of the divided display sections 12A and 12B.

The controllers 23A and 23B are configured to be able to switch the display control between split display and non-split display, but the present invention is not limited to this. Each controller 23
A and 23B may be configured to be used for split display and non-split display by switching the control on the external side.

In the above embodiment, each data driver 20A, 20B has a one-chip structure.
It is not limited to this. Each data driver 20A, 20B
May have a module structure including a plurality of chips.

In the above embodiment, the image data input to each of the data drivers 20A and 20B (only the first data driver 20A in the second embodiment), the chip select signal (only in the first embodiment), and The clock pulse and the like are input from the outside (CPU). On the other hand, a logic circuit is provided in the organic EL display device 11, and the image data, the chip select signal,
Also, the clock pulse and the like may be input from the logic circuit.

In the above-described embodiment, the element forming the pixel is an organic EL element, but instead of this, an inorganic EL element may be used, or a liquid crystal element may be used. The present invention is not limited to being embodied in a display device (organic EL display device 11) in which the display unit (display unit 12) is divided into two. For example, the display unit may be embodied in a display device divided into three or more.

[0082]

As described in detail above, according to the inventions described in claims 1 to 7, in the data driving semiconductor device,
It is possible to obtain a high brightness in the display section, and when the divided display and the non-divided display are shared, the memory capacity is not wasted, and cost reduction and high versatility can be secured. It will be possible. In addition, the number of semiconductor devices in the display device can be reduced.

According to the eighth and ninth aspects of the present invention, in the display device, it is possible to obtain high brightness in the display portion, it is possible to reduce the number of semiconductor devices, and the cost is reduced. It becomes possible to plan.

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram of an organic EL display device according to a first embodiment.

FIG. 2 is a schematic configuration diagram of an organic EL display device according to a second embodiment.

FIG. 3 is a schematic configuration diagram of another example of an organic EL display device.

FIG. 4 is a schematic configuration diagram of a display device in the related art.

FIG. 5 is an explanatory view of control by the controller.

FIGS. 6A, 6B, and 6C are explanatory views each showing an image display state of the display unit.

7 (a), (b) and (c) are explanatory views showing image display states of a display unit, respectively.

FIG. 8 is an explanatory diagram related to control by a controller.

[Explanation of symbols]

11 ... Organic EL display device as display device, 12 ... Display unit, 12A ... First split display unit as split display unit, 12
B ... Second split display section as split display section, 13 ... Display panel, 14 (14A, 14B) ... Data electrode, 15 (1
5A, 15B) ... Scan electrode, 16 ... Organic E as element
L element, 17A ... First scan driver as scan driving semiconductor device, 17B ... Second scan driver as scan driving semiconductor device, 18A, 18B ... Scan driving circuit, 20
A ... First data driver as data driving semiconductor device, 20B ... Second data driver as data driving semiconductor device, 21A, 21B ... Frame memory as memory, 22A, 22B ... Data driving circuit, 23A, 2
3B ... Controller (23A and 23B in the first embodiment and 23A in the second embodiment constitute data selection means).

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) G09G 3/20 G09G 3/20 631Q 631R 641 641D H05B 33/14 H05B 33/14 A

Claims (9)

[Claims] 1. A data driving semiconductor device connected to the data electrode of a display device capable of displaying an image by a pixel including an element provided at an intersection of a data electrode and a scanning electrode, the display device. To the value obtained by dividing the total number of pixels of the display section by the number of divided displays of the display section in the extending direction of the data electrode,
A memory capable of storing image data for a number of pixels multiplied by a natural number of at least 2; a data drive circuit for outputting a current corresponding to the image data read from the memory to the data electrode; A data driving semiconductor device comprising: a controller for generating a synchronization signal for synchronizing the driving of the scan driving circuit and the data driving circuit with respect to the scan driving circuit connected to the scan electrode. 2. The data driving semiconductor device according to claim 1, wherein the controller is capable of switching the display control of the display unit between a split display and a non-split display. 3. A data selection unit which can be installed corresponding to each divided display unit in the divided display of the display unit, and further comprises data selection means for selecting the image data of the corresponding divided display unit. Alternatively, the data driving semiconductor device described in 2. 4. The data driving semiconductor device according to claim 3, wherein the data selecting means selects the image data of the divided display section corresponding to the data selecting means based on a chip select signal from the outside. 5. The data driving semiconductor device according to claim 3, wherein the data selecting unit selects the corresponding image data of the divided display unit based on a data amount of the image data written in the memory. . 6. The number of divided displays of the display unit is 2, and the memory is configured to be able to store image data for a number of pixels equal to the total number of pixels of the display unit. 6. The data driving semiconductor device according to any one of items 1 to 5. 7. A data driving semiconductor device connected to the data electrode of a display device capable of displaying an image by a pixel including an element provided at an intersection of a data electrode and a scanning electrode, the display device A memory capable of storing image data for at least all pixels of the display section, a data drive circuit for outputting a current corresponding to the image data read from the memory to the data electrode, the scan electrode A controller for generating a synchronization signal for synchronizing the drive of the scan drive circuit and the data drive circuit with respect to the scan drive circuit connected to the Input control for controlling the writing amount and writing area of the image data to the memory according to the number of divided displays, and the image data of the image data according to the number of divided displays. An output control for controlling the read area and the read amount of the Li, the data driver semiconductor device for implementing a signal control for controlling the synchronization signal in response to the read amount. 8. A display unit having a plurality of divided display units, a data driving semiconductor device for driving an element forming a pixel through a data electrode, and a device for driving the element through a scanning electrode. A display device comprising a scan driving semiconductor device, wherein the data driving semiconductor device is a value obtained by dividing the total number of pixels of the display unit by the number of divided displays of the display unit in the extending direction of the data electrode. A memory capable of storing image data for a number of pixels multiplied by at least two natural numbers, and a data drive circuit for outputting a current corresponding to the image data read from the memory to the data electrode. And a controller for generating, to the scan drive circuit of the scan drive semiconductor device, a synchronization signal for synchronizing the drive of the scan drive circuit and the data drive circuit. Moni, a display device is provided in correspondence to the respective divided display unit. 9. The display unit has a divided display number of 2, and the memory is configured to store image data of a number of pixels equal to the total number of pixels of the display unit. Display device according to.